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1 | 5052d227 | Michael Walle | /*
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2 | 5052d227 | Michael Walle | * QEMU model for the Milkymist board.
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3 | 5052d227 | Michael Walle | *
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4 | 5052d227 | Michael Walle | * Copyright (c) 2010 Michael Walle <michael@walle.cc>
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5 | 5052d227 | Michael Walle | *
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6 | 5052d227 | Michael Walle | * This library is free software; you can redistribute it and/or
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7 | 5052d227 | Michael Walle | * modify it under the terms of the GNU Lesser General Public
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8 | 5052d227 | Michael Walle | * License as published by the Free Software Foundation; either
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9 | 5052d227 | Michael Walle | * version 2 of the License, or (at your option) any later version.
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10 | 5052d227 | Michael Walle | *
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11 | 5052d227 | Michael Walle | * This library is distributed in the hope that it will be useful,
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12 | 5052d227 | Michael Walle | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 5052d227 | Michael Walle | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 5052d227 | Michael Walle | * Lesser General Public License for more details.
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15 | 5052d227 | Michael Walle | *
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16 | 5052d227 | Michael Walle | * You should have received a copy of the GNU Lesser General Public
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17 | 5052d227 | Michael Walle | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 | 5052d227 | Michael Walle | */
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19 | 5052d227 | Michael Walle | |
20 | 5052d227 | Michael Walle | #include "sysbus.h" |
21 | 5052d227 | Michael Walle | #include "hw.h" |
22 | 5052d227 | Michael Walle | #include "net.h" |
23 | 5052d227 | Michael Walle | #include "flash.h" |
24 | 5052d227 | Michael Walle | #include "sysemu.h" |
25 | 5052d227 | Michael Walle | #include "devices.h" |
26 | 5052d227 | Michael Walle | #include "boards.h" |
27 | 5052d227 | Michael Walle | #include "loader.h" |
28 | 5052d227 | Michael Walle | #include "elf.h" |
29 | 5052d227 | Michael Walle | #include "blockdev.h" |
30 | 5052d227 | Michael Walle | #include "milkymist-hw.h" |
31 | 5052d227 | Michael Walle | #include "lm32.h" |
32 | 5052d227 | Michael Walle | |
33 | 5052d227 | Michael Walle | #define BIOS_FILENAME "mmone-bios.bin" |
34 | 5052d227 | Michael Walle | #define BIOS_OFFSET 0x00860000 |
35 | 5052d227 | Michael Walle | #define BIOS_SIZE (512*1024) |
36 | 5052d227 | Michael Walle | #define KERNEL_LOAD_ADDR 0x40000000 |
37 | 5052d227 | Michael Walle | |
38 | 5052d227 | Michael Walle | typedef struct { |
39 | 5052d227 | Michael Walle | CPUState *env; |
40 | 5052d227 | Michael Walle | target_phys_addr_t bootstrap_pc; |
41 | 5052d227 | Michael Walle | target_phys_addr_t flash_base; |
42 | 5052d227 | Michael Walle | target_phys_addr_t initrd_base; |
43 | 5052d227 | Michael Walle | size_t initrd_size; |
44 | 5052d227 | Michael Walle | target_phys_addr_t cmdline_base; |
45 | 5052d227 | Michael Walle | } ResetInfo; |
46 | 5052d227 | Michael Walle | |
47 | 5052d227 | Michael Walle | static void cpu_irq_handler(void *opaque, int irq, int level) |
48 | 5052d227 | Michael Walle | { |
49 | 5052d227 | Michael Walle | CPUState *env = opaque; |
50 | 5052d227 | Michael Walle | |
51 | 5052d227 | Michael Walle | if (level) {
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52 | 5052d227 | Michael Walle | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
53 | 5052d227 | Michael Walle | } else {
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54 | 5052d227 | Michael Walle | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
55 | 5052d227 | Michael Walle | } |
56 | 5052d227 | Michael Walle | } |
57 | 5052d227 | Michael Walle | |
58 | 5052d227 | Michael Walle | static void main_cpu_reset(void *opaque) |
59 | 5052d227 | Michael Walle | { |
60 | 5052d227 | Michael Walle | ResetInfo *reset_info = opaque; |
61 | 5052d227 | Michael Walle | CPUState *env = reset_info->env; |
62 | 5052d227 | Michael Walle | |
63 | 5052d227 | Michael Walle | cpu_reset(env); |
64 | 5052d227 | Michael Walle | |
65 | 5052d227 | Michael Walle | /* init defaults */
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66 | 5052d227 | Michael Walle | env->pc = reset_info->bootstrap_pc; |
67 | 5052d227 | Michael Walle | env->regs[R_R1] = reset_info->cmdline_base; |
68 | 5052d227 | Michael Walle | env->regs[R_R2] = reset_info->initrd_base; |
69 | 5052d227 | Michael Walle | env->regs[R_R3] = reset_info->initrd_base + reset_info->initrd_size; |
70 | 5052d227 | Michael Walle | env->eba = reset_info->flash_base; |
71 | 5052d227 | Michael Walle | env->deba = reset_info->flash_base; |
72 | 5052d227 | Michael Walle | } |
73 | 5052d227 | Michael Walle | |
74 | 5052d227 | Michael Walle | static void |
75 | 5052d227 | Michael Walle | milkymist_init(ram_addr_t ram_size_not_used, |
76 | 5052d227 | Michael Walle | const char *boot_device, |
77 | 5052d227 | Michael Walle | const char *kernel_filename, |
78 | 5052d227 | Michael Walle | const char *kernel_cmdline, |
79 | 5052d227 | Michael Walle | const char *initrd_filename, const char *cpu_model) |
80 | 5052d227 | Michael Walle | { |
81 | 5052d227 | Michael Walle | CPUState *env; |
82 | 5052d227 | Michael Walle | int kernel_size;
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83 | 5052d227 | Michael Walle | DriveInfo *dinfo; |
84 | 5052d227 | Michael Walle | ram_addr_t phys_sdram; |
85 | 5052d227 | Michael Walle | ram_addr_t phys_flash; |
86 | 5052d227 | Michael Walle | qemu_irq irq[32], *cpu_irq;
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87 | 5052d227 | Michael Walle | int i;
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88 | 5052d227 | Michael Walle | char *bios_filename;
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89 | 5052d227 | Michael Walle | ResetInfo *reset_info; |
90 | 5052d227 | Michael Walle | |
91 | 5052d227 | Michael Walle | /* memory map */
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92 | 5052d227 | Michael Walle | target_phys_addr_t flash_base = 0x00000000;
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93 | 5052d227 | Michael Walle | size_t flash_sector_size = 128 * 1024; |
94 | 5052d227 | Michael Walle | size_t flash_size = 32 * 1024 * 1024; |
95 | 5052d227 | Michael Walle | target_phys_addr_t sdram_base = 0x40000000;
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96 | 5052d227 | Michael Walle | size_t sdram_size = 128 * 1024 * 1024; |
97 | 5052d227 | Michael Walle | |
98 | 5052d227 | Michael Walle | target_phys_addr_t initrd_base = sdram_base + 0x1002000;
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99 | 5052d227 | Michael Walle | target_phys_addr_t cmdline_base = sdram_base + 0x1000000;
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100 | 5052d227 | Michael Walle | size_t initrd_max = sdram_size - 0x1002000;
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101 | 5052d227 | Michael Walle | |
102 | 5052d227 | Michael Walle | reset_info = qemu_mallocz(sizeof(ResetInfo));
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103 | 5052d227 | Michael Walle | |
104 | 5052d227 | Michael Walle | if (cpu_model == NULL) { |
105 | 5052d227 | Michael Walle | cpu_model = "lm32-full";
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106 | 5052d227 | Michael Walle | } |
107 | 5052d227 | Michael Walle | env = cpu_init(cpu_model); |
108 | 5052d227 | Michael Walle | reset_info->env = env; |
109 | 5052d227 | Michael Walle | |
110 | 5052d227 | Michael Walle | cpu_lm32_set_phys_msb_ignore(env, 1);
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111 | 5052d227 | Michael Walle | |
112 | 5052d227 | Michael Walle | phys_sdram = qemu_ram_alloc(NULL, "milkymist.sdram", sdram_size); |
113 | 5052d227 | Michael Walle | cpu_register_physical_memory(sdram_base, sdram_size, |
114 | 5052d227 | Michael Walle | phys_sdram | IO_MEM_RAM); |
115 | 5052d227 | Michael Walle | |
116 | 5052d227 | Michael Walle | phys_flash = qemu_ram_alloc(NULL, "milkymist.flash", flash_size); |
117 | 5052d227 | Michael Walle | dinfo = drive_get(IF_PFLASH, 0, 0); |
118 | 5052d227 | Michael Walle | /* Numonyx JS28F256J3F105 */
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119 | 5052d227 | Michael Walle | pflash_cfi01_register(flash_base, phys_flash, |
120 | 5052d227 | Michael Walle | dinfo ? dinfo->bdrv : NULL, flash_sector_size,
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121 | 5052d227 | Michael Walle | flash_size / flash_sector_size, 2,
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122 | 5052d227 | Michael Walle | 0x00, 0x89, 0x00, 0x1d, 1); |
123 | 5052d227 | Michael Walle | |
124 | 5052d227 | Michael Walle | /* create irq lines */
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125 | 5052d227 | Michael Walle | cpu_irq = qemu_allocate_irqs(cpu_irq_handler, env, 1);
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126 | 5052d227 | Michael Walle | env->pic_state = lm32_pic_init(*cpu_irq); |
127 | 5052d227 | Michael Walle | for (i = 0; i < 32; i++) { |
128 | 5052d227 | Michael Walle | irq[i] = qdev_get_gpio_in(env->pic_state, i); |
129 | 5052d227 | Michael Walle | } |
130 | 5052d227 | Michael Walle | |
131 | 5052d227 | Michael Walle | /* load bios rom */
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132 | 5052d227 | Michael Walle | if (bios_name == NULL) { |
133 | 5052d227 | Michael Walle | bios_name = BIOS_FILENAME; |
134 | 5052d227 | Michael Walle | } |
135 | 5052d227 | Michael Walle | bios_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
136 | 5052d227 | Michael Walle | |
137 | 5052d227 | Michael Walle | if (bios_filename) {
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138 | 5052d227 | Michael Walle | load_image_targphys(bios_filename, BIOS_OFFSET, BIOS_SIZE); |
139 | 5052d227 | Michael Walle | } |
140 | 5052d227 | Michael Walle | |
141 | 5052d227 | Michael Walle | reset_info->bootstrap_pc = BIOS_OFFSET; |
142 | 5052d227 | Michael Walle | |
143 | 5052d227 | Michael Walle | /* if no kernel is given no valid bios rom is a fatal error */
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144 | 5052d227 | Michael Walle | if (!kernel_filename && !dinfo && !bios_filename) {
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145 | 5052d227 | Michael Walle | fprintf(stderr, "qemu: could not load Milkymist One bios '%s'\n",
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146 | 5052d227 | Michael Walle | bios_name); |
147 | 5052d227 | Michael Walle | exit(1);
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148 | 5052d227 | Michael Walle | } |
149 | 5052d227 | Michael Walle | |
150 | 5052d227 | Michael Walle | milkymist_uart_create(0x60000000, irq[0], irq[1]); |
151 | 5052d227 | Michael Walle | milkymist_sysctl_create(0x60001000, irq[2], irq[3], irq[4], |
152 | 5052d227 | Michael Walle | 80000000, 0x10014d31, 0x0000041f, 0x00000001); |
153 | 5052d227 | Michael Walle | milkymist_hpdmc_create(0x60002000);
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154 | 5052d227 | Michael Walle | milkymist_vgafb_create(0x60003000, 0x40000000, 0x0fffffff); |
155 | 5052d227 | Michael Walle | milkymist_memcard_create(0x60004000);
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156 | 5052d227 | Michael Walle | milkymist_ac97_create(0x60005000, irq[5], irq[6], irq[7], irq[8]); |
157 | 5052d227 | Michael Walle | milkymist_pfpu_create(0x60006000, irq[9]); |
158 | 5052d227 | Michael Walle | milkymist_tmu2_create(0x60007000, irq[10]); |
159 | 57aa265d | Michael Walle | milkymist_minimac2_create(0x60008000, 0x30000000, irq[11], irq[12]); |
160 | 5052d227 | Michael Walle | milkymist_softusb_create(0x6000f000, irq[17], |
161 | 5052d227 | Michael Walle | 0x20000000, 0x1000, 0x20020000, 0x2000); |
162 | 5052d227 | Michael Walle | |
163 | 5052d227 | Michael Walle | /* make sure juart isn't the first chardev */
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164 | 5052d227 | Michael Walle | env->juart_state = lm32_juart_init(); |
165 | 5052d227 | Michael Walle | |
166 | 5052d227 | Michael Walle | if (kernel_filename) {
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167 | 5052d227 | Michael Walle | uint64_t entry; |
168 | 5052d227 | Michael Walle | |
169 | 5052d227 | Michael Walle | /* Boots a kernel elf binary. */
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170 | 5052d227 | Michael Walle | kernel_size = load_elf(kernel_filename, NULL, NULL, &entry, NULL, NULL, |
171 | 5052d227 | Michael Walle | 1, ELF_MACHINE, 0); |
172 | 5052d227 | Michael Walle | reset_info->bootstrap_pc = entry; |
173 | 5052d227 | Michael Walle | |
174 | 5052d227 | Michael Walle | if (kernel_size < 0) { |
175 | 5052d227 | Michael Walle | kernel_size = load_image_targphys(kernel_filename, sdram_base, |
176 | 5052d227 | Michael Walle | sdram_size); |
177 | 5052d227 | Michael Walle | reset_info->bootstrap_pc = sdram_base; |
178 | 5052d227 | Michael Walle | } |
179 | 5052d227 | Michael Walle | |
180 | 5052d227 | Michael Walle | if (kernel_size < 0) { |
181 | 5052d227 | Michael Walle | fprintf(stderr, "qemu: could not load kernel '%s'\n",
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182 | 5052d227 | Michael Walle | kernel_filename); |
183 | 5052d227 | Michael Walle | exit(1);
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184 | 5052d227 | Michael Walle | } |
185 | 5052d227 | Michael Walle | } |
186 | 5052d227 | Michael Walle | |
187 | 5052d227 | Michael Walle | if (kernel_cmdline && strlen(kernel_cmdline)) {
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188 | 5052d227 | Michael Walle | pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE,
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189 | 5052d227 | Michael Walle | kernel_cmdline); |
190 | 5052d227 | Michael Walle | reset_info->cmdline_base = (uint32_t)cmdline_base; |
191 | 5052d227 | Michael Walle | } |
192 | 5052d227 | Michael Walle | |
193 | 5052d227 | Michael Walle | if (initrd_filename) {
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194 | 5052d227 | Michael Walle | size_t initrd_size; |
195 | 5052d227 | Michael Walle | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
196 | 5052d227 | Michael Walle | initrd_max); |
197 | 5052d227 | Michael Walle | reset_info->initrd_base = (uint32_t)initrd_base; |
198 | 5052d227 | Michael Walle | reset_info->initrd_size = (uint32_t)initrd_size; |
199 | 5052d227 | Michael Walle | } |
200 | 5052d227 | Michael Walle | |
201 | 5052d227 | Michael Walle | qemu_register_reset(main_cpu_reset, reset_info); |
202 | 5052d227 | Michael Walle | } |
203 | 5052d227 | Michael Walle | |
204 | 5052d227 | Michael Walle | static QEMUMachine milkymist_machine = {
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205 | 5052d227 | Michael Walle | .name = "milkymist",
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206 | 5052d227 | Michael Walle | .desc = "Milkymist One",
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207 | 5052d227 | Michael Walle | .init = milkymist_init, |
208 | 5052d227 | Michael Walle | .is_default = 0
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209 | 5052d227 | Michael Walle | }; |
210 | 5052d227 | Michael Walle | |
211 | 5052d227 | Michael Walle | static void milkymist_machine_init(void) |
212 | 5052d227 | Michael Walle | { |
213 | 5052d227 | Michael Walle | qemu_register_machine(&milkymist_machine); |
214 | 5052d227 | Michael Walle | } |
215 | 5052d227 | Michael Walle | |
216 | 5052d227 | Michael Walle | machine_init(milkymist_machine_init); |