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1 | 5391d806 | bellard | /*
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2 | 5391d806 | bellard | * QEMU IDE disk and CD-ROM Emulator
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3 | 5391d806 | bellard | *
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4 | 5391d806 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 5391d806 | bellard | *
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6 | 5391d806 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 5391d806 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 5391d806 | bellard | * in the Software without restriction, including without limitation the rights
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9 | 5391d806 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 5391d806 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 5391d806 | bellard | * furnished to do so, subject to the following conditions:
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12 | 5391d806 | bellard | *
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13 | 5391d806 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 5391d806 | bellard | * all copies or substantial portions of the Software.
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15 | 5391d806 | bellard | *
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16 | 5391d806 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 5391d806 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 5391d806 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 5391d806 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 5391d806 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 5391d806 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 5391d806 | bellard | * THE SOFTWARE.
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23 | 5391d806 | bellard | */
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24 | 5391d806 | bellard | #include "vl.h" |
25 | 5391d806 | bellard | |
26 | 5391d806 | bellard | /* debug IDE devices */
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27 | 5391d806 | bellard | //#define DEBUG_IDE
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28 | 5391d806 | bellard | //#define DEBUG_IDE_ATAPI
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29 | 5391d806 | bellard | |
30 | 5391d806 | bellard | /* Bits of HD_STATUS */
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31 | 5391d806 | bellard | #define ERR_STAT 0x01 |
32 | 5391d806 | bellard | #define INDEX_STAT 0x02 |
33 | 5391d806 | bellard | #define ECC_STAT 0x04 /* Corrected error */ |
34 | 5391d806 | bellard | #define DRQ_STAT 0x08 |
35 | 5391d806 | bellard | #define SEEK_STAT 0x10 |
36 | 5391d806 | bellard | #define SRV_STAT 0x10 |
37 | 5391d806 | bellard | #define WRERR_STAT 0x20 |
38 | 5391d806 | bellard | #define READY_STAT 0x40 |
39 | 5391d806 | bellard | #define BUSY_STAT 0x80 |
40 | 5391d806 | bellard | |
41 | 5391d806 | bellard | /* Bits for HD_ERROR */
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42 | 5391d806 | bellard | #define MARK_ERR 0x01 /* Bad address mark */ |
43 | 5391d806 | bellard | #define TRK0_ERR 0x02 /* couldn't find track 0 */ |
44 | 5391d806 | bellard | #define ABRT_ERR 0x04 /* Command aborted */ |
45 | 5391d806 | bellard | #define MCR_ERR 0x08 /* media change request */ |
46 | 5391d806 | bellard | #define ID_ERR 0x10 /* ID field not found */ |
47 | 5391d806 | bellard | #define MC_ERR 0x20 /* media changed */ |
48 | 5391d806 | bellard | #define ECC_ERR 0x40 /* Uncorrectable ECC error */ |
49 | 5391d806 | bellard | #define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */ |
50 | 5391d806 | bellard | #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */ |
51 | 5391d806 | bellard | |
52 | 5391d806 | bellard | /* Bits of HD_NSECTOR */
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53 | 5391d806 | bellard | #define CD 0x01 |
54 | 5391d806 | bellard | #define IO 0x02 |
55 | 5391d806 | bellard | #define REL 0x04 |
56 | 5391d806 | bellard | #define TAG_MASK 0xf8 |
57 | 5391d806 | bellard | |
58 | 5391d806 | bellard | #define IDE_CMD_RESET 0x04 |
59 | 5391d806 | bellard | #define IDE_CMD_DISABLE_IRQ 0x02 |
60 | 5391d806 | bellard | |
61 | 5391d806 | bellard | /* ATA/ATAPI Commands pre T13 Spec */
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62 | 5391d806 | bellard | #define WIN_NOP 0x00 |
63 | 5391d806 | bellard | /*
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64 | 5391d806 | bellard | * 0x01->0x02 Reserved
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65 | 5391d806 | bellard | */
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66 | 5391d806 | bellard | #define CFA_REQ_EXT_ERROR_CODE 0x03 /* CFA Request Extended Error Code */ |
67 | 5391d806 | bellard | /*
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68 | 5391d806 | bellard | * 0x04->0x07 Reserved
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69 | 5391d806 | bellard | */
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70 | 5391d806 | bellard | #define WIN_SRST 0x08 /* ATAPI soft reset command */ |
71 | 5391d806 | bellard | #define WIN_DEVICE_RESET 0x08 |
72 | 5391d806 | bellard | /*
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73 | 5391d806 | bellard | * 0x09->0x0F Reserved
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74 | 5391d806 | bellard | */
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75 | 5391d806 | bellard | #define WIN_RECAL 0x10 |
76 | 5391d806 | bellard | #define WIN_RESTORE WIN_RECAL
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77 | 5391d806 | bellard | /*
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78 | 5391d806 | bellard | * 0x10->0x1F Reserved
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79 | 5391d806 | bellard | */
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80 | 5391d806 | bellard | #define WIN_READ 0x20 /* 28-Bit */ |
81 | 5391d806 | bellard | #define WIN_READ_ONCE 0x21 /* 28-Bit without retries */ |
82 | 5391d806 | bellard | #define WIN_READ_LONG 0x22 /* 28-Bit */ |
83 | 5391d806 | bellard | #define WIN_READ_LONG_ONCE 0x23 /* 28-Bit without retries */ |
84 | 5391d806 | bellard | #define WIN_READ_EXT 0x24 /* 48-Bit */ |
85 | 5391d806 | bellard | #define WIN_READDMA_EXT 0x25 /* 48-Bit */ |
86 | 5391d806 | bellard | #define WIN_READDMA_QUEUED_EXT 0x26 /* 48-Bit */ |
87 | 5391d806 | bellard | #define WIN_READ_NATIVE_MAX_EXT 0x27 /* 48-Bit */ |
88 | 5391d806 | bellard | /*
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89 | 5391d806 | bellard | * 0x28
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90 | 5391d806 | bellard | */
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91 | 5391d806 | bellard | #define WIN_MULTREAD_EXT 0x29 /* 48-Bit */ |
92 | 5391d806 | bellard | /*
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93 | 5391d806 | bellard | * 0x2A->0x2F Reserved
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94 | 5391d806 | bellard | */
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95 | 5391d806 | bellard | #define WIN_WRITE 0x30 /* 28-Bit */ |
96 | 5391d806 | bellard | #define WIN_WRITE_ONCE 0x31 /* 28-Bit without retries */ |
97 | 5391d806 | bellard | #define WIN_WRITE_LONG 0x32 /* 28-Bit */ |
98 | 5391d806 | bellard | #define WIN_WRITE_LONG_ONCE 0x33 /* 28-Bit without retries */ |
99 | 5391d806 | bellard | #define WIN_WRITE_EXT 0x34 /* 48-Bit */ |
100 | 5391d806 | bellard | #define WIN_WRITEDMA_EXT 0x35 /* 48-Bit */ |
101 | 5391d806 | bellard | #define WIN_WRITEDMA_QUEUED_EXT 0x36 /* 48-Bit */ |
102 | 5391d806 | bellard | #define WIN_SET_MAX_EXT 0x37 /* 48-Bit */ |
103 | 5391d806 | bellard | #define CFA_WRITE_SECT_WO_ERASE 0x38 /* CFA Write Sectors without erase */ |
104 | 5391d806 | bellard | #define WIN_MULTWRITE_EXT 0x39 /* 48-Bit */ |
105 | 5391d806 | bellard | /*
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106 | 5391d806 | bellard | * 0x3A->0x3B Reserved
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107 | 5391d806 | bellard | */
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108 | 5391d806 | bellard | #define WIN_WRITE_VERIFY 0x3C /* 28-Bit */ |
109 | 5391d806 | bellard | /*
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110 | 5391d806 | bellard | * 0x3D->0x3F Reserved
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111 | 5391d806 | bellard | */
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112 | 5391d806 | bellard | #define WIN_VERIFY 0x40 /* 28-Bit - Read Verify Sectors */ |
113 | 5391d806 | bellard | #define WIN_VERIFY_ONCE 0x41 /* 28-Bit - without retries */ |
114 | 5391d806 | bellard | #define WIN_VERIFY_EXT 0x42 /* 48-Bit */ |
115 | 5391d806 | bellard | /*
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116 | 5391d806 | bellard | * 0x43->0x4F Reserved
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117 | 5391d806 | bellard | */
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118 | 5391d806 | bellard | #define WIN_FORMAT 0x50 |
119 | 5391d806 | bellard | /*
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120 | 5391d806 | bellard | * 0x51->0x5F Reserved
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121 | 5391d806 | bellard | */
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122 | 5391d806 | bellard | #define WIN_INIT 0x60 |
123 | 5391d806 | bellard | /*
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124 | 5391d806 | bellard | * 0x61->0x5F Reserved
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125 | 5391d806 | bellard | */
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126 | 5391d806 | bellard | #define WIN_SEEK 0x70 /* 0x70-0x7F Reserved */ |
127 | 5391d806 | bellard | #define CFA_TRANSLATE_SECTOR 0x87 /* CFA Translate Sector */ |
128 | 5391d806 | bellard | #define WIN_DIAGNOSE 0x90 |
129 | 5391d806 | bellard | #define WIN_SPECIFY 0x91 /* set drive geometry translation */ |
130 | 5391d806 | bellard | #define WIN_DOWNLOAD_MICROCODE 0x92 |
131 | 5391d806 | bellard | #define WIN_STANDBYNOW2 0x94 |
132 | 5391d806 | bellard | #define WIN_STANDBY2 0x96 |
133 | 5391d806 | bellard | #define WIN_SETIDLE2 0x97 |
134 | 5391d806 | bellard | #define WIN_CHECKPOWERMODE2 0x98 |
135 | 5391d806 | bellard | #define WIN_SLEEPNOW2 0x99 |
136 | 5391d806 | bellard | /*
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137 | 5391d806 | bellard | * 0x9A VENDOR
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138 | 5391d806 | bellard | */
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139 | 5391d806 | bellard | #define WIN_PACKETCMD 0xA0 /* Send a packet command. */ |
140 | 5391d806 | bellard | #define WIN_PIDENTIFY 0xA1 /* identify ATAPI device */ |
141 | 5391d806 | bellard | #define WIN_QUEUED_SERVICE 0xA2 |
142 | 5391d806 | bellard | #define WIN_SMART 0xB0 /* self-monitoring and reporting */ |
143 | 5391d806 | bellard | #define CFA_ERASE_SECTORS 0xC0 |
144 | 5391d806 | bellard | #define WIN_MULTREAD 0xC4 /* read sectors using multiple mode*/ |
145 | 5391d806 | bellard | #define WIN_MULTWRITE 0xC5 /* write sectors using multiple mode */ |
146 | 5391d806 | bellard | #define WIN_SETMULT 0xC6 /* enable/disable multiple mode */ |
147 | 5391d806 | bellard | #define WIN_READDMA_QUEUED 0xC7 /* read sectors using Queued DMA transfers */ |
148 | 5391d806 | bellard | #define WIN_READDMA 0xC8 /* read sectors using DMA transfers */ |
149 | 5391d806 | bellard | #define WIN_READDMA_ONCE 0xC9 /* 28-Bit - without retries */ |
150 | 5391d806 | bellard | #define WIN_WRITEDMA 0xCA /* write sectors using DMA transfers */ |
151 | 5391d806 | bellard | #define WIN_WRITEDMA_ONCE 0xCB /* 28-Bit - without retries */ |
152 | 5391d806 | bellard | #define WIN_WRITEDMA_QUEUED 0xCC /* write sectors using Queued DMA transfers */ |
153 | 5391d806 | bellard | #define CFA_WRITE_MULTI_WO_ERASE 0xCD /* CFA Write multiple without erase */ |
154 | 5391d806 | bellard | #define WIN_GETMEDIASTATUS 0xDA |
155 | 5391d806 | bellard | #define WIN_ACKMEDIACHANGE 0xDB /* ATA-1, ATA-2 vendor */ |
156 | 5391d806 | bellard | #define WIN_POSTBOOT 0xDC |
157 | 5391d806 | bellard | #define WIN_PREBOOT 0xDD |
158 | 5391d806 | bellard | #define WIN_DOORLOCK 0xDE /* lock door on removable drives */ |
159 | 5391d806 | bellard | #define WIN_DOORUNLOCK 0xDF /* unlock door on removable drives */ |
160 | 5391d806 | bellard | #define WIN_STANDBYNOW1 0xE0 |
161 | 5391d806 | bellard | #define WIN_IDLEIMMEDIATE 0xE1 /* force drive to become "ready" */ |
162 | 5391d806 | bellard | #define WIN_STANDBY 0xE2 /* Set device in Standby Mode */ |
163 | 5391d806 | bellard | #define WIN_SETIDLE1 0xE3 |
164 | 5391d806 | bellard | #define WIN_READ_BUFFER 0xE4 /* force read only 1 sector */ |
165 | 5391d806 | bellard | #define WIN_CHECKPOWERMODE1 0xE5 |
166 | 5391d806 | bellard | #define WIN_SLEEPNOW1 0xE6 |
167 | 5391d806 | bellard | #define WIN_FLUSH_CACHE 0xE7 |
168 | 5391d806 | bellard | #define WIN_WRITE_BUFFER 0xE8 /* force write only 1 sector */ |
169 | 5391d806 | bellard | #define WIN_WRITE_SAME 0xE9 /* read ata-2 to use */ |
170 | 5391d806 | bellard | /* SET_FEATURES 0x22 or 0xDD */
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171 | 5391d806 | bellard | #define WIN_FLUSH_CACHE_EXT 0xEA /* 48-Bit */ |
172 | 5391d806 | bellard | #define WIN_IDENTIFY 0xEC /* ask drive to identify itself */ |
173 | 5391d806 | bellard | #define WIN_MEDIAEJECT 0xED |
174 | 5391d806 | bellard | #define WIN_IDENTIFY_DMA 0xEE /* same as WIN_IDENTIFY, but DMA */ |
175 | 5391d806 | bellard | #define WIN_SETFEATURES 0xEF /* set special drive features */ |
176 | 5391d806 | bellard | #define EXABYTE_ENABLE_NEST 0xF0 |
177 | 5391d806 | bellard | #define WIN_SECURITY_SET_PASS 0xF1 |
178 | 5391d806 | bellard | #define WIN_SECURITY_UNLOCK 0xF2 |
179 | 5391d806 | bellard | #define WIN_SECURITY_ERASE_PREPARE 0xF3 |
180 | 5391d806 | bellard | #define WIN_SECURITY_ERASE_UNIT 0xF4 |
181 | 5391d806 | bellard | #define WIN_SECURITY_FREEZE_LOCK 0xF5 |
182 | 5391d806 | bellard | #define WIN_SECURITY_DISABLE 0xF6 |
183 | 5391d806 | bellard | #define WIN_READ_NATIVE_MAX 0xF8 /* return the native maximum address */ |
184 | 5391d806 | bellard | #define WIN_SET_MAX 0xF9 |
185 | 5391d806 | bellard | #define DISABLE_SEAGATE 0xFB |
186 | 5391d806 | bellard | |
187 | 5391d806 | bellard | /* set to 1 set disable mult support */
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188 | f66723fa | bellard | #define MAX_MULT_SECTORS 16 |
189 | 5391d806 | bellard | |
190 | 5391d806 | bellard | /* ATAPI defines */
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191 | 5391d806 | bellard | |
192 | 5391d806 | bellard | #define ATAPI_PACKET_SIZE 12 |
193 | 5391d806 | bellard | |
194 | 5391d806 | bellard | /* The generic packet command opcodes for CD/DVD Logical Units,
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195 | 5391d806 | bellard | * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
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196 | 5391d806 | bellard | #define GPCMD_BLANK 0xa1 |
197 | 5391d806 | bellard | #define GPCMD_CLOSE_TRACK 0x5b |
198 | 5391d806 | bellard | #define GPCMD_FLUSH_CACHE 0x35 |
199 | 5391d806 | bellard | #define GPCMD_FORMAT_UNIT 0x04 |
200 | 5391d806 | bellard | #define GPCMD_GET_CONFIGURATION 0x46 |
201 | 5391d806 | bellard | #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a |
202 | 5391d806 | bellard | #define GPCMD_GET_PERFORMANCE 0xac |
203 | 5391d806 | bellard | #define GPCMD_INQUIRY 0x12 |
204 | 5391d806 | bellard | #define GPCMD_LOAD_UNLOAD 0xa6 |
205 | 5391d806 | bellard | #define GPCMD_MECHANISM_STATUS 0xbd |
206 | 5391d806 | bellard | #define GPCMD_MODE_SELECT_10 0x55 |
207 | 5391d806 | bellard | #define GPCMD_MODE_SENSE_10 0x5a |
208 | 5391d806 | bellard | #define GPCMD_PAUSE_RESUME 0x4b |
209 | 5391d806 | bellard | #define GPCMD_PLAY_AUDIO_10 0x45 |
210 | 5391d806 | bellard | #define GPCMD_PLAY_AUDIO_MSF 0x47 |
211 | 5391d806 | bellard | #define GPCMD_PLAY_AUDIO_TI 0x48 |
212 | 5391d806 | bellard | #define GPCMD_PLAY_CD 0xbc |
213 | 5391d806 | bellard | #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e |
214 | 5391d806 | bellard | #define GPCMD_READ_10 0x28 |
215 | 5391d806 | bellard | #define GPCMD_READ_12 0xa8 |
216 | 5391d806 | bellard | #define GPCMD_READ_CDVD_CAPACITY 0x25 |
217 | 5391d806 | bellard | #define GPCMD_READ_CD 0xbe |
218 | 5391d806 | bellard | #define GPCMD_READ_CD_MSF 0xb9 |
219 | 5391d806 | bellard | #define GPCMD_READ_DISC_INFO 0x51 |
220 | 5391d806 | bellard | #define GPCMD_READ_DVD_STRUCTURE 0xad |
221 | 5391d806 | bellard | #define GPCMD_READ_FORMAT_CAPACITIES 0x23 |
222 | 5391d806 | bellard | #define GPCMD_READ_HEADER 0x44 |
223 | 5391d806 | bellard | #define GPCMD_READ_TRACK_RZONE_INFO 0x52 |
224 | 5391d806 | bellard | #define GPCMD_READ_SUBCHANNEL 0x42 |
225 | 5391d806 | bellard | #define GPCMD_READ_TOC_PMA_ATIP 0x43 |
226 | 5391d806 | bellard | #define GPCMD_REPAIR_RZONE_TRACK 0x58 |
227 | 5391d806 | bellard | #define GPCMD_REPORT_KEY 0xa4 |
228 | 5391d806 | bellard | #define GPCMD_REQUEST_SENSE 0x03 |
229 | 5391d806 | bellard | #define GPCMD_RESERVE_RZONE_TRACK 0x53 |
230 | 5391d806 | bellard | #define GPCMD_SCAN 0xba |
231 | 5391d806 | bellard | #define GPCMD_SEEK 0x2b |
232 | 5391d806 | bellard | #define GPCMD_SEND_DVD_STRUCTURE 0xad |
233 | 5391d806 | bellard | #define GPCMD_SEND_EVENT 0xa2 |
234 | 5391d806 | bellard | #define GPCMD_SEND_KEY 0xa3 |
235 | 5391d806 | bellard | #define GPCMD_SEND_OPC 0x54 |
236 | 5391d806 | bellard | #define GPCMD_SET_READ_AHEAD 0xa7 |
237 | 5391d806 | bellard | #define GPCMD_SET_STREAMING 0xb6 |
238 | 5391d806 | bellard | #define GPCMD_START_STOP_UNIT 0x1b |
239 | 5391d806 | bellard | #define GPCMD_STOP_PLAY_SCAN 0x4e |
240 | 5391d806 | bellard | #define GPCMD_TEST_UNIT_READY 0x00 |
241 | 5391d806 | bellard | #define GPCMD_VERIFY_10 0x2f |
242 | 5391d806 | bellard | #define GPCMD_WRITE_10 0x2a |
243 | 5391d806 | bellard | #define GPCMD_WRITE_AND_VERIFY_10 0x2e |
244 | 5391d806 | bellard | /* This is listed as optional in ATAPI 2.6, but is (curiously)
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245 | 5391d806 | bellard | * missing from Mt. Fuji, Table 57. It _is_ mentioned in Mt. Fuji
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246 | 5391d806 | bellard | * Table 377 as an MMC command for SCSi devices though... Most ATAPI
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247 | 5391d806 | bellard | * drives support it. */
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248 | 5391d806 | bellard | #define GPCMD_SET_SPEED 0xbb |
249 | 5391d806 | bellard | /* This seems to be a SCSI specific CD-ROM opcode
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250 | 5391d806 | bellard | * to play data at track/index */
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251 | 5391d806 | bellard | #define GPCMD_PLAYAUDIO_TI 0x48 |
252 | 5391d806 | bellard | /*
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253 | 5391d806 | bellard | * From MS Media Status Notification Support Specification. For
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254 | 5391d806 | bellard | * older drives only.
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255 | 5391d806 | bellard | */
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256 | 5391d806 | bellard | #define GPCMD_GET_MEDIA_STATUS 0xda |
257 | 5391d806 | bellard | |
258 | 5391d806 | bellard | /* Mode page codes for mode sense/set */
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259 | 5391d806 | bellard | #define GPMODE_R_W_ERROR_PAGE 0x01 |
260 | 5391d806 | bellard | #define GPMODE_WRITE_PARMS_PAGE 0x05 |
261 | 5391d806 | bellard | #define GPMODE_AUDIO_CTL_PAGE 0x0e |
262 | 5391d806 | bellard | #define GPMODE_POWER_PAGE 0x1a |
263 | 5391d806 | bellard | #define GPMODE_FAULT_FAIL_PAGE 0x1c |
264 | 5391d806 | bellard | #define GPMODE_TO_PROTECT_PAGE 0x1d |
265 | 5391d806 | bellard | #define GPMODE_CAPABILITIES_PAGE 0x2a |
266 | 5391d806 | bellard | #define GPMODE_ALL_PAGES 0x3f |
267 | 5391d806 | bellard | /* Not in Mt. Fuji, but in ATAPI 2.6 -- depricated now in favor
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268 | 5391d806 | bellard | * of MODE_SENSE_POWER_PAGE */
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269 | 5391d806 | bellard | #define GPMODE_CDROM_PAGE 0x0d |
270 | 5391d806 | bellard | |
271 | 5391d806 | bellard | #define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */ |
272 | 5391d806 | bellard | #define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */ |
273 | 5391d806 | bellard | #define ATAPI_INT_REASON_REL 0x04 |
274 | 5391d806 | bellard | #define ATAPI_INT_REASON_TAG 0xf8 |
275 | 5391d806 | bellard | |
276 | 5391d806 | bellard | /* same constants as bochs */
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277 | 7f777bf3 | bellard | #define ASC_ILLEGAL_OPCODE 0x20 |
278 | 5391d806 | bellard | #define ASC_LOGICAL_BLOCK_OOR 0x21 |
279 | 5391d806 | bellard | #define ASC_INV_FIELD_IN_CMD_PACKET 0x24 |
280 | 5391d806 | bellard | #define ASC_MEDIUM_NOT_PRESENT 0x3a |
281 | 5391d806 | bellard | #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x39 |
282 | 5391d806 | bellard | |
283 | 5391d806 | bellard | #define SENSE_NONE 0 |
284 | 5391d806 | bellard | #define SENSE_NOT_READY 2 |
285 | 5391d806 | bellard | #define SENSE_ILLEGAL_REQUEST 5 |
286 | 5391d806 | bellard | #define SENSE_UNIT_ATTENTION 6 |
287 | 5391d806 | bellard | |
288 | 5391d806 | bellard | struct IDEState;
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289 | 5391d806 | bellard | |
290 | 5391d806 | bellard | typedef void EndTransferFunc(struct IDEState *); |
291 | 5391d806 | bellard | |
292 | caed8802 | bellard | /* NOTE: IDEState represents in fact one drive */
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293 | 5391d806 | bellard | typedef struct IDEState { |
294 | 5391d806 | bellard | /* ide config */
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295 | 5391d806 | bellard | int is_cdrom;
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296 | 5391d806 | bellard | int cylinders, heads, sectors;
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297 | 5391d806 | bellard | int64_t nb_sectors; |
298 | 5391d806 | bellard | int mult_sectors;
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299 | 5391d806 | bellard | int irq;
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300 | 1ade1de2 | bellard | openpic_t *openpic; |
301 | 34e538ae | bellard | PCIDevice *pci_dev; |
302 | 98087450 | bellard | struct BMDMAState *bmdma;
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303 | aedf5382 | bellard | int drive_serial;
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304 | 5391d806 | bellard | /* ide regs */
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305 | 5391d806 | bellard | uint8_t feature; |
306 | 5391d806 | bellard | uint8_t error; |
307 | 5391d806 | bellard | uint16_t nsector; /* 0 is 256 to ease computations */
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308 | 5391d806 | bellard | uint8_t sector; |
309 | 5391d806 | bellard | uint8_t lcyl; |
310 | 5391d806 | bellard | uint8_t hcyl; |
311 | 5391d806 | bellard | uint8_t select; |
312 | 5391d806 | bellard | uint8_t status; |
313 | 5391d806 | bellard | /* 0x3f6 command, only meaningful for drive 0 */
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314 | 5391d806 | bellard | uint8_t cmd; |
315 | 5391d806 | bellard | /* depends on bit 4 in select, only meaningful for drive 0 */
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316 | 5391d806 | bellard | struct IDEState *cur_drive;
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317 | 5391d806 | bellard | BlockDriverState *bs; |
318 | 5391d806 | bellard | /* ATAPI specific */
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319 | 5391d806 | bellard | uint8_t sense_key; |
320 | 5391d806 | bellard | uint8_t asc; |
321 | 5391d806 | bellard | int packet_transfer_size;
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322 | 5391d806 | bellard | int elementary_transfer_size;
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323 | 5391d806 | bellard | int io_buffer_index;
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324 | 5391d806 | bellard | int lba;
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325 | 98087450 | bellard | int cd_sector_size;
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326 | 98087450 | bellard | int atapi_dma; /* true if dma is requested for the packet cmd */ |
327 | 98087450 | bellard | /* ATA DMA state */
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328 | 98087450 | bellard | int io_buffer_size;
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329 | 98087450 | bellard | /* PIO transfer handling */
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330 | 5391d806 | bellard | int req_nb_sectors; /* number of sectors per interrupt */ |
331 | 5391d806 | bellard | EndTransferFunc *end_transfer_func; |
332 | 5391d806 | bellard | uint8_t *data_ptr; |
333 | 5391d806 | bellard | uint8_t *data_end; |
334 | 5391d806 | bellard | uint8_t io_buffer[MAX_MULT_SECTORS*512 + 4]; |
335 | 5391d806 | bellard | } IDEState; |
336 | 5391d806 | bellard | |
337 | 98087450 | bellard | #define BM_STATUS_DMAING 0x01 |
338 | 98087450 | bellard | #define BM_STATUS_ERROR 0x02 |
339 | 98087450 | bellard | #define BM_STATUS_INT 0x04 |
340 | 98087450 | bellard | |
341 | 98087450 | bellard | #define BM_CMD_START 0x01 |
342 | 98087450 | bellard | #define BM_CMD_READ 0x08 |
343 | 98087450 | bellard | |
344 | 98087450 | bellard | typedef int IDEDMAFunc(IDEState *s, |
345 | 98087450 | bellard | target_phys_addr_t phys_addr, |
346 | 98087450 | bellard | int transfer_size1);
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347 | 98087450 | bellard | |
348 | 98087450 | bellard | typedef struct BMDMAState { |
349 | 98087450 | bellard | uint8_t cmd; |
350 | 98087450 | bellard | uint8_t status; |
351 | 98087450 | bellard | uint32_t addr; |
352 | 98087450 | bellard | /* current transfer state */
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353 | 98087450 | bellard | IDEState *ide_if; |
354 | 98087450 | bellard | IDEDMAFunc *dma_cb; |
355 | 98087450 | bellard | } BMDMAState; |
356 | 98087450 | bellard | |
357 | 98087450 | bellard | typedef struct PCIIDEState { |
358 | 98087450 | bellard | PCIDevice dev; |
359 | 98087450 | bellard | IDEState ide_if[4];
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360 | 98087450 | bellard | BMDMAState bmdma[2];
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361 | 98087450 | bellard | } PCIIDEState; |
362 | 98087450 | bellard | |
363 | 98087450 | bellard | static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb); |
364 | 98087450 | bellard | |
365 | 5391d806 | bellard | static void padstr(char *str, const char *src, int len) |
366 | 5391d806 | bellard | { |
367 | 5391d806 | bellard | int i, v;
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368 | 5391d806 | bellard | for(i = 0; i < len; i++) { |
369 | 5391d806 | bellard | if (*src)
|
370 | 5391d806 | bellard | v = *src++; |
371 | 5391d806 | bellard | else
|
372 | 5391d806 | bellard | v = ' ';
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373 | 5391d806 | bellard | *(char *)((long)str ^ 1) = v; |
374 | 5391d806 | bellard | str++; |
375 | 5391d806 | bellard | } |
376 | 5391d806 | bellard | } |
377 | 5391d806 | bellard | |
378 | bd0d90b2 | bellard | static void padstr8(uint8_t *buf, int buf_size, const char *src) |
379 | bd0d90b2 | bellard | { |
380 | bd0d90b2 | bellard | int i;
|
381 | bd0d90b2 | bellard | for(i = 0; i < buf_size; i++) { |
382 | bd0d90b2 | bellard | if (*src)
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383 | bd0d90b2 | bellard | buf[i] = *src++; |
384 | bd0d90b2 | bellard | else
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385 | bd0d90b2 | bellard | buf[i] = ' ';
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386 | bd0d90b2 | bellard | } |
387 | bd0d90b2 | bellard | } |
388 | bd0d90b2 | bellard | |
389 | 67b915a5 | bellard | static void put_le16(uint16_t *p, unsigned int v) |
390 | 67b915a5 | bellard | { |
391 | 0c4ad8dc | bellard | *p = cpu_to_le16(v); |
392 | 67b915a5 | bellard | } |
393 | 67b915a5 | bellard | |
394 | 5391d806 | bellard | static void ide_identify(IDEState *s) |
395 | 5391d806 | bellard | { |
396 | 5391d806 | bellard | uint16_t *p; |
397 | 5391d806 | bellard | unsigned int oldsize; |
398 | aedf5382 | bellard | char buf[20]; |
399 | 5391d806 | bellard | |
400 | 5391d806 | bellard | memset(s->io_buffer, 0, 512); |
401 | 5391d806 | bellard | p = (uint16_t *)s->io_buffer; |
402 | 67b915a5 | bellard | put_le16(p + 0, 0x0040); |
403 | 67b915a5 | bellard | put_le16(p + 1, s->cylinders);
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404 | 67b915a5 | bellard | put_le16(p + 3, s->heads);
|
405 | 67b915a5 | bellard | put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */ |
406 | 67b915a5 | bellard | put_le16(p + 5, 512); /* XXX: retired, remove ? */ |
407 | 67b915a5 | bellard | put_le16(p + 6, s->sectors);
|
408 | aedf5382 | bellard | snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial); |
409 | aedf5382 | bellard | padstr((uint8_t *)(p + 10), buf, 20); /* serial number */ |
410 | 67b915a5 | bellard | put_le16(p + 20, 3); /* XXX: retired, remove ? */ |
411 | 67b915a5 | bellard | put_le16(p + 21, 512); /* cache size in sectors */ |
412 | 67b915a5 | bellard | put_le16(p + 22, 4); /* ecc bytes */ |
413 | 5391d806 | bellard | padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */ |
414 | 5391d806 | bellard | padstr((uint8_t *)(p + 27), "QEMU HARDDISK", 40); /* model */ |
415 | 5391d806 | bellard | #if MAX_MULT_SECTORS > 1 |
416 | 67b915a5 | bellard | put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS); |
417 | 5391d806 | bellard | #endif
|
418 | 67b915a5 | bellard | put_le16(p + 48, 1); /* dword I/O */ |
419 | 67b915a5 | bellard | put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */ |
420 | 67b915a5 | bellard | put_le16(p + 51, 0x200); /* PIO transfer cycle */ |
421 | 67b915a5 | bellard | put_le16(p + 52, 0x200); /* DMA transfer cycle */ |
422 | 67b915a5 | bellard | put_le16(p + 53, 1); /* words 54-58 are valid */ |
423 | 67b915a5 | bellard | put_le16(p + 54, s->cylinders);
|
424 | 67b915a5 | bellard | put_le16(p + 55, s->heads);
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425 | 67b915a5 | bellard | put_le16(p + 56, s->sectors);
|
426 | 5391d806 | bellard | oldsize = s->cylinders * s->heads * s->sectors; |
427 | 67b915a5 | bellard | put_le16(p + 57, oldsize);
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428 | 67b915a5 | bellard | put_le16(p + 58, oldsize >> 16); |
429 | 5391d806 | bellard | if (s->mult_sectors)
|
430 | 67b915a5 | bellard | put_le16(p + 59, 0x100 | s->mult_sectors); |
431 | 67b915a5 | bellard | put_le16(p + 60, s->nb_sectors);
|
432 | 67b915a5 | bellard | put_le16(p + 61, s->nb_sectors >> 16); |
433 | 67b915a5 | bellard | put_le16(p + 80, (1 << 1) | (1 << 2)); |
434 | 67b915a5 | bellard | put_le16(p + 82, (1 << 14)); |
435 | 67b915a5 | bellard | put_le16(p + 83, (1 << 14)); |
436 | 67b915a5 | bellard | put_le16(p + 84, (1 << 14)); |
437 | 67b915a5 | bellard | put_le16(p + 85, (1 << 14)); |
438 | 67b915a5 | bellard | put_le16(p + 86, 0); |
439 | 67b915a5 | bellard | put_le16(p + 87, (1 << 14)); |
440 | 5391d806 | bellard | } |
441 | 5391d806 | bellard | |
442 | 5391d806 | bellard | static void ide_atapi_identify(IDEState *s) |
443 | 5391d806 | bellard | { |
444 | 5391d806 | bellard | uint16_t *p; |
445 | aedf5382 | bellard | char buf[20]; |
446 | 5391d806 | bellard | |
447 | 5391d806 | bellard | memset(s->io_buffer, 0, 512); |
448 | 5391d806 | bellard | p = (uint16_t *)s->io_buffer; |
449 | 5391d806 | bellard | /* Removable CDROM, 50us response, 12 byte packets */
|
450 | 67b915a5 | bellard | put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0)); |
451 | aedf5382 | bellard | snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial); |
452 | aedf5382 | bellard | padstr((uint8_t *)(p + 10), buf, 20); /* serial number */ |
453 | 67b915a5 | bellard | put_le16(p + 20, 3); /* buffer type */ |
454 | 67b915a5 | bellard | put_le16(p + 21, 512); /* cache size in sectors */ |
455 | 67b915a5 | bellard | put_le16(p + 22, 4); /* ecc bytes */ |
456 | 5391d806 | bellard | padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */ |
457 | 5391d806 | bellard | padstr((uint8_t *)(p + 27), "QEMU CD-ROM", 40); /* model */ |
458 | 67b915a5 | bellard | put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */ |
459 | 67b915a5 | bellard | put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */ |
460 | 67b915a5 | bellard | put_le16(p + 53, 3); /* words 64-70, 54-58 valid */ |
461 | 67b915a5 | bellard | put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */ |
462 | 67b915a5 | bellard | put_le16(p + 64, 1); /* PIO modes */ |
463 | 67b915a5 | bellard | put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */ |
464 | 67b915a5 | bellard | put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */ |
465 | 67b915a5 | bellard | put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */ |
466 | 67b915a5 | bellard | put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */ |
467 | 5391d806 | bellard | |
468 | 67b915a5 | bellard | put_le16(p + 71, 30); /* in ns */ |
469 | 67b915a5 | bellard | put_le16(p + 72, 30); /* in ns */ |
470 | 5391d806 | bellard | |
471 | 67b915a5 | bellard | put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */ |
472 | 5391d806 | bellard | } |
473 | 5391d806 | bellard | |
474 | 5391d806 | bellard | static void ide_set_signature(IDEState *s) |
475 | 5391d806 | bellard | { |
476 | 5391d806 | bellard | s->select &= 0xf0; /* clear head */ |
477 | 5391d806 | bellard | /* put signature */
|
478 | 5391d806 | bellard | s->nsector = 1;
|
479 | 5391d806 | bellard | s->sector = 1;
|
480 | 5391d806 | bellard | if (s->is_cdrom) {
|
481 | 5391d806 | bellard | s->lcyl = 0x14;
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482 | 5391d806 | bellard | s->hcyl = 0xeb;
|
483 | 5391d806 | bellard | } else if (s->bs) { |
484 | 5391d806 | bellard | s->lcyl = 0;
|
485 | 5391d806 | bellard | s->hcyl = 0;
|
486 | 5391d806 | bellard | } else {
|
487 | 5391d806 | bellard | s->lcyl = 0xff;
|
488 | 5391d806 | bellard | s->hcyl = 0xff;
|
489 | 5391d806 | bellard | } |
490 | 5391d806 | bellard | } |
491 | 5391d806 | bellard | |
492 | 5391d806 | bellard | static inline void ide_abort_command(IDEState *s) |
493 | 5391d806 | bellard | { |
494 | 5391d806 | bellard | s->status = READY_STAT | ERR_STAT; |
495 | 5391d806 | bellard | s->error = ABRT_ERR; |
496 | 5391d806 | bellard | } |
497 | 5391d806 | bellard | |
498 | 5391d806 | bellard | static inline void ide_set_irq(IDEState *s) |
499 | 5391d806 | bellard | { |
500 | 5391d806 | bellard | if (!(s->cmd & IDE_CMD_DISABLE_IRQ)) {
|
501 | 1ade1de2 | bellard | #ifdef TARGET_PPC
|
502 | 1ade1de2 | bellard | if (s->openpic)
|
503 | 1ade1de2 | bellard | openpic_set_irq(s->openpic, s->irq, 1);
|
504 | 1ade1de2 | bellard | else
|
505 | 1ade1de2 | bellard | #endif
|
506 | 34e538ae | bellard | if (s->irq == 16) |
507 | 34e538ae | bellard | pci_set_irq(s->pci_dev, 0, 1); |
508 | 34e538ae | bellard | else
|
509 | 34e538ae | bellard | pic_set_irq(s->irq, 1);
|
510 | 5391d806 | bellard | } |
511 | 5391d806 | bellard | } |
512 | 5391d806 | bellard | |
513 | 5391d806 | bellard | /* prepare data transfer and tell what to do after */
|
514 | 5391d806 | bellard | static void ide_transfer_start(IDEState *s, uint8_t *buf, int size, |
515 | 5391d806 | bellard | EndTransferFunc *end_transfer_func) |
516 | 5391d806 | bellard | { |
517 | 5391d806 | bellard | s->end_transfer_func = end_transfer_func; |
518 | 5391d806 | bellard | s->data_ptr = buf; |
519 | 5391d806 | bellard | s->data_end = buf + size; |
520 | 5391d806 | bellard | s->status |= DRQ_STAT; |
521 | 5391d806 | bellard | } |
522 | 5391d806 | bellard | |
523 | 5391d806 | bellard | static void ide_transfer_stop(IDEState *s) |
524 | 5391d806 | bellard | { |
525 | 5391d806 | bellard | s->end_transfer_func = ide_transfer_stop; |
526 | 5391d806 | bellard | s->data_ptr = s->io_buffer; |
527 | 5391d806 | bellard | s->data_end = s->io_buffer; |
528 | 5391d806 | bellard | s->status &= ~DRQ_STAT; |
529 | 5391d806 | bellard | } |
530 | 5391d806 | bellard | |
531 | 5391d806 | bellard | static int64_t ide_get_sector(IDEState *s)
|
532 | 5391d806 | bellard | { |
533 | 5391d806 | bellard | int64_t sector_num; |
534 | 5391d806 | bellard | if (s->select & 0x40) { |
535 | 5391d806 | bellard | /* lba */
|
536 | 5391d806 | bellard | sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) | |
537 | 5391d806 | bellard | (s->lcyl << 8) | s->sector;
|
538 | 5391d806 | bellard | } else {
|
539 | 5391d806 | bellard | sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
|
540 | 5391d806 | bellard | (s->select & 0x0f) * s->sectors +
|
541 | 5391d806 | bellard | (s->sector - 1);
|
542 | 5391d806 | bellard | } |
543 | 5391d806 | bellard | return sector_num;
|
544 | 5391d806 | bellard | } |
545 | 5391d806 | bellard | |
546 | 5391d806 | bellard | static void ide_set_sector(IDEState *s, int64_t sector_num) |
547 | 5391d806 | bellard | { |
548 | 5391d806 | bellard | unsigned int cyl, r; |
549 | 5391d806 | bellard | if (s->select & 0x40) { |
550 | 5391d806 | bellard | s->select = (s->select & 0xf0) | (sector_num >> 24); |
551 | 5391d806 | bellard | s->hcyl = (sector_num >> 16);
|
552 | 5391d806 | bellard | s->lcyl = (sector_num >> 8);
|
553 | 5391d806 | bellard | s->sector = (sector_num); |
554 | 5391d806 | bellard | } else {
|
555 | 5391d806 | bellard | cyl = sector_num / (s->heads * s->sectors); |
556 | 5391d806 | bellard | r = sector_num % (s->heads * s->sectors); |
557 | 5391d806 | bellard | s->hcyl = cyl >> 8;
|
558 | 5391d806 | bellard | s->lcyl = cyl; |
559 | 1b8eb456 | bellard | s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f); |
560 | 5391d806 | bellard | s->sector = (r % s->sectors) + 1;
|
561 | 5391d806 | bellard | } |
562 | 5391d806 | bellard | } |
563 | 5391d806 | bellard | |
564 | 5391d806 | bellard | static void ide_sector_read(IDEState *s) |
565 | 5391d806 | bellard | { |
566 | 5391d806 | bellard | int64_t sector_num; |
567 | 5391d806 | bellard | int ret, n;
|
568 | 5391d806 | bellard | |
569 | 5391d806 | bellard | s->status = READY_STAT | SEEK_STAT; |
570 | a136e5a8 | bellard | s->error = 0; /* not needed by IDE spec, but needed by Windows */ |
571 | 5391d806 | bellard | sector_num = ide_get_sector(s); |
572 | 5391d806 | bellard | n = s->nsector; |
573 | 5391d806 | bellard | if (n == 0) { |
574 | 5391d806 | bellard | /* no more sector to read from disk */
|
575 | 5391d806 | bellard | ide_transfer_stop(s); |
576 | 5391d806 | bellard | } else {
|
577 | 5391d806 | bellard | #if defined(DEBUG_IDE)
|
578 | 5391d806 | bellard | printf("read sector=%Ld\n", sector_num);
|
579 | 5391d806 | bellard | #endif
|
580 | 5391d806 | bellard | if (n > s->req_nb_sectors)
|
581 | 5391d806 | bellard | n = s->req_nb_sectors; |
582 | 5391d806 | bellard | ret = bdrv_read(s->bs, sector_num, s->io_buffer, n); |
583 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
|
584 | 5391d806 | bellard | ide_set_irq(s); |
585 | 5391d806 | bellard | ide_set_sector(s, sector_num + n); |
586 | 5391d806 | bellard | s->nsector -= n; |
587 | 5391d806 | bellard | } |
588 | 5391d806 | bellard | } |
589 | 5391d806 | bellard | |
590 | 98087450 | bellard | static int ide_read_dma_cb(IDEState *s, |
591 | 98087450 | bellard | target_phys_addr_t phys_addr, |
592 | 98087450 | bellard | int transfer_size1)
|
593 | 98087450 | bellard | { |
594 | 98087450 | bellard | int len, transfer_size, n;
|
595 | 98087450 | bellard | int64_t sector_num; |
596 | 98087450 | bellard | |
597 | 98087450 | bellard | transfer_size = transfer_size1; |
598 | 98087450 | bellard | while (transfer_size > 0) { |
599 | 98087450 | bellard | len = s->io_buffer_size - s->io_buffer_index; |
600 | 98087450 | bellard | if (len <= 0) { |
601 | 98087450 | bellard | /* transfert next data */
|
602 | 98087450 | bellard | n = s->nsector; |
603 | 98087450 | bellard | if (n == 0) |
604 | 98087450 | bellard | break;
|
605 | 98087450 | bellard | if (n > MAX_MULT_SECTORS)
|
606 | 98087450 | bellard | n = MAX_MULT_SECTORS; |
607 | 98087450 | bellard | sector_num = ide_get_sector(s); |
608 | 98087450 | bellard | bdrv_read(s->bs, sector_num, s->io_buffer, n); |
609 | 98087450 | bellard | s->io_buffer_index = 0;
|
610 | 98087450 | bellard | s->io_buffer_size = n * 512;
|
611 | 98087450 | bellard | len = s->io_buffer_size; |
612 | 98087450 | bellard | sector_num += n; |
613 | 98087450 | bellard | ide_set_sector(s, sector_num); |
614 | 98087450 | bellard | s->nsector -= n; |
615 | 98087450 | bellard | } |
616 | 98087450 | bellard | if (len > transfer_size)
|
617 | 98087450 | bellard | len = transfer_size; |
618 | 98087450 | bellard | cpu_physical_memory_write(phys_addr, |
619 | 98087450 | bellard | s->io_buffer + s->io_buffer_index, len); |
620 | 98087450 | bellard | s->io_buffer_index += len; |
621 | 98087450 | bellard | transfer_size -= len; |
622 | 98087450 | bellard | phys_addr += len; |
623 | 98087450 | bellard | } |
624 | 98087450 | bellard | if (s->io_buffer_index >= s->io_buffer_size && s->nsector == 0) { |
625 | 98087450 | bellard | s->status = READY_STAT | SEEK_STAT; |
626 | 98087450 | bellard | ide_set_irq(s); |
627 | 98087450 | bellard | #ifdef DEBUG_IDE_ATAPI
|
628 | 98087450 | bellard | printf("dma status=0x%x\n", s->status);
|
629 | 98087450 | bellard | #endif
|
630 | 98087450 | bellard | return 0; |
631 | 98087450 | bellard | } |
632 | 98087450 | bellard | return transfer_size1 - transfer_size;
|
633 | 98087450 | bellard | } |
634 | 98087450 | bellard | |
635 | 98087450 | bellard | static void ide_sector_read_dma(IDEState *s) |
636 | 98087450 | bellard | { |
637 | 98087450 | bellard | s->status = READY_STAT | SEEK_STAT | DRQ_STAT; |
638 | 98087450 | bellard | s->io_buffer_index = 0;
|
639 | 98087450 | bellard | s->io_buffer_size = 0;
|
640 | 98087450 | bellard | ide_dma_start(s, ide_read_dma_cb); |
641 | 98087450 | bellard | } |
642 | 98087450 | bellard | |
643 | 5391d806 | bellard | static void ide_sector_write(IDEState *s) |
644 | 5391d806 | bellard | { |
645 | 5391d806 | bellard | int64_t sector_num; |
646 | 5391d806 | bellard | int ret, n, n1;
|
647 | 5391d806 | bellard | |
648 | 5391d806 | bellard | s->status = READY_STAT | SEEK_STAT; |
649 | 5391d806 | bellard | sector_num = ide_get_sector(s); |
650 | 5391d806 | bellard | #if defined(DEBUG_IDE)
|
651 | 5391d806 | bellard | printf("write sector=%Ld\n", sector_num);
|
652 | 5391d806 | bellard | #endif
|
653 | 5391d806 | bellard | n = s->nsector; |
654 | 5391d806 | bellard | if (n > s->req_nb_sectors)
|
655 | 5391d806 | bellard | n = s->req_nb_sectors; |
656 | 5391d806 | bellard | ret = bdrv_write(s->bs, sector_num, s->io_buffer, n); |
657 | 5391d806 | bellard | s->nsector -= n; |
658 | 5391d806 | bellard | if (s->nsector == 0) { |
659 | 5391d806 | bellard | /* no more sector to write */
|
660 | 5391d806 | bellard | ide_transfer_stop(s); |
661 | 5391d806 | bellard | } else {
|
662 | 5391d806 | bellard | n1 = s->nsector; |
663 | 5391d806 | bellard | if (n1 > s->req_nb_sectors)
|
664 | 5391d806 | bellard | n1 = s->req_nb_sectors; |
665 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
|
666 | 5391d806 | bellard | } |
667 | 5391d806 | bellard | ide_set_sector(s, sector_num + n); |
668 | 5391d806 | bellard | ide_set_irq(s); |
669 | 5391d806 | bellard | } |
670 | 5391d806 | bellard | |
671 | 98087450 | bellard | static int ide_write_dma_cb(IDEState *s, |
672 | 98087450 | bellard | target_phys_addr_t phys_addr, |
673 | 98087450 | bellard | int transfer_size1)
|
674 | 98087450 | bellard | { |
675 | 98087450 | bellard | int len, transfer_size, n;
|
676 | 98087450 | bellard | int64_t sector_num; |
677 | 98087450 | bellard | |
678 | 98087450 | bellard | transfer_size = transfer_size1; |
679 | 98087450 | bellard | for(;;) {
|
680 | 98087450 | bellard | len = s->io_buffer_size - s->io_buffer_index; |
681 | 98087450 | bellard | if (len == 0) { |
682 | 98087450 | bellard | n = s->io_buffer_size >> 9;
|
683 | 98087450 | bellard | sector_num = ide_get_sector(s); |
684 | 98087450 | bellard | bdrv_write(s->bs, sector_num, s->io_buffer, |
685 | 98087450 | bellard | s->io_buffer_size >> 9);
|
686 | 98087450 | bellard | sector_num += n; |
687 | 98087450 | bellard | ide_set_sector(s, sector_num); |
688 | 98087450 | bellard | s->nsector -= n; |
689 | 98087450 | bellard | n = s->nsector; |
690 | 98087450 | bellard | if (n == 0) { |
691 | 98087450 | bellard | /* end of transfer */
|
692 | 98087450 | bellard | s->status = READY_STAT | SEEK_STAT; |
693 | 98087450 | bellard | ide_set_irq(s); |
694 | 98087450 | bellard | return 0; |
695 | 98087450 | bellard | } |
696 | 98087450 | bellard | if (n > MAX_MULT_SECTORS)
|
697 | 98087450 | bellard | n = MAX_MULT_SECTORS; |
698 | 98087450 | bellard | s->io_buffer_index = 0;
|
699 | 98087450 | bellard | s->io_buffer_size = n * 512;
|
700 | 98087450 | bellard | len = s->io_buffer_size; |
701 | 98087450 | bellard | } |
702 | 98087450 | bellard | if (transfer_size <= 0) |
703 | 98087450 | bellard | break;
|
704 | 98087450 | bellard | if (len > transfer_size)
|
705 | 98087450 | bellard | len = transfer_size; |
706 | 98087450 | bellard | cpu_physical_memory_read(phys_addr, |
707 | 98087450 | bellard | s->io_buffer + s->io_buffer_index, len); |
708 | 98087450 | bellard | s->io_buffer_index += len; |
709 | 98087450 | bellard | transfer_size -= len; |
710 | 98087450 | bellard | phys_addr += len; |
711 | 98087450 | bellard | } |
712 | 98087450 | bellard | return transfer_size1 - transfer_size;
|
713 | 98087450 | bellard | } |
714 | 98087450 | bellard | |
715 | 98087450 | bellard | static void ide_sector_write_dma(IDEState *s) |
716 | 98087450 | bellard | { |
717 | 98087450 | bellard | int n;
|
718 | 98087450 | bellard | s->status = READY_STAT | SEEK_STAT | DRQ_STAT; |
719 | 98087450 | bellard | n = s->nsector; |
720 | 98087450 | bellard | if (n > MAX_MULT_SECTORS)
|
721 | 98087450 | bellard | n = MAX_MULT_SECTORS; |
722 | 98087450 | bellard | s->io_buffer_index = 0;
|
723 | 98087450 | bellard | s->io_buffer_size = n * 512;
|
724 | 98087450 | bellard | ide_dma_start(s, ide_write_dma_cb); |
725 | 98087450 | bellard | } |
726 | 98087450 | bellard | |
727 | 5391d806 | bellard | static void ide_atapi_cmd_ok(IDEState *s) |
728 | 5391d806 | bellard | { |
729 | 5391d806 | bellard | s->error = 0;
|
730 | 5391d806 | bellard | s->status = READY_STAT; |
731 | 5391d806 | bellard | s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
|
732 | 5391d806 | bellard | ide_set_irq(s); |
733 | 5391d806 | bellard | } |
734 | 5391d806 | bellard | |
735 | 5391d806 | bellard | static void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc) |
736 | 5391d806 | bellard | { |
737 | 5391d806 | bellard | #ifdef DEBUG_IDE_ATAPI
|
738 | 5391d806 | bellard | printf("atapi_cmd_error: sense=0x%x asc=0x%x\n", sense_key, asc);
|
739 | 5391d806 | bellard | #endif
|
740 | 5391d806 | bellard | s->error = sense_key << 4;
|
741 | 5391d806 | bellard | s->status = READY_STAT | ERR_STAT; |
742 | 5391d806 | bellard | s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
|
743 | 5391d806 | bellard | s->sense_key = sense_key; |
744 | 5391d806 | bellard | s->asc = asc; |
745 | 5391d806 | bellard | ide_set_irq(s); |
746 | 5391d806 | bellard | } |
747 | 5391d806 | bellard | |
748 | 5391d806 | bellard | static inline void cpu_to_ube16(uint8_t *buf, int val) |
749 | 5391d806 | bellard | { |
750 | 5391d806 | bellard | buf[0] = val >> 8; |
751 | 5391d806 | bellard | buf[1] = val;
|
752 | 5391d806 | bellard | } |
753 | 5391d806 | bellard | |
754 | 5391d806 | bellard | static inline void cpu_to_ube32(uint8_t *buf, unsigned int val) |
755 | 5391d806 | bellard | { |
756 | 5391d806 | bellard | buf[0] = val >> 24; |
757 | 5391d806 | bellard | buf[1] = val >> 16; |
758 | 5391d806 | bellard | buf[2] = val >> 8; |
759 | 5391d806 | bellard | buf[3] = val;
|
760 | 5391d806 | bellard | } |
761 | 5391d806 | bellard | |
762 | 5391d806 | bellard | static inline int ube16_to_cpu(const uint8_t *buf) |
763 | 5391d806 | bellard | { |
764 | 5391d806 | bellard | return (buf[0] << 8) | buf[1]; |
765 | 5391d806 | bellard | } |
766 | 5391d806 | bellard | |
767 | 5391d806 | bellard | static inline int ube32_to_cpu(const uint8_t *buf) |
768 | 5391d806 | bellard | { |
769 | 5391d806 | bellard | return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; |
770 | 5391d806 | bellard | } |
771 | 5391d806 | bellard | |
772 | 98087450 | bellard | static void lba_to_msf(uint8_t *buf, int lba) |
773 | 98087450 | bellard | { |
774 | 98087450 | bellard | lba += 150;
|
775 | 98087450 | bellard | buf[0] = (lba / 75) / 60; |
776 | 98087450 | bellard | buf[1] = (lba / 75) % 60; |
777 | 98087450 | bellard | buf[2] = lba % 75; |
778 | 98087450 | bellard | } |
779 | 98087450 | bellard | |
780 | 98087450 | bellard | static void cd_read_sector(BlockDriverState *bs, int lba, uint8_t *buf, |
781 | 98087450 | bellard | int sector_size)
|
782 | 98087450 | bellard | { |
783 | 98087450 | bellard | switch(sector_size) {
|
784 | 98087450 | bellard | case 2048: |
785 | 98087450 | bellard | bdrv_read(bs, (int64_t)lba << 2, buf, 4); |
786 | 98087450 | bellard | break;
|
787 | 98087450 | bellard | case 2352: |
788 | 98087450 | bellard | /* sync bytes */
|
789 | 98087450 | bellard | buf[0] = 0x00; |
790 | 98087450 | bellard | memset(buf + 1, 0xff, 11); |
791 | 98087450 | bellard | buf += 12;
|
792 | 98087450 | bellard | /* MSF */
|
793 | 98087450 | bellard | lba_to_msf(buf, lba); |
794 | 98087450 | bellard | buf[3] = 0x01; /* mode 1 data */ |
795 | 98087450 | bellard | buf += 4;
|
796 | 98087450 | bellard | /* data */
|
797 | 98087450 | bellard | bdrv_read(bs, (int64_t)lba << 2, buf, 4); |
798 | 98087450 | bellard | buf += 2048;
|
799 | 98087450 | bellard | /* ECC */
|
800 | 98087450 | bellard | memset(buf, 0, 288); |
801 | 98087450 | bellard | break;
|
802 | 98087450 | bellard | default:
|
803 | 98087450 | bellard | break;
|
804 | 98087450 | bellard | } |
805 | 98087450 | bellard | } |
806 | 98087450 | bellard | |
807 | 5391d806 | bellard | /* The whole ATAPI transfer logic is handled in this function */
|
808 | 5391d806 | bellard | static void ide_atapi_cmd_reply_end(IDEState *s) |
809 | 5391d806 | bellard | { |
810 | 5391d806 | bellard | int byte_count_limit, size;
|
811 | 5391d806 | bellard | #ifdef DEBUG_IDE_ATAPI
|
812 | 5391d806 | bellard | printf("reply: tx_size=%d elem_tx_size=%d index=%d\n",
|
813 | 5391d806 | bellard | s->packet_transfer_size, |
814 | 5391d806 | bellard | s->elementary_transfer_size, |
815 | 5391d806 | bellard | s->io_buffer_index); |
816 | 5391d806 | bellard | #endif
|
817 | 5391d806 | bellard | if (s->packet_transfer_size <= 0) { |
818 | 5391d806 | bellard | /* end of transfer */
|
819 | 5391d806 | bellard | ide_transfer_stop(s); |
820 | 5391d806 | bellard | s->status = READY_STAT; |
821 | 5391d806 | bellard | s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
|
822 | 5391d806 | bellard | ide_set_irq(s); |
823 | 5391d806 | bellard | #ifdef DEBUG_IDE_ATAPI
|
824 | 5391d806 | bellard | printf("status=0x%x\n", s->status);
|
825 | 5391d806 | bellard | #endif
|
826 | 5391d806 | bellard | } else {
|
827 | 5391d806 | bellard | /* see if a new sector must be read */
|
828 | 98087450 | bellard | if (s->lba != -1 && s->io_buffer_index >= s->cd_sector_size) { |
829 | 98087450 | bellard | cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size); |
830 | 5391d806 | bellard | s->lba++; |
831 | 5391d806 | bellard | s->io_buffer_index = 0;
|
832 | 5391d806 | bellard | } |
833 | 5391d806 | bellard | if (s->elementary_transfer_size > 0) { |
834 | 5391d806 | bellard | /* there are some data left to transmit in this elementary
|
835 | 5391d806 | bellard | transfer */
|
836 | 98087450 | bellard | size = s->cd_sector_size - s->io_buffer_index; |
837 | 5391d806 | bellard | if (size > s->elementary_transfer_size)
|
838 | 5391d806 | bellard | size = s->elementary_transfer_size; |
839 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer + s->io_buffer_index, |
840 | 5391d806 | bellard | size, ide_atapi_cmd_reply_end); |
841 | 5391d806 | bellard | s->packet_transfer_size -= size; |
842 | 5391d806 | bellard | s->elementary_transfer_size -= size; |
843 | 5391d806 | bellard | s->io_buffer_index += size; |
844 | 5391d806 | bellard | } else {
|
845 | 5391d806 | bellard | /* a new transfer is needed */
|
846 | 5391d806 | bellard | s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO;
|
847 | 5391d806 | bellard | byte_count_limit = s->lcyl | (s->hcyl << 8);
|
848 | 5391d806 | bellard | #ifdef DEBUG_IDE_ATAPI
|
849 | 5391d806 | bellard | printf("byte_count_limit=%d\n", byte_count_limit);
|
850 | 5391d806 | bellard | #endif
|
851 | 5391d806 | bellard | if (byte_count_limit == 0xffff) |
852 | 5391d806 | bellard | byte_count_limit--; |
853 | 5391d806 | bellard | size = s->packet_transfer_size; |
854 | 5391d806 | bellard | if (size > byte_count_limit) {
|
855 | 5391d806 | bellard | /* byte count limit must be even if this case */
|
856 | 5391d806 | bellard | if (byte_count_limit & 1) |
857 | 5391d806 | bellard | byte_count_limit--; |
858 | 5391d806 | bellard | size = byte_count_limit; |
859 | 5391d806 | bellard | } |
860 | a136e5a8 | bellard | s->lcyl = size; |
861 | a136e5a8 | bellard | s->hcyl = size >> 8;
|
862 | 5391d806 | bellard | s->elementary_transfer_size = size; |
863 | 5391d806 | bellard | /* we cannot transmit more than one sector at a time */
|
864 | 5391d806 | bellard | if (s->lba != -1) { |
865 | 98087450 | bellard | if (size > (s->cd_sector_size - s->io_buffer_index))
|
866 | 98087450 | bellard | size = (s->cd_sector_size - s->io_buffer_index); |
867 | 5391d806 | bellard | } |
868 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer + s->io_buffer_index, |
869 | 5391d806 | bellard | size, ide_atapi_cmd_reply_end); |
870 | 5391d806 | bellard | s->packet_transfer_size -= size; |
871 | 5391d806 | bellard | s->elementary_transfer_size -= size; |
872 | 5391d806 | bellard | s->io_buffer_index += size; |
873 | 5391d806 | bellard | ide_set_irq(s); |
874 | 5391d806 | bellard | #ifdef DEBUG_IDE_ATAPI
|
875 | 5391d806 | bellard | printf("status=0x%x\n", s->status);
|
876 | 5391d806 | bellard | #endif
|
877 | 5391d806 | bellard | } |
878 | 5391d806 | bellard | } |
879 | 5391d806 | bellard | } |
880 | 5391d806 | bellard | |
881 | 5391d806 | bellard | /* send a reply of 'size' bytes in s->io_buffer to an ATAPI command */
|
882 | 5391d806 | bellard | static void ide_atapi_cmd_reply(IDEState *s, int size, int max_size) |
883 | 5391d806 | bellard | { |
884 | 5391d806 | bellard | if (size > max_size)
|
885 | 5391d806 | bellard | size = max_size; |
886 | 5391d806 | bellard | s->lba = -1; /* no sector read */ |
887 | 5391d806 | bellard | s->packet_transfer_size = size; |
888 | 5391d806 | bellard | s->elementary_transfer_size = 0;
|
889 | 5391d806 | bellard | s->io_buffer_index = 0;
|
890 | 5391d806 | bellard | |
891 | 5391d806 | bellard | s->status = READY_STAT; |
892 | 5391d806 | bellard | ide_atapi_cmd_reply_end(s); |
893 | 5391d806 | bellard | } |
894 | 5391d806 | bellard | |
895 | 5391d806 | bellard | /* start a CD-CDROM read command */
|
896 | 98087450 | bellard | static void ide_atapi_cmd_read_pio(IDEState *s, int lba, int nb_sectors, |
897 | 98087450 | bellard | int sector_size)
|
898 | 5391d806 | bellard | { |
899 | 5391d806 | bellard | s->lba = lba; |
900 | 98087450 | bellard | s->packet_transfer_size = nb_sectors * sector_size; |
901 | 5391d806 | bellard | s->elementary_transfer_size = 0;
|
902 | 98087450 | bellard | s->io_buffer_index = sector_size; |
903 | 98087450 | bellard | s->cd_sector_size = sector_size; |
904 | 5391d806 | bellard | |
905 | 5391d806 | bellard | s->status = READY_STAT; |
906 | 5391d806 | bellard | ide_atapi_cmd_reply_end(s); |
907 | 5391d806 | bellard | } |
908 | 5391d806 | bellard | |
909 | 98087450 | bellard | /* ATAPI DMA support */
|
910 | 98087450 | bellard | static int ide_atapi_cmd_read_dma_cb(IDEState *s, |
911 | 98087450 | bellard | target_phys_addr_t phys_addr, |
912 | 98087450 | bellard | int transfer_size1)
|
913 | 98087450 | bellard | { |
914 | 98087450 | bellard | int len, transfer_size;
|
915 | 98087450 | bellard | |
916 | 98087450 | bellard | transfer_size = transfer_size1; |
917 | 98087450 | bellard | while (transfer_size > 0) { |
918 | 98087450 | bellard | if (s->packet_transfer_size <= 0) |
919 | 98087450 | bellard | break;
|
920 | 98087450 | bellard | len = s->cd_sector_size - s->io_buffer_index; |
921 | 98087450 | bellard | if (len <= 0) { |
922 | 98087450 | bellard | /* transfert next data */
|
923 | 98087450 | bellard | cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size); |
924 | 98087450 | bellard | s->lba++; |
925 | 98087450 | bellard | s->io_buffer_index = 0;
|
926 | 98087450 | bellard | len = s->cd_sector_size; |
927 | 98087450 | bellard | } |
928 | 98087450 | bellard | if (len > transfer_size)
|
929 | 98087450 | bellard | len = transfer_size; |
930 | 98087450 | bellard | cpu_physical_memory_write(phys_addr, |
931 | 98087450 | bellard | s->io_buffer + s->io_buffer_index, len); |
932 | 98087450 | bellard | s->packet_transfer_size -= len; |
933 | 98087450 | bellard | s->io_buffer_index += len; |
934 | 98087450 | bellard | transfer_size -= len; |
935 | 98087450 | bellard | phys_addr += len; |
936 | 98087450 | bellard | } |
937 | 98087450 | bellard | if (s->packet_transfer_size <= 0) { |
938 | 98087450 | bellard | s->status = READY_STAT; |
939 | 98087450 | bellard | s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
|
940 | 98087450 | bellard | ide_set_irq(s); |
941 | 98087450 | bellard | #ifdef DEBUG_IDE_ATAPI
|
942 | 98087450 | bellard | printf("dma status=0x%x\n", s->status);
|
943 | 98087450 | bellard | #endif
|
944 | 98087450 | bellard | return 0; |
945 | 98087450 | bellard | } |
946 | 98087450 | bellard | return transfer_size1 - transfer_size;
|
947 | 98087450 | bellard | } |
948 | 98087450 | bellard | |
949 | 98087450 | bellard | /* start a CD-CDROM read command with DMA */
|
950 | 98087450 | bellard | /* XXX: test if DMA is available */
|
951 | 98087450 | bellard | static void ide_atapi_cmd_read_dma(IDEState *s, int lba, int nb_sectors, |
952 | 98087450 | bellard | int sector_size)
|
953 | 98087450 | bellard | { |
954 | 98087450 | bellard | s->lba = lba; |
955 | 98087450 | bellard | s->packet_transfer_size = nb_sectors * sector_size; |
956 | 98087450 | bellard | s->io_buffer_index = sector_size; |
957 | 98087450 | bellard | s->cd_sector_size = sector_size; |
958 | 98087450 | bellard | |
959 | 98087450 | bellard | s->status = READY_STAT | DRQ_STAT; |
960 | 98087450 | bellard | ide_dma_start(s, ide_atapi_cmd_read_dma_cb); |
961 | 98087450 | bellard | } |
962 | 98087450 | bellard | |
963 | 98087450 | bellard | static void ide_atapi_cmd_read(IDEState *s, int lba, int nb_sectors, |
964 | 98087450 | bellard | int sector_size)
|
965 | 98087450 | bellard | { |
966 | 98087450 | bellard | #ifdef DEBUG_IDE_ATAPI
|
967 | 98087450 | bellard | printf("read: LBA=%d nb_sectors=%d\n", lba, nb_sectors);
|
968 | 98087450 | bellard | #endif
|
969 | 98087450 | bellard | if (s->atapi_dma) {
|
970 | 98087450 | bellard | ide_atapi_cmd_read_dma(s, lba, nb_sectors, sector_size); |
971 | 98087450 | bellard | } else {
|
972 | 98087450 | bellard | ide_atapi_cmd_read_pio(s, lba, nb_sectors, sector_size); |
973 | 98087450 | bellard | } |
974 | 98087450 | bellard | } |
975 | 98087450 | bellard | |
976 | 5391d806 | bellard | /* same toc as bochs. Return -1 if error or the toc length */
|
977 | 98087450 | bellard | /* XXX: check this */
|
978 | 5391d806 | bellard | static int cdrom_read_toc(IDEState *s, uint8_t *buf, int msf, int start_track) |
979 | 5391d806 | bellard | { |
980 | 5391d806 | bellard | uint8_t *q; |
981 | 5391d806 | bellard | int nb_sectors, len;
|
982 | 5391d806 | bellard | |
983 | 5391d806 | bellard | if (start_track > 1 && start_track != 0xaa) |
984 | 5391d806 | bellard | return -1; |
985 | 5391d806 | bellard | q = buf + 2;
|
986 | 98087450 | bellard | *q++ = 1; /* first session */ |
987 | 98087450 | bellard | *q++ = 1; /* last session */ |
988 | 5391d806 | bellard | if (start_track <= 1) { |
989 | 5391d806 | bellard | *q++ = 0; /* reserved */ |
990 | 5391d806 | bellard | *q++ = 0x14; /* ADR, control */ |
991 | 5391d806 | bellard | *q++ = 1; /* track number */ |
992 | 5391d806 | bellard | *q++ = 0; /* reserved */ |
993 | 5391d806 | bellard | if (msf) {
|
994 | 5391d806 | bellard | *q++ = 0; /* reserved */ |
995 | 5391d806 | bellard | *q++ = 0; /* minute */ |
996 | 5391d806 | bellard | *q++ = 2; /* second */ |
997 | 5391d806 | bellard | *q++ = 0; /* frame */ |
998 | 5391d806 | bellard | } else {
|
999 | 5391d806 | bellard | /* sector 0 */
|
1000 | 5391d806 | bellard | cpu_to_ube32(q, 0);
|
1001 | 5391d806 | bellard | q += 4;
|
1002 | 5391d806 | bellard | } |
1003 | 5391d806 | bellard | } |
1004 | 5391d806 | bellard | /* lead out track */
|
1005 | 5391d806 | bellard | *q++ = 0; /* reserved */ |
1006 | 5391d806 | bellard | *q++ = 0x16; /* ADR, control */ |
1007 | 5391d806 | bellard | *q++ = 0xaa; /* track number */ |
1008 | 5391d806 | bellard | *q++ = 0; /* reserved */ |
1009 | 5391d806 | bellard | nb_sectors = s->nb_sectors >> 2;
|
1010 | 5391d806 | bellard | if (msf) {
|
1011 | 5391d806 | bellard | *q++ = 0; /* reserved */ |
1012 | 98087450 | bellard | lba_to_msf(q, nb_sectors); |
1013 | 98087450 | bellard | q += 3;
|
1014 | 98087450 | bellard | } else {
|
1015 | 98087450 | bellard | cpu_to_ube32(q, nb_sectors); |
1016 | 98087450 | bellard | q += 4;
|
1017 | 98087450 | bellard | } |
1018 | 98087450 | bellard | len = q - buf; |
1019 | 98087450 | bellard | cpu_to_ube16(buf, len - 2);
|
1020 | 98087450 | bellard | return len;
|
1021 | 98087450 | bellard | } |
1022 | 98087450 | bellard | |
1023 | 98087450 | bellard | /* mostly same info as PearPc */
|
1024 | 98087450 | bellard | static int cdrom_read_toc_raw(IDEState *s, uint8_t *buf, int msf, |
1025 | 98087450 | bellard | int session_num)
|
1026 | 98087450 | bellard | { |
1027 | 98087450 | bellard | uint8_t *q; |
1028 | 98087450 | bellard | int nb_sectors, len;
|
1029 | 98087450 | bellard | |
1030 | 98087450 | bellard | q = buf + 2;
|
1031 | 98087450 | bellard | *q++ = 1; /* first session */ |
1032 | 98087450 | bellard | *q++ = 1; /* last session */ |
1033 | 98087450 | bellard | |
1034 | 98087450 | bellard | *q++ = 1; /* session number */ |
1035 | 98087450 | bellard | *q++ = 0x14; /* data track */ |
1036 | 98087450 | bellard | *q++ = 0; /* track number */ |
1037 | 98087450 | bellard | *q++ = 0xa0; /* lead-in */ |
1038 | 98087450 | bellard | *q++ = 0; /* min */ |
1039 | 98087450 | bellard | *q++ = 0; /* sec */ |
1040 | 98087450 | bellard | *q++ = 0; /* frame */ |
1041 | 98087450 | bellard | *q++ = 0;
|
1042 | 98087450 | bellard | *q++ = 1; /* first track */ |
1043 | 98087450 | bellard | *q++ = 0x00; /* disk type */ |
1044 | 98087450 | bellard | *q++ = 0x00;
|
1045 | 98087450 | bellard | |
1046 | 98087450 | bellard | *q++ = 1; /* session number */ |
1047 | 98087450 | bellard | *q++ = 0x14; /* data track */ |
1048 | 98087450 | bellard | *q++ = 0; /* track number */ |
1049 | 98087450 | bellard | *q++ = 0xa1;
|
1050 | 98087450 | bellard | *q++ = 0; /* min */ |
1051 | 98087450 | bellard | *q++ = 0; /* sec */ |
1052 | 98087450 | bellard | *q++ = 0; /* frame */ |
1053 | 98087450 | bellard | *q++ = 0;
|
1054 | 98087450 | bellard | *q++ = 1; /* last track */ |
1055 | 98087450 | bellard | *q++ = 0x00;
|
1056 | 98087450 | bellard | *q++ = 0x00;
|
1057 | 98087450 | bellard | |
1058 | 98087450 | bellard | *q++ = 1; /* session number */ |
1059 | 98087450 | bellard | *q++ = 0x14; /* data track */ |
1060 | 98087450 | bellard | *q++ = 0; /* track number */ |
1061 | 98087450 | bellard | *q++ = 0xa2; /* lead-out */ |
1062 | 98087450 | bellard | *q++ = 0; /* min */ |
1063 | 98087450 | bellard | *q++ = 0; /* sec */ |
1064 | 98087450 | bellard | *q++ = 0; /* frame */ |
1065 | 98087450 | bellard | nb_sectors = s->nb_sectors >> 2;
|
1066 | 98087450 | bellard | if (msf) {
|
1067 | 98087450 | bellard | *q++ = 0; /* reserved */ |
1068 | 98087450 | bellard | lba_to_msf(q, nb_sectors); |
1069 | 98087450 | bellard | q += 3;
|
1070 | 5391d806 | bellard | } else {
|
1071 | 5391d806 | bellard | cpu_to_ube32(q, nb_sectors); |
1072 | 5391d806 | bellard | q += 4;
|
1073 | 5391d806 | bellard | } |
1074 | 98087450 | bellard | |
1075 | 98087450 | bellard | *q++ = 1; /* session number */ |
1076 | 98087450 | bellard | *q++ = 0x14; /* ADR, control */ |
1077 | 98087450 | bellard | *q++ = 0; /* track number */ |
1078 | 98087450 | bellard | *q++ = 1; /* point */ |
1079 | 98087450 | bellard | *q++ = 0; /* min */ |
1080 | 98087450 | bellard | *q++ = 0; /* sec */ |
1081 | 98087450 | bellard | *q++ = 0; /* frame */ |
1082 | 98087450 | bellard | *q++ = 0;
|
1083 | 98087450 | bellard | *q++ = 0;
|
1084 | 98087450 | bellard | *q++ = 0;
|
1085 | 98087450 | bellard | *q++ = 0;
|
1086 | 98087450 | bellard | |
1087 | 5391d806 | bellard | len = q - buf; |
1088 | 5391d806 | bellard | cpu_to_ube16(buf, len - 2);
|
1089 | 5391d806 | bellard | return len;
|
1090 | 5391d806 | bellard | } |
1091 | 5391d806 | bellard | |
1092 | 5391d806 | bellard | static void ide_atapi_cmd(IDEState *s) |
1093 | 5391d806 | bellard | { |
1094 | 5391d806 | bellard | const uint8_t *packet;
|
1095 | 5391d806 | bellard | uint8_t *buf; |
1096 | 5391d806 | bellard | int max_len;
|
1097 | 5391d806 | bellard | |
1098 | 5391d806 | bellard | packet = s->io_buffer; |
1099 | 5391d806 | bellard | buf = s->io_buffer; |
1100 | 5391d806 | bellard | #ifdef DEBUG_IDE_ATAPI
|
1101 | 5391d806 | bellard | { |
1102 | 5391d806 | bellard | int i;
|
1103 | 5391d806 | bellard | printf("ATAPI limit=0x%x packet:", s->lcyl | (s->hcyl << 8)); |
1104 | 5391d806 | bellard | for(i = 0; i < ATAPI_PACKET_SIZE; i++) { |
1105 | 5391d806 | bellard | printf(" %02x", packet[i]);
|
1106 | 5391d806 | bellard | } |
1107 | 5391d806 | bellard | printf("\n");
|
1108 | 5391d806 | bellard | } |
1109 | 5391d806 | bellard | #endif
|
1110 | 5391d806 | bellard | switch(s->io_buffer[0]) { |
1111 | 5391d806 | bellard | case GPCMD_TEST_UNIT_READY:
|
1112 | caed8802 | bellard | if (bdrv_is_inserted(s->bs)) {
|
1113 | 5391d806 | bellard | ide_atapi_cmd_ok(s); |
1114 | 5391d806 | bellard | } else {
|
1115 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_NOT_READY, |
1116 | 5391d806 | bellard | ASC_MEDIUM_NOT_PRESENT); |
1117 | 5391d806 | bellard | } |
1118 | 5391d806 | bellard | break;
|
1119 | 5391d806 | bellard | case GPCMD_MODE_SENSE_10:
|
1120 | 5391d806 | bellard | { |
1121 | 5391d806 | bellard | int action, code;
|
1122 | 5391d806 | bellard | max_len = ube16_to_cpu(packet + 7);
|
1123 | 5391d806 | bellard | action = packet[2] >> 6; |
1124 | 5391d806 | bellard | code = packet[2] & 0x3f; |
1125 | 5391d806 | bellard | switch(action) {
|
1126 | 5391d806 | bellard | case 0: /* current values */ |
1127 | 5391d806 | bellard | switch(code) {
|
1128 | 5391d806 | bellard | case 0x01: /* error recovery */ |
1129 | 5391d806 | bellard | cpu_to_ube16(&buf[0], 16 + 6); |
1130 | 5391d806 | bellard | buf[2] = 0x70; |
1131 | 5391d806 | bellard | buf[3] = 0; |
1132 | 5391d806 | bellard | buf[4] = 0; |
1133 | 5391d806 | bellard | buf[5] = 0; |
1134 | 5391d806 | bellard | buf[6] = 0; |
1135 | 5391d806 | bellard | buf[7] = 0; |
1136 | 5391d806 | bellard | |
1137 | 5391d806 | bellard | buf[8] = 0x01; |
1138 | 5391d806 | bellard | buf[9] = 0x06; |
1139 | 5391d806 | bellard | buf[10] = 0x00; |
1140 | 5391d806 | bellard | buf[11] = 0x05; |
1141 | 5391d806 | bellard | buf[12] = 0x00; |
1142 | 5391d806 | bellard | buf[13] = 0x00; |
1143 | 5391d806 | bellard | buf[14] = 0x00; |
1144 | 5391d806 | bellard | buf[15] = 0x00; |
1145 | 5391d806 | bellard | ide_atapi_cmd_reply(s, 16, max_len);
|
1146 | 5391d806 | bellard | break;
|
1147 | 5391d806 | bellard | case 0x2a: |
1148 | 5391d806 | bellard | cpu_to_ube16(&buf[0], 28 + 6); |
1149 | 5391d806 | bellard | buf[2] = 0x70; |
1150 | 5391d806 | bellard | buf[3] = 0; |
1151 | 5391d806 | bellard | buf[4] = 0; |
1152 | 5391d806 | bellard | buf[5] = 0; |
1153 | 5391d806 | bellard | buf[6] = 0; |
1154 | 5391d806 | bellard | buf[7] = 0; |
1155 | 5391d806 | bellard | |
1156 | 5391d806 | bellard | buf[8] = 0x2a; |
1157 | 5391d806 | bellard | buf[9] = 0x12; |
1158 | 5391d806 | bellard | buf[10] = 0x00; |
1159 | 5391d806 | bellard | buf[11] = 0x00; |
1160 | 5391d806 | bellard | |
1161 | 5391d806 | bellard | buf[12] = 0x70; |
1162 | 5391d806 | bellard | buf[13] = 3 << 5; |
1163 | 5391d806 | bellard | buf[14] = (1 << 0) | (1 << 3) | (1 << 5); |
1164 | caed8802 | bellard | if (bdrv_is_locked(s->bs))
|
1165 | 5391d806 | bellard | buf[6] |= 1 << 1; |
1166 | 5391d806 | bellard | buf[15] = 0x00; |
1167 | 5391d806 | bellard | cpu_to_ube16(&buf[16], 706); |
1168 | 5391d806 | bellard | buf[18] = 0; |
1169 | 5391d806 | bellard | buf[19] = 2; |
1170 | 5391d806 | bellard | cpu_to_ube16(&buf[20], 512); |
1171 | 5391d806 | bellard | cpu_to_ube16(&buf[22], 706); |
1172 | 5391d806 | bellard | buf[24] = 0; |
1173 | 5391d806 | bellard | buf[25] = 0; |
1174 | 5391d806 | bellard | buf[26] = 0; |
1175 | 5391d806 | bellard | buf[27] = 0; |
1176 | 5391d806 | bellard | ide_atapi_cmd_reply(s, 28, max_len);
|
1177 | 5391d806 | bellard | break;
|
1178 | 5391d806 | bellard | default:
|
1179 | 5391d806 | bellard | goto error_cmd;
|
1180 | 5391d806 | bellard | } |
1181 | 5391d806 | bellard | break;
|
1182 | 5391d806 | bellard | case 1: /* changeable values */ |
1183 | 5391d806 | bellard | goto error_cmd;
|
1184 | 5391d806 | bellard | case 2: /* default values */ |
1185 | 5391d806 | bellard | goto error_cmd;
|
1186 | 5391d806 | bellard | default:
|
1187 | 5391d806 | bellard | case 3: /* saved values */ |
1188 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, |
1189 | 5391d806 | bellard | ASC_SAVING_PARAMETERS_NOT_SUPPORTED); |
1190 | 5391d806 | bellard | break;
|
1191 | 5391d806 | bellard | } |
1192 | 5391d806 | bellard | } |
1193 | 5391d806 | bellard | break;
|
1194 | 5391d806 | bellard | case GPCMD_REQUEST_SENSE:
|
1195 | 5391d806 | bellard | max_len = packet[4];
|
1196 | 5391d806 | bellard | memset(buf, 0, 18); |
1197 | 5391d806 | bellard | buf[0] = 0x70 | (1 << 7); |
1198 | 5391d806 | bellard | buf[2] = s->sense_key;
|
1199 | 5391d806 | bellard | buf[7] = 10; |
1200 | 5391d806 | bellard | buf[12] = s->asc;
|
1201 | 5391d806 | bellard | ide_atapi_cmd_reply(s, 18, max_len);
|
1202 | 5391d806 | bellard | break;
|
1203 | 5391d806 | bellard | case GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
|
1204 | caed8802 | bellard | if (bdrv_is_inserted(s->bs)) {
|
1205 | caed8802 | bellard | bdrv_set_locked(s->bs, packet[4] & 1); |
1206 | 5391d806 | bellard | ide_atapi_cmd_ok(s); |
1207 | 5391d806 | bellard | } else {
|
1208 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_NOT_READY, |
1209 | 5391d806 | bellard | ASC_MEDIUM_NOT_PRESENT); |
1210 | 5391d806 | bellard | } |
1211 | 5391d806 | bellard | break;
|
1212 | 5391d806 | bellard | case GPCMD_READ_10:
|
1213 | 5391d806 | bellard | case GPCMD_READ_12:
|
1214 | 5391d806 | bellard | { |
1215 | 5391d806 | bellard | int nb_sectors, lba;
|
1216 | 5391d806 | bellard | |
1217 | caed8802 | bellard | if (!bdrv_is_inserted(s->bs)) {
|
1218 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_NOT_READY, |
1219 | 5391d806 | bellard | ASC_MEDIUM_NOT_PRESENT); |
1220 | 5391d806 | bellard | break;
|
1221 | 5391d806 | bellard | } |
1222 | 5391d806 | bellard | if (packet[0] == GPCMD_READ_10) |
1223 | 5391d806 | bellard | nb_sectors = ube16_to_cpu(packet + 7);
|
1224 | 5391d806 | bellard | else
|
1225 | 5391d806 | bellard | nb_sectors = ube32_to_cpu(packet + 6);
|
1226 | 5391d806 | bellard | lba = ube32_to_cpu(packet + 2);
|
1227 | 5391d806 | bellard | if (nb_sectors == 0) { |
1228 | 5391d806 | bellard | ide_atapi_cmd_ok(s); |
1229 | 5391d806 | bellard | break;
|
1230 | 5391d806 | bellard | } |
1231 | 5391d806 | bellard | if (((int64_t)(lba + nb_sectors) << 2) > s->nb_sectors) { |
1232 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, |
1233 | 5391d806 | bellard | ASC_LOGICAL_BLOCK_OOR); |
1234 | 5391d806 | bellard | break;
|
1235 | 5391d806 | bellard | } |
1236 | 98087450 | bellard | ide_atapi_cmd_read(s, lba, nb_sectors, 2048);
|
1237 | 98087450 | bellard | } |
1238 | 98087450 | bellard | break;
|
1239 | 98087450 | bellard | case GPCMD_READ_CD:
|
1240 | 98087450 | bellard | { |
1241 | 98087450 | bellard | int nb_sectors, lba, transfer_request;
|
1242 | 98087450 | bellard | |
1243 | 98087450 | bellard | if (!bdrv_is_inserted(s->bs)) {
|
1244 | 98087450 | bellard | ide_atapi_cmd_error(s, SENSE_NOT_READY, |
1245 | 98087450 | bellard | ASC_MEDIUM_NOT_PRESENT); |
1246 | 98087450 | bellard | break;
|
1247 | 98087450 | bellard | } |
1248 | 98087450 | bellard | nb_sectors = (packet[6] << 16) | (packet[7] << 8) | packet[8]; |
1249 | 98087450 | bellard | lba = ube32_to_cpu(packet + 2);
|
1250 | 98087450 | bellard | if (nb_sectors == 0) { |
1251 | 98087450 | bellard | ide_atapi_cmd_ok(s); |
1252 | 98087450 | bellard | break;
|
1253 | 98087450 | bellard | } |
1254 | 98087450 | bellard | if (((int64_t)(lba + nb_sectors) << 2) > s->nb_sectors) { |
1255 | 98087450 | bellard | ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, |
1256 | 98087450 | bellard | ASC_LOGICAL_BLOCK_OOR); |
1257 | 98087450 | bellard | break;
|
1258 | 98087450 | bellard | } |
1259 | 98087450 | bellard | transfer_request = packet[9];
|
1260 | 98087450 | bellard | switch(transfer_request & 0xf8) { |
1261 | 98087450 | bellard | case 0x00: |
1262 | 98087450 | bellard | /* nothing */
|
1263 | 98087450 | bellard | ide_atapi_cmd_ok(s); |
1264 | 98087450 | bellard | break;
|
1265 | 98087450 | bellard | case 0x10: |
1266 | 98087450 | bellard | /* normal read */
|
1267 | 98087450 | bellard | ide_atapi_cmd_read(s, lba, nb_sectors, 2048);
|
1268 | 98087450 | bellard | break;
|
1269 | 98087450 | bellard | case 0xf8: |
1270 | 98087450 | bellard | /* read all data */
|
1271 | 98087450 | bellard | ide_atapi_cmd_read(s, lba, nb_sectors, 2352);
|
1272 | 98087450 | bellard | break;
|
1273 | 98087450 | bellard | default:
|
1274 | 98087450 | bellard | ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, |
1275 | 98087450 | bellard | ASC_INV_FIELD_IN_CMD_PACKET); |
1276 | 98087450 | bellard | break;
|
1277 | 98087450 | bellard | } |
1278 | 5391d806 | bellard | } |
1279 | 5391d806 | bellard | break;
|
1280 | 5391d806 | bellard | case GPCMD_SEEK:
|
1281 | 5391d806 | bellard | { |
1282 | 5391d806 | bellard | int lba;
|
1283 | caed8802 | bellard | if (!bdrv_is_inserted(s->bs)) {
|
1284 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_NOT_READY, |
1285 | 5391d806 | bellard | ASC_MEDIUM_NOT_PRESENT); |
1286 | 5391d806 | bellard | break;
|
1287 | 5391d806 | bellard | } |
1288 | 5391d806 | bellard | lba = ube32_to_cpu(packet + 2);
|
1289 | 5391d806 | bellard | if (((int64_t)lba << 2) > s->nb_sectors) { |
1290 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, |
1291 | 5391d806 | bellard | ASC_LOGICAL_BLOCK_OOR); |
1292 | 5391d806 | bellard | break;
|
1293 | 5391d806 | bellard | } |
1294 | 5391d806 | bellard | ide_atapi_cmd_ok(s); |
1295 | 5391d806 | bellard | } |
1296 | 5391d806 | bellard | break;
|
1297 | 5391d806 | bellard | case GPCMD_START_STOP_UNIT:
|
1298 | 5391d806 | bellard | { |
1299 | 5391d806 | bellard | int start, eject;
|
1300 | 5391d806 | bellard | start = packet[4] & 1; |
1301 | 5391d806 | bellard | eject = (packet[4] >> 1) & 1; |
1302 | 5391d806 | bellard | |
1303 | caed8802 | bellard | if (eject && !start) {
|
1304 | caed8802 | bellard | /* eject the disk */
|
1305 | caed8802 | bellard | bdrv_close(s->bs); |
1306 | caed8802 | bellard | } |
1307 | 5391d806 | bellard | ide_atapi_cmd_ok(s); |
1308 | 5391d806 | bellard | } |
1309 | 5391d806 | bellard | break;
|
1310 | 5391d806 | bellard | case GPCMD_MECHANISM_STATUS:
|
1311 | 5391d806 | bellard | { |
1312 | 5391d806 | bellard | max_len = ube16_to_cpu(packet + 8);
|
1313 | 5391d806 | bellard | cpu_to_ube16(buf, 0);
|
1314 | 5391d806 | bellard | /* no current LBA */
|
1315 | 5391d806 | bellard | buf[2] = 0; |
1316 | 5391d806 | bellard | buf[3] = 0; |
1317 | 5391d806 | bellard | buf[4] = 0; |
1318 | 5391d806 | bellard | buf[5] = 1; |
1319 | 5391d806 | bellard | cpu_to_ube16(buf + 6, 0); |
1320 | 5391d806 | bellard | ide_atapi_cmd_reply(s, 8, max_len);
|
1321 | 5391d806 | bellard | } |
1322 | 5391d806 | bellard | break;
|
1323 | 5391d806 | bellard | case GPCMD_READ_TOC_PMA_ATIP:
|
1324 | 5391d806 | bellard | { |
1325 | 5391d806 | bellard | int format, msf, start_track, len;
|
1326 | 5391d806 | bellard | |
1327 | caed8802 | bellard | if (!bdrv_is_inserted(s->bs)) {
|
1328 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_NOT_READY, |
1329 | 5391d806 | bellard | ASC_MEDIUM_NOT_PRESENT); |
1330 | 5391d806 | bellard | break;
|
1331 | 5391d806 | bellard | } |
1332 | 5391d806 | bellard | max_len = ube16_to_cpu(packet + 7);
|
1333 | 5391d806 | bellard | format = packet[9] >> 6; |
1334 | 5391d806 | bellard | msf = (packet[1] >> 1) & 1; |
1335 | 5391d806 | bellard | start_track = packet[6];
|
1336 | 5391d806 | bellard | switch(format) {
|
1337 | 5391d806 | bellard | case 0: |
1338 | 5391d806 | bellard | len = cdrom_read_toc(s, buf, msf, start_track); |
1339 | 5391d806 | bellard | if (len < 0) |
1340 | 5391d806 | bellard | goto error_cmd;
|
1341 | 5391d806 | bellard | ide_atapi_cmd_reply(s, len, max_len); |
1342 | 5391d806 | bellard | break;
|
1343 | 5391d806 | bellard | case 1: |
1344 | 5391d806 | bellard | /* multi session : only a single session defined */
|
1345 | 5391d806 | bellard | memset(buf, 0, 12); |
1346 | 5391d806 | bellard | buf[1] = 0x0a; |
1347 | 5391d806 | bellard | buf[2] = 0x01; |
1348 | 5391d806 | bellard | buf[3] = 0x01; |
1349 | 5391d806 | bellard | ide_atapi_cmd_reply(s, 12, max_len);
|
1350 | 5391d806 | bellard | break;
|
1351 | 98087450 | bellard | case 2: |
1352 | 98087450 | bellard | len = cdrom_read_toc_raw(s, buf, msf, start_track); |
1353 | 98087450 | bellard | if (len < 0) |
1354 | 98087450 | bellard | goto error_cmd;
|
1355 | 98087450 | bellard | ide_atapi_cmd_reply(s, len, max_len); |
1356 | 98087450 | bellard | break;
|
1357 | 5391d806 | bellard | default:
|
1358 | 7f777bf3 | bellard | error_cmd:
|
1359 | 7f777bf3 | bellard | ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, |
1360 | 7f777bf3 | bellard | ASC_INV_FIELD_IN_CMD_PACKET); |
1361 | 7f777bf3 | bellard | break;
|
1362 | 5391d806 | bellard | } |
1363 | 5391d806 | bellard | } |
1364 | 5391d806 | bellard | break;
|
1365 | 5391d806 | bellard | case GPCMD_READ_CDVD_CAPACITY:
|
1366 | caed8802 | bellard | if (!bdrv_is_inserted(s->bs)) {
|
1367 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_NOT_READY, |
1368 | 5391d806 | bellard | ASC_MEDIUM_NOT_PRESENT); |
1369 | 5391d806 | bellard | break;
|
1370 | 5391d806 | bellard | } |
1371 | 5391d806 | bellard | /* NOTE: it is really the number of sectors minus 1 */
|
1372 | 5391d806 | bellard | cpu_to_ube32(buf, (s->nb_sectors >> 2) - 1); |
1373 | 5391d806 | bellard | cpu_to_ube32(buf + 4, 2048); |
1374 | 5391d806 | bellard | ide_atapi_cmd_reply(s, 8, 8); |
1375 | 5391d806 | bellard | break;
|
1376 | bd0d90b2 | bellard | case GPCMD_INQUIRY:
|
1377 | bd0d90b2 | bellard | max_len = packet[4];
|
1378 | bd0d90b2 | bellard | buf[0] = 0x05; /* CD-ROM */ |
1379 | bd0d90b2 | bellard | buf[1] = 0x80; /* removable */ |
1380 | bd0d90b2 | bellard | buf[2] = 0x00; /* ISO */ |
1381 | bd0d90b2 | bellard | buf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */ |
1382 | bd0d90b2 | bellard | buf[4] = 31; /* additionnal length */ |
1383 | bd0d90b2 | bellard | buf[5] = 0; /* reserved */ |
1384 | bd0d90b2 | bellard | buf[6] = 0; /* reserved */ |
1385 | bd0d90b2 | bellard | buf[7] = 0; /* reserved */ |
1386 | bd0d90b2 | bellard | padstr8(buf + 8, 8, "QEMU"); |
1387 | bd0d90b2 | bellard | padstr8(buf + 16, 16, "QEMU CD-ROM"); |
1388 | bd0d90b2 | bellard | padstr8(buf + 32, 4, QEMU_VERSION); |
1389 | bd0d90b2 | bellard | ide_atapi_cmd_reply(s, 36, max_len);
|
1390 | bd0d90b2 | bellard | break;
|
1391 | 5391d806 | bellard | default:
|
1392 | 5391d806 | bellard | ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, |
1393 | 7f777bf3 | bellard | ASC_ILLEGAL_OPCODE); |
1394 | 5391d806 | bellard | break;
|
1395 | 5391d806 | bellard | } |
1396 | 5391d806 | bellard | } |
1397 | 5391d806 | bellard | |
1398 | caed8802 | bellard | /* called when the inserted state of the media has changed */
|
1399 | caed8802 | bellard | static void cdrom_change_cb(void *opaque) |
1400 | 5391d806 | bellard | { |
1401 | caed8802 | bellard | IDEState *s = opaque; |
1402 | caed8802 | bellard | int64_t nb_sectors; |
1403 | caed8802 | bellard | |
1404 | caed8802 | bellard | /* XXX: send interrupt too */
|
1405 | caed8802 | bellard | bdrv_get_geometry(s->bs, &nb_sectors); |
1406 | caed8802 | bellard | s->nb_sectors = nb_sectors; |
1407 | caed8802 | bellard | } |
1408 | caed8802 | bellard | |
1409 | caed8802 | bellard | static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val) |
1410 | caed8802 | bellard | { |
1411 | caed8802 | bellard | IDEState *ide_if = opaque; |
1412 | c45c3d00 | bellard | IDEState *s; |
1413 | 5391d806 | bellard | int unit, n;
|
1414 | 5391d806 | bellard | |
1415 | 5391d806 | bellard | #ifdef DEBUG_IDE
|
1416 | 5391d806 | bellard | printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
|
1417 | 5391d806 | bellard | #endif
|
1418 | 5391d806 | bellard | addr &= 7;
|
1419 | 5391d806 | bellard | switch(addr) {
|
1420 | 5391d806 | bellard | case 0: |
1421 | 5391d806 | bellard | break;
|
1422 | 5391d806 | bellard | case 1: |
1423 | c45c3d00 | bellard | /* NOTE: data is written to the two drives */
|
1424 | c45c3d00 | bellard | ide_if[0].feature = val;
|
1425 | c45c3d00 | bellard | ide_if[1].feature = val;
|
1426 | 5391d806 | bellard | break;
|
1427 | 5391d806 | bellard | case 2: |
1428 | 5391d806 | bellard | if (val == 0) |
1429 | 5391d806 | bellard | val = 256;
|
1430 | c45c3d00 | bellard | ide_if[0].nsector = val;
|
1431 | c45c3d00 | bellard | ide_if[1].nsector = val;
|
1432 | 5391d806 | bellard | break;
|
1433 | 5391d806 | bellard | case 3: |
1434 | c45c3d00 | bellard | ide_if[0].sector = val;
|
1435 | c45c3d00 | bellard | ide_if[1].sector = val;
|
1436 | 5391d806 | bellard | break;
|
1437 | 5391d806 | bellard | case 4: |
1438 | c45c3d00 | bellard | ide_if[0].lcyl = val;
|
1439 | c45c3d00 | bellard | ide_if[1].lcyl = val;
|
1440 | 5391d806 | bellard | break;
|
1441 | 5391d806 | bellard | case 5: |
1442 | c45c3d00 | bellard | ide_if[0].hcyl = val;
|
1443 | c45c3d00 | bellard | ide_if[1].hcyl = val;
|
1444 | 5391d806 | bellard | break;
|
1445 | 5391d806 | bellard | case 6: |
1446 | 7ae98627 | bellard | ide_if[0].select = (val & ~0x10) | 0xa0; |
1447 | 7ae98627 | bellard | ide_if[1].select = (val | 0x10) | 0xa0; |
1448 | 5391d806 | bellard | /* select drive */
|
1449 | 5391d806 | bellard | unit = (val >> 4) & 1; |
1450 | 5391d806 | bellard | s = ide_if + unit; |
1451 | 5391d806 | bellard | ide_if->cur_drive = s; |
1452 | 5391d806 | bellard | break;
|
1453 | 5391d806 | bellard | default:
|
1454 | 5391d806 | bellard | case 7: |
1455 | 5391d806 | bellard | /* command */
|
1456 | 5391d806 | bellard | #if defined(DEBUG_IDE)
|
1457 | 5391d806 | bellard | printf("ide: CMD=%02x\n", val);
|
1458 | 5391d806 | bellard | #endif
|
1459 | c45c3d00 | bellard | s = ide_if->cur_drive; |
1460 | 66201e2d | bellard | /* ignore commands to non existant slave */
|
1461 | 66201e2d | bellard | if (s != ide_if && !s->bs)
|
1462 | 66201e2d | bellard | break;
|
1463 | 5391d806 | bellard | switch(val) {
|
1464 | 5391d806 | bellard | case WIN_IDENTIFY:
|
1465 | 5391d806 | bellard | if (s->bs && !s->is_cdrom) {
|
1466 | 5391d806 | bellard | ide_identify(s); |
1467 | 2a282056 | bellard | s->status = READY_STAT | SEEK_STAT; |
1468 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
|
1469 | 5391d806 | bellard | } else {
|
1470 | 5391d806 | bellard | if (s->is_cdrom) {
|
1471 | 5391d806 | bellard | ide_set_signature(s); |
1472 | 5391d806 | bellard | } |
1473 | 5391d806 | bellard | ide_abort_command(s); |
1474 | 5391d806 | bellard | } |
1475 | 5391d806 | bellard | ide_set_irq(s); |
1476 | 5391d806 | bellard | break;
|
1477 | 5391d806 | bellard | case WIN_SPECIFY:
|
1478 | 5391d806 | bellard | case WIN_RECAL:
|
1479 | a136e5a8 | bellard | s->error = 0;
|
1480 | 5391d806 | bellard | s->status = READY_STAT; |
1481 | 5391d806 | bellard | ide_set_irq(s); |
1482 | 5391d806 | bellard | break;
|
1483 | 5391d806 | bellard | case WIN_SETMULT:
|
1484 | 5391d806 | bellard | if (s->nsector > MAX_MULT_SECTORS ||
|
1485 | 5391d806 | bellard | s->nsector == 0 ||
|
1486 | 5391d806 | bellard | (s->nsector & (s->nsector - 1)) != 0) { |
1487 | 5391d806 | bellard | ide_abort_command(s); |
1488 | 5391d806 | bellard | } else {
|
1489 | 5391d806 | bellard | s->mult_sectors = s->nsector; |
1490 | 5391d806 | bellard | s->status = READY_STAT; |
1491 | 5391d806 | bellard | } |
1492 | 5391d806 | bellard | ide_set_irq(s); |
1493 | 5391d806 | bellard | break;
|
1494 | 4ce900b4 | bellard | case WIN_VERIFY:
|
1495 | 4ce900b4 | bellard | case WIN_VERIFY_ONCE:
|
1496 | 4ce900b4 | bellard | /* do sector number check ? */
|
1497 | 4ce900b4 | bellard | s->status = READY_STAT; |
1498 | 4ce900b4 | bellard | ide_set_irq(s); |
1499 | 4ce900b4 | bellard | break;
|
1500 | 5391d806 | bellard | case WIN_READ:
|
1501 | 5391d806 | bellard | case WIN_READ_ONCE:
|
1502 | 6b136f9e | bellard | if (!s->bs)
|
1503 | 6b136f9e | bellard | goto abort_cmd;
|
1504 | 5391d806 | bellard | s->req_nb_sectors = 1;
|
1505 | 5391d806 | bellard | ide_sector_read(s); |
1506 | 5391d806 | bellard | break;
|
1507 | 5391d806 | bellard | case WIN_WRITE:
|
1508 | 5391d806 | bellard | case WIN_WRITE_ONCE:
|
1509 | a136e5a8 | bellard | s->error = 0;
|
1510 | f66723fa | bellard | s->status = SEEK_STAT | READY_STAT; |
1511 | 5391d806 | bellard | s->req_nb_sectors = 1;
|
1512 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
|
1513 | 5391d806 | bellard | break;
|
1514 | 5391d806 | bellard | case WIN_MULTREAD:
|
1515 | 5391d806 | bellard | if (!s->mult_sectors)
|
1516 | 5391d806 | bellard | goto abort_cmd;
|
1517 | 5391d806 | bellard | s->req_nb_sectors = s->mult_sectors; |
1518 | 5391d806 | bellard | ide_sector_read(s); |
1519 | 5391d806 | bellard | break;
|
1520 | 5391d806 | bellard | case WIN_MULTWRITE:
|
1521 | 5391d806 | bellard | if (!s->mult_sectors)
|
1522 | 5391d806 | bellard | goto abort_cmd;
|
1523 | a136e5a8 | bellard | s->error = 0;
|
1524 | f66723fa | bellard | s->status = SEEK_STAT | READY_STAT; |
1525 | 5391d806 | bellard | s->req_nb_sectors = s->mult_sectors; |
1526 | 5391d806 | bellard | n = s->nsector; |
1527 | 5391d806 | bellard | if (n > s->req_nb_sectors)
|
1528 | 5391d806 | bellard | n = s->req_nb_sectors; |
1529 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
|
1530 | 5391d806 | bellard | break;
|
1531 | 98087450 | bellard | case WIN_READDMA:
|
1532 | 98087450 | bellard | case WIN_READDMA_ONCE:
|
1533 | 98087450 | bellard | if (!s->bs)
|
1534 | 98087450 | bellard | goto abort_cmd;
|
1535 | 98087450 | bellard | ide_sector_read_dma(s); |
1536 | 98087450 | bellard | break;
|
1537 | 98087450 | bellard | case WIN_WRITEDMA:
|
1538 | 98087450 | bellard | case WIN_WRITEDMA_ONCE:
|
1539 | 98087450 | bellard | if (!s->bs)
|
1540 | 98087450 | bellard | goto abort_cmd;
|
1541 | 98087450 | bellard | ide_sector_write_dma(s); |
1542 | 98087450 | bellard | break;
|
1543 | 5391d806 | bellard | case WIN_READ_NATIVE_MAX:
|
1544 | 5391d806 | bellard | ide_set_sector(s, s->nb_sectors - 1);
|
1545 | 5391d806 | bellard | s->status = READY_STAT; |
1546 | 5391d806 | bellard | ide_set_irq(s); |
1547 | 5391d806 | bellard | break;
|
1548 | a136e5a8 | bellard | case WIN_CHECKPOWERMODE1:
|
1549 | a136e5a8 | bellard | s->nsector = 0xff; /* device active or idle */ |
1550 | a136e5a8 | bellard | s->status = READY_STAT; |
1551 | a136e5a8 | bellard | ide_set_irq(s); |
1552 | a136e5a8 | bellard | break;
|
1553 | 34e538ae | bellard | case WIN_SETFEATURES:
|
1554 | 34e538ae | bellard | if (!s->bs)
|
1555 | 34e538ae | bellard | goto abort_cmd;
|
1556 | 34e538ae | bellard | /* XXX: valid for CDROM ? */
|
1557 | 34e538ae | bellard | switch(s->feature) {
|
1558 | 34e538ae | bellard | case 0x02: /* write cache enable */ |
1559 | 98087450 | bellard | case 0x03: /* set transfer mode */ |
1560 | 34e538ae | bellard | case 0x82: /* write cache disable */ |
1561 | 34e538ae | bellard | case 0xaa: /* read look-ahead enable */ |
1562 | 34e538ae | bellard | case 0x55: /* read look-ahead disable */ |
1563 | 34e538ae | bellard | s->status = READY_STAT; |
1564 | 34e538ae | bellard | ide_set_irq(s); |
1565 | 34e538ae | bellard | break;
|
1566 | 34e538ae | bellard | default:
|
1567 | 34e538ae | bellard | goto abort_cmd;
|
1568 | 34e538ae | bellard | } |
1569 | 34e538ae | bellard | break;
|
1570 | 5391d806 | bellard | /* ATAPI commands */
|
1571 | 5391d806 | bellard | case WIN_PIDENTIFY:
|
1572 | 5391d806 | bellard | if (s->is_cdrom) {
|
1573 | 5391d806 | bellard | ide_atapi_identify(s); |
1574 | 5391d806 | bellard | s->status = READY_STAT; |
1575 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
|
1576 | 5391d806 | bellard | } else {
|
1577 | 5391d806 | bellard | ide_abort_command(s); |
1578 | 5391d806 | bellard | } |
1579 | 5391d806 | bellard | ide_set_irq(s); |
1580 | 5391d806 | bellard | break;
|
1581 | 5391d806 | bellard | case WIN_SRST:
|
1582 | 5391d806 | bellard | if (!s->is_cdrom)
|
1583 | 5391d806 | bellard | goto abort_cmd;
|
1584 | 5391d806 | bellard | ide_set_signature(s); |
1585 | 6b136f9e | bellard | s->status = 0x00; /* NOTE: READY is _not_ set */ |
1586 | 5391d806 | bellard | s->error = 0x01;
|
1587 | 5391d806 | bellard | break;
|
1588 | 5391d806 | bellard | case WIN_PACKETCMD:
|
1589 | 5391d806 | bellard | if (!s->is_cdrom)
|
1590 | 5391d806 | bellard | goto abort_cmd;
|
1591 | 98087450 | bellard | /* overlapping commands not supported */
|
1592 | 98087450 | bellard | if (s->feature & 0x02) |
1593 | 5391d806 | bellard | goto abort_cmd;
|
1594 | 98087450 | bellard | s->atapi_dma = s->feature & 1;
|
1595 | 5391d806 | bellard | s->nsector = 1;
|
1596 | 5391d806 | bellard | ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE, |
1597 | 5391d806 | bellard | ide_atapi_cmd); |
1598 | 5391d806 | bellard | break;
|
1599 | 5391d806 | bellard | default:
|
1600 | 5391d806 | bellard | abort_cmd:
|
1601 | 5391d806 | bellard | ide_abort_command(s); |
1602 | 5391d806 | bellard | ide_set_irq(s); |
1603 | 5391d806 | bellard | break;
|
1604 | 5391d806 | bellard | } |
1605 | 5391d806 | bellard | } |
1606 | 5391d806 | bellard | } |
1607 | 5391d806 | bellard | |
1608 | caed8802 | bellard | static uint32_t ide_ioport_read(void *opaque, uint32_t addr1) |
1609 | 5391d806 | bellard | { |
1610 | 7ae98627 | bellard | IDEState *ide_if = opaque; |
1611 | 7ae98627 | bellard | IDEState *s = ide_if->cur_drive; |
1612 | 5391d806 | bellard | uint32_t addr; |
1613 | 5391d806 | bellard | int ret;
|
1614 | 5391d806 | bellard | |
1615 | 5391d806 | bellard | addr = addr1 & 7;
|
1616 | 5391d806 | bellard | switch(addr) {
|
1617 | 5391d806 | bellard | case 0: |
1618 | 5391d806 | bellard | ret = 0xff;
|
1619 | 5391d806 | bellard | break;
|
1620 | 5391d806 | bellard | case 1: |
1621 | 7ae98627 | bellard | if (!ide_if[0].bs && !ide_if[1].bs) |
1622 | c45c3d00 | bellard | ret = 0;
|
1623 | c45c3d00 | bellard | else
|
1624 | c45c3d00 | bellard | ret = s->error; |
1625 | 5391d806 | bellard | break;
|
1626 | 5391d806 | bellard | case 2: |
1627 | 7ae98627 | bellard | if (!ide_if[0].bs && !ide_if[1].bs) |
1628 | c45c3d00 | bellard | ret = 0;
|
1629 | c45c3d00 | bellard | else
|
1630 | c45c3d00 | bellard | ret = s->nsector & 0xff;
|
1631 | 5391d806 | bellard | break;
|
1632 | 5391d806 | bellard | case 3: |
1633 | 7ae98627 | bellard | if (!ide_if[0].bs && !ide_if[1].bs) |
1634 | c45c3d00 | bellard | ret = 0;
|
1635 | c45c3d00 | bellard | else
|
1636 | c45c3d00 | bellard | ret = s->sector; |
1637 | 5391d806 | bellard | break;
|
1638 | 5391d806 | bellard | case 4: |
1639 | 7ae98627 | bellard | if (!ide_if[0].bs && !ide_if[1].bs) |
1640 | c45c3d00 | bellard | ret = 0;
|
1641 | c45c3d00 | bellard | else
|
1642 | c45c3d00 | bellard | ret = s->lcyl; |
1643 | 5391d806 | bellard | break;
|
1644 | 5391d806 | bellard | case 5: |
1645 | 7ae98627 | bellard | if (!ide_if[0].bs && !ide_if[1].bs) |
1646 | c45c3d00 | bellard | ret = 0;
|
1647 | c45c3d00 | bellard | else
|
1648 | c45c3d00 | bellard | ret = s->hcyl; |
1649 | 5391d806 | bellard | break;
|
1650 | 5391d806 | bellard | case 6: |
1651 | 7ae98627 | bellard | if (!ide_if[0].bs && !ide_if[1].bs) |
1652 | c45c3d00 | bellard | ret = 0;
|
1653 | c45c3d00 | bellard | else
|
1654 | 7ae98627 | bellard | ret = s->select; |
1655 | 5391d806 | bellard | break;
|
1656 | 5391d806 | bellard | default:
|
1657 | 5391d806 | bellard | case 7: |
1658 | 66201e2d | bellard | if ((!ide_if[0].bs && !ide_if[1].bs) || |
1659 | 66201e2d | bellard | (s != ide_if && !s->bs)) |
1660 | c45c3d00 | bellard | ret = 0;
|
1661 | c45c3d00 | bellard | else
|
1662 | c45c3d00 | bellard | ret = s->status; |
1663 | 1ade1de2 | bellard | #ifdef TARGET_PPC
|
1664 | 1ade1de2 | bellard | if (s->openpic)
|
1665 | 1ade1de2 | bellard | openpic_set_irq(s->openpic, s->irq, 0);
|
1666 | 1ade1de2 | bellard | else
|
1667 | 1ade1de2 | bellard | #endif
|
1668 | 34e538ae | bellard | if (s->irq == 16) |
1669 | 34e538ae | bellard | pci_set_irq(s->pci_dev, 0, 0); |
1670 | 34e538ae | bellard | else
|
1671 | 34e538ae | bellard | pic_set_irq(s->irq, 0);
|
1672 | 5391d806 | bellard | break;
|
1673 | 5391d806 | bellard | } |
1674 | 5391d806 | bellard | #ifdef DEBUG_IDE
|
1675 | 5391d806 | bellard | printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
|
1676 | 5391d806 | bellard | #endif
|
1677 | 5391d806 | bellard | return ret;
|
1678 | 5391d806 | bellard | } |
1679 | 5391d806 | bellard | |
1680 | caed8802 | bellard | static uint32_t ide_status_read(void *opaque, uint32_t addr) |
1681 | 5391d806 | bellard | { |
1682 | 7ae98627 | bellard | IDEState *ide_if = opaque; |
1683 | 7ae98627 | bellard | IDEState *s = ide_if->cur_drive; |
1684 | 5391d806 | bellard | int ret;
|
1685 | 7ae98627 | bellard | |
1686 | 66201e2d | bellard | if ((!ide_if[0].bs && !ide_if[1].bs) || |
1687 | 66201e2d | bellard | (s != ide_if && !s->bs)) |
1688 | 7ae98627 | bellard | ret = 0;
|
1689 | 7ae98627 | bellard | else
|
1690 | 7ae98627 | bellard | ret = s->status; |
1691 | 5391d806 | bellard | #ifdef DEBUG_IDE
|
1692 | 5391d806 | bellard | printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
|
1693 | 5391d806 | bellard | #endif
|
1694 | 5391d806 | bellard | return ret;
|
1695 | 5391d806 | bellard | } |
1696 | 5391d806 | bellard | |
1697 | caed8802 | bellard | static void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val) |
1698 | 5391d806 | bellard | { |
1699 | caed8802 | bellard | IDEState *ide_if = opaque; |
1700 | 5391d806 | bellard | IDEState *s; |
1701 | 5391d806 | bellard | int i;
|
1702 | 5391d806 | bellard | |
1703 | 5391d806 | bellard | #ifdef DEBUG_IDE
|
1704 | 5391d806 | bellard | printf("ide: write control addr=0x%x val=%02x\n", addr, val);
|
1705 | 5391d806 | bellard | #endif
|
1706 | 5391d806 | bellard | /* common for both drives */
|
1707 | 5391d806 | bellard | if (!(ide_if[0].cmd & IDE_CMD_RESET) && |
1708 | 5391d806 | bellard | (val & IDE_CMD_RESET)) { |
1709 | 5391d806 | bellard | /* reset low to high */
|
1710 | 5391d806 | bellard | for(i = 0;i < 2; i++) { |
1711 | 5391d806 | bellard | s = &ide_if[i]; |
1712 | 5391d806 | bellard | s->status = BUSY_STAT | SEEK_STAT; |
1713 | 5391d806 | bellard | s->error = 0x01;
|
1714 | 5391d806 | bellard | } |
1715 | 5391d806 | bellard | } else if ((ide_if[0].cmd & IDE_CMD_RESET) && |
1716 | 5391d806 | bellard | !(val & IDE_CMD_RESET)) { |
1717 | 5391d806 | bellard | /* high to low */
|
1718 | 5391d806 | bellard | for(i = 0;i < 2; i++) { |
1719 | 5391d806 | bellard | s = &ide_if[i]; |
1720 | 6b136f9e | bellard | if (s->is_cdrom)
|
1721 | 6b136f9e | bellard | s->status = 0x00; /* NOTE: READY is _not_ set */ |
1722 | 6b136f9e | bellard | else
|
1723 | 56bf1d37 | bellard | s->status = READY_STAT | SEEK_STAT; |
1724 | 5391d806 | bellard | ide_set_signature(s); |
1725 | 5391d806 | bellard | } |
1726 | 5391d806 | bellard | } |
1727 | 5391d806 | bellard | |
1728 | 5391d806 | bellard | ide_if[0].cmd = val;
|
1729 | 5391d806 | bellard | ide_if[1].cmd = val;
|
1730 | 5391d806 | bellard | } |
1731 | 5391d806 | bellard | |
1732 | caed8802 | bellard | static void ide_data_writew(void *opaque, uint32_t addr, uint32_t val) |
1733 | 5391d806 | bellard | { |
1734 | caed8802 | bellard | IDEState *s = ((IDEState *)opaque)->cur_drive; |
1735 | 5391d806 | bellard | uint8_t *p; |
1736 | 5391d806 | bellard | |
1737 | 5391d806 | bellard | p = s->data_ptr; |
1738 | 0c4ad8dc | bellard | *(uint16_t *)p = le16_to_cpu(val); |
1739 | 5391d806 | bellard | p += 2;
|
1740 | 5391d806 | bellard | s->data_ptr = p; |
1741 | 5391d806 | bellard | if (p >= s->data_end)
|
1742 | 5391d806 | bellard | s->end_transfer_func(s); |
1743 | 5391d806 | bellard | } |
1744 | 5391d806 | bellard | |
1745 | caed8802 | bellard | static uint32_t ide_data_readw(void *opaque, uint32_t addr) |
1746 | 5391d806 | bellard | { |
1747 | caed8802 | bellard | IDEState *s = ((IDEState *)opaque)->cur_drive; |
1748 | 5391d806 | bellard | uint8_t *p; |
1749 | 5391d806 | bellard | int ret;
|
1750 | 5391d806 | bellard | p = s->data_ptr; |
1751 | 0c4ad8dc | bellard | ret = cpu_to_le16(*(uint16_t *)p); |
1752 | 5391d806 | bellard | p += 2;
|
1753 | 5391d806 | bellard | s->data_ptr = p; |
1754 | 5391d806 | bellard | if (p >= s->data_end)
|
1755 | 5391d806 | bellard | s->end_transfer_func(s); |
1756 | 5391d806 | bellard | return ret;
|
1757 | 5391d806 | bellard | } |
1758 | 5391d806 | bellard | |
1759 | caed8802 | bellard | static void ide_data_writel(void *opaque, uint32_t addr, uint32_t val) |
1760 | 5391d806 | bellard | { |
1761 | caed8802 | bellard | IDEState *s = ((IDEState *)opaque)->cur_drive; |
1762 | 5391d806 | bellard | uint8_t *p; |
1763 | 5391d806 | bellard | |
1764 | 5391d806 | bellard | p = s->data_ptr; |
1765 | 0c4ad8dc | bellard | *(uint32_t *)p = le32_to_cpu(val); |
1766 | 5391d806 | bellard | p += 4;
|
1767 | 5391d806 | bellard | s->data_ptr = p; |
1768 | 5391d806 | bellard | if (p >= s->data_end)
|
1769 | 5391d806 | bellard | s->end_transfer_func(s); |
1770 | 5391d806 | bellard | } |
1771 | 5391d806 | bellard | |
1772 | caed8802 | bellard | static uint32_t ide_data_readl(void *opaque, uint32_t addr) |
1773 | 5391d806 | bellard | { |
1774 | caed8802 | bellard | IDEState *s = ((IDEState *)opaque)->cur_drive; |
1775 | 5391d806 | bellard | uint8_t *p; |
1776 | 5391d806 | bellard | int ret;
|
1777 | 5391d806 | bellard | |
1778 | 5391d806 | bellard | p = s->data_ptr; |
1779 | 0c4ad8dc | bellard | ret = cpu_to_le32(*(uint32_t *)p); |
1780 | 5391d806 | bellard | p += 4;
|
1781 | 5391d806 | bellard | s->data_ptr = p; |
1782 | 5391d806 | bellard | if (p >= s->data_end)
|
1783 | 5391d806 | bellard | s->end_transfer_func(s); |
1784 | 5391d806 | bellard | return ret;
|
1785 | 5391d806 | bellard | } |
1786 | 5391d806 | bellard | |
1787 | 5391d806 | bellard | static void ide_reset(IDEState *s) |
1788 | 5391d806 | bellard | { |
1789 | 5391d806 | bellard | s->mult_sectors = MAX_MULT_SECTORS; |
1790 | 5391d806 | bellard | s->cur_drive = s; |
1791 | 5391d806 | bellard | s->select = 0xa0;
|
1792 | 5391d806 | bellard | s->status = READY_STAT; |
1793 | 5391d806 | bellard | ide_set_signature(s); |
1794 | 5391d806 | bellard | } |
1795 | 5391d806 | bellard | |
1796 | 5391d806 | bellard | struct partition {
|
1797 | 5391d806 | bellard | uint8_t boot_ind; /* 0x80 - active */
|
1798 | 5391d806 | bellard | uint8_t head; /* starting head */
|
1799 | 5391d806 | bellard | uint8_t sector; /* starting sector */
|
1800 | 5391d806 | bellard | uint8_t cyl; /* starting cylinder */
|
1801 | 5391d806 | bellard | uint8_t sys_ind; /* What partition type */
|
1802 | 5391d806 | bellard | uint8_t end_head; /* end head */
|
1803 | 5391d806 | bellard | uint8_t end_sector; /* end sector */
|
1804 | 5391d806 | bellard | uint8_t end_cyl; /* end cylinder */
|
1805 | 5391d806 | bellard | uint32_t start_sect; /* starting sector counting from 0 */
|
1806 | 5391d806 | bellard | uint32_t nr_sects; /* nr of sectors in partition */
|
1807 | 5391d806 | bellard | } __attribute__((packed)); |
1808 | 5391d806 | bellard | |
1809 | 5391d806 | bellard | /* try to guess the IDE geometry from the MSDOS partition table */
|
1810 | 5391d806 | bellard | static void ide_guess_geometry(IDEState *s) |
1811 | 5391d806 | bellard | { |
1812 | 5391d806 | bellard | uint8_t buf[512];
|
1813 | 5391d806 | bellard | int ret, i;
|
1814 | 5391d806 | bellard | struct partition *p;
|
1815 | 5391d806 | bellard | uint32_t nr_sects; |
1816 | 5391d806 | bellard | |
1817 | 5391d806 | bellard | if (s->cylinders != 0) |
1818 | 5391d806 | bellard | return;
|
1819 | 5391d806 | bellard | ret = bdrv_read(s->bs, 0, buf, 1); |
1820 | 5391d806 | bellard | if (ret < 0) |
1821 | 5391d806 | bellard | return;
|
1822 | 5391d806 | bellard | /* test msdos magic */
|
1823 | 5391d806 | bellard | if (buf[510] != 0x55 || buf[511] != 0xaa) |
1824 | 5391d806 | bellard | return;
|
1825 | 5391d806 | bellard | for(i = 0; i < 4; i++) { |
1826 | 5391d806 | bellard | p = ((struct partition *)(buf + 0x1be)) + i; |
1827 | 0c4ad8dc | bellard | nr_sects = le32_to_cpu(p->nr_sects); |
1828 | 5391d806 | bellard | if (nr_sects && p->end_head) {
|
1829 | 5391d806 | bellard | /* We make the assumption that the partition terminates on
|
1830 | 5391d806 | bellard | a cylinder boundary */
|
1831 | 5391d806 | bellard | s->heads = p->end_head + 1;
|
1832 | 5391d806 | bellard | s->sectors = p->end_sector & 63;
|
1833 | 5391d806 | bellard | s->cylinders = s->nb_sectors / (s->heads * s->sectors); |
1834 | 5391d806 | bellard | #if 0
|
1835 | 5391d806 | bellard | printf("guessed partition: CHS=%d %d %d\n",
|
1836 | 5391d806 | bellard | s->cylinders, s->heads, s->sectors);
|
1837 | 5391d806 | bellard | #endif
|
1838 | 5391d806 | bellard | } |
1839 | 5391d806 | bellard | } |
1840 | 5391d806 | bellard | } |
1841 | 5391d806 | bellard | |
1842 | 69b91039 | bellard | static void ide_init2(IDEState *ide_state, int irq, |
1843 | 69b91039 | bellard | BlockDriverState *hd0, BlockDriverState *hd1) |
1844 | 5391d806 | bellard | { |
1845 | 69b91039 | bellard | IDEState *s; |
1846 | aedf5382 | bellard | static int drive_serial = 1; |
1847 | caed8802 | bellard | int i, cylinders, heads, secs;
|
1848 | 5391d806 | bellard | int64_t nb_sectors; |
1849 | 5391d806 | bellard | |
1850 | caed8802 | bellard | for(i = 0; i < 2; i++) { |
1851 | caed8802 | bellard | s = ide_state + i; |
1852 | caed8802 | bellard | if (i == 0) |
1853 | caed8802 | bellard | s->bs = hd0; |
1854 | caed8802 | bellard | else
|
1855 | caed8802 | bellard | s->bs = hd1; |
1856 | 5391d806 | bellard | if (s->bs) {
|
1857 | 5391d806 | bellard | bdrv_get_geometry(s->bs, &nb_sectors); |
1858 | 5391d806 | bellard | s->nb_sectors = nb_sectors; |
1859 | caed8802 | bellard | /* if a geometry hint is available, use it */
|
1860 | caed8802 | bellard | bdrv_get_geometry_hint(s->bs, &cylinders, &heads, &secs); |
1861 | caed8802 | bellard | if (cylinders != 0) { |
1862 | 5391d806 | bellard | s->cylinders = cylinders; |
1863 | caed8802 | bellard | s->heads = heads; |
1864 | caed8802 | bellard | s->sectors = secs; |
1865 | caed8802 | bellard | } else {
|
1866 | caed8802 | bellard | ide_guess_geometry(s); |
1867 | caed8802 | bellard | if (s->cylinders == 0) { |
1868 | caed8802 | bellard | /* if no geometry, use a LBA compatible one */
|
1869 | caed8802 | bellard | cylinders = nb_sectors / (16 * 63); |
1870 | caed8802 | bellard | if (cylinders > 16383) |
1871 | caed8802 | bellard | cylinders = 16383;
|
1872 | caed8802 | bellard | else if (cylinders < 2) |
1873 | caed8802 | bellard | cylinders = 2;
|
1874 | caed8802 | bellard | s->cylinders = cylinders; |
1875 | caed8802 | bellard | s->heads = 16;
|
1876 | caed8802 | bellard | s->sectors = 63;
|
1877 | caed8802 | bellard | } |
1878 | caed8802 | bellard | } |
1879 | caed8802 | bellard | if (bdrv_get_type_hint(s->bs) == BDRV_TYPE_CDROM) {
|
1880 | caed8802 | bellard | s->is_cdrom = 1;
|
1881 | caed8802 | bellard | bdrv_set_change_cb(s->bs, cdrom_change_cb, s); |
1882 | 5391d806 | bellard | } |
1883 | 5391d806 | bellard | } |
1884 | aedf5382 | bellard | s->drive_serial = drive_serial++; |
1885 | caed8802 | bellard | s->irq = irq; |
1886 | 5391d806 | bellard | ide_reset(s); |
1887 | 5391d806 | bellard | } |
1888 | 69b91039 | bellard | } |
1889 | 69b91039 | bellard | |
1890 | 34e538ae | bellard | static void ide_init_ioport(IDEState *ide_state, int iobase, int iobase2) |
1891 | 69b91039 | bellard | { |
1892 | caed8802 | bellard | register_ioport_write(iobase, 8, 1, ide_ioport_write, ide_state); |
1893 | caed8802 | bellard | register_ioport_read(iobase, 8, 1, ide_ioport_read, ide_state); |
1894 | caed8802 | bellard | if (iobase2) {
|
1895 | caed8802 | bellard | register_ioport_read(iobase2, 1, 1, ide_status_read, ide_state); |
1896 | caed8802 | bellard | register_ioport_write(iobase2, 1, 1, ide_cmd_write, ide_state); |
1897 | 5391d806 | bellard | } |
1898 | caed8802 | bellard | |
1899 | caed8802 | bellard | /* data ports */
|
1900 | caed8802 | bellard | register_ioport_write(iobase, 2, 2, ide_data_writew, ide_state); |
1901 | caed8802 | bellard | register_ioport_read(iobase, 2, 2, ide_data_readw, ide_state); |
1902 | caed8802 | bellard | register_ioport_write(iobase, 4, 4, ide_data_writel, ide_state); |
1903 | caed8802 | bellard | register_ioport_read(iobase, 4, 4, ide_data_readl, ide_state); |
1904 | 5391d806 | bellard | } |
1905 | 69b91039 | bellard | |
1906 | 69b91039 | bellard | /***********************************************************/
|
1907 | 34e538ae | bellard | /* ISA IDE definitions */
|
1908 | 34e538ae | bellard | |
1909 | 34e538ae | bellard | void isa_ide_init(int iobase, int iobase2, int irq, |
1910 | 34e538ae | bellard | BlockDriverState *hd0, BlockDriverState *hd1) |
1911 | 34e538ae | bellard | { |
1912 | 34e538ae | bellard | IDEState *ide_state; |
1913 | 34e538ae | bellard | |
1914 | 34e538ae | bellard | ide_state = qemu_mallocz(sizeof(IDEState) * 2); |
1915 | 34e538ae | bellard | if (!ide_state)
|
1916 | 34e538ae | bellard | return;
|
1917 | 34e538ae | bellard | |
1918 | 34e538ae | bellard | ide_init2(ide_state, irq, hd0, hd1); |
1919 | 34e538ae | bellard | ide_init_ioport(ide_state, iobase, iobase2); |
1920 | 34e538ae | bellard | } |
1921 | 34e538ae | bellard | |
1922 | 34e538ae | bellard | /***********************************************************/
|
1923 | 69b91039 | bellard | /* PCI IDE definitions */
|
1924 | 69b91039 | bellard | |
1925 | 69b91039 | bellard | static void ide_map(PCIDevice *pci_dev, int region_num, |
1926 | 69b91039 | bellard | uint32_t addr, uint32_t size, int type)
|
1927 | 69b91039 | bellard | { |
1928 | 69b91039 | bellard | PCIIDEState *d = (PCIIDEState *)pci_dev; |
1929 | 69b91039 | bellard | IDEState *ide_state; |
1930 | 69b91039 | bellard | |
1931 | 69b91039 | bellard | if (region_num <= 3) { |
1932 | 69b91039 | bellard | ide_state = &d->ide_if[(region_num >> 1) * 2]; |
1933 | 69b91039 | bellard | if (region_num & 1) { |
1934 | 69b91039 | bellard | register_ioport_read(addr + 2, 1, 1, ide_status_read, ide_state); |
1935 | 69b91039 | bellard | register_ioport_write(addr + 2, 1, 1, ide_cmd_write, ide_state); |
1936 | 69b91039 | bellard | } else {
|
1937 | 69b91039 | bellard | register_ioport_write(addr, 8, 1, ide_ioport_write, ide_state); |
1938 | 69b91039 | bellard | register_ioport_read(addr, 8, 1, ide_ioport_read, ide_state); |
1939 | 69b91039 | bellard | |
1940 | 69b91039 | bellard | /* data ports */
|
1941 | 69b91039 | bellard | register_ioport_write(addr, 2, 2, ide_data_writew, ide_state); |
1942 | 69b91039 | bellard | register_ioport_read(addr, 2, 2, ide_data_readw, ide_state); |
1943 | 69b91039 | bellard | register_ioport_write(addr, 4, 4, ide_data_writel, ide_state); |
1944 | 69b91039 | bellard | register_ioport_read(addr, 4, 4, ide_data_readl, ide_state); |
1945 | 69b91039 | bellard | } |
1946 | 69b91039 | bellard | } |
1947 | 69b91039 | bellard | } |
1948 | 69b91039 | bellard | |
1949 | 98087450 | bellard | /* XXX: full callback usage to prepare non blocking I/Os support -
|
1950 | 98087450 | bellard | error handling */
|
1951 | 98087450 | bellard | static void ide_dma_loop(BMDMAState *bm) |
1952 | 98087450 | bellard | { |
1953 | 98087450 | bellard | struct {
|
1954 | 98087450 | bellard | uint32_t addr; |
1955 | 98087450 | bellard | uint32_t size; |
1956 | 98087450 | bellard | } prd; |
1957 | 98087450 | bellard | target_phys_addr_t cur_addr; |
1958 | 98087450 | bellard | int len, i, len1;
|
1959 | 98087450 | bellard | |
1960 | 98087450 | bellard | cur_addr = bm->addr; |
1961 | 98087450 | bellard | /* at most one page to avoid hanging if erroneous parameters */
|
1962 | 98087450 | bellard | for(i = 0; i < 512; i++) { |
1963 | 98087450 | bellard | cpu_physical_memory_read(cur_addr, (uint8_t *)&prd, 8);
|
1964 | 98087450 | bellard | prd.addr = le32_to_cpu(prd.addr); |
1965 | 98087450 | bellard | prd.size = le32_to_cpu(prd.size); |
1966 | 98087450 | bellard | #ifdef DEBUG_IDE
|
1967 | 98087450 | bellard | printf("ide: dma: prd: %08x: addr=0x%08x size=0x%08x\n",
|
1968 | 98087450 | bellard | (int)cur_addr, prd.addr, prd.size);
|
1969 | 98087450 | bellard | #endif
|
1970 | 98087450 | bellard | len = prd.size & 0xfffe;
|
1971 | 98087450 | bellard | if (len == 0) |
1972 | 98087450 | bellard | len = 0x10000;
|
1973 | 98087450 | bellard | while (len > 0) { |
1974 | 98087450 | bellard | len1 = bm->dma_cb(bm->ide_if, prd.addr, len); |
1975 | 98087450 | bellard | if (len1 == 0) |
1976 | 98087450 | bellard | goto the_end;
|
1977 | 98087450 | bellard | prd.addr += len1; |
1978 | 98087450 | bellard | len -= len1; |
1979 | 98087450 | bellard | } |
1980 | 98087450 | bellard | /* end of transfer */
|
1981 | 98087450 | bellard | if (prd.size & 0x80000000) |
1982 | 98087450 | bellard | break;
|
1983 | 98087450 | bellard | cur_addr += 8;
|
1984 | 98087450 | bellard | } |
1985 | 98087450 | bellard | /* end of transfer */
|
1986 | 98087450 | bellard | the_end:
|
1987 | 98087450 | bellard | bm->status &= ~BM_STATUS_DMAING; |
1988 | 98087450 | bellard | bm->status |= BM_STATUS_INT; |
1989 | 98087450 | bellard | bm->dma_cb = NULL;
|
1990 | 98087450 | bellard | bm->ide_if = NULL;
|
1991 | 98087450 | bellard | } |
1992 | 98087450 | bellard | |
1993 | 98087450 | bellard | static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb) |
1994 | 98087450 | bellard | { |
1995 | 98087450 | bellard | BMDMAState *bm = s->bmdma; |
1996 | 98087450 | bellard | if(!bm)
|
1997 | 98087450 | bellard | return;
|
1998 | 98087450 | bellard | bm->ide_if = s; |
1999 | 98087450 | bellard | bm->dma_cb = dma_cb; |
2000 | 98087450 | bellard | if (bm->status & BM_STATUS_DMAING) {
|
2001 | 98087450 | bellard | ide_dma_loop(bm); |
2002 | 98087450 | bellard | } |
2003 | 98087450 | bellard | } |
2004 | 98087450 | bellard | |
2005 | 98087450 | bellard | static uint32_t bmdma_cmd_readb(void *opaque, uint32_t addr) |
2006 | 98087450 | bellard | { |
2007 | 98087450 | bellard | BMDMAState *bm = opaque; |
2008 | 98087450 | bellard | uint32_t val; |
2009 | 98087450 | bellard | val = bm->cmd; |
2010 | 98087450 | bellard | #ifdef DEBUG_IDE
|
2011 | 98087450 | bellard | printf("%s: 0x%08x\n", __func__, val);
|
2012 | 98087450 | bellard | #endif
|
2013 | 98087450 | bellard | return val;
|
2014 | 98087450 | bellard | } |
2015 | 98087450 | bellard | |
2016 | 98087450 | bellard | static void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val) |
2017 | 98087450 | bellard | { |
2018 | 98087450 | bellard | BMDMAState *bm = opaque; |
2019 | 98087450 | bellard | #ifdef DEBUG_IDE
|
2020 | 98087450 | bellard | printf("%s: 0x%08x\n", __func__, val);
|
2021 | 98087450 | bellard | #endif
|
2022 | 98087450 | bellard | if (!(val & BM_CMD_START)) {
|
2023 | 98087450 | bellard | /* XXX: do it better */
|
2024 | 98087450 | bellard | bm->status &= ~BM_STATUS_DMAING; |
2025 | 98087450 | bellard | bm->cmd = val & 0x09;
|
2026 | 98087450 | bellard | } else {
|
2027 | 98087450 | bellard | bm->status |= BM_STATUS_DMAING; |
2028 | 98087450 | bellard | bm->cmd = val & 0x09;
|
2029 | 98087450 | bellard | /* start dma transfer if possible */
|
2030 | 98087450 | bellard | if (bm->dma_cb)
|
2031 | 98087450 | bellard | ide_dma_loop(bm); |
2032 | 98087450 | bellard | } |
2033 | 98087450 | bellard | } |
2034 | 98087450 | bellard | |
2035 | 98087450 | bellard | static uint32_t bmdma_status_readb(void *opaque, uint32_t addr) |
2036 | 98087450 | bellard | { |
2037 | 98087450 | bellard | BMDMAState *bm = opaque; |
2038 | 98087450 | bellard | uint32_t val; |
2039 | 98087450 | bellard | val = bm->status; |
2040 | 98087450 | bellard | #ifdef DEBUG_IDE
|
2041 | 98087450 | bellard | printf("%s: 0x%08x\n", __func__, val);
|
2042 | 98087450 | bellard | #endif
|
2043 | 98087450 | bellard | return val;
|
2044 | 98087450 | bellard | } |
2045 | 98087450 | bellard | |
2046 | 98087450 | bellard | static void bmdma_status_writeb(void *opaque, uint32_t addr, uint32_t val) |
2047 | 98087450 | bellard | { |
2048 | 98087450 | bellard | BMDMAState *bm = opaque; |
2049 | 98087450 | bellard | #ifdef DEBUG_IDE
|
2050 | 98087450 | bellard | printf("%s: 0x%08x\n", __func__, val);
|
2051 | 98087450 | bellard | #endif
|
2052 | 98087450 | bellard | bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06); |
2053 | 98087450 | bellard | } |
2054 | 98087450 | bellard | |
2055 | 98087450 | bellard | static uint32_t bmdma_addr_readl(void *opaque, uint32_t addr) |
2056 | 98087450 | bellard | { |
2057 | 98087450 | bellard | BMDMAState *bm = opaque; |
2058 | 98087450 | bellard | uint32_t val; |
2059 | 98087450 | bellard | val = bm->addr; |
2060 | 98087450 | bellard | #ifdef DEBUG_IDE
|
2061 | 98087450 | bellard | printf("%s: 0x%08x\n", __func__, val);
|
2062 | 98087450 | bellard | #endif
|
2063 | 98087450 | bellard | return val;
|
2064 | 98087450 | bellard | } |
2065 | 98087450 | bellard | |
2066 | 98087450 | bellard | static void bmdma_addr_writel(void *opaque, uint32_t addr, uint32_t val) |
2067 | 98087450 | bellard | { |
2068 | 98087450 | bellard | BMDMAState *bm = opaque; |
2069 | 98087450 | bellard | #ifdef DEBUG_IDE
|
2070 | 98087450 | bellard | printf("%s: 0x%08x\n", __func__, val);
|
2071 | 98087450 | bellard | #endif
|
2072 | 98087450 | bellard | bm->addr = val & ~3;
|
2073 | 98087450 | bellard | } |
2074 | 98087450 | bellard | |
2075 | 98087450 | bellard | static void bmdma_map(PCIDevice *pci_dev, int region_num, |
2076 | 98087450 | bellard | uint32_t addr, uint32_t size, int type)
|
2077 | 98087450 | bellard | { |
2078 | 98087450 | bellard | PCIIDEState *d = (PCIIDEState *)pci_dev; |
2079 | 98087450 | bellard | int i;
|
2080 | 98087450 | bellard | |
2081 | 98087450 | bellard | for(i = 0;i < 2; i++) { |
2082 | 98087450 | bellard | BMDMAState *bm = &d->bmdma[i]; |
2083 | 98087450 | bellard | d->ide_if[2 * i].bmdma = bm;
|
2084 | 98087450 | bellard | d->ide_if[2 * i + 1].bmdma = bm; |
2085 | 98087450 | bellard | |
2086 | 98087450 | bellard | register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm); |
2087 | 98087450 | bellard | register_ioport_read(addr, 1, 1, bmdma_cmd_readb, bm); |
2088 | 98087450 | bellard | |
2089 | 98087450 | bellard | register_ioport_write(addr + 2, 1, 1, bmdma_status_writeb, bm); |
2090 | 98087450 | bellard | register_ioport_read(addr + 2, 1, 1, bmdma_status_readb, bm); |
2091 | 98087450 | bellard | |
2092 | 98087450 | bellard | register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm); |
2093 | 98087450 | bellard | register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm); |
2094 | 98087450 | bellard | addr += 8;
|
2095 | 98087450 | bellard | } |
2096 | 98087450 | bellard | } |
2097 | 98087450 | bellard | |
2098 | 69b91039 | bellard | /* hd_table must contain 4 block drivers */
|
2099 | 46e50e9d | bellard | void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
|
2100 | 69b91039 | bellard | { |
2101 | 69b91039 | bellard | PCIIDEState *d; |
2102 | 69b91039 | bellard | uint8_t *pci_conf; |
2103 | 34e538ae | bellard | int i;
|
2104 | 34e538ae | bellard | |
2105 | 46e50e9d | bellard | d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState), |
2106 | 46e50e9d | bellard | -1,
|
2107 | 73c11f63 | bellard | NULL, NULL); |
2108 | 69b91039 | bellard | pci_conf = d->dev.config; |
2109 | 69b91039 | bellard | pci_conf[0x00] = 0x86; // Intel |
2110 | 69b91039 | bellard | pci_conf[0x01] = 0x80; |
2111 | 69b91039 | bellard | pci_conf[0x02] = 0x00; // fake |
2112 | 69b91039 | bellard | pci_conf[0x03] = 0x01; // fake |
2113 | 69b91039 | bellard | pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE |
2114 | 69b91039 | bellard | pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage |
2115 | 69b91039 | bellard | pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic |
2116 | 69b91039 | bellard | |
2117 | 69b91039 | bellard | pci_conf[0x2c] = 0x86; // subsys vendor |
2118 | 69b91039 | bellard | pci_conf[0x2d] = 0x80; // subsys vendor |
2119 | 69b91039 | bellard | pci_conf[0x2e] = 0x00; // fake |
2120 | 69b91039 | bellard | pci_conf[0x2f] = 0x01; // fake |
2121 | 69b91039 | bellard | |
2122 | 69b91039 | bellard | pci_register_io_region((PCIDevice *)d, 0, 0x8, |
2123 | 69b91039 | bellard | PCI_ADDRESS_SPACE_IO, ide_map); |
2124 | 69b91039 | bellard | pci_register_io_region((PCIDevice *)d, 1, 0x4, |
2125 | 69b91039 | bellard | PCI_ADDRESS_SPACE_IO, ide_map); |
2126 | 69b91039 | bellard | pci_register_io_region((PCIDevice *)d, 2, 0x8, |
2127 | 69b91039 | bellard | PCI_ADDRESS_SPACE_IO, ide_map); |
2128 | 69b91039 | bellard | pci_register_io_region((PCIDevice *)d, 3, 0x4, |
2129 | 69b91039 | bellard | PCI_ADDRESS_SPACE_IO, ide_map); |
2130 | 98087450 | bellard | pci_register_io_region((PCIDevice *)d, 4, 0x10, |
2131 | 98087450 | bellard | PCI_ADDRESS_SPACE_IO, bmdma_map); |
2132 | 69b91039 | bellard | |
2133 | 34e538ae | bellard | pci_conf[0x3d] = 0x01; // interrupt on pin 1 |
2134 | 34e538ae | bellard | |
2135 | 34e538ae | bellard | for(i = 0; i < 4; i++) |
2136 | 34e538ae | bellard | d->ide_if[i].pci_dev = (PCIDevice *)d; |
2137 | 34e538ae | bellard | ide_init2(&d->ide_if[0], 16, hd_table[0], hd_table[1]); |
2138 | 34e538ae | bellard | ide_init2(&d->ide_if[2], 16, hd_table[2], hd_table[3]); |
2139 | 34e538ae | bellard | } |
2140 | 34e538ae | bellard | |
2141 | 34e538ae | bellard | /* hd_table must contain 4 block drivers */
|
2142 | 34e538ae | bellard | /* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
|
2143 | 46e50e9d | bellard | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
|
2144 | 34e538ae | bellard | { |
2145 | 34e538ae | bellard | PCIIDEState *d; |
2146 | 34e538ae | bellard | uint8_t *pci_conf; |
2147 | 34e538ae | bellard | |
2148 | 34e538ae | bellard | /* register a function 1 of PIIX3 */
|
2149 | 46e50e9d | bellard | d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
|
2150 | 46e50e9d | bellard | sizeof(PCIIDEState),
|
2151 | 46e50e9d | bellard | ((PCIDevice *)piix3_state)->devfn + 1,
|
2152 | 34e538ae | bellard | NULL, NULL); |
2153 | 34e538ae | bellard | pci_conf = d->dev.config; |
2154 | 34e538ae | bellard | pci_conf[0x00] = 0x86; // Intel |
2155 | 34e538ae | bellard | pci_conf[0x01] = 0x80; |
2156 | 34e538ae | bellard | pci_conf[0x02] = 0x10; |
2157 | 34e538ae | bellard | pci_conf[0x03] = 0x70; |
2158 | 34e538ae | bellard | pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE |
2159 | 34e538ae | bellard | pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage |
2160 | 34e538ae | bellard | pci_conf[0x0e] = 0x00; // header_type |
2161 | 34e538ae | bellard | |
2162 | 98087450 | bellard | pci_register_io_region((PCIDevice *)d, 4, 0x10, |
2163 | 98087450 | bellard | PCI_ADDRESS_SPACE_IO, bmdma_map); |
2164 | 34e538ae | bellard | |
2165 | 69b91039 | bellard | ide_init2(&d->ide_if[0], 14, hd_table[0], hd_table[1]); |
2166 | 69b91039 | bellard | ide_init2(&d->ide_if[2], 15, hd_table[2], hd_table[3]); |
2167 | 34e538ae | bellard | ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6); |
2168 | 34e538ae | bellard | ide_init_ioport(&d->ide_if[2], 0x170, 0x376); |
2169 | 69b91039 | bellard | } |
2170 | 1ade1de2 | bellard | |
2171 | 1ade1de2 | bellard | /***********************************************************/
|
2172 | 1ade1de2 | bellard | /* MacIO based PowerPC IDE */
|
2173 | 1ade1de2 | bellard | |
2174 | 1ade1de2 | bellard | /* PowerMac IDE memory IO */
|
2175 | 1ade1de2 | bellard | static void pmac_ide_writeb (void *opaque, |
2176 | 1ade1de2 | bellard | target_phys_addr_t addr, uint32_t val) |
2177 | 1ade1de2 | bellard | { |
2178 | 1ade1de2 | bellard | addr = (addr & 0xFFF) >> 4; |
2179 | 1ade1de2 | bellard | switch (addr) {
|
2180 | 1ade1de2 | bellard | case 1 ... 7: |
2181 | 1ade1de2 | bellard | ide_ioport_write(opaque, addr, val); |
2182 | 1ade1de2 | bellard | break;
|
2183 | 1ade1de2 | bellard | case 8: |
2184 | 1ade1de2 | bellard | case 22: |
2185 | 1ade1de2 | bellard | ide_cmd_write(opaque, 0, val);
|
2186 | 1ade1de2 | bellard | break;
|
2187 | 1ade1de2 | bellard | default:
|
2188 | 1ade1de2 | bellard | break;
|
2189 | 1ade1de2 | bellard | } |
2190 | 1ade1de2 | bellard | } |
2191 | 1ade1de2 | bellard | |
2192 | 1ade1de2 | bellard | static uint32_t pmac_ide_readb (void *opaque,target_phys_addr_t addr) |
2193 | 1ade1de2 | bellard | { |
2194 | 1ade1de2 | bellard | uint8_t retval; |
2195 | 1ade1de2 | bellard | |
2196 | 1ade1de2 | bellard | addr = (addr & 0xFFF) >> 4; |
2197 | 1ade1de2 | bellard | switch (addr) {
|
2198 | 1ade1de2 | bellard | case 1 ... 7: |
2199 | 1ade1de2 | bellard | retval = ide_ioport_read(opaque, addr); |
2200 | 1ade1de2 | bellard | break;
|
2201 | 1ade1de2 | bellard | case 8: |
2202 | 1ade1de2 | bellard | case 22: |
2203 | 1ade1de2 | bellard | retval = ide_status_read(opaque, 0);
|
2204 | 1ade1de2 | bellard | break;
|
2205 | 1ade1de2 | bellard | default:
|
2206 | 1ade1de2 | bellard | retval = 0xFF;
|
2207 | 1ade1de2 | bellard | break;
|
2208 | 1ade1de2 | bellard | } |
2209 | 1ade1de2 | bellard | return retval;
|
2210 | 1ade1de2 | bellard | } |
2211 | 1ade1de2 | bellard | |
2212 | 1ade1de2 | bellard | static void pmac_ide_writew (void *opaque, |
2213 | 1ade1de2 | bellard | target_phys_addr_t addr, uint32_t val) |
2214 | 1ade1de2 | bellard | { |
2215 | 1ade1de2 | bellard | addr = (addr & 0xFFF) >> 4; |
2216 | 1ade1de2 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
2217 | 1ade1de2 | bellard | val = bswap16(val); |
2218 | 1ade1de2 | bellard | #endif
|
2219 | 1ade1de2 | bellard | if (addr == 0) { |
2220 | 1ade1de2 | bellard | ide_data_writew(opaque, 0, val);
|
2221 | 1ade1de2 | bellard | } |
2222 | 1ade1de2 | bellard | } |
2223 | 1ade1de2 | bellard | |
2224 | 1ade1de2 | bellard | static uint32_t pmac_ide_readw (void *opaque,target_phys_addr_t addr) |
2225 | 1ade1de2 | bellard | { |
2226 | 1ade1de2 | bellard | uint16_t retval; |
2227 | 1ade1de2 | bellard | |
2228 | 1ade1de2 | bellard | addr = (addr & 0xFFF) >> 4; |
2229 | 1ade1de2 | bellard | if (addr == 0) { |
2230 | 1ade1de2 | bellard | retval = ide_data_readw(opaque, 0);
|
2231 | 1ade1de2 | bellard | } else {
|
2232 | 1ade1de2 | bellard | retval = 0xFFFF;
|
2233 | 1ade1de2 | bellard | } |
2234 | 1ade1de2 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
2235 | 1ade1de2 | bellard | retval = bswap16(retval); |
2236 | 1ade1de2 | bellard | #endif
|
2237 | 1ade1de2 | bellard | return retval;
|
2238 | 1ade1de2 | bellard | } |
2239 | 1ade1de2 | bellard | |
2240 | 1ade1de2 | bellard | static void pmac_ide_writel (void *opaque, |
2241 | 1ade1de2 | bellard | target_phys_addr_t addr, uint32_t val) |
2242 | 1ade1de2 | bellard | { |
2243 | 1ade1de2 | bellard | addr = (addr & 0xFFF) >> 4; |
2244 | 1ade1de2 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
2245 | 1ade1de2 | bellard | val = bswap32(val); |
2246 | 1ade1de2 | bellard | #endif
|
2247 | 1ade1de2 | bellard | if (addr == 0) { |
2248 | 1ade1de2 | bellard | ide_data_writel(opaque, 0, val);
|
2249 | 1ade1de2 | bellard | } |
2250 | 1ade1de2 | bellard | } |
2251 | 1ade1de2 | bellard | |
2252 | 1ade1de2 | bellard | static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr) |
2253 | 1ade1de2 | bellard | { |
2254 | 1ade1de2 | bellard | uint32_t retval; |
2255 | 1ade1de2 | bellard | |
2256 | 1ade1de2 | bellard | addr = (addr & 0xFFF) >> 4; |
2257 | 1ade1de2 | bellard | if (addr == 0) { |
2258 | 1ade1de2 | bellard | retval = ide_data_readl(opaque, 0);
|
2259 | 1ade1de2 | bellard | } else {
|
2260 | 1ade1de2 | bellard | retval = 0xFFFFFFFF;
|
2261 | 1ade1de2 | bellard | } |
2262 | 1ade1de2 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
|
2263 | 1ade1de2 | bellard | retval = bswap32(retval); |
2264 | 1ade1de2 | bellard | #endif
|
2265 | 1ade1de2 | bellard | return retval;
|
2266 | 1ade1de2 | bellard | } |
2267 | 1ade1de2 | bellard | |
2268 | 1ade1de2 | bellard | static CPUWriteMemoryFunc *pmac_ide_write[] = {
|
2269 | 1ade1de2 | bellard | pmac_ide_writeb, |
2270 | 1ade1de2 | bellard | pmac_ide_writew, |
2271 | 1ade1de2 | bellard | pmac_ide_writel, |
2272 | 1ade1de2 | bellard | }; |
2273 | 1ade1de2 | bellard | |
2274 | 1ade1de2 | bellard | static CPUReadMemoryFunc *pmac_ide_read[] = {
|
2275 | 1ade1de2 | bellard | pmac_ide_readb, |
2276 | 1ade1de2 | bellard | pmac_ide_readw, |
2277 | 1ade1de2 | bellard | pmac_ide_readl, |
2278 | 1ade1de2 | bellard | }; |
2279 | 1ade1de2 | bellard | |
2280 | 1ade1de2 | bellard | /* hd_table must contain 4 block drivers */
|
2281 | 1ade1de2 | bellard | /* PowerMac uses memory mapped registers, not I/O. Return the memory
|
2282 | 1ade1de2 | bellard | I/O index to access the ide. */
|
2283 | 1ade1de2 | bellard | int pmac_ide_init (BlockDriverState **hd_table,
|
2284 | 1ade1de2 | bellard | openpic_t *openpic, int irq)
|
2285 | 1ade1de2 | bellard | { |
2286 | 1ade1de2 | bellard | IDEState *ide_if; |
2287 | 1ade1de2 | bellard | int pmac_ide_memory;
|
2288 | 1ade1de2 | bellard | |
2289 | 1ade1de2 | bellard | ide_if = qemu_mallocz(sizeof(IDEState) * 2); |
2290 | 1ade1de2 | bellard | ide_init2(&ide_if[0], irq, hd_table[0], hd_table[1]); |
2291 | 1ade1de2 | bellard | ide_if[0].openpic = openpic;
|
2292 | 1ade1de2 | bellard | ide_if[1].openpic = openpic;
|
2293 | 1ade1de2 | bellard | |
2294 | 1ade1de2 | bellard | pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
|
2295 | 1ade1de2 | bellard | pmac_ide_write, &ide_if[0]);
|
2296 | 1ade1de2 | bellard | return pmac_ide_memory;
|
2297 | 1ade1de2 | bellard | } |