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1 | 31e31b8a | bellard | /*
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2 | 93ac68bc | bellard | * qemu user main
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3 | 31e31b8a | bellard | *
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4 | 31e31b8a | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 31e31b8a | bellard | *
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6 | 31e31b8a | bellard | * This program is free software; you can redistribute it and/or modify
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7 | 31e31b8a | bellard | * it under the terms of the GNU General Public License as published by
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8 | 31e31b8a | bellard | * the Free Software Foundation; either version 2 of the License, or
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9 | 31e31b8a | bellard | * (at your option) any later version.
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10 | 31e31b8a | bellard | *
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11 | 31e31b8a | bellard | * This program is distributed in the hope that it will be useful,
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12 | 31e31b8a | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 31e31b8a | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 | 31e31b8a | bellard | * GNU General Public License for more details.
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15 | 31e31b8a | bellard | *
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16 | 31e31b8a | bellard | * You should have received a copy of the GNU General Public License
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17 | 31e31b8a | bellard | * along with this program; if not, write to the Free Software
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18 | 31e31b8a | bellard | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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19 | 31e31b8a | bellard | */
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20 | 31e31b8a | bellard | #include <stdlib.h> |
21 | 31e31b8a | bellard | #include <stdio.h> |
22 | 31e31b8a | bellard | #include <stdarg.h> |
23 | 04369ff2 | bellard | #include <string.h> |
24 | 31e31b8a | bellard | #include <errno.h> |
25 | 0ecfa993 | bellard | #include <unistd.h> |
26 | 31e31b8a | bellard | |
27 | 3ef693a0 | bellard | #include "qemu.h" |
28 | 31e31b8a | bellard | |
29 | 3ef693a0 | bellard | #define DEBUG_LOGFILE "/tmp/qemu.log" |
30 | 586314f2 | bellard | |
31 | 83fb7adf | bellard | #ifdef __APPLE__
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32 | 83fb7adf | bellard | #include <crt_externs.h> |
33 | 83fb7adf | bellard | # define environ (*_NSGetEnviron())
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34 | 83fb7adf | bellard | #endif
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35 | 83fb7adf | bellard | |
36 | 74cd30b8 | bellard | static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
37 | 586314f2 | bellard | |
38 | 3a4739d6 | bellard | #if defined(__i386__) && !defined(CONFIG_STATIC)
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39 | f801f97e | bellard | /* Force usage of an ELF interpreter even if it is an ELF shared
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40 | f801f97e | bellard | object ! */
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41 | f801f97e | bellard | const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; |
42 | 4304763b | bellard | #endif
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43 | 74cd30b8 | bellard | |
44 | 93ac68bc | bellard | /* for recent libc, we add these dummy symbols which are not declared
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45 | 74cd30b8 | bellard | when generating a linked object (bug in ld ?) */
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46 | fbf59244 | bellard | #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC) |
47 | c6981055 | bellard | long __preinit_array_start[0]; |
48 | c6981055 | bellard | long __preinit_array_end[0]; |
49 | 74cd30b8 | bellard | long __init_array_start[0]; |
50 | 74cd30b8 | bellard | long __init_array_end[0]; |
51 | 74cd30b8 | bellard | long __fini_array_start[0]; |
52 | 74cd30b8 | bellard | long __fini_array_end[0]; |
53 | 74cd30b8 | bellard | #endif
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54 | 74cd30b8 | bellard | |
55 | 9de5e440 | bellard | /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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56 | 9de5e440 | bellard | we allocate a bigger stack. Need a better solution, for example
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57 | 9de5e440 | bellard | by remapping the process stack directly at the right place */
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58 | 9de5e440 | bellard | unsigned long x86_stack_size = 512 * 1024; |
59 | 31e31b8a | bellard | |
60 | 31e31b8a | bellard | void gemu_log(const char *fmt, ...) |
61 | 31e31b8a | bellard | { |
62 | 31e31b8a | bellard | va_list ap; |
63 | 31e31b8a | bellard | |
64 | 31e31b8a | bellard | va_start(ap, fmt); |
65 | 31e31b8a | bellard | vfprintf(stderr, fmt, ap); |
66 | 31e31b8a | bellard | va_end(ap); |
67 | 31e31b8a | bellard | } |
68 | 31e31b8a | bellard | |
69 | 61190b14 | bellard | void cpu_outb(CPUState *env, int addr, int val) |
70 | 367e86e8 | bellard | { |
71 | 367e86e8 | bellard | fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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72 | 367e86e8 | bellard | } |
73 | 367e86e8 | bellard | |
74 | 61190b14 | bellard | void cpu_outw(CPUState *env, int addr, int val) |
75 | 367e86e8 | bellard | { |
76 | 367e86e8 | bellard | fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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77 | 367e86e8 | bellard | } |
78 | 367e86e8 | bellard | |
79 | 61190b14 | bellard | void cpu_outl(CPUState *env, int addr, int val) |
80 | 367e86e8 | bellard | { |
81 | 367e86e8 | bellard | fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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82 | 367e86e8 | bellard | } |
83 | 367e86e8 | bellard | |
84 | 61190b14 | bellard | int cpu_inb(CPUState *env, int addr) |
85 | 367e86e8 | bellard | { |
86 | 367e86e8 | bellard | fprintf(stderr, "inb: port=0x%04x\n", addr);
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87 | 367e86e8 | bellard | return 0; |
88 | 367e86e8 | bellard | } |
89 | 367e86e8 | bellard | |
90 | 61190b14 | bellard | int cpu_inw(CPUState *env, int addr) |
91 | 367e86e8 | bellard | { |
92 | 367e86e8 | bellard | fprintf(stderr, "inw: port=0x%04x\n", addr);
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93 | 367e86e8 | bellard | return 0; |
94 | 367e86e8 | bellard | } |
95 | 367e86e8 | bellard | |
96 | 61190b14 | bellard | int cpu_inl(CPUState *env, int addr) |
97 | 367e86e8 | bellard | { |
98 | 367e86e8 | bellard | fprintf(stderr, "inl: port=0x%04x\n", addr);
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99 | 367e86e8 | bellard | return 0; |
100 | 367e86e8 | bellard | } |
101 | 367e86e8 | bellard | |
102 | a541f297 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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103 | 92ccca6a | bellard | { |
104 | 92ccca6a | bellard | return -1; |
105 | 92ccca6a | bellard | } |
106 | 92ccca6a | bellard | |
107 | 28ab0e2e | bellard | /* timers for rdtsc */
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108 | 28ab0e2e | bellard | |
109 | 28ab0e2e | bellard | #if defined(__i386__)
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110 | 28ab0e2e | bellard | |
111 | 28ab0e2e | bellard | int64_t cpu_get_real_ticks(void)
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112 | 28ab0e2e | bellard | { |
113 | 28ab0e2e | bellard | int64_t val; |
114 | 28ab0e2e | bellard | asm volatile ("rdtsc" : "=A" (val)); |
115 | 28ab0e2e | bellard | return val;
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116 | 28ab0e2e | bellard | } |
117 | 28ab0e2e | bellard | |
118 | 28ab0e2e | bellard | #elif defined(__x86_64__)
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119 | 28ab0e2e | bellard | |
120 | 28ab0e2e | bellard | int64_t cpu_get_real_ticks(void)
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121 | 28ab0e2e | bellard | { |
122 | 28ab0e2e | bellard | uint32_t low,high; |
123 | 28ab0e2e | bellard | int64_t val; |
124 | 28ab0e2e | bellard | asm volatile("rdtsc" : "=a" (low), "=d" (high)); |
125 | 28ab0e2e | bellard | val = high; |
126 | 28ab0e2e | bellard | val <<= 32;
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127 | 28ab0e2e | bellard | val |= low; |
128 | 28ab0e2e | bellard | return val;
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129 | 28ab0e2e | bellard | } |
130 | 28ab0e2e | bellard | |
131 | 28ab0e2e | bellard | #else
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132 | 28ab0e2e | bellard | |
133 | 28ab0e2e | bellard | static uint64_t emu_time;
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134 | 28ab0e2e | bellard | |
135 | 28ab0e2e | bellard | int64_t cpu_get_real_ticks(void)
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136 | 28ab0e2e | bellard | { |
137 | 28ab0e2e | bellard | return emu_time++;
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138 | 28ab0e2e | bellard | } |
139 | 28ab0e2e | bellard | |
140 | 28ab0e2e | bellard | #endif
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141 | 28ab0e2e | bellard | |
142 | a541f297 | bellard | #ifdef TARGET_I386
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143 | a541f297 | bellard | /***********************************************************/
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144 | a541f297 | bellard | /* CPUX86 core interface */
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145 | a541f297 | bellard | |
146 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
147 | 28ab0e2e | bellard | { |
148 | 28ab0e2e | bellard | return cpu_get_real_ticks();
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149 | 28ab0e2e | bellard | } |
150 | 28ab0e2e | bellard | |
151 | f4beb510 | bellard | static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
152 | f4beb510 | bellard | int flags)
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153 | 6dbad63e | bellard | { |
154 | f4beb510 | bellard | unsigned int e1, e2; |
155 | 6dbad63e | bellard | e1 = (addr << 16) | (limit & 0xffff); |
156 | 6dbad63e | bellard | e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); |
157 | f4beb510 | bellard | e2 |= flags; |
158 | f4beb510 | bellard | stl((uint8_t *)ptr, e1); |
159 | f4beb510 | bellard | stl((uint8_t *)ptr + 4, e2);
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160 | f4beb510 | bellard | } |
161 | f4beb510 | bellard | |
162 | f4beb510 | bellard | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
163 | f4beb510 | bellard | unsigned long addr, unsigned int sel) |
164 | f4beb510 | bellard | { |
165 | f4beb510 | bellard | unsigned int e1, e2; |
166 | f4beb510 | bellard | e1 = (addr & 0xffff) | (sel << 16); |
167 | f4beb510 | bellard | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
168 | 6dbad63e | bellard | stl((uint8_t *)ptr, e1); |
169 | 6dbad63e | bellard | stl((uint8_t *)ptr + 4, e2);
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170 | 6dbad63e | bellard | } |
171 | 6dbad63e | bellard | |
172 | 6dbad63e | bellard | uint64_t gdt_table[6];
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173 | f4beb510 | bellard | uint64_t idt_table[256];
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174 | f4beb510 | bellard | |
175 | f4beb510 | bellard | /* only dpl matters as we do only user space emulation */
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176 | f4beb510 | bellard | static void set_idt(int n, unsigned int dpl) |
177 | f4beb510 | bellard | { |
178 | f4beb510 | bellard | set_gate(idt_table + n, 0, dpl, 0, 0); |
179 | f4beb510 | bellard | } |
180 | 31e31b8a | bellard | |
181 | 89e957e7 | bellard | void cpu_loop(CPUX86State *env)
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182 | 1b6b029e | bellard | { |
183 | bc8a22cc | bellard | int trapnr;
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184 | 80a9d035 | bellard | target_ulong pc; |
185 | 9de5e440 | bellard | target_siginfo_t info; |
186 | 851e67a1 | bellard | |
187 | 1b6b029e | bellard | for(;;) {
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188 | bc8a22cc | bellard | trapnr = cpu_x86_exec(env); |
189 | bc8a22cc | bellard | switch(trapnr) {
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190 | f4beb510 | bellard | case 0x80: |
191 | f4beb510 | bellard | /* linux syscall */
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192 | f4beb510 | bellard | env->regs[R_EAX] = do_syscall(env, |
193 | f4beb510 | bellard | env->regs[R_EAX], |
194 | f4beb510 | bellard | env->regs[R_EBX], |
195 | f4beb510 | bellard | env->regs[R_ECX], |
196 | f4beb510 | bellard | env->regs[R_EDX], |
197 | f4beb510 | bellard | env->regs[R_ESI], |
198 | f4beb510 | bellard | env->regs[R_EDI], |
199 | f4beb510 | bellard | env->regs[R_EBP]); |
200 | f4beb510 | bellard | break;
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201 | f4beb510 | bellard | case EXCP0B_NOSEG:
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202 | f4beb510 | bellard | case EXCP0C_STACK:
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203 | f4beb510 | bellard | info.si_signo = SIGBUS; |
204 | f4beb510 | bellard | info.si_errno = 0;
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205 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
206 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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207 | f4beb510 | bellard | queue_signal(info.si_signo, &info); |
208 | f4beb510 | bellard | break;
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209 | 1b6b029e | bellard | case EXCP0D_GPF:
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210 | 851e67a1 | bellard | if (env->eflags & VM_MASK) {
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211 | 89e957e7 | bellard | handle_vm86_fault(env); |
212 | 1b6b029e | bellard | } else {
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213 | f4beb510 | bellard | info.si_signo = SIGSEGV; |
214 | f4beb510 | bellard | info.si_errno = 0;
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215 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
216 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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217 | f4beb510 | bellard | queue_signal(info.si_signo, &info); |
218 | 1b6b029e | bellard | } |
219 | 1b6b029e | bellard | break;
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220 | b689bc57 | bellard | case EXCP0E_PAGE:
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221 | b689bc57 | bellard | info.si_signo = SIGSEGV; |
222 | b689bc57 | bellard | info.si_errno = 0;
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223 | b689bc57 | bellard | if (!(env->error_code & 1)) |
224 | b689bc57 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
225 | b689bc57 | bellard | else
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226 | b689bc57 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
227 | 970a87a6 | bellard | info._sifields._sigfault._addr = env->cr[2];
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228 | b689bc57 | bellard | queue_signal(info.si_signo, &info); |
229 | b689bc57 | bellard | break;
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230 | 9de5e440 | bellard | case EXCP00_DIVZ:
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231 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
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232 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
233 | bc8a22cc | bellard | } else {
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234 | bc8a22cc | bellard | /* division by zero */
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235 | bc8a22cc | bellard | info.si_signo = SIGFPE; |
236 | bc8a22cc | bellard | info.si_errno = 0;
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237 | bc8a22cc | bellard | info.si_code = TARGET_FPE_INTDIV; |
238 | bc8a22cc | bellard | info._sifields._sigfault._addr = env->eip; |
239 | bc8a22cc | bellard | queue_signal(info.si_signo, &info); |
240 | bc8a22cc | bellard | } |
241 | 9de5e440 | bellard | break;
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242 | 447db213 | bellard | case EXCP01_SSTP:
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243 | 447db213 | bellard | case EXCP03_INT3:
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244 | 447db213 | bellard | if (env->eflags & VM_MASK) {
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245 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
246 | 447db213 | bellard | } else {
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247 | 447db213 | bellard | info.si_signo = SIGTRAP; |
248 | 447db213 | bellard | info.si_errno = 0;
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249 | 447db213 | bellard | if (trapnr == EXCP01_SSTP) {
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250 | 447db213 | bellard | info.si_code = TARGET_TRAP_BRKPT; |
251 | 447db213 | bellard | info._sifields._sigfault._addr = env->eip; |
252 | 447db213 | bellard | } else {
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253 | 447db213 | bellard | info.si_code = TARGET_SI_KERNEL; |
254 | 447db213 | bellard | info._sifields._sigfault._addr = 0;
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255 | 447db213 | bellard | } |
256 | 447db213 | bellard | queue_signal(info.si_signo, &info); |
257 | 447db213 | bellard | } |
258 | 447db213 | bellard | break;
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259 | 9de5e440 | bellard | case EXCP04_INTO:
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260 | 9de5e440 | bellard | case EXCP05_BOUND:
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261 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
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262 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
263 | bc8a22cc | bellard | } else {
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264 | bc8a22cc | bellard | info.si_signo = SIGSEGV; |
265 | bc8a22cc | bellard | info.si_errno = 0;
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266 | b689bc57 | bellard | info.si_code = TARGET_SI_KERNEL; |
267 | bc8a22cc | bellard | info._sifields._sigfault._addr = 0;
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268 | bc8a22cc | bellard | queue_signal(info.si_signo, &info); |
269 | bc8a22cc | bellard | } |
270 | 9de5e440 | bellard | break;
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271 | 9de5e440 | bellard | case EXCP06_ILLOP:
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272 | 9de5e440 | bellard | info.si_signo = SIGILL; |
273 | 9de5e440 | bellard | info.si_errno = 0;
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274 | 9de5e440 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
275 | 9de5e440 | bellard | info._sifields._sigfault._addr = env->eip; |
276 | 9de5e440 | bellard | queue_signal(info.si_signo, &info); |
277 | 9de5e440 | bellard | break;
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278 | 9de5e440 | bellard | case EXCP_INTERRUPT:
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279 | 9de5e440 | bellard | /* just indicate that signals should be handled asap */
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280 | 9de5e440 | bellard | break;
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281 | 1b6b029e | bellard | default:
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282 | 970a87a6 | bellard | pc = env->segs[R_CS].base + env->eip; |
283 | bc8a22cc | bellard | fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
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284 | bc8a22cc | bellard | (long)pc, trapnr);
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285 | 1b6b029e | bellard | abort(); |
286 | 1b6b029e | bellard | } |
287 | 66fb9763 | bellard | process_pending_signals(env); |
288 | 1b6b029e | bellard | } |
289 | 1b6b029e | bellard | } |
290 | b346ff46 | bellard | #endif
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291 | b346ff46 | bellard | |
292 | b346ff46 | bellard | #ifdef TARGET_ARM
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293 | b346ff46 | bellard | |
294 | 6f1f31c0 | bellard | /* XXX: find a better solution */
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295 | 6f1f31c0 | bellard | extern void tb_invalidate_page_range(target_ulong start, target_ulong end); |
296 | 6f1f31c0 | bellard | |
297 | 6f1f31c0 | bellard | static void arm_cache_flush(target_ulong start, target_ulong last) |
298 | 6f1f31c0 | bellard | { |
299 | 6f1f31c0 | bellard | target_ulong addr, last1; |
300 | 6f1f31c0 | bellard | |
301 | 6f1f31c0 | bellard | if (last < start)
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302 | 6f1f31c0 | bellard | return;
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303 | 6f1f31c0 | bellard | addr = start; |
304 | 6f1f31c0 | bellard | for(;;) {
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305 | 6f1f31c0 | bellard | last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
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306 | 6f1f31c0 | bellard | if (last1 > last)
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307 | 6f1f31c0 | bellard | last1 = last; |
308 | 6f1f31c0 | bellard | tb_invalidate_page_range(addr, last1 + 1);
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309 | 6f1f31c0 | bellard | if (last1 == last)
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310 | 6f1f31c0 | bellard | break;
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311 | 6f1f31c0 | bellard | addr = last1 + 1;
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312 | 6f1f31c0 | bellard | } |
313 | 6f1f31c0 | bellard | } |
314 | 6f1f31c0 | bellard | |
315 | b346ff46 | bellard | void cpu_loop(CPUARMState *env)
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316 | b346ff46 | bellard | { |
317 | b346ff46 | bellard | int trapnr;
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318 | b346ff46 | bellard | unsigned int n, insn; |
319 | b346ff46 | bellard | target_siginfo_t info; |
320 | b346ff46 | bellard | |
321 | b346ff46 | bellard | for(;;) {
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322 | b346ff46 | bellard | trapnr = cpu_arm_exec(env); |
323 | b346ff46 | bellard | switch(trapnr) {
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324 | b346ff46 | bellard | case EXCP_UDEF:
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325 | c6981055 | bellard | { |
326 | c6981055 | bellard | TaskState *ts = env->opaque; |
327 | c6981055 | bellard | uint32_t opcode; |
328 | c6981055 | bellard | |
329 | c6981055 | bellard | /* we handle the FPU emulation here, as Linux */
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330 | c6981055 | bellard | /* we get the opcode */
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331 | c6981055 | bellard | opcode = ldl_raw((uint8_t *)env->regs[15]);
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332 | c6981055 | bellard | |
333 | c6981055 | bellard | if (EmulateAll(opcode, &ts->fpa, env->regs) == 0) { |
334 | c6981055 | bellard | info.si_signo = SIGILL; |
335 | c6981055 | bellard | info.si_errno = 0;
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336 | c6981055 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
337 | c6981055 | bellard | info._sifields._sigfault._addr = env->regs[15];
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338 | c6981055 | bellard | queue_signal(info.si_signo, &info); |
339 | c6981055 | bellard | } else {
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340 | c6981055 | bellard | /* increment PC */
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341 | c6981055 | bellard | env->regs[15] += 4; |
342 | c6981055 | bellard | } |
343 | c6981055 | bellard | } |
344 | b346ff46 | bellard | break;
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345 | b346ff46 | bellard | case EXCP_SWI:
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346 | b346ff46 | bellard | { |
347 | b346ff46 | bellard | /* system call */
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348 | b346ff46 | bellard | insn = ldl((void *)(env->regs[15] - 4)); |
349 | b346ff46 | bellard | n = insn & 0xffffff;
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350 | 6f1f31c0 | bellard | if (n == ARM_NR_cacheflush) {
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351 | 6f1f31c0 | bellard | arm_cache_flush(env->regs[0], env->regs[1]); |
352 | 6f1f31c0 | bellard | } else if (n >= ARM_SYSCALL_BASE) { |
353 | b346ff46 | bellard | /* linux syscall */
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354 | b346ff46 | bellard | n -= ARM_SYSCALL_BASE; |
355 | b346ff46 | bellard | env->regs[0] = do_syscall(env,
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356 | b346ff46 | bellard | n, |
357 | b346ff46 | bellard | env->regs[0],
|
358 | b346ff46 | bellard | env->regs[1],
|
359 | b346ff46 | bellard | env->regs[2],
|
360 | b346ff46 | bellard | env->regs[3],
|
361 | b346ff46 | bellard | env->regs[4],
|
362 | b346ff46 | bellard | 0);
|
363 | b346ff46 | bellard | } else {
|
364 | b346ff46 | bellard | goto error;
|
365 | b346ff46 | bellard | } |
366 | b346ff46 | bellard | } |
367 | b346ff46 | bellard | break;
|
368 | 43fff238 | bellard | case EXCP_INTERRUPT:
|
369 | 43fff238 | bellard | /* just indicate that signals should be handled asap */
|
370 | 43fff238 | bellard | break;
|
371 | 68016c62 | bellard | case EXCP_PREFETCH_ABORT:
|
372 | 68016c62 | bellard | case EXCP_DATA_ABORT:
|
373 | 68016c62 | bellard | { |
374 | 68016c62 | bellard | info.si_signo = SIGSEGV; |
375 | 68016c62 | bellard | info.si_errno = 0;
|
376 | 68016c62 | bellard | /* XXX: check env->error_code */
|
377 | 68016c62 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
378 | 68016c62 | bellard | info._sifields._sigfault._addr = env->cp15_6; |
379 | 68016c62 | bellard | queue_signal(info.si_signo, &info); |
380 | 68016c62 | bellard | } |
381 | 68016c62 | bellard | break;
|
382 | b346ff46 | bellard | default:
|
383 | b346ff46 | bellard | error:
|
384 | b346ff46 | bellard | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
385 | b346ff46 | bellard | trapnr); |
386 | 7fe48483 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
387 | b346ff46 | bellard | abort(); |
388 | b346ff46 | bellard | } |
389 | b346ff46 | bellard | process_pending_signals(env); |
390 | b346ff46 | bellard | } |
391 | b346ff46 | bellard | } |
392 | b346ff46 | bellard | |
393 | b346ff46 | bellard | #endif
|
394 | 1b6b029e | bellard | |
395 | 93ac68bc | bellard | #ifdef TARGET_SPARC
|
396 | 93ac68bc | bellard | |
397 | 060366c5 | bellard | //#define DEBUG_WIN
|
398 | 060366c5 | bellard | |
399 | 2623cbaf | bellard | /* WARNING: dealing with register windows _is_ complicated. More info
|
400 | 2623cbaf | bellard | can be found at http://www.sics.se/~psm/sparcstack.html */
|
401 | 060366c5 | bellard | static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
402 | 060366c5 | bellard | { |
403 | 060366c5 | bellard | index = (index + cwp * 16) & (16 * NWINDOWS - 1); |
404 | 060366c5 | bellard | /* wrap handling : if cwp is on the last window, then we use the
|
405 | 060366c5 | bellard | registers 'after' the end */
|
406 | 060366c5 | bellard | if (index < 8 && env->cwp == (NWINDOWS - 1)) |
407 | 060366c5 | bellard | index += (16 * NWINDOWS);
|
408 | 060366c5 | bellard | return index;
|
409 | 060366c5 | bellard | } |
410 | 060366c5 | bellard | |
411 | 2623cbaf | bellard | /* save the register window 'cwp1' */
|
412 | 2623cbaf | bellard | static inline void save_window_offset(CPUSPARCState *env, int cwp1) |
413 | 060366c5 | bellard | { |
414 | 2623cbaf | bellard | unsigned int i; |
415 | 060366c5 | bellard | uint32_t *sp_ptr; |
416 | 060366c5 | bellard | |
417 | 060366c5 | bellard | sp_ptr = (uint32_t *)(env->regbase[get_reg_index(env, cwp1, 6)]);
|
418 | 060366c5 | bellard | #if defined(DEBUG_WIN)
|
419 | 060366c5 | bellard | printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
|
420 | 060366c5 | bellard | (int)sp_ptr, cwp1);
|
421 | 060366c5 | bellard | #endif
|
422 | 2623cbaf | bellard | for(i = 0; i < 16; i++) { |
423 | 2623cbaf | bellard | put_user(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
|
424 | 2623cbaf | bellard | sp_ptr++; |
425 | 2623cbaf | bellard | } |
426 | 060366c5 | bellard | } |
427 | 060366c5 | bellard | |
428 | 060366c5 | bellard | static void save_window(CPUSPARCState *env) |
429 | 060366c5 | bellard | { |
430 | 2623cbaf | bellard | unsigned int new_wim; |
431 | 2623cbaf | bellard | new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) & |
432 | 2623cbaf | bellard | ((1LL << NWINDOWS) - 1); |
433 | 2623cbaf | bellard | save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); |
434 | 2623cbaf | bellard | env->wim = new_wim; |
435 | 060366c5 | bellard | } |
436 | 060366c5 | bellard | |
437 | 060366c5 | bellard | static void restore_window(CPUSPARCState *env) |
438 | 060366c5 | bellard | { |
439 | 060366c5 | bellard | unsigned int new_wim, i, cwp1; |
440 | 2623cbaf | bellard | uint32_t *sp_ptr, reg; |
441 | 060366c5 | bellard | |
442 | 060366c5 | bellard | new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) & |
443 | 060366c5 | bellard | ((1LL << NWINDOWS) - 1); |
444 | 060366c5 | bellard | |
445 | 060366c5 | bellard | /* restore the invalid window */
|
446 | 060366c5 | bellard | cwp1 = (env->cwp + 1) & (NWINDOWS - 1); |
447 | 060366c5 | bellard | sp_ptr = (uint32_t *)(env->regbase[get_reg_index(env, cwp1, 6)]);
|
448 | 060366c5 | bellard | #if defined(DEBUG_WIN)
|
449 | 060366c5 | bellard | printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
|
450 | 060366c5 | bellard | (int)sp_ptr, cwp1);
|
451 | 060366c5 | bellard | #endif
|
452 | 2623cbaf | bellard | for(i = 0; i < 16; i++) { |
453 | 2623cbaf | bellard | get_user(reg, sp_ptr); |
454 | 2623cbaf | bellard | env->regbase[get_reg_index(env, cwp1, 8 + i)] = reg;
|
455 | 2623cbaf | bellard | sp_ptr++; |
456 | 2623cbaf | bellard | } |
457 | 060366c5 | bellard | env->wim = new_wim; |
458 | 060366c5 | bellard | } |
459 | 060366c5 | bellard | |
460 | 060366c5 | bellard | static void flush_windows(CPUSPARCState *env) |
461 | 060366c5 | bellard | { |
462 | 060366c5 | bellard | int offset, cwp1;
|
463 | 2623cbaf | bellard | |
464 | 2623cbaf | bellard | offset = 1;
|
465 | 060366c5 | bellard | for(;;) {
|
466 | 060366c5 | bellard | /* if restore would invoke restore_window(), then we can stop */
|
467 | 2623cbaf | bellard | cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
|
468 | 060366c5 | bellard | if (env->wim & (1 << cwp1)) |
469 | 060366c5 | bellard | break;
|
470 | 2623cbaf | bellard | save_window_offset(env, cwp1); |
471 | 060366c5 | bellard | offset++; |
472 | 060366c5 | bellard | } |
473 | 2623cbaf | bellard | /* set wim so that restore will reload the registers */
|
474 | 2623cbaf | bellard | cwp1 = (env->cwp + 1) & (NWINDOWS - 1); |
475 | 2623cbaf | bellard | env->wim = 1 << cwp1;
|
476 | 2623cbaf | bellard | #if defined(DEBUG_WIN)
|
477 | 2623cbaf | bellard | printf("flush_windows: nb=%d\n", offset - 1); |
478 | 80a9d035 | bellard | #endif
|
479 | 2623cbaf | bellard | } |
480 | 060366c5 | bellard | |
481 | 93ac68bc | bellard | void cpu_loop (CPUSPARCState *env)
|
482 | 93ac68bc | bellard | { |
483 | 060366c5 | bellard | int trapnr, ret;
|
484 | 61ff6f58 | bellard | target_siginfo_t info; |
485 | 060366c5 | bellard | |
486 | 060366c5 | bellard | while (1) { |
487 | 060366c5 | bellard | trapnr = cpu_sparc_exec (env); |
488 | 060366c5 | bellard | |
489 | 060366c5 | bellard | switch (trapnr) {
|
490 | 060366c5 | bellard | case 0x88: |
491 | 060366c5 | bellard | case 0x90: |
492 | 060366c5 | bellard | ret = do_syscall (env, env->gregs[1],
|
493 | 060366c5 | bellard | env->regwptr[0], env->regwptr[1], |
494 | 060366c5 | bellard | env->regwptr[2], env->regwptr[3], |
495 | 060366c5 | bellard | env->regwptr[4], env->regwptr[5]); |
496 | 060366c5 | bellard | if ((unsigned int)ret >= (unsigned int)(-515)) { |
497 | 060366c5 | bellard | env->psr |= PSR_CARRY; |
498 | 060366c5 | bellard | ret = -ret; |
499 | 060366c5 | bellard | } else {
|
500 | 060366c5 | bellard | env->psr &= ~PSR_CARRY; |
501 | 060366c5 | bellard | } |
502 | 060366c5 | bellard | env->regwptr[0] = ret;
|
503 | 060366c5 | bellard | /* next instruction */
|
504 | 060366c5 | bellard | env->pc = env->npc; |
505 | 060366c5 | bellard | env->npc = env->npc + 4;
|
506 | 060366c5 | bellard | break;
|
507 | 060366c5 | bellard | case 0x83: /* flush windows */ |
508 | 2623cbaf | bellard | flush_windows(env); |
509 | 060366c5 | bellard | /* next instruction */
|
510 | 060366c5 | bellard | env->pc = env->npc; |
511 | 060366c5 | bellard | env->npc = env->npc + 4;
|
512 | 060366c5 | bellard | break;
|
513 | 060366c5 | bellard | case TT_WIN_OVF: /* window overflow */ |
514 | 060366c5 | bellard | save_window(env); |
515 | 060366c5 | bellard | break;
|
516 | 060366c5 | bellard | case TT_WIN_UNF: /* window underflow */ |
517 | 060366c5 | bellard | restore_window(env); |
518 | 060366c5 | bellard | break;
|
519 | 61ff6f58 | bellard | case TT_TFAULT:
|
520 | 61ff6f58 | bellard | case TT_DFAULT:
|
521 | 61ff6f58 | bellard | { |
522 | 61ff6f58 | bellard | info.si_signo = SIGSEGV; |
523 | 61ff6f58 | bellard | info.si_errno = 0;
|
524 | 61ff6f58 | bellard | /* XXX: check env->error_code */
|
525 | 61ff6f58 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
526 | 61ff6f58 | bellard | info._sifields._sigfault._addr = env->mmuregs[4];
|
527 | 61ff6f58 | bellard | queue_signal(info.si_signo, &info); |
528 | 61ff6f58 | bellard | } |
529 | 61ff6f58 | bellard | break;
|
530 | e80cfcfc | bellard | case 0x100: // XXX, why do we get these? |
531 | e80cfcfc | bellard | break;
|
532 | 060366c5 | bellard | default:
|
533 | 060366c5 | bellard | printf ("Unhandled trap: 0x%x\n", trapnr);
|
534 | 7fe48483 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
535 | 060366c5 | bellard | exit (1);
|
536 | 060366c5 | bellard | } |
537 | 060366c5 | bellard | process_pending_signals (env); |
538 | 060366c5 | bellard | } |
539 | 93ac68bc | bellard | } |
540 | 93ac68bc | bellard | |
541 | 93ac68bc | bellard | #endif
|
542 | 93ac68bc | bellard | |
543 | 67867308 | bellard | #ifdef TARGET_PPC
|
544 | 9fddaa0c | bellard | |
545 | 9fddaa0c | bellard | static inline uint64_t cpu_ppc_get_tb (CPUState *env) |
546 | 9fddaa0c | bellard | { |
547 | 9fddaa0c | bellard | /* TO FIX */
|
548 | 9fddaa0c | bellard | return 0; |
549 | 9fddaa0c | bellard | } |
550 | 9fddaa0c | bellard | |
551 | 9fddaa0c | bellard | uint32_t cpu_ppc_load_tbl (CPUState *env) |
552 | 9fddaa0c | bellard | { |
553 | 9fddaa0c | bellard | return cpu_ppc_get_tb(env) & 0xFFFFFFFF; |
554 | 9fddaa0c | bellard | } |
555 | 9fddaa0c | bellard | |
556 | 9fddaa0c | bellard | uint32_t cpu_ppc_load_tbu (CPUState *env) |
557 | 9fddaa0c | bellard | { |
558 | 9fddaa0c | bellard | return cpu_ppc_get_tb(env) >> 32; |
559 | 9fddaa0c | bellard | } |
560 | 9fddaa0c | bellard | |
561 | 9fddaa0c | bellard | static void cpu_ppc_store_tb (CPUState *env, uint64_t value) |
562 | 9fddaa0c | bellard | { |
563 | 9fddaa0c | bellard | /* TO FIX */
|
564 | 9fddaa0c | bellard | } |
565 | 9fddaa0c | bellard | |
566 | 9fddaa0c | bellard | void cpu_ppc_store_tbu (CPUState *env, uint32_t value)
|
567 | 9fddaa0c | bellard | { |
568 | 9fddaa0c | bellard | cpu_ppc_store_tb(env, ((uint64_t)value << 32) | cpu_ppc_load_tbl(env));
|
569 | 9fddaa0c | bellard | } |
570 | 9fddaa0c | bellard | |
571 | 9fddaa0c | bellard | void cpu_ppc_store_tbl (CPUState *env, uint32_t value)
|
572 | 9fddaa0c | bellard | { |
573 | 9fddaa0c | bellard | cpu_ppc_store_tb(env, ((uint64_t)cpu_ppc_load_tbl(env) << 32) | value);
|
574 | 9fddaa0c | bellard | } |
575 | 9fddaa0c | bellard | |
576 | 9fddaa0c | bellard | uint32_t cpu_ppc_load_decr (CPUState *env) |
577 | 9fddaa0c | bellard | { |
578 | 9fddaa0c | bellard | /* TO FIX */
|
579 | 9fddaa0c | bellard | return -1; |
580 | 9fddaa0c | bellard | } |
581 | 9fddaa0c | bellard | |
582 | 9fddaa0c | bellard | void cpu_ppc_store_decr (CPUState *env, uint32_t value)
|
583 | 9fddaa0c | bellard | { |
584 | 9fddaa0c | bellard | /* TO FIX */
|
585 | 9fddaa0c | bellard | } |
586 | 9fddaa0c | bellard | |
587 | 67867308 | bellard | void cpu_loop(CPUPPCState *env)
|
588 | 67867308 | bellard | { |
589 | 67867308 | bellard | target_siginfo_t info; |
590 | 61190b14 | bellard | int trapnr;
|
591 | 61190b14 | bellard | uint32_t ret; |
592 | 67867308 | bellard | |
593 | 67867308 | bellard | for(;;) {
|
594 | 67867308 | bellard | trapnr = cpu_ppc_exec(env); |
595 | 61190b14 | bellard | if (trapnr != EXCP_SYSCALL_USER && trapnr != EXCP_BRANCH &&
|
596 | 61190b14 | bellard | trapnr != EXCP_TRACE) { |
597 | 61190b14 | bellard | if (loglevel > 0) { |
598 | 7fe48483 | bellard | cpu_dump_state(env, logfile, fprintf, 0);
|
599 | 61190b14 | bellard | } |
600 | 61190b14 | bellard | } |
601 | 67867308 | bellard | switch(trapnr) {
|
602 | 67867308 | bellard | case EXCP_NONE:
|
603 | 67867308 | bellard | break;
|
604 | 61190b14 | bellard | case EXCP_SYSCALL_USER:
|
605 | 61190b14 | bellard | /* system call */
|
606 | 61190b14 | bellard | /* WARNING:
|
607 | 61190b14 | bellard | * PPC ABI uses overflow flag in cr0 to signal an error
|
608 | 61190b14 | bellard | * in syscalls.
|
609 | 61190b14 | bellard | */
|
610 | 67867308 | bellard | #if 0
|
611 | 61190b14 | bellard | printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
|
612 | 61190b14 | bellard | env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
|
613 | 67867308 | bellard | #endif
|
614 | 61190b14 | bellard | env->crf[0] &= ~0x1; |
615 | 61190b14 | bellard | ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], |
616 | 61190b14 | bellard | env->gpr[5], env->gpr[6], env->gpr[7], |
617 | 61190b14 | bellard | env->gpr[8]);
|
618 | 61190b14 | bellard | if (ret > (uint32_t)(-515)) { |
619 | 61190b14 | bellard | env->crf[0] |= 0x1; |
620 | 61190b14 | bellard | ret = -ret; |
621 | 61190b14 | bellard | } |
622 | 61190b14 | bellard | env->gpr[3] = ret;
|
623 | 61190b14 | bellard | #if 0
|
624 | 61190b14 | bellard | printf("syscall returned 0x%08x (%d)\n", ret, ret);
|
625 | 61190b14 | bellard | #endif
|
626 | 61190b14 | bellard | break;
|
627 | 61190b14 | bellard | case EXCP_RESET:
|
628 | 61190b14 | bellard | /* Should not happen ! */
|
629 | 61190b14 | bellard | fprintf(stderr, "RESET asked... Stop emulation\n");
|
630 | 61190b14 | bellard | if (loglevel)
|
631 | 61190b14 | bellard | fprintf(logfile, "RESET asked... Stop emulation\n");
|
632 | 67867308 | bellard | abort(); |
633 | 61190b14 | bellard | case EXCP_MACHINE_CHECK:
|
634 | 61190b14 | bellard | fprintf(stderr, "Machine check exeption... Stop emulation\n");
|
635 | 61190b14 | bellard | if (loglevel)
|
636 | 61190b14 | bellard | fprintf(logfile, "RESET asked... Stop emulation\n");
|
637 | 61190b14 | bellard | info.si_signo = TARGET_SIGBUS; |
638 | 67867308 | bellard | info.si_errno = 0;
|
639 | 61190b14 | bellard | info.si_code = TARGET_BUS_OBJERR; |
640 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
641 | 61190b14 | bellard | queue_signal(info.si_signo, &info); |
642 | 61190b14 | bellard | case EXCP_DSI:
|
643 | 61190b14 | bellard | fprintf(stderr, "Invalid data memory access: 0x%08x\n", env->spr[DAR]);
|
644 | 61190b14 | bellard | if (loglevel) {
|
645 | 61190b14 | bellard | fprintf(logfile, "Invalid data memory access: 0x%08x\n",
|
646 | 61190b14 | bellard | env->spr[DAR]); |
647 | 61190b14 | bellard | } |
648 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
649 | 61190b14 | bellard | case EXCP_DSI_TRANSLATE:
|
650 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
651 | 61190b14 | bellard | info.si_errno = 0;
|
652 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
653 | 61190b14 | bellard | break;
|
654 | 61190b14 | bellard | case EXCP_DSI_NOTSUP:
|
655 | 61190b14 | bellard | case EXCP_DSI_EXTERNAL:
|
656 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
657 | 61190b14 | bellard | info.si_errno = 0;
|
658 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
659 | 61190b14 | bellard | break;
|
660 | 61190b14 | bellard | case EXCP_DSI_PROT:
|
661 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
662 | 61190b14 | bellard | info.si_errno = 0;
|
663 | 61190b14 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
664 | 61190b14 | bellard | break;
|
665 | 61190b14 | bellard | case EXCP_DSI_DABR:
|
666 | 61190b14 | bellard | info.si_signo = TARGET_SIGTRAP; |
667 | 61190b14 | bellard | info.si_errno = 0;
|
668 | 61190b14 | bellard | info.si_code = TARGET_TRAP_BRKPT; |
669 | 61190b14 | bellard | break;
|
670 | 61190b14 | bellard | default:
|
671 | 61190b14 | bellard | /* Let's send a regular segfault... */
|
672 | 61190b14 | bellard | fprintf(stderr, "Invalid segfault errno (%02x)\n",
|
673 | 61190b14 | bellard | env->error_code); |
674 | 61190b14 | bellard | if (loglevel) {
|
675 | 61190b14 | bellard | fprintf(logfile, "Invalid segfault errno (%02x)\n",
|
676 | 61190b14 | bellard | env->error_code); |
677 | 61190b14 | bellard | } |
678 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
679 | 61190b14 | bellard | info.si_errno = 0;
|
680 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
681 | 61190b14 | bellard | break;
|
682 | 61190b14 | bellard | } |
683 | 67867308 | bellard | info._sifields._sigfault._addr = env->nip; |
684 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
685 | 67867308 | bellard | break;
|
686 | 61190b14 | bellard | case EXCP_ISI:
|
687 | 67867308 | bellard | fprintf(stderr, "Invalid instruction fetch\n");
|
688 | 61190b14 | bellard | if (loglevel)
|
689 | 61190b14 | bellard | fprintf(logfile, "Invalid instruction fetch\n");
|
690 | 61190b14 | bellard | switch (env->error_code) {
|
691 | 61190b14 | bellard | case EXCP_ISI_TRANSLATE:
|
692 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
693 | 67867308 | bellard | info.si_errno = 0;
|
694 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
695 | 61190b14 | bellard | break;
|
696 | 61190b14 | bellard | case EXCP_ISI_GUARD:
|
697 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
698 | 61190b14 | bellard | info.si_errno = 0;
|
699 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
700 | 61190b14 | bellard | break;
|
701 | 61190b14 | bellard | case EXCP_ISI_NOEXEC:
|
702 | 61190b14 | bellard | case EXCP_ISI_PROT:
|
703 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
704 | 61190b14 | bellard | info.si_errno = 0;
|
705 | 61190b14 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
706 | 61190b14 | bellard | break;
|
707 | 61190b14 | bellard | default:
|
708 | 61190b14 | bellard | /* Let's send a regular segfault... */
|
709 | 61190b14 | bellard | fprintf(stderr, "Invalid segfault errno (%02x)\n",
|
710 | 61190b14 | bellard | env->error_code); |
711 | 61190b14 | bellard | if (loglevel) {
|
712 | 61190b14 | bellard | fprintf(logfile, "Invalid segfault errno (%02x)\n",
|
713 | 61190b14 | bellard | env->error_code); |
714 | 61190b14 | bellard | } |
715 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
716 | 61190b14 | bellard | info.si_errno = 0;
|
717 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
718 | 61190b14 | bellard | break;
|
719 | 61190b14 | bellard | } |
720 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
721 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
722 | 67867308 | bellard | break;
|
723 | 61190b14 | bellard | case EXCP_EXTERNAL:
|
724 | 61190b14 | bellard | /* Should not happen ! */
|
725 | 61190b14 | bellard | fprintf(stderr, "External interruption... Stop emulation\n");
|
726 | 61190b14 | bellard | if (loglevel)
|
727 | 61190b14 | bellard | fprintf(logfile, "External interruption... Stop emulation\n");
|
728 | 67867308 | bellard | abort(); |
729 | 61190b14 | bellard | case EXCP_ALIGN:
|
730 | 61190b14 | bellard | fprintf(stderr, "Invalid unaligned memory access\n");
|
731 | 61190b14 | bellard | if (loglevel)
|
732 | 61190b14 | bellard | fprintf(logfile, "Invalid unaligned memory access\n");
|
733 | 61190b14 | bellard | info.si_signo = TARGET_SIGBUS; |
734 | 67867308 | bellard | info.si_errno = 0;
|
735 | 61190b14 | bellard | info.si_code = TARGET_BUS_ADRALN; |
736 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
737 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
738 | 67867308 | bellard | break;
|
739 | 61190b14 | bellard | case EXCP_PROGRAM:
|
740 | 61190b14 | bellard | switch (env->error_code & ~0xF) { |
741 | 61190b14 | bellard | case EXCP_FP:
|
742 | 61190b14 | bellard | fprintf(stderr, "Program exception\n");
|
743 | 61190b14 | bellard | if (loglevel)
|
744 | 61190b14 | bellard | fprintf(logfile, "Program exception\n");
|
745 | 61190b14 | bellard | /* Set FX */
|
746 | 61190b14 | bellard | env->fpscr[7] |= 0x8; |
747 | 61190b14 | bellard | /* Finally, update FEX */
|
748 | 61190b14 | bellard | if ((((env->fpscr[7] & 0x3) << 3) | (env->fpscr[6] >> 1)) & |
749 | 61190b14 | bellard | ((env->fpscr[1] << 1) | (env->fpscr[0] >> 3))) |
750 | 61190b14 | bellard | env->fpscr[7] |= 0x4; |
751 | 61190b14 | bellard | info.si_signo = TARGET_SIGFPE; |
752 | 61190b14 | bellard | info.si_errno = 0;
|
753 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
754 | 61190b14 | bellard | case EXCP_FP_OX:
|
755 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTOVF; |
756 | 61190b14 | bellard | break;
|
757 | 61190b14 | bellard | case EXCP_FP_UX:
|
758 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTUND; |
759 | 61190b14 | bellard | break;
|
760 | 61190b14 | bellard | case EXCP_FP_ZX:
|
761 | 61190b14 | bellard | case EXCP_FP_VXZDZ:
|
762 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTDIV; |
763 | 61190b14 | bellard | break;
|
764 | 61190b14 | bellard | case EXCP_FP_XX:
|
765 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTRES; |
766 | 61190b14 | bellard | break;
|
767 | 61190b14 | bellard | case EXCP_FP_VXSOFT:
|
768 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTINV; |
769 | 61190b14 | bellard | break;
|
770 | 61190b14 | bellard | case EXCP_FP_VXNAN:
|
771 | 61190b14 | bellard | case EXCP_FP_VXISI:
|
772 | 61190b14 | bellard | case EXCP_FP_VXIDI:
|
773 | 61190b14 | bellard | case EXCP_FP_VXIMZ:
|
774 | 61190b14 | bellard | case EXCP_FP_VXVC:
|
775 | 61190b14 | bellard | case EXCP_FP_VXSQRT:
|
776 | 61190b14 | bellard | case EXCP_FP_VXCVI:
|
777 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTSUB; |
778 | 61190b14 | bellard | break;
|
779 | 61190b14 | bellard | default:
|
780 | 61190b14 | bellard | fprintf(stderr, "Unknown floating point exception "
|
781 | 61190b14 | bellard | "(%02x)\n", env->error_code);
|
782 | 61190b14 | bellard | if (loglevel) {
|
783 | 61190b14 | bellard | fprintf(logfile, "Unknown floating point exception "
|
784 | 61190b14 | bellard | "(%02x)\n", env->error_code & 0xF); |
785 | 61190b14 | bellard | } |
786 | 61190b14 | bellard | } |
787 | 61190b14 | bellard | break;
|
788 | 67867308 | bellard | case EXCP_INVAL:
|
789 | 61190b14 | bellard | fprintf(stderr, "Invalid instruction\n");
|
790 | 61190b14 | bellard | if (loglevel)
|
791 | 61190b14 | bellard | fprintf(logfile, "Invalid instruction\n");
|
792 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
793 | 61190b14 | bellard | info.si_errno = 0;
|
794 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
795 | 61190b14 | bellard | case EXCP_INVAL_INVAL:
|
796 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLOPC; |
797 | 61190b14 | bellard | break;
|
798 | 61190b14 | bellard | case EXCP_INVAL_LSWX:
|
799 | 67867308 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
800 | 61190b14 | bellard | break;
|
801 | 61190b14 | bellard | case EXCP_INVAL_SPR:
|
802 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVREG; |
803 | 61190b14 | bellard | break;
|
804 | 61190b14 | bellard | case EXCP_INVAL_FP:
|
805 | 61190b14 | bellard | info.si_code = TARGET_ILL_COPROC; |
806 | 61190b14 | bellard | break;
|
807 | 61190b14 | bellard | default:
|
808 | 61190b14 | bellard | fprintf(stderr, "Unknown invalid operation (%02x)\n",
|
809 | 61190b14 | bellard | env->error_code & 0xF);
|
810 | 61190b14 | bellard | if (loglevel) {
|
811 | 61190b14 | bellard | fprintf(logfile, "Unknown invalid operation (%02x)\n",
|
812 | 61190b14 | bellard | env->error_code & 0xF);
|
813 | 61190b14 | bellard | } |
814 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
815 | 61190b14 | bellard | break;
|
816 | 61190b14 | bellard | } |
817 | 61190b14 | bellard | break;
|
818 | 61190b14 | bellard | case EXCP_PRIV:
|
819 | 61190b14 | bellard | fprintf(stderr, "Privilege violation\n");
|
820 | 61190b14 | bellard | if (loglevel)
|
821 | 61190b14 | bellard | fprintf(logfile, "Privilege violation\n");
|
822 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
823 | 61190b14 | bellard | info.si_errno = 0;
|
824 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
825 | 61190b14 | bellard | case EXCP_PRIV_OPC:
|
826 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVOPC; |
827 | 61190b14 | bellard | break;
|
828 | 61190b14 | bellard | case EXCP_PRIV_REG:
|
829 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVREG; |
830 | 61190b14 | bellard | break;
|
831 | 61190b14 | bellard | default:
|
832 | 61190b14 | bellard | fprintf(stderr, "Unknown privilege violation (%02x)\n",
|
833 | 61190b14 | bellard | env->error_code & 0xF);
|
834 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVOPC; |
835 | 61190b14 | bellard | break;
|
836 | 61190b14 | bellard | } |
837 | 61190b14 | bellard | break;
|
838 | 61190b14 | bellard | case EXCP_TRAP:
|
839 | 61190b14 | bellard | fprintf(stderr, "Tried to call a TRAP\n");
|
840 | 61190b14 | bellard | if (loglevel)
|
841 | 61190b14 | bellard | fprintf(logfile, "Tried to call a TRAP\n");
|
842 | 61190b14 | bellard | abort(); |
843 | 61190b14 | bellard | default:
|
844 | 61190b14 | bellard | /* Should not happen ! */
|
845 | 61190b14 | bellard | fprintf(stderr, "Unknown program exception (%02x)\n",
|
846 | 61190b14 | bellard | env->error_code); |
847 | 61190b14 | bellard | if (loglevel) {
|
848 | 61190b14 | bellard | fprintf(logfile, "Unknwon program exception (%02x)\n",
|
849 | 61190b14 | bellard | env->error_code); |
850 | 61190b14 | bellard | } |
851 | 61190b14 | bellard | abort(); |
852 | 61190b14 | bellard | } |
853 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
854 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
855 | 67867308 | bellard | break;
|
856 | 61190b14 | bellard | case EXCP_NO_FP:
|
857 | 61190b14 | bellard | fprintf(stderr, "No floating point allowed\n");
|
858 | 61190b14 | bellard | if (loglevel)
|
859 | 61190b14 | bellard | fprintf(logfile, "No floating point allowed\n");
|
860 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
861 | 67867308 | bellard | info.si_errno = 0;
|
862 | 61190b14 | bellard | info.si_code = TARGET_ILL_COPROC; |
863 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
864 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
865 | 67867308 | bellard | break;
|
866 | 61190b14 | bellard | case EXCP_DECR:
|
867 | 61190b14 | bellard | /* Should not happen ! */
|
868 | 61190b14 | bellard | fprintf(stderr, "Decrementer exception\n");
|
869 | 61190b14 | bellard | if (loglevel)
|
870 | 61190b14 | bellard | fprintf(logfile, "Decrementer exception\n");
|
871 | 61190b14 | bellard | abort(); |
872 | 67867308 | bellard | case EXCP_RESA: /* Implementation specific */ |
873 | 61190b14 | bellard | /* Should not happen ! */
|
874 | 61190b14 | bellard | fprintf(stderr, "RESA exception should never happen !\n");
|
875 | 61190b14 | bellard | if (loglevel)
|
876 | 61190b14 | bellard | fprintf(logfile, "RESA exception should never happen !\n");
|
877 | 61190b14 | bellard | abort(); |
878 | 67867308 | bellard | case EXCP_RESB: /* Implementation specific */ |
879 | 61190b14 | bellard | /* Should not happen ! */
|
880 | 61190b14 | bellard | fprintf(stderr, "RESB exception should never happen !\n");
|
881 | 61190b14 | bellard | if (loglevel)
|
882 | 61190b14 | bellard | fprintf(logfile, "RESB exception should never happen !\n");
|
883 | 67867308 | bellard | abort(); |
884 | 61190b14 | bellard | case EXCP_TRACE:
|
885 | 61190b14 | bellard | /* Do nothing: we use this to trace execution */
|
886 | 67867308 | bellard | break;
|
887 | 61190b14 | bellard | case EXCP_FP_ASSIST:
|
888 | 61190b14 | bellard | /* Should not happen ! */
|
889 | 61190b14 | bellard | fprintf(stderr, "Floating point assist exception\n");
|
890 | 61190b14 | bellard | if (loglevel)
|
891 | 61190b14 | bellard | fprintf(logfile, "Floating point assist exception\n");
|
892 | 61190b14 | bellard | abort(); |
893 | 61190b14 | bellard | case EXCP_MTMSR:
|
894 | 61190b14 | bellard | /* We reloaded the msr, just go on */
|
895 | 9fddaa0c | bellard | if (msr_pr == 0) { |
896 | 61190b14 | bellard | fprintf(stderr, "Tried to go into supervisor mode !\n");
|
897 | 61190b14 | bellard | if (loglevel)
|
898 | 61190b14 | bellard | fprintf(logfile, "Tried to go into supervisor mode !\n");
|
899 | 61190b14 | bellard | abort(); |
900 | 67867308 | bellard | } |
901 | 61190b14 | bellard | break;
|
902 | 61190b14 | bellard | case EXCP_BRANCH:
|
903 | 61190b14 | bellard | /* We stopped because of a jump... */
|
904 | 61190b14 | bellard | break;
|
905 | 61190b14 | bellard | case EXCP_RFI:
|
906 | 61190b14 | bellard | /* Should not occur: we always are in user mode */
|
907 | 61190b14 | bellard | fprintf(stderr, "Return from interrupt ?\n");
|
908 | 61190b14 | bellard | if (loglevel)
|
909 | 61190b14 | bellard | fprintf(logfile, "Return from interrupt ?\n");
|
910 | 61190b14 | bellard | abort(); |
911 | 61190b14 | bellard | case EXCP_INTERRUPT:
|
912 | 61190b14 | bellard | /* Don't know why this should ever happen... */
|
913 | 61190b14 | bellard | break;
|
914 | a541f297 | bellard | case EXCP_DEBUG:
|
915 | a541f297 | bellard | break;
|
916 | 67867308 | bellard | default:
|
917 | 67867308 | bellard | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
918 | 67867308 | bellard | trapnr); |
919 | 61190b14 | bellard | if (loglevel) {
|
920 | 61190b14 | bellard | fprintf(logfile, "qemu: unhandled CPU exception 0x%02x - "
|
921 | 61190b14 | bellard | "0x%02x - aborting\n", trapnr, env->error_code);
|
922 | 61190b14 | bellard | } |
923 | 67867308 | bellard | abort(); |
924 | 67867308 | bellard | } |
925 | 67867308 | bellard | process_pending_signals(env); |
926 | 67867308 | bellard | } |
927 | 67867308 | bellard | } |
928 | 67867308 | bellard | #endif
|
929 | 67867308 | bellard | |
930 | 31e31b8a | bellard | void usage(void) |
931 | 31e31b8a | bellard | { |
932 | 4606bb3f | bellard | printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2004 Fabrice Bellard\n" |
933 | 6f1f31c0 | bellard | "usage: qemu-" TARGET_ARCH " [-h] [-d opts] [-L path] [-s size] program [arguments...]\n" |
934 | b346ff46 | bellard | "Linux CPU emulator (compiled for %s emulation)\n"
|
935 | d691f669 | bellard | "\n"
|
936 | 54936004 | bellard | "-h print this help\n"
|
937 | b346ff46 | bellard | "-L path set the elf interpreter prefix (default=%s)\n"
|
938 | b346ff46 | bellard | "-s size set the stack size in bytes (default=%ld)\n"
|
939 | 54936004 | bellard | "\n"
|
940 | 54936004 | bellard | "debug options:\n"
|
941 | c6981055 | bellard | #ifdef USE_CODE_COPY
|
942 | c6981055 | bellard | "-no-code-copy disable code copy acceleration\n"
|
943 | c6981055 | bellard | #endif
|
944 | 6f1f31c0 | bellard | "-d options activate log (logfile=%s)\n"
|
945 | 54936004 | bellard | "-p pagesize set the host page size to 'pagesize'\n",
|
946 | b346ff46 | bellard | TARGET_ARCH, |
947 | d691f669 | bellard | interp_prefix, |
948 | 54936004 | bellard | x86_stack_size, |
949 | 54936004 | bellard | DEBUG_LOGFILE); |
950 | 74cd30b8 | bellard | _exit(1);
|
951 | 31e31b8a | bellard | } |
952 | 31e31b8a | bellard | |
953 | 9de5e440 | bellard | /* XXX: currently only used for async signals (see signal.c) */
|
954 | b346ff46 | bellard | CPUState *global_env; |
955 | 59faf6d6 | bellard | /* used only if single thread */
|
956 | 59faf6d6 | bellard | CPUState *cpu_single_env = NULL;
|
957 | 59faf6d6 | bellard | |
958 | 851e67a1 | bellard | /* used to free thread contexts */
|
959 | 851e67a1 | bellard | TaskState *first_task_state; |
960 | 9de5e440 | bellard | |
961 | 31e31b8a | bellard | int main(int argc, char **argv) |
962 | 31e31b8a | bellard | { |
963 | 31e31b8a | bellard | const char *filename; |
964 | 01ffc75b | bellard | struct target_pt_regs regs1, *regs = ®s1;
|
965 | 31e31b8a | bellard | struct image_info info1, *info = &info1;
|
966 | 851e67a1 | bellard | TaskState ts1, *ts = &ts1; |
967 | b346ff46 | bellard | CPUState *env; |
968 | 586314f2 | bellard | int optind;
|
969 | d691f669 | bellard | const char *r; |
970 | d691f669 | bellard | |
971 | 31e31b8a | bellard | if (argc <= 1) |
972 | 31e31b8a | bellard | usage(); |
973 | f801f97e | bellard | |
974 | cc38b844 | bellard | /* init debug */
|
975 | cc38b844 | bellard | cpu_set_log_filename(DEBUG_LOGFILE); |
976 | cc38b844 | bellard | |
977 | 586314f2 | bellard | optind = 1;
|
978 | d691f669 | bellard | for(;;) {
|
979 | d691f669 | bellard | if (optind >= argc)
|
980 | d691f669 | bellard | break;
|
981 | d691f669 | bellard | r = argv[optind]; |
982 | d691f669 | bellard | if (r[0] != '-') |
983 | d691f669 | bellard | break;
|
984 | 586314f2 | bellard | optind++; |
985 | d691f669 | bellard | r++; |
986 | d691f669 | bellard | if (!strcmp(r, "-")) { |
987 | d691f669 | bellard | break;
|
988 | d691f669 | bellard | } else if (!strcmp(r, "d")) { |
989 | e19e89a5 | bellard | int mask;
|
990 | e19e89a5 | bellard | CPULogItem *item; |
991 | 6f1f31c0 | bellard | |
992 | 6f1f31c0 | bellard | if (optind >= argc)
|
993 | 6f1f31c0 | bellard | break;
|
994 | e19e89a5 | bellard | |
995 | 6f1f31c0 | bellard | r = argv[optind++]; |
996 | 6f1f31c0 | bellard | mask = cpu_str_to_log_mask(r); |
997 | e19e89a5 | bellard | if (!mask) {
|
998 | e19e89a5 | bellard | printf("Log items (comma separated):\n");
|
999 | e19e89a5 | bellard | for(item = cpu_log_items; item->mask != 0; item++) { |
1000 | e19e89a5 | bellard | printf("%-10s %s\n", item->name, item->help);
|
1001 | e19e89a5 | bellard | } |
1002 | e19e89a5 | bellard | exit(1);
|
1003 | e19e89a5 | bellard | } |
1004 | e19e89a5 | bellard | cpu_set_log(mask); |
1005 | d691f669 | bellard | } else if (!strcmp(r, "s")) { |
1006 | d691f669 | bellard | r = argv[optind++]; |
1007 | d691f669 | bellard | x86_stack_size = strtol(r, (char **)&r, 0); |
1008 | d691f669 | bellard | if (x86_stack_size <= 0) |
1009 | d691f669 | bellard | usage(); |
1010 | d691f669 | bellard | if (*r == 'M') |
1011 | d691f669 | bellard | x86_stack_size *= 1024 * 1024; |
1012 | d691f669 | bellard | else if (*r == 'k' || *r == 'K') |
1013 | d691f669 | bellard | x86_stack_size *= 1024;
|
1014 | d691f669 | bellard | } else if (!strcmp(r, "L")) { |
1015 | d691f669 | bellard | interp_prefix = argv[optind++]; |
1016 | 54936004 | bellard | } else if (!strcmp(r, "p")) { |
1017 | 83fb7adf | bellard | qemu_host_page_size = atoi(argv[optind++]); |
1018 | 83fb7adf | bellard | if (qemu_host_page_size == 0 || |
1019 | 83fb7adf | bellard | (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { |
1020 | 54936004 | bellard | fprintf(stderr, "page size must be a power of two\n");
|
1021 | 54936004 | bellard | exit(1);
|
1022 | 54936004 | bellard | } |
1023 | c6981055 | bellard | } else
|
1024 | c6981055 | bellard | #ifdef USE_CODE_COPY
|
1025 | c6981055 | bellard | if (!strcmp(r, "no-code-copy")) { |
1026 | c6981055 | bellard | code_copy_enabled = 0;
|
1027 | c6981055 | bellard | } else
|
1028 | c6981055 | bellard | #endif
|
1029 | c6981055 | bellard | { |
1030 | d691f669 | bellard | usage(); |
1031 | d691f669 | bellard | } |
1032 | 586314f2 | bellard | } |
1033 | d691f669 | bellard | if (optind >= argc)
|
1034 | d691f669 | bellard | usage(); |
1035 | 586314f2 | bellard | filename = argv[optind]; |
1036 | 586314f2 | bellard | |
1037 | 31e31b8a | bellard | /* Zero out regs */
|
1038 | 01ffc75b | bellard | memset(regs, 0, sizeof(struct target_pt_regs)); |
1039 | 31e31b8a | bellard | |
1040 | 31e31b8a | bellard | /* Zero out image_info */
|
1041 | 31e31b8a | bellard | memset(info, 0, sizeof(struct image_info)); |
1042 | 31e31b8a | bellard | |
1043 | 74cd30b8 | bellard | /* Scan interp_prefix dir for replacement files. */
|
1044 | 74cd30b8 | bellard | init_paths(interp_prefix); |
1045 | 74cd30b8 | bellard | |
1046 | 83fb7adf | bellard | /* NOTE: we need to init the CPU at this stage to get
|
1047 | 83fb7adf | bellard | qemu_host_page_size */
|
1048 | b346ff46 | bellard | env = cpu_init(); |
1049 | 92ccca6a | bellard | |
1050 | 74cd30b8 | bellard | if (elf_exec(filename, argv+optind, environ, regs, info) != 0) { |
1051 | 31e31b8a | bellard | printf("Error loading %s\n", filename);
|
1052 | 74cd30b8 | bellard | _exit(1);
|
1053 | 31e31b8a | bellard | } |
1054 | 31e31b8a | bellard | |
1055 | 4b74fe1f | bellard | if (loglevel) {
|
1056 | 54936004 | bellard | page_dump(logfile); |
1057 | 54936004 | bellard | |
1058 | 4b74fe1f | bellard | fprintf(logfile, "start_brk 0x%08lx\n" , info->start_brk);
|
1059 | 4b74fe1f | bellard | fprintf(logfile, "end_code 0x%08lx\n" , info->end_code);
|
1060 | 4b74fe1f | bellard | fprintf(logfile, "start_code 0x%08lx\n" , info->start_code);
|
1061 | 4b74fe1f | bellard | fprintf(logfile, "end_data 0x%08lx\n" , info->end_data);
|
1062 | 4b74fe1f | bellard | fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
|
1063 | 4b74fe1f | bellard | fprintf(logfile, "brk 0x%08lx\n" , info->brk);
|
1064 | b346ff46 | bellard | fprintf(logfile, "entry 0x%08lx\n" , info->entry);
|
1065 | 4b74fe1f | bellard | } |
1066 | 31e31b8a | bellard | |
1067 | 31e31b8a | bellard | target_set_brk((char *)info->brk);
|
1068 | 31e31b8a | bellard | syscall_init(); |
1069 | 66fb9763 | bellard | signal_init(); |
1070 | 31e31b8a | bellard | |
1071 | 9de5e440 | bellard | global_env = env; |
1072 | 0ecfa993 | bellard | |
1073 | 851e67a1 | bellard | /* build Task State */
|
1074 | 851e67a1 | bellard | memset(ts, 0, sizeof(TaskState)); |
1075 | 851e67a1 | bellard | env->opaque = ts; |
1076 | 851e67a1 | bellard | ts->used = 1;
|
1077 | 59faf6d6 | bellard | env->user_mode_only = 1;
|
1078 | 851e67a1 | bellard | |
1079 | b346ff46 | bellard | #if defined(TARGET_I386)
|
1080 | 2e255c6b | bellard | cpu_x86_set_cpl(env, 3);
|
1081 | 2e255c6b | bellard | |
1082 | 3802ce26 | bellard | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
|
1083 | 1bde465e | bellard | env->hflags |= HF_PE_MASK; |
1084 | 1bde465e | bellard | if (env->cpuid_features & CPUID_SSE) {
|
1085 | 1bde465e | bellard | env->cr[4] |= CR4_OSFXSR_MASK;
|
1086 | 1bde465e | bellard | env->hflags |= HF_OSFXSR_MASK; |
1087 | 1bde465e | bellard | } |
1088 | 1bde465e | bellard | |
1089 | 415e561f | bellard | /* flags setup : we activate the IRQs by default as in user mode */
|
1090 | 415e561f | bellard | env->eflags |= IF_MASK; |
1091 | 415e561f | bellard | |
1092 | 6dbad63e | bellard | /* linux register setup */
|
1093 | 0ecfa993 | bellard | env->regs[R_EAX] = regs->eax; |
1094 | 0ecfa993 | bellard | env->regs[R_EBX] = regs->ebx; |
1095 | 0ecfa993 | bellard | env->regs[R_ECX] = regs->ecx; |
1096 | 0ecfa993 | bellard | env->regs[R_EDX] = regs->edx; |
1097 | 0ecfa993 | bellard | env->regs[R_ESI] = regs->esi; |
1098 | 0ecfa993 | bellard | env->regs[R_EDI] = regs->edi; |
1099 | 0ecfa993 | bellard | env->regs[R_EBP] = regs->ebp; |
1100 | 0ecfa993 | bellard | env->regs[R_ESP] = regs->esp; |
1101 | dab2ed99 | bellard | env->eip = regs->eip; |
1102 | 31e31b8a | bellard | |
1103 | f4beb510 | bellard | /* linux interrupt setup */
|
1104 | 80a9d035 | bellard | env->idt.base = (long)idt_table;
|
1105 | f4beb510 | bellard | env->idt.limit = sizeof(idt_table) - 1; |
1106 | f4beb510 | bellard | set_idt(0, 0); |
1107 | f4beb510 | bellard | set_idt(1, 0); |
1108 | f4beb510 | bellard | set_idt(2, 0); |
1109 | f4beb510 | bellard | set_idt(3, 3); |
1110 | f4beb510 | bellard | set_idt(4, 3); |
1111 | f4beb510 | bellard | set_idt(5, 3); |
1112 | f4beb510 | bellard | set_idt(6, 0); |
1113 | f4beb510 | bellard | set_idt(7, 0); |
1114 | f4beb510 | bellard | set_idt(8, 0); |
1115 | f4beb510 | bellard | set_idt(9, 0); |
1116 | f4beb510 | bellard | set_idt(10, 0); |
1117 | f4beb510 | bellard | set_idt(11, 0); |
1118 | f4beb510 | bellard | set_idt(12, 0); |
1119 | f4beb510 | bellard | set_idt(13, 0); |
1120 | f4beb510 | bellard | set_idt(14, 0); |
1121 | f4beb510 | bellard | set_idt(15, 0); |
1122 | f4beb510 | bellard | set_idt(16, 0); |
1123 | f4beb510 | bellard | set_idt(17, 0); |
1124 | f4beb510 | bellard | set_idt(18, 0); |
1125 | f4beb510 | bellard | set_idt(19, 0); |
1126 | f4beb510 | bellard | set_idt(0x80, 3); |
1127 | f4beb510 | bellard | |
1128 | 6dbad63e | bellard | /* linux segment setup */
|
1129 | 80a9d035 | bellard | env->gdt.base = (long)gdt_table;
|
1130 | 6dbad63e | bellard | env->gdt.limit = sizeof(gdt_table) - 1; |
1131 | f4beb510 | bellard | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
1132 | f4beb510 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
1133 | f4beb510 | bellard | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
1134 | f4beb510 | bellard | write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, |
1135 | f4beb510 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
1136 | f4beb510 | bellard | (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
1137 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_CS, __USER_CS); |
1138 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_DS, __USER_DS); |
1139 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_ES, __USER_DS); |
1140 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_SS, __USER_DS); |
1141 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_FS, __USER_DS); |
1142 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_GS, __USER_DS); |
1143 | 92ccca6a | bellard | |
1144 | b346ff46 | bellard | #elif defined(TARGET_ARM)
|
1145 | b346ff46 | bellard | { |
1146 | b346ff46 | bellard | int i;
|
1147 | b346ff46 | bellard | for(i = 0; i < 16; i++) { |
1148 | b346ff46 | bellard | env->regs[i] = regs->uregs[i]; |
1149 | b346ff46 | bellard | } |
1150 | b346ff46 | bellard | env->cpsr = regs->uregs[16];
|
1151 | b346ff46 | bellard | } |
1152 | 93ac68bc | bellard | #elif defined(TARGET_SPARC)
|
1153 | 060366c5 | bellard | { |
1154 | 060366c5 | bellard | int i;
|
1155 | 060366c5 | bellard | env->pc = regs->pc; |
1156 | 060366c5 | bellard | env->npc = regs->npc; |
1157 | 060366c5 | bellard | env->y = regs->y; |
1158 | 060366c5 | bellard | for(i = 0; i < 8; i++) |
1159 | 060366c5 | bellard | env->gregs[i] = regs->u_regs[i]; |
1160 | 060366c5 | bellard | for(i = 0; i < 8; i++) |
1161 | 060366c5 | bellard | env->regwptr[i] = regs->u_regs[i + 8];
|
1162 | 060366c5 | bellard | } |
1163 | 67867308 | bellard | #elif defined(TARGET_PPC)
|
1164 | 67867308 | bellard | { |
1165 | 67867308 | bellard | int i;
|
1166 | 61190b14 | bellard | for (i = 0; i < 32; i++) { |
1167 | 61190b14 | bellard | if (i != 12 && i != 6) |
1168 | 61190b14 | bellard | env->msr[i] = (regs->msr >> i) & 1;
|
1169 | 61190b14 | bellard | } |
1170 | 67867308 | bellard | env->nip = regs->nip; |
1171 | 67867308 | bellard | for(i = 0; i < 32; i++) { |
1172 | 67867308 | bellard | env->gpr[i] = regs->gpr[i]; |
1173 | 67867308 | bellard | } |
1174 | 67867308 | bellard | } |
1175 | b346ff46 | bellard | #else
|
1176 | b346ff46 | bellard | #error unsupported target CPU
|
1177 | b346ff46 | bellard | #endif
|
1178 | 31e31b8a | bellard | |
1179 | 1b6b029e | bellard | cpu_loop(env); |
1180 | 1b6b029e | bellard | /* never exits */
|
1181 | 31e31b8a | bellard | return 0; |
1182 | 31e31b8a | bellard | } |