root / pc-bios / proll.patch @ afc7df11
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| 1 | e80cfcfc | bellard | diff -ruN proll_18.orig/Makefile proll-patch4/Makefile
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|---|---|---|---|
| 2 | e80cfcfc | bellard | --- proll_18.orig/Makefile 2002-09-13 14:16:59.000000000 +0000
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| 3 | e80cfcfc | bellard | +++ proll-patch4/Makefile 2004-11-13 15:50:49.000000000 +0000
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| 4 | e80cfcfc | bellard | @@ -4,6 +4,7 @@
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| 5 | e80cfcfc | bellard | make -C krups-ser all |
| 6 | e80cfcfc | bellard | make -C espresso all |
| 7 | e80cfcfc | bellard | make -C espresso-ser all |
| 8 | e80cfcfc | bellard | + make -C qemu all
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| 9 | 8d5f07fa | bellard | |
| 10 | e80cfcfc | bellard | clean: |
| 11 | e80cfcfc | bellard | make -C mrcoffee clean |
| 12 | e80cfcfc | bellard | @@ -11,3 +12,4 @@
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| 13 | e80cfcfc | bellard | make -C krups-ser clean |
| 14 | e80cfcfc | bellard | make -C espresso clean |
| 15 | e80cfcfc | bellard | make -C espresso-ser clean |
| 16 | e80cfcfc | bellard | + make -C qemu clean
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| 17 | e80cfcfc | bellard | diff -ruN proll_18.orig/qemu/head.S proll-patch4/qemu/head.S
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| 18 | e80cfcfc | bellard | --- proll_18.orig/qemu/head.S 1970-01-01 00:00:00.000000000 +0000
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| 19 | e80cfcfc | bellard | +++ proll-patch4/qemu/head.S 2004-11-13 15:50:49.000000000 +0000
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| 20 | e80cfcfc | bellard | @@ -0,0 +1,515 @@
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| 21 | e80cfcfc | bellard | +/**
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| 22 | e80cfcfc | bellard | + ** Standalone startup code for Linux PROM emulator.
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| 23 | e80cfcfc | bellard | + ** Copyright 1999 Pete A. Zaitcev
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| 24 | e80cfcfc | bellard | + ** This code is licensed under GNU General Public License.
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| 25 | e80cfcfc | bellard | + **/
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| 26 | e80cfcfc | bellard | +/*
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| 27 | e80cfcfc | bellard | + * $Id: proll.patch,v 1.2 2004-12-19 23:18:01 bellard Exp $
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| 28 | e80cfcfc | bellard | + */
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| 29 | e80cfcfc | bellard | +
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| 30 | e80cfcfc | bellard | +#include <psr.h>
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| 31 | e80cfcfc | bellard | +#include <asi.h>
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| 32 | e80cfcfc | bellard | +#include <crs.h>
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| 33 | e80cfcfc | bellard | +/* #include <asm/head.h> */ /* Trap entries. Do not use. */
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| 34 | e80cfcfc | bellard | +#include "phys_jj.h"
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| 35 | e80cfcfc | bellard | +
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| 36 | e80cfcfc | bellard | +#define C_LABEL(name) name
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| 37 | e80cfcfc | bellard | +#define REGWIN_SZ 0x40
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| 38 | e80cfcfc | bellard | +
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| 39 | e80cfcfc | bellard | +#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
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| 40 | e80cfcfc | bellard | +
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| 41 | e80cfcfc | bellard | + /* 22 is 24-2, (va)>>(SRMMU_PGDIR_SHIFT-PTESIZESHFT) */
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| 42 | e80cfcfc | bellard | +#define VATOPGDOFF(va) (((va)>>22)&0x3FC)
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| 43 | e80cfcfc | bellard | +#define VATOPMDOFF(va) (((va)>>16)&0xFC)
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| 44 | e80cfcfc | bellard | +
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| 45 | e80cfcfc | bellard | +#define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */
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| 46 | e80cfcfc | bellard | +
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| 47 | e80cfcfc | bellard | +/* Here are some trap goodies */
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| 48 | e80cfcfc | bellard | +
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| 49 | e80cfcfc | bellard | +#if 0
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| 50 | e80cfcfc | bellard | +/* Generic trap entry. */
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| 51 | e80cfcfc | bellard | +#define TRAP_ENTRY(type, label) \
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| 52 | e80cfcfc | bellard | + rd %psr, %l0; b label; rd %wim, %l3; nop;
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| 53 | e80cfcfc | bellard | +#endif
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| 54 | e80cfcfc | bellard | +
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| 55 | e80cfcfc | bellard | +/* Data/text faults. */
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| 56 | e80cfcfc | bellard | +#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b C_LABEL(srmmu_fault); mov 1, %l7;
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| 57 | e80cfcfc | bellard | +#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b C_LABEL(srmmu_fault); mov 0, %l7;
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| 58 | e80cfcfc | bellard | +
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| 59 | e80cfcfc | bellard | +#if 0
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| 60 | e80cfcfc | bellard | +/* This is for traps we should NEVER get. */
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| 61 | e80cfcfc | bellard | +#define BAD_TRAP(num) \
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| 62 | e80cfcfc | bellard | + rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
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| 63 | e80cfcfc | bellard | +
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| 64 | e80cfcfc | bellard | +/* This is for traps when we want just skip the instruction which caused it */
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| 65 | e80cfcfc | bellard | +#define SKIP_TRAP(type, name) \
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| 66 | e80cfcfc | bellard | + jmpl %l2, %g0; rett %l2 + 4; nop; nop;
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| 67 | e80cfcfc | bellard | +
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| 68 | e80cfcfc | bellard | +/* Notice that for the system calls we pull a trick. We load up a
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| 69 | e80cfcfc | bellard | + * different pointer to the system call vector table in %l7, but call
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| 70 | e80cfcfc | bellard | + * the same generic system call low-level entry point. The trap table
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| 71 | e80cfcfc | bellard | + * entry sequences are also HyperSparc pipeline friendly ;-)
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| 72 | e80cfcfc | bellard | + */
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| 73 | e80cfcfc | bellard | +
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| 74 | e80cfcfc | bellard | +/* Software trap for Linux system calls. */
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| 75 | e80cfcfc | bellard | +#define LINUX_SYSCALL_TRAP \
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| 76 | e80cfcfc | bellard | + sethi %hi(C_LABEL(sys_call_table)), %l7; \
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| 77 | e80cfcfc | bellard | + or %l7, %lo(C_LABEL(sys_call_table)), %l7; \
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| 78 | e80cfcfc | bellard | + b linux_sparc_syscall; \
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| 79 | e80cfcfc | bellard | + rd %psr, %l0;
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| 80 | e80cfcfc | bellard | +
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| 81 | e80cfcfc | bellard | +/* Software trap for SunOS4.1.x system calls. */
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| 82 | e80cfcfc | bellard | +#define SUNOS_SYSCALL_TRAP \
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| 83 | e80cfcfc | bellard | + rd %psr, %l0; \
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| 84 | e80cfcfc | bellard | + sethi %hi(C_LABEL(sunos_sys_table)), %l7; \
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| 85 | e80cfcfc | bellard | + b linux_sparc_syscall; \
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| 86 | e80cfcfc | bellard | + or %l7, %lo(C_LABEL(sunos_sys_table)), %l7;
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| 87 | e80cfcfc | bellard | +
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| 88 | e80cfcfc | bellard | +/* Software trap for Slowaris system calls. */
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| 89 | e80cfcfc | bellard | +#define SOLARIS_SYSCALL_TRAP \
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| 90 | e80cfcfc | bellard | + b solaris_syscall; \
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| 91 | e80cfcfc | bellard | + rd %psr, %l0; \
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| 92 | e80cfcfc | bellard | + nop; \
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| 93 | e80cfcfc | bellard | + nop;
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| 94 | e80cfcfc | bellard | +
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| 95 | e80cfcfc | bellard | +#define INDIRECT_SOLARIS_SYSCALL(x) \
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| 96 | e80cfcfc | bellard | + mov x, %g1; \
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| 97 | e80cfcfc | bellard | + b solaris_syscall; \
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| 98 | e80cfcfc | bellard | + rd %psr, %l0; \
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| 99 | e80cfcfc | bellard | + nop;
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| 100 | e80cfcfc | bellard | +
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| 101 | e80cfcfc | bellard | +#define BREAKPOINT_TRAP \
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| 102 | e80cfcfc | bellard | + b breakpoint_trap; \
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| 103 | e80cfcfc | bellard | + rd %psr,%l0; \
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| 104 | e80cfcfc | bellard | + nop; \
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| 105 | e80cfcfc | bellard | + nop;
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| 106 | e80cfcfc | bellard | +
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| 107 | e80cfcfc | bellard | +/* Software trap for Sparc-netbsd system calls. */
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| 108 | e80cfcfc | bellard | +#define NETBSD_SYSCALL_TRAP \
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| 109 | e80cfcfc | bellard | + sethi %hi(C_LABEL(sys_call_table)), %l7; \
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| 110 | e80cfcfc | bellard | + or %l7, %lo(C_LABEL(sys_call_table)), %l7; \
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| 111 | e80cfcfc | bellard | + b bsd_syscall; \
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| 112 | e80cfcfc | bellard | + rd %psr, %l0;
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| 113 | e80cfcfc | bellard | +
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| 114 | e80cfcfc | bellard | +/* The Get Condition Codes software trap for userland. */
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| 115 | e80cfcfc | bellard | +#define GETCC_TRAP \
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| 116 | e80cfcfc | bellard | + b getcc_trap_handler; mov %psr, %l0; nop; nop;
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| 117 | e80cfcfc | bellard | +
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| 118 | e80cfcfc | bellard | +/* The Set Condition Codes software trap for userland. */
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| 119 | e80cfcfc | bellard | +#define SETCC_TRAP \
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| 120 | e80cfcfc | bellard | + b setcc_trap_handler; mov %psr, %l0; nop; nop;
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| 121 | e80cfcfc | bellard | +
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| 122 | e80cfcfc | bellard | +/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and
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| 123 | e80cfcfc | bellard | + * gets handled with another macro.
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| 124 | e80cfcfc | bellard | + */
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| 125 | e80cfcfc | bellard | +#define TRAP_ENTRY_INTERRUPT(int_level) \
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| 126 | e80cfcfc | bellard | + mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3;
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| 127 | e80cfcfc | bellard | +
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| 128 | e80cfcfc | bellard | +/* NMI's (Non Maskable Interrupts) are special, you can't keep them
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| 129 | e80cfcfc | bellard | + * from coming in, and basically if you get one, the shows over. ;(
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| 130 | e80cfcfc | bellard | + * On the sun4c they are usually asynchronous memory errors, on the
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| 131 | e80cfcfc | bellard | + * the sun4m they could be either due to mem errors or a software
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| 132 | e80cfcfc | bellard | + * initiated interrupt from the prom/kern on an SMP box saying "I
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| 133 | e80cfcfc | bellard | + * command you to do CPU tricks, read your mailbox for more info."
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| 134 | e80cfcfc | bellard | + */
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| 135 | e80cfcfc | bellard | +#define NMI_TRAP \
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| 136 | e80cfcfc | bellard | + rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop;
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| 137 | e80cfcfc | bellard | +
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| 138 | e80cfcfc | bellard | +#endif
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| 139 | e80cfcfc | bellard | +
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| 140 | e80cfcfc | bellard | +/* Window overflows/underflows are special and we need to try to be as
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| 141 | e80cfcfc | bellard | + * efficient as possible here....
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| 142 | e80cfcfc | bellard | + */
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| 143 | e80cfcfc | bellard | +#define WINDOW_SPILL \
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| 144 | e80cfcfc | bellard | + rd %psr, %l0; rd %wim, %l3; b spill_window_entry; nop;
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| 145 | e80cfcfc | bellard | +
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| 146 | e80cfcfc | bellard | +#define WINDOW_FILL \
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| 147 | e80cfcfc | bellard | + rd %psr, %l0; rd %wim, %l3; b fill_window_entry; nop;
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| 148 | e80cfcfc | bellard | +
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| 149 | e80cfcfc | bellard | +#define STUB_TRAP ba stub_trap; nop; nop; nop;
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| 150 | e80cfcfc | bellard | +
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| 151 | e80cfcfc | bellard | +#define TRAP_ENTRY(a,b) STUB_TRAP
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| 152 | e80cfcfc | bellard | +#define SKIP_TRAP(a,b) STUB_TRAP
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| 153 | e80cfcfc | bellard | +#define SUNOS_SYSCALL_TRAP STUB_TRAP
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| 154 | e80cfcfc | bellard | +#define SOLARIS_SYSCALL_TRAP STUB_TRAP
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| 155 | e80cfcfc | bellard | +#define NETBSD_SYSCALL_TRAP STUB_TRAP
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| 156 | e80cfcfc | bellard | +#define LINUX_SYSCALL_TRAP STUB_TRAP
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| 157 | e80cfcfc | bellard | +#define BREAKPOINT_TRAP STUB_TRAP
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| 158 | e80cfcfc | bellard | +#define NMI_TRAP STUB_TRAP
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| 159 | e80cfcfc | bellard | +#define GETCC_TRAP STUB_TRAP
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| 160 | e80cfcfc | bellard | +#define SETCC_TRAP STUB_TRAP
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| 161 | e80cfcfc | bellard | +#define BAD_TRAP(n) STUB_TRAP
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| 162 | e80cfcfc | bellard | +#define TRAP_ENTRY_INTERRUPT(i) STUB_TRAP
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| 163 | e80cfcfc | bellard | +#define INDIRECT_SOLARIS_SYSCALL(i) STUB_TRAP
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| 164 | e80cfcfc | bellard | +
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| 165 | e80cfcfc | bellard | + .section ".text"
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| 166 | e80cfcfc | bellard | + .globl start, _start
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| 167 | e80cfcfc | bellard | +_start:
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| 168 | e80cfcfc | bellard | +start:
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| 169 | e80cfcfc | bellard | + .globl spill_window_entry, fill_window_entry
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| 170 | e80cfcfc | bellard | +C_LABEL(trapbase):
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| 171 | e80cfcfc | bellard | +t_zero: b goprol; nop; nop; nop;
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| 172 | e80cfcfc | bellard | +t_tflt: SRMMU_TFAULT /* Inst. Access Exception */
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| 173 | e80cfcfc | bellard | +t_bins: TRAP_ENTRY(0x2, bad_instruction) /* Illegal Instruction */
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| 174 | e80cfcfc | bellard | +t_pins: TRAP_ENTRY(0x3, priv_instruction) /* Privileged Instruction */
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| 175 | e80cfcfc | bellard | +t_fpd: TRAP_ENTRY(0x4, fpd_trap_handler) /* Floating Point Disabled */
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| 176 | e80cfcfc | bellard | +t_wovf: WINDOW_SPILL /* Window Overflow */
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| 177 | e80cfcfc | bellard | +t_wunf: WINDOW_FILL /* Window Underflow */
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| 178 | e80cfcfc | bellard | +t_mna: TRAP_ENTRY(0x7, mna_handler) /* Memory Address Not Aligned */
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| 179 | e80cfcfc | bellard | +t_fpe: TRAP_ENTRY(0x8, fpe_trap_handler) /* Floating Point Exception */
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| 180 | e80cfcfc | bellard | +t_dflt: SRMMU_DFAULT /* Data Miss Exception */
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| 181 | e80cfcfc | bellard | +t_tio: TRAP_ENTRY(0xa, do_tag_overflow) /* Tagged Instruction Ovrflw */
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| 182 | e80cfcfc | bellard | +t_wpt: TRAP_ENTRY(0xb, do_watchpoint) /* Watchpoint Detected */
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| 183 | e80cfcfc | bellard | +t_badc: BAD_TRAP(0xc) BAD_TRAP(0xd) BAD_TRAP(0xe) BAD_TRAP(0xf) BAD_TRAP(0x10)
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| 184 | e80cfcfc | bellard | +t_irq1: TRAP_ENTRY_INTERRUPT(1) /* IRQ Software/SBUS Level 1 */
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| 185 | e80cfcfc | bellard | +t_irq2: TRAP_ENTRY_INTERRUPT(2) /* IRQ SBUS Level 2 */
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| 186 | e80cfcfc | bellard | +t_irq3: TRAP_ENTRY_INTERRUPT(3) /* IRQ SCSI/DMA/SBUS Level 3 */
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| 187 | e80cfcfc | bellard | +t_irq4: TRAP_ENTRY_INTERRUPT(4) /* IRQ Software Level 4 */
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| 188 | e80cfcfc | bellard | +t_irq5: TRAP_ENTRY_INTERRUPT(5) /* IRQ SBUS/Ethernet Level 5 */
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| 189 | e80cfcfc | bellard | +t_irq6: TRAP_ENTRY_INTERRUPT(6) /* IRQ Software Level 6 */
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| 190 | e80cfcfc | bellard | +t_irq7: TRAP_ENTRY_INTERRUPT(7) /* IRQ Video/SBUS Level 5 */
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| 191 | e80cfcfc | bellard | +t_irq8: TRAP_ENTRY_INTERRUPT(8) /* IRQ SBUS Level 6 */
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| 192 | e80cfcfc | bellard | +t_irq9: TRAP_ENTRY_INTERRUPT(9) /* IRQ SBUS Level 7 */
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| 193 | e80cfcfc | bellard | +t_irq10:TRAP_ENTRY_INTERRUPT(10) /* IRQ Timer #1 (one we use) */
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| 194 | e80cfcfc | bellard | +t_irq11:TRAP_ENTRY_INTERRUPT(11) /* IRQ Floppy Intr. */
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| 195 | e80cfcfc | bellard | +t_irq12:TRAP_ENTRY_INTERRUPT(12) /* IRQ Zilog serial chip */
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| 196 | e80cfcfc | bellard | +t_irq13:TRAP_ENTRY_INTERRUPT(13) /* IRQ Audio Intr. */
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| 197 | e80cfcfc | bellard | +t_irq14:TRAP_ENTRY_INTERRUPT(14) /* IRQ Timer #2 */
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| 198 | e80cfcfc | bellard | +t_nmi: NMI_TRAP /* Level 15 (NMI) */
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| 199 | e80cfcfc | bellard | +t_racc: TRAP_ENTRY(0x20, do_reg_access) /* General Register Access Error */
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| 200 | e80cfcfc | bellard | +t_iacce:BAD_TRAP(0x21) /* Instr Access Error */
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| 201 | e80cfcfc | bellard | +t_bad22:BAD_TRAP(0x22) BAD_TRAP(0x23)
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| 202 | e80cfcfc | bellard | +t_cpdis:TRAP_ENTRY(0x24, do_cp_disabled) /* Co-Processor Disabled */
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| 203 | e80cfcfc | bellard | +t_uflsh:SKIP_TRAP(0x25, unimp_flush) /* Unimplemented FLUSH inst. */
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| 204 | e80cfcfc | bellard | +t_bad26:BAD_TRAP(0x26) BAD_TRAP(0x27)
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| 205 | e80cfcfc | bellard | +t_cpexc:TRAP_ENTRY(0x28, do_cp_exception) /* Co-Processor Exception */
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| 206 | e80cfcfc | bellard | +t_dacce:SRMMU_DFAULT /* Data Access Error */
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| 207 | e80cfcfc | bellard | +t_hwdz: TRAP_ENTRY(0x2a, do_hw_divzero) /* Division by zero, you lose... */
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| 208 | e80cfcfc | bellard | +t_dserr:BAD_TRAP(0x2b) /* Data Store Error */
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| 209 | e80cfcfc | bellard | +t_daccm:BAD_TRAP(0x2c) /* Data Access MMU-Miss */
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| 210 | e80cfcfc | bellard | +t_bad2d: BAD_TRAP(0x2d) BAD_TRAP(0x2e) BAD_TRAP(0x2f)
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| 211 | e80cfcfc | bellard | + BAD_TRAP(0x30) BAD_TRAP(0x31) BAD_TRAP(0x32) BAD_TRAP(0x33)
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| 212 | e80cfcfc | bellard | + BAD_TRAP(0x34) BAD_TRAP(0x35) BAD_TRAP(0x36) BAD_TRAP(0x37)
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| 213 | e80cfcfc | bellard | + BAD_TRAP(0x38) BAD_TRAP(0x39) BAD_TRAP(0x3a) BAD_TRAP(0x3b)
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| 214 | e80cfcfc | bellard | +t_iaccm:BAD_TRAP(0x3c) /* Instr Access MMU-Miss */
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| 215 | e80cfcfc | bellard | + BAD_TRAP(0x3d) BAD_TRAP(0x3e) BAD_TRAP(0x3f)
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| 216 | e80cfcfc | bellard | + BAD_TRAP(0x40) BAD_TRAP(0x41) BAD_TRAP(0x42) BAD_TRAP(0x43)
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| 217 | e80cfcfc | bellard | + BAD_TRAP(0x44) BAD_TRAP(0x45) BAD_TRAP(0x46) BAD_TRAP(0x47)
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| 218 | e80cfcfc | bellard | + BAD_TRAP(0x48) BAD_TRAP(0x49) BAD_TRAP(0x4a) BAD_TRAP(0x4b)
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| 219 | e80cfcfc | bellard | + BAD_TRAP(0x4c) BAD_TRAP(0x4d) BAD_TRAP(0x4e) BAD_TRAP(0x4f)
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| 220 | e80cfcfc | bellard | + BAD_TRAP(0x50) BAD_TRAP(0x51) BAD_TRAP(0x52) BAD_TRAP(0x53)
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| 221 | e80cfcfc | bellard | + BAD_TRAP(0x54) BAD_TRAP(0x55) BAD_TRAP(0x56) BAD_TRAP(0x57)
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| 222 | e80cfcfc | bellard | + BAD_TRAP(0x58) BAD_TRAP(0x59) BAD_TRAP(0x5a) BAD_TRAP(0x5b)
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| 223 | e80cfcfc | bellard | + BAD_TRAP(0x5c) BAD_TRAP(0x5d) BAD_TRAP(0x5e) BAD_TRAP(0x5f)
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| 224 | e80cfcfc | bellard | + BAD_TRAP(0x60) BAD_TRAP(0x61) BAD_TRAP(0x62) BAD_TRAP(0x63)
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| 225 | e80cfcfc | bellard | + BAD_TRAP(0x64) BAD_TRAP(0x65) BAD_TRAP(0x66) BAD_TRAP(0x67)
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| 226 | e80cfcfc | bellard | + BAD_TRAP(0x68) BAD_TRAP(0x69) BAD_TRAP(0x6a) BAD_TRAP(0x6b)
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| 227 | e80cfcfc | bellard | + BAD_TRAP(0x6c) BAD_TRAP(0x6d) BAD_TRAP(0x6e) BAD_TRAP(0x6f)
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| 228 | e80cfcfc | bellard | + BAD_TRAP(0x70) BAD_TRAP(0x71) BAD_TRAP(0x72) BAD_TRAP(0x73)
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| 229 | e80cfcfc | bellard | + BAD_TRAP(0x74) BAD_TRAP(0x75) BAD_TRAP(0x76) BAD_TRAP(0x77)
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| 230 | e80cfcfc | bellard | + BAD_TRAP(0x78) BAD_TRAP(0x79) BAD_TRAP(0x7a) BAD_TRAP(0x7b)
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| 231 | e80cfcfc | bellard | + BAD_TRAP(0x7c) BAD_TRAP(0x7d) BAD_TRAP(0x7e) BAD_TRAP(0x7f)
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| 232 | e80cfcfc | bellard | +t_sunos:SUNOS_SYSCALL_TRAP /* SunOS System Call */
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| 233 | e80cfcfc | bellard | +t_sbkpt:BREAKPOINT_TRAP /* Software Breakpoint/KGDB */
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| 234 | e80cfcfc | bellard | +t_divz: BAD_TRAP(0x82) /* Divide by zero trap */
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| 235 | e80cfcfc | bellard | +t_flwin:TRAP_ENTRY(0x83, do_flush_windows) /* Flush Windows Trap */
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| 236 | e80cfcfc | bellard | +t_clwin:BAD_TRAP(0x84) /* Clean Windows Trap */
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| 237 | e80cfcfc | bellard | +t_rchk: BAD_TRAP(0x85) /* Range Check */
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| 238 | e80cfcfc | bellard | +t_funal:BAD_TRAP(0x86) /* Fix Unaligned Access Trap */
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| 239 | e80cfcfc | bellard | +t_iovf: BAD_TRAP(0x87) /* Integer Overflow Trap */
|
| 240 | e80cfcfc | bellard | +t_slowl:SOLARIS_SYSCALL_TRAP /* Slowaris System Call */
|
| 241 | e80cfcfc | bellard | +t_netbs:NETBSD_SYSCALL_TRAP /* Net-B.S. System Call */
|
| 242 | e80cfcfc | bellard | +t_bad8a:BAD_TRAP(0x8a) BAD_TRAP(0x8b) BAD_TRAP(0x8c) BAD_TRAP(0x8d)
|
| 243 | e80cfcfc | bellard | + BAD_TRAP(0x8e) BAD_TRAP(0x8f)
|
| 244 | e80cfcfc | bellard | +t_linux:LINUX_SYSCALL_TRAP /* Linux System Call */
|
| 245 | e80cfcfc | bellard | +t_bad91:BAD_TRAP(0x91) BAD_TRAP(0x92) BAD_TRAP(0x93)
|
| 246 | e80cfcfc | bellard | + BAD_TRAP(0x94) BAD_TRAP(0x95) BAD_TRAP(0x96) BAD_TRAP(0x97)
|
| 247 | e80cfcfc | bellard | + BAD_TRAP(0x98) BAD_TRAP(0x99) BAD_TRAP(0x9a) BAD_TRAP(0x9b) BAD_TRAP(0x9c) BAD_TRAP(0x9d) BAD_TRAP(0x9e) BAD_TRAP(0x9f)
|
| 248 | e80cfcfc | bellard | +t_getcc:GETCC_TRAP /* Get Condition Codes */
|
| 249 | e80cfcfc | bellard | +t_setcc:SETCC_TRAP /* Set Condition Codes */
|
| 250 | e80cfcfc | bellard | +t_bada2:BAD_TRAP(0xa2) BAD_TRAP(0xa3)
|
| 251 | e80cfcfc | bellard | + BAD_TRAP(0xa4) BAD_TRAP(0xa5) BAD_TRAP(0xa6)
|
| 252 | e80cfcfc | bellard | +t_slowi:INDIRECT_SOLARIS_SYSCALL(156)
|
| 253 | e80cfcfc | bellard | + BAD_TRAP(0xa8) BAD_TRAP(0xa9) BAD_TRAP(0xaa) BAD_TRAP(0xab)
|
| 254 | e80cfcfc | bellard | + BAD_TRAP(0xac) BAD_TRAP(0xad) BAD_TRAP(0xae) BAD_TRAP(0xaf)
|
| 255 | e80cfcfc | bellard | + BAD_TRAP(0xb0) BAD_TRAP(0xb1) BAD_TRAP(0xb2) BAD_TRAP(0xb3)
|
| 256 | e80cfcfc | bellard | + BAD_TRAP(0xb4) BAD_TRAP(0xb5) BAD_TRAP(0xb6) BAD_TRAP(0xb7)
|
| 257 | e80cfcfc | bellard | + BAD_TRAP(0xb8) BAD_TRAP(0xb9) BAD_TRAP(0xba) BAD_TRAP(0xbb)
|
| 258 | e80cfcfc | bellard | + BAD_TRAP(0xbc) BAD_TRAP(0xbd) BAD_TRAP(0xbe) BAD_TRAP(0xbf)
|
| 259 | e80cfcfc | bellard | +t_badc0:BAD_TRAP(0xc0) BAD_TRAP(0xc1) BAD_TRAP(0xc2) BAD_TRAP(0xc3)
|
| 260 | e80cfcfc | bellard | + BAD_TRAP(0xc4) BAD_TRAP(0xc5) BAD_TRAP(0xc6) BAD_TRAP(0xc7)
|
| 261 | e80cfcfc | bellard | + BAD_TRAP(0xc8) BAD_TRAP(0xc9) BAD_TRAP(0xca) BAD_TRAP(0xcb)
|
| 262 | e80cfcfc | bellard | + BAD_TRAP(0xcc) BAD_TRAP(0xcd) BAD_TRAP(0xce) BAD_TRAP(0xcf)
|
| 263 | e80cfcfc | bellard | + BAD_TRAP(0xd0) BAD_TRAP(0xd1) BAD_TRAP(0xd2) BAD_TRAP(0xd3)
|
| 264 | e80cfcfc | bellard | +t_badd4:BAD_TRAP(0xd4) BAD_TRAP(0xd5) BAD_TRAP(0xd6) BAD_TRAP(0xd7)
|
| 265 | e80cfcfc | bellard | + BAD_TRAP(0xd8) BAD_TRAP(0xd9) BAD_TRAP(0xda) BAD_TRAP(0xdb)
|
| 266 | e80cfcfc | bellard | + BAD_TRAP(0xdc) BAD_TRAP(0xdd) BAD_TRAP(0xde) BAD_TRAP(0xdf)
|
| 267 | e80cfcfc | bellard | + BAD_TRAP(0xe0) BAD_TRAP(0xe1) BAD_TRAP(0xe2) BAD_TRAP(0xe3)
|
| 268 | e80cfcfc | bellard | + BAD_TRAP(0xe4) BAD_TRAP(0xe5) BAD_TRAP(0xe6) BAD_TRAP(0xe7)
|
| 269 | e80cfcfc | bellard | +t_bade8:BAD_TRAP(0xe8) BAD_TRAP(0xe9) BAD_TRAP(0xea) BAD_TRAP(0xeb)
|
| 270 | e80cfcfc | bellard | + BAD_TRAP(0xec) BAD_TRAP(0xed) BAD_TRAP(0xee) BAD_TRAP(0xef)
|
| 271 | e80cfcfc | bellard | + BAD_TRAP(0xf0) BAD_TRAP(0xf1) BAD_TRAP(0xf2) BAD_TRAP(0xf3)
|
| 272 | e80cfcfc | bellard | + BAD_TRAP(0xf4) BAD_TRAP(0xf5) BAD_TRAP(0xf6) BAD_TRAP(0xf7)
|
| 273 | e80cfcfc | bellard | + BAD_TRAP(0xf8) BAD_TRAP(0xf9) BAD_TRAP(0xfa) BAD_TRAP(0xfb)
|
| 274 | e80cfcfc | bellard | +t_badfc:BAD_TRAP(0xfc) BAD_TRAP(0xfd)
|
| 275 | e80cfcfc | bellard | +dbtrap: BAD_TRAP(0xfe) /* Debugger/PROM breakpoint #1 */
|
| 276 | e80cfcfc | bellard | +dbtrap2:BAD_TRAP(0xff) /* Debugger/PROM breakpoint #2 */
|
| 277 | e80cfcfc | bellard | +
|
| 278 | e80cfcfc | bellard | +stub_trap:
|
| 279 | e80cfcfc | bellard | + set (PHYS_JJ_TCX_FB + 0xbf0), %g5 /* 2 cells from side */
|
| 280 | e80cfcfc | bellard | + set 0x00ffffff, %g4
|
| 281 | e80cfcfc | bellard | + sta %g4, [%g5] ASI_M_BYPASS
|
| 282 | e80cfcfc | bellard | +1: ba 1b; nop
|
| 283 | e80cfcfc | bellard | +
|
| 284 | e80cfcfc | bellard | + .section ".bss"
|
| 285 | e80cfcfc | bellard | + .align 8
|
| 286 | e80cfcfc | bellard | +bss_start:
|
| 287 | e80cfcfc | bellard | + .align 0x1000 ! PAGE_SIZE
|
| 288 | e80cfcfc | bellard | + .globl C_LABEL(bootup_user_stack)
|
| 289 | e80cfcfc | bellard | + .type bootup_user_stack,#object
|
| 290 | e80cfcfc | bellard | + .size bootup_user_stack,0x2000
|
| 291 | e80cfcfc | bellard | +C_LABEL(bootup_user_stack): .skip 0x2000
|
| 292 | e80cfcfc | bellard | +
|
| 293 | e80cfcfc | bellard | + .section ".text"
|
| 294 | e80cfcfc | bellard | +
|
| 295 | e80cfcfc | bellard | +goprol:
|
| 296 | e80cfcfc | bellard | + ! %g1 contains end of memory
|
| 297 | e80cfcfc | bellard | + ! map PROLDATA to PROLBASE+PROLSIZE to end of ram
|
| 298 | e80cfcfc | bellard | + set PROLSIZE+0x1000-PROLDATA+PROLBASE, %g2 ! add 0x1000 for temp tables
|
| 299 | e80cfcfc | bellard | + sub %g1, %g2, %g2 ! start of private memory
|
| 300 | e80cfcfc | bellard | + srl %g2, 0x4, %g7 ! ctx table at s+0x0
|
| 301 | e80cfcfc | bellard | + add %g2, 0x400, %g3 ! l1 table at s+0x400
|
| 302 | e80cfcfc | bellard | + srl %g3, 0x4, %g3
|
| 303 | e80cfcfc | bellard | + or %g3, 0x1, %g3
|
| 304 | e80cfcfc | bellard | + sta %g3, [%g2] ASI_M_BYPASS
|
| 305 | e80cfcfc | bellard | + add %g2, 0x400, %g2 ! s+0x400
|
| 306 | e80cfcfc | bellard | + add %g2, 0x800, %g3 ! l2 table for ram (00xxxxxx) at s+0x800
|
| 307 | e80cfcfc | bellard | + srl %g3, 0x4, %g3
|
| 308 | e80cfcfc | bellard | + or %g3, 0x1, %g3
|
| 309 | e80cfcfc | bellard | + sta %g3, [%g2] ASI_M_BYPASS
|
| 310 | e80cfcfc | bellard | + add %g2, 0x500, %g3 ! l2 table for rom (ffxxxxxx) at s+0x900
|
| 311 | e80cfcfc | bellard | + add %g2, 0x3fc, %g2 ! s+0x7fc
|
| 312 | e80cfcfc | bellard | + srl %g3, 0x4, %g3
|
| 313 | e80cfcfc | bellard | + or %g3, 0x1, %g3
|
| 314 | e80cfcfc | bellard | + sta %g3, [%g2] ASI_M_BYPASS
|
| 315 | e80cfcfc | bellard | + add %g2, 0x4, %g2 ! s+0x800
|
| 316 | e80cfcfc | bellard | + set ((7 << 2) | 2), %g3 ! 7 = U: --- S: RWX (main memory)
|
| 317 | e80cfcfc | bellard | + sta %g3, [%g2] ASI_M_BYPASS
|
| 318 | e80cfcfc | bellard | + add %g2, 0x200, %g3 ! l3 table for rom at s+0xa00
|
| 319 | e80cfcfc | bellard | + add %g2, 0x1d0, %g2 ! s+0x9d0
|
| 320 | e80cfcfc | bellard | + srl %g3, 0x4, %g3
|
| 321 | e80cfcfc | bellard | + or %g3, 0x1, %g3
|
| 322 | e80cfcfc | bellard | + sta %g3, [%g2] ASI_M_BYPASS
|
| 323 | e80cfcfc | bellard | + add %g2, 0x30, %g2 ! s+0xa00
|
| 324 | e80cfcfc | bellard | +
|
| 325 | e80cfcfc | bellard | + set PROLBASE, %g3
|
| 326 | e80cfcfc | bellard | + set 0x1000, %g5
|
| 327 | e80cfcfc | bellard | + set (PROLDATA-PROLBASE)/0x1000, %g6 ! # of .text pages
|
| 328 | e80cfcfc | bellard | +1: srl %g3, 0x4, %g4
|
| 329 | e80cfcfc | bellard | + or %g4, ((7 << 2) | 2), %g4 ! 4 = U: --X S: --X (rom, execute only)
|
| 330 | e80cfcfc | bellard | + sta %g4, [%g2] ASI_M_BYPASS
|
| 331 | e80cfcfc | bellard | + add %g2, 4, %g2
|
| 332 | e80cfcfc | bellard | + add %g3, %g5, %g3
|
| 333 | e80cfcfc | bellard | + deccc %g6
|
| 334 | e80cfcfc | bellard | + bne 1b
|
| 335 | e80cfcfc | bellard | + nop
|
| 336 | e80cfcfc | bellard | +#if 0
|
| 337 | e80cfcfc | bellard | + set (PROLDATA-PROLRODATA)/0x1000, %g6 ! # of .rodata pages
|
| 338 | e80cfcfc | bellard | +1: srl %g3, 0x4, %g4
|
| 339 | e80cfcfc | bellard | + or %g4, ((0 << 2) | 2), %g4 ! 0 = U: R-- S: R-- (rom, read only)
|
| 340 | e80cfcfc | bellard | + sta %g4, [%g2] ASI_M_BYPASS
|
| 341 | e80cfcfc | bellard | + add %g2, 4, %g2
|
| 342 | e80cfcfc | bellard | + add %g3, %g5, %g3
|
| 343 | e80cfcfc | bellard | + deccc %g6
|
| 344 | e80cfcfc | bellard | + bne 1b
|
| 345 | e80cfcfc | bellard | + nop
|
| 346 | e80cfcfc | bellard | +#endif
|
| 347 | e80cfcfc | bellard | + set (PROLBASE+PROLSIZE-PROLDATA)/0x1000, %g6 ! # of .bss pages
|
| 348 | e80cfcfc | bellard | + set 0x1000, %g4
|
| 349 | e80cfcfc | bellard | + sll %g7, 0x4, %g3
|
| 350 | e80cfcfc | bellard | + add %g4, %g3, %g3
|
| 351 | e80cfcfc | bellard | +1: srl %g3, 0x4, %g4
|
| 352 | e80cfcfc | bellard | + or %g4, ((7 << 2) | 2), %g4 ! 5 = U: R-- S: RW- (data area, read/write)
|
| 353 | e80cfcfc | bellard | + sta %g4, [%g2] ASI_M_BYPASS
|
| 354 | e80cfcfc | bellard | + add %g2, 4, %g2
|
| 355 | e80cfcfc | bellard | + add %g3, %g5, %g3
|
| 356 | e80cfcfc | bellard | + deccc %g6
|
| 357 | e80cfcfc | bellard | + bne 1b
|
| 358 | e80cfcfc | bellard | + nop
|
| 359 | e80cfcfc | bellard | +
|
| 360 | e80cfcfc | bellard | + mov %g1, %g3
|
| 361 | e80cfcfc | bellard | +
|
| 362 | e80cfcfc | bellard | + set AC_M_CTPR, %g2
|
| 363 | e80cfcfc | bellard | + sta %g7, [%g2] ASI_M_MMUREGS ! set ctx table ptr
|
| 364 | e80cfcfc | bellard | + set 1, %g1
|
| 365 | e80cfcfc | bellard | + sta %g1, [%g0] ASI_M_MMUREGS ! enable mmu
|
| 366 | e80cfcfc | bellard | +
|
| 367 | e80cfcfc | bellard | + /*
|
| 368 | e80cfcfc | bellard | + * The code which enables traps is a simplified version of
|
| 369 | e80cfcfc | bellard | + * kernel head.S.
|
| 370 | e80cfcfc | bellard | + *
|
| 371 | e80cfcfc | bellard | + * We know number of windows as 8 so we do not calculate them.
|
| 372 | e80cfcfc | bellard | + * The deadwood is here for any case.
|
| 373 | e80cfcfc | bellard | + */
|
| 374 | e80cfcfc | bellard | +
|
| 375 | e80cfcfc | bellard | + /* Turn on Supervisor, EnableFloating, and all the PIL bits.
|
| 376 | e80cfcfc | bellard | + * Also puts us in register window zero with traps off.
|
| 377 | e80cfcfc | bellard | + */
|
| 378 | e80cfcfc | bellard | + set (PSR_PS | PSR_S | PSR_PIL | PSR_EF), %g2
|
| 379 | e80cfcfc | bellard | + wr %g2, 0x0, %psr
|
| 380 | e80cfcfc | bellard | + WRITE_PAUSE
|
| 381 | e80cfcfc | bellard | +
|
| 382 | e80cfcfc | bellard | + /* I want a kernel stack NOW! */
|
| 383 | e80cfcfc | bellard | + set C_LABEL(bootup_user_stack), %g1
|
| 384 | e80cfcfc | bellard | + set (0x2000 - REGWIN_SZ), %g2
|
| 385 | e80cfcfc | bellard | + add %g1, %g2, %sp
|
| 386 | e80cfcfc | bellard | + mov 0, %fp /* And for good luck */
|
| 387 | e80cfcfc | bellard | +
|
| 388 | e80cfcfc | bellard | + /* Zero out our BSS section. */
|
| 389 | e80cfcfc | bellard | + set C_LABEL(bss_start) , %o0 ! First address of BSS
|
| 390 | e80cfcfc | bellard | + set C_LABEL(end) , %o1 ! Last address of BSS
|
| 391 | e80cfcfc | bellard | + ba 2f
|
| 392 | e80cfcfc | bellard | + nop
|
| 393 | e80cfcfc | bellard | +1:
|
| 394 | e80cfcfc | bellard | + st %g0, [%o0]
|
| 395 | e80cfcfc | bellard | +2:
|
| 396 | e80cfcfc | bellard | + subcc %o0, %o1, %g0
|
| 397 | e80cfcfc | bellard | + bl 1b
|
| 398 | e80cfcfc | bellard | + add %o0, 0x4, %o0
|
| 399 | e80cfcfc | bellard | +
|
| 400 | e80cfcfc | bellard | + sethi %hi( C_LABEL(ram_size) ), %o0
|
| 401 | e80cfcfc | bellard | + st %g3, [%o0 + %lo( C_LABEL(ram_size) )]
|
| 402 | e80cfcfc | bellard | +
|
| 403 | e80cfcfc | bellard | + mov 2, %g1
|
| 404 | e80cfcfc | bellard | + wr %g1, 0x0, %wim ! make window 1 invalid
|
| 405 | e80cfcfc | bellard | + WRITE_PAUSE
|
| 406 | e80cfcfc | bellard | +
|
| 407 | e80cfcfc | bellard | +#if 0
|
| 408 | e80cfcfc | bellard | + wr %g0, 0x0, %wim
|
| 409 | e80cfcfc | bellard | + WRITE_PAUSE
|
| 410 | e80cfcfc | bellard | + save
|
| 411 | e80cfcfc | bellard | + rd %psr, %g3
|
| 412 | e80cfcfc | bellard | + restore
|
| 413 | e80cfcfc | bellard | + and %g3, PSR_CWP, %g3
|
| 414 | e80cfcfc | bellard | + add %g3, 0x1, %g3
|
| 415 | e80cfcfc | bellard | +#else
|
| 416 | e80cfcfc | bellard | + or %g0, 8, %g3
|
| 417 | e80cfcfc | bellard | +#endif
|
| 418 | e80cfcfc | bellard | +
|
| 419 | e80cfcfc | bellard | +#if 0
|
| 420 | e80cfcfc | bellard | + sethi %hi( C_LABEL(cputyp) ), %o0
|
| 421 | e80cfcfc | bellard | + st %g7, [%o0 + %lo( C_LABEL(cputyp) )]
|
| 422 | e80cfcfc | bellard | +
|
| 423 | e80cfcfc | bellard | + sethi %hi( C_LABEL(nwindows) ), %g4
|
| 424 | e80cfcfc | bellard | + st %g3, [%g4 + %lo( C_LABEL(nwindows) )]
|
| 425 | e80cfcfc | bellard | +
|
| 426 | e80cfcfc | bellard | + sub %g3, 0x1, %g3
|
| 427 | e80cfcfc | bellard | + sethi %hi( C_LABEL(nwindowsm1) ), %g4
|
| 428 | e80cfcfc | bellard | + st %g3, [%g4 + %lo( C_LABEL(nwindowsm1) )]
|
| 429 | e80cfcfc | bellard | +#endif
|
| 430 | e80cfcfc | bellard | +
|
| 431 | e80cfcfc | bellard | + /* Here we go, start using Linux's trap table... */
|
| 432 | e80cfcfc | bellard | + set C_LABEL(trapbase), %g3
|
| 433 | e80cfcfc | bellard | + wr %g3, 0x0, %tbr
|
| 434 | e80cfcfc | bellard | + WRITE_PAUSE
|
| 435 | e80cfcfc | bellard | +
|
| 436 | e80cfcfc | bellard | + /* Finally, turn on traps so that we can call c-code. */
|
| 437 | e80cfcfc | bellard | + rd %psr, %g3
|
| 438 | e80cfcfc | bellard | + wr %g3, 0x0, %psr
|
| 439 | e80cfcfc | bellard | + WRITE_PAUSE
|
| 440 | e80cfcfc | bellard | +
|
| 441 | e80cfcfc | bellard | + wr %g3, PSR_ET, %psr
|
| 442 | e80cfcfc | bellard | + WRITE_PAUSE
|
| 443 | e80cfcfc | bellard | +
|
| 444 | e80cfcfc | bellard | + .globl prolmain
|
| 445 | e80cfcfc | bellard | + call C_LABEL(prolmain)
|
| 446 | e80cfcfc | bellard | + nop
|
| 447 | e80cfcfc | bellard | +
|
| 448 | e80cfcfc | bellard | +3:
|
| 449 | e80cfcfc | bellard | + b 3b
|
| 450 | e80cfcfc | bellard | + nop
|
| 451 | e80cfcfc | bellard | +
|
| 452 | e80cfcfc | bellard | +/*
|
| 453 | e80cfcfc | bellard | + * Memory access trap handler
|
| 454 | e80cfcfc | bellard | + * %l0 program %psr from trap table entry
|
| 455 | e80cfcfc | bellard | + * %l1 program %pc from hardware
|
| 456 | e80cfcfc | bellard | + * %l2 program %npc from hardware
|
| 457 | e80cfcfc | bellard | + * %l3 program %wim from trap table entry
|
| 458 | e80cfcfc | bellard | + * %l4
|
| 459 | e80cfcfc | bellard | + * %l5
|
| 460 | e80cfcfc | bellard | + * %l6
|
| 461 | e80cfcfc | bellard | + * %l7 text flag from trap table entry
|
| 462 | e80cfcfc | bellard | + */
|
| 463 | e80cfcfc | bellard | +
|
| 464 | e80cfcfc | bellard | + .section ".text"
|
| 465 | e80cfcfc | bellard | + .globl srmmu_fault
|
| 466 | e80cfcfc | bellard | +C_LABEL(srmmu_fault):
|
| 467 | e80cfcfc | bellard | +
|
| 468 | e80cfcfc | bellard | + set AC_M_SFAR, %l6
|
| 469 | e80cfcfc | bellard | + set AC_M_SFSR, %l5
|
| 470 | e80cfcfc | bellard | + lda [%l6] ASI_M_MMUREGS, %l6
|
| 471 | e80cfcfc | bellard | + lda [%l5] ASI_M_MMUREGS, %l5
|
| 472 | e80cfcfc | bellard | +
|
| 473 | e80cfcfc | bellard | + set ignore_fault, %l5
|
| 474 | e80cfcfc | bellard | + ld [%l5], %l5
|
| 475 | e80cfcfc | bellard | + subcc %l5, %g0, %g0 /* NULL pointer trap faults always */
|
| 476 | e80cfcfc | bellard | + be 3f
|
| 477 | e80cfcfc | bellard | + nop
|
| 478 | e80cfcfc | bellard | + subcc %l5, %l6, %g0
|
| 479 | e80cfcfc | bellard | + be 2f
|
| 480 | e80cfcfc | bellard | + nop
|
| 481 | e80cfcfc | bellard | +3:
|
| 482 | e80cfcfc | bellard | +
|
| 483 | e80cfcfc | bellard | + set (PHYS_JJ_TCX_FB + 0xbf0), %g5 /* 2 cells from side */
|
| 484 | e80cfcfc | bellard | + set 0x00ffffff, %g4
|
| 485 | e80cfcfc | bellard | + sta %g4, [%g5] ASI_M_BYPASS
|
| 486 | e80cfcfc | bellard | + add %g5, 8, %g5 /* On right side */
|
| 487 | e80cfcfc | bellard | + sta %g4, [%g5] ASI_M_BYPASS
|
| 488 | e80cfcfc | bellard | +1: ba 1b; nop
|
| 489 | e80cfcfc | bellard | +
|
| 490 | e80cfcfc | bellard | +2:
|
| 491 | e80cfcfc | bellard | + set C_LABEL(fault_ignored), %l5
|
| 492 | e80cfcfc | bellard | + mov 1, %l6
|
| 493 | e80cfcfc | bellard | + st %l6, [%l5]
|
| 494 | e80cfcfc | bellard | +
|
| 495 | e80cfcfc | bellard | + /*
|
| 496 | e80cfcfc | bellard | + * Skip the faulting instruction.
|
| 497 | e80cfcfc | bellard | + * I think it works when next instruction is a branch even.
|
| 498 | e80cfcfc | bellard | + */
|
| 499 | e80cfcfc | bellard | + or %l2, 0, %l1
|
| 500 | e80cfcfc | bellard | + add %l2, 4, %l2
|
| 501 | e80cfcfc | bellard | +
|
| 502 | e80cfcfc | bellard | + wr %l0, 0, %psr
|
| 503 | e80cfcfc | bellard | + WRITE_PAUSE
|
| 504 | e80cfcfc | bellard | + jmp %l1
|
| 505 | e80cfcfc | bellard | + rett %l2
|
| 506 | e80cfcfc | bellard | +
|
| 507 | e80cfcfc | bellard | +/*
|
| 508 | e80cfcfc | bellard | + * Slow external versions of st_bypass and ld_bypass.
|
| 509 | e80cfcfc | bellard | + * rconsole.c uses inlines. We call these in places which are not speed
|
| 510 | e80cfcfc | bellard | + * critical, to avoid compiler bugs.
|
| 511 | e80cfcfc | bellard | + */
|
| 512 | e80cfcfc | bellard | + .globl C_LABEL(st_bypass)
|
| 513 | e80cfcfc | bellard | +C_LABEL(st_bypass):
|
| 514 | e80cfcfc | bellard | + retl
|
| 515 | e80cfcfc | bellard | + sta %o1, [%o0] ASI_M_BYPASS
|
| 516 | e80cfcfc | bellard | + .globl C_LABEL(ld_bypass)
|
| 517 | e80cfcfc | bellard | +C_LABEL(ld_bypass):
|
| 518 | e80cfcfc | bellard | + retl
|
| 519 | e80cfcfc | bellard | + lda [%o0] ASI_M_BYPASS, %o0
|
| 520 | e80cfcfc | bellard | + .globl C_LABEL(sth_bypass)
|
| 521 | e80cfcfc | bellard | +C_LABEL(sth_bypass):
|
| 522 | e80cfcfc | bellard | + retl
|
| 523 | e80cfcfc | bellard | + stha %o1, [%o0] ASI_M_BYPASS
|
| 524 | e80cfcfc | bellard | + .globl C_LABEL(ldh_bypass)
|
| 525 | e80cfcfc | bellard | +C_LABEL(ldh_bypass):
|
| 526 | e80cfcfc | bellard | + retl
|
| 527 | e80cfcfc | bellard | + lduha [%o0] ASI_M_BYPASS, %o0
|
| 528 | e80cfcfc | bellard | + .globl C_LABEL(stb_bypass)
|
| 529 | e80cfcfc | bellard | +C_LABEL(stb_bypass):
|
| 530 | e80cfcfc | bellard | + retl
|
| 531 | e80cfcfc | bellard | + stba %o1, [%o0] ASI_M_BYPASS
|
| 532 | e80cfcfc | bellard | + .globl C_LABEL(ldb_bypass)
|
| 533 | e80cfcfc | bellard | +C_LABEL(ldb_bypass):
|
| 534 | e80cfcfc | bellard | + retl
|
| 535 | e80cfcfc | bellard | + lduba [%o0] ASI_M_BYPASS, %o0
|
| 536 | e80cfcfc | bellard | diff -ruN proll_18.orig/qemu/main.c proll-patch4/qemu/main.c
|
| 537 | e80cfcfc | bellard | --- proll_18.orig/qemu/main.c 1970-01-01 00:00:00.000000000 +0000
|
| 538 | e80cfcfc | bellard | +++ proll-patch4/qemu/main.c 2004-11-23 19:05:34.000000000 +0000
|
| 539 | e80cfcfc | bellard | @@ -0,0 +1,178 @@
|
| 540 | e80cfcfc | bellard | +/**
|
| 541 | e80cfcfc | bellard | + ** Proll (PROM replacement)
|
| 542 | e80cfcfc | bellard | + ** Copyright 1999 Pete Zaitcev
|
| 543 | e80cfcfc | bellard | + ** This code is licensed under GNU General Public License.
|
| 544 | e80cfcfc | bellard | + **/
|
| 545 | e80cfcfc | bellard | +#include <stdarg.h>
|
| 546 | e80cfcfc | bellard | +
|
| 547 | e80cfcfc | bellard | +// #include <asm/contregs.h>
|
| 548 | e80cfcfc | bellard | +#include <asi.h>
|
| 549 | e80cfcfc | bellard | +#include "pgtsrmmu.h"
|
| 550 | e80cfcfc | bellard | +#include "iommu.h" /* Typical SBus IOMMU for sun4m */
|
| 551 | e80cfcfc | bellard | +#include "phys_jj.h"
|
| 552 | e80cfcfc | bellard | +#include "vconsole.h"
|
| 553 | e80cfcfc | bellard | +#include "version.h"
|
| 554 | e80cfcfc | bellard | +#include <general.h> /* __P() */
|
| 555 | e80cfcfc | bellard | +#include <net.h> /* init_net() */
|
| 556 | e80cfcfc | bellard | +#include <romlib.h> /* we are a provider for part of this. */
|
| 557 | e80cfcfc | bellard | +#include <netpriv.h> /* myipaddr */
|
| 558 | e80cfcfc | bellard | +#include <arpa.h>
|
| 559 | e80cfcfc | bellard | +#include <system.h> /* our own prototypes */
|
| 560 | e80cfcfc | bellard | +
|
| 561 | e80cfcfc | bellard | +static void init_idprom(void);
|
| 562 | e80cfcfc | bellard | +static void makepages_q(struct phym *t, unsigned int highbase);
|
| 563 | e80cfcfc | bellard | +
|
| 564 | e80cfcfc | bellard | +struct vconterm dp0;
|
| 565 | e80cfcfc | bellard | +struct mem cmem; /* Current memory, virtual */
|
| 566 | e80cfcfc | bellard | +struct mem cio; /* Current I/O space */
|
| 567 | e80cfcfc | bellard | +struct phym pmem; /* Current phys. mem. */
|
| 568 | e80cfcfc | bellard | +struct iommu ciommu; /* Our IOMMU on sun4m */
|
| 569 | e80cfcfc | bellard | +
|
| 570 | e80cfcfc | bellard | +static char *hw_idprom;
|
| 571 | e80cfcfc | bellard | +int ignore_fault, fault_ignored, ram_size;
|
| 572 | e80cfcfc | bellard | +
|
| 573 | e80cfcfc | bellard | +/*
|
| 574 | e80cfcfc | bellard | + */
|
| 575 | e80cfcfc | bellard | +void prolmain()
|
| 576 | e80cfcfc | bellard | +{
|
| 577 | e80cfcfc | bellard | + //static const char fname[14] = "00000000.PROL";
|
| 578 | e80cfcfc | bellard | + static struct banks bb;
|
| 579 | e80cfcfc | bellard | + unsigned int hiphybas;
|
| 580 | e80cfcfc | bellard | + const void *romvec;
|
| 581 | e80cfcfc | bellard | +
|
| 582 | e80cfcfc | bellard | + vcon_init(&dp0, PHYS_JJ_TCX_FB);
|
| 583 | e80cfcfc | bellard | + printk("PROLL %s QEMU\n", PROLL_VERSION_STRING);
|
| 584 | e80cfcfc | bellard | + printk("%d MB total\n", ram_size/(1024*1024));
|
| 585 | e80cfcfc | bellard | +
|
| 586 | e80cfcfc | bellard | + bb.nbanks = 1;
|
| 587 | e80cfcfc | bellard | + bb.bankv[0].start = 0;
|
| 588 | e80cfcfc | bellard | + bb.bankv[0].length = ram_size;
|
| 589 | e80cfcfc | bellard | +
|
| 590 | e80cfcfc | bellard | + hiphybas = ram_size - PROLSIZE;
|
| 591 | e80cfcfc | bellard | +
|
| 592 | e80cfcfc | bellard | + mem_init(&cmem, (char *) &_end, (char *)(PROLBASE+PROLSIZE));
|
| 593 | e80cfcfc | bellard | + makepages_q(&pmem, hiphybas);
|
| 594 | e80cfcfc | bellard | + init_mmu_swift((unsigned int)pmem.pctp - PROLBASE + hiphybas);
|
| 595 | e80cfcfc | bellard | +
|
| 596 | e80cfcfc | bellard | + mem_init(&cio, (char *)(PROLBASE+PROLSIZE),
|
| 597 | e80cfcfc | bellard | + (char *)(PROLBASE+PROLSIZE+IOMAPSIZE));
|
| 598 | e80cfcfc | bellard | +
|
| 599 | e80cfcfc | bellard | + iommu_init(&ciommu, hiphybas);
|
| 600 | e80cfcfc | bellard | +
|
| 601 | e80cfcfc | bellard | + /*
|
| 602 | e80cfcfc | bellard | + */
|
| 603 | e80cfcfc | bellard | + init_idprom();
|
| 604 | e80cfcfc | bellard | + sched_init();
|
| 605 | e80cfcfc | bellard | + le_probe();
|
| 606 | e80cfcfc | bellard | + init_net();
|
| 607 | e80cfcfc | bellard | +
|
| 608 | e80cfcfc | bellard | +#if 0
|
| 609 | e80cfcfc | bellard | +#if 0 /* RARP */
|
| 610 | e80cfcfc | bellard | + if (rarp() != 0) fatal();
|
| 611 | e80cfcfc | bellard | + /* printrarp(); */
|
| 612 | e80cfcfc | bellard | + xtoa(myipaddr, fname, 8);
|
| 613 | e80cfcfc | bellard | + if (load(servaddr, fname) != 0) fatal();
|
| 614 | e80cfcfc | bellard | +#else
|
| 615 | e80cfcfc | bellard | + if (bootp() != 0) fatal();
|
| 616 | e80cfcfc | bellard | + /*
|
| 617 | e80cfcfc | bellard | + * boot_rec.bp_file cannot be used because system PROM
|
| 618 | e80cfcfc | bellard | + * uses it to locate ourselves. If we load from boot_rec.bp_file,
|
| 619 | e80cfcfc | bellard | + * we will loop reloading PROLL over and over again.
|
| 620 | e80cfcfc | bellard | + * Thus we use traditional PROLL scheme HEXIPADDR.PROL (single L).
|
| 621 | e80cfcfc | bellard | + */
|
| 622 | e80cfcfc | bellard | + xtoa(myipaddr, fname, 8);
|
| 623 | e80cfcfc | bellard | + if (load(boot_rec.bp_siaddr, fname) != 0) fatal();
|
| 624 | e80cfcfc | bellard | +#endif
|
| 625 | e80cfcfc | bellard | +#endif
|
| 626 | e80cfcfc | bellard | +
|
| 627 | e80cfcfc | bellard | + romvec = init_openprom(bb.nbanks, bb.bankv, hiphybas);
|
| 628 | e80cfcfc | bellard | +
|
| 629 | e80cfcfc | bellard | + printk("Memory used: virt 0x%x:0x%x[%dK] iomap 0x%x:0x%x\n",
|
| 630 | e80cfcfc | bellard | + PROLBASE, (int)cmem.curp, ((unsigned) cmem.curp - PROLBASE)/1024,
|
| 631 | e80cfcfc | bellard | + (int)cio.start, (int)cio.curp);
|
| 632 | e80cfcfc | bellard | + //set_timeout(5); while (!chk_timeout()) { } /* P3: let me read */
|
| 633 | e80cfcfc | bellard | +
|
| 634 | e80cfcfc | bellard | + {
|
| 635 | e80cfcfc | bellard | + void (*entry)(const void *, int, int, int, int) = (void (*)(const void*, int, int, int, int)) LOADBASE;
|
| 636 | e80cfcfc | bellard | + entry(romvec, 0, 0, 0, 0);
|
| 637 | e80cfcfc | bellard | + }
|
| 638 | e80cfcfc | bellard | +
|
| 639 | e80cfcfc | bellard | + mem_fini(&cmem);
|
| 640 | e80cfcfc | bellard | + vcon_fini(&dp0);
|
| 641 | e80cfcfc | bellard | +}
|
| 642 | e80cfcfc | bellard | +
|
| 643 | e80cfcfc | bellard | +/*
|
| 644 | e80cfcfc | bellard | + * dvma_alloc over iommu_alloc.
|
| 645 | e80cfcfc | bellard | + */
|
| 646 | e80cfcfc | bellard | +void *dvma_alloc(int size, unsigned int *pphys)
|
| 647 | e80cfcfc | bellard | +{
|
| 648 | e80cfcfc | bellard | + return iommu_alloc(&ciommu, size, pphys);
|
| 649 | e80cfcfc | bellard | +}
|
| 650 | e80cfcfc | bellard | +
|
| 651 | e80cfcfc | bellard | +/*
|
| 652 | e80cfcfc | bellard | + */
|
| 653 | e80cfcfc | bellard | +void udelay(unsigned long usecs)
|
| 654 | e80cfcfc | bellard | +{
|
| 655 | e80cfcfc | bellard | + int i, n;
|
| 656 | e80cfcfc | bellard | + n = usecs*50;
|
| 657 | e80cfcfc | bellard | + for (i = 0; i < n; i++) { }
|
| 658 | e80cfcfc | bellard | +}
|
| 659 | e80cfcfc | bellard | +
|
| 660 | e80cfcfc | bellard | +static void init_idprom()
|
| 661 | e80cfcfc | bellard | +{
|
| 662 | e80cfcfc | bellard | + char *va_prom;
|
| 663 | e80cfcfc | bellard | +
|
| 664 | e80cfcfc | bellard | + if ((va_prom = map_io(PHYS_JJ_EEPROM, PHYS_JJ_EEPROM_SIZE)) == NULL) {
|
| 665 | e80cfcfc | bellard | + printk("init_idprom: cannot map eeprom\n");
|
| 666 | e80cfcfc | bellard | + fatal();
|
| 667 | e80cfcfc | bellard | + }
|
| 668 | e80cfcfc | bellard | + bcopy(va_prom + PHYS_JJ_IDPROM_OFF, idprom, IDPROM_SIZE);
|
| 669 | e80cfcfc | bellard | + /*
|
| 670 | e80cfcfc | bellard | + * hw_idprom is not used anywhere.
|
| 671 | e80cfcfc | bellard | + * It's just as we hate to leave hanging pointers (I/O page here).
|
| 672 | e80cfcfc | bellard | + */
|
| 673 | e80cfcfc | bellard | + hw_idprom = va_prom;
|
| 674 | e80cfcfc | bellard | +}
|
| 675 | e80cfcfc | bellard | +
|
| 676 | e80cfcfc | bellard | +/*
|
| 677 | e80cfcfc | bellard | + * Make CPU page tables.
|
| 678 | e80cfcfc | bellard | + * Returns pointer to context table.
|
| 679 | e80cfcfc | bellard | + * Here we ignore memory allocation errors which "should not happen"
|
| 680 | e80cfcfc | bellard | + * because we cannot print anything anyways if memory initialization fails.
|
| 681 | e80cfcfc | bellard | + */
|
| 682 | e80cfcfc | bellard | +void makepages_q(struct phym *t, unsigned int highbase)
|
| 683 | e80cfcfc | bellard | +{
|
| 684 | e80cfcfc | bellard | + unsigned int *ctp, *l1, pte;
|
| 685 | e80cfcfc | bellard | + int i;
|
| 686 | e80cfcfc | bellard | + unsigned int pa, va;
|
| 687 | e80cfcfc | bellard | +
|
| 688 | e80cfcfc | bellard | + ctp = mem_zalloc(&cmem, NCTX_SWIFT*sizeof(int), NCTX_SWIFT*sizeof(int));
|
| 689 | e80cfcfc | bellard | + l1 = mem_zalloc(&cmem, 256*sizeof(int), 256*sizeof(int));
|
| 690 | e80cfcfc | bellard | +
|
| 691 | e80cfcfc | bellard | + pte = SRMMU_ET_PTD | (((unsigned int)l1 - PROLBASE + highbase) >> 4);
|
| 692 | e80cfcfc | bellard | + for (i = 0; i < NCTX_SWIFT; i++) {
|
| 693 | e80cfcfc | bellard | + ctp[i] = pte;
|
| 694 | e80cfcfc | bellard | + }
|
| 695 | e80cfcfc | bellard | +
|
| 696 | e80cfcfc | bellard | + pa = PROLBASE;
|
| 697 | e80cfcfc | bellard | + for (va = PROLBASE; va < PROLDATA; va += PAGE_SIZE) {
|
| 698 | e80cfcfc | bellard | + map_page(l1, va, pa, 0, highbase);
|
| 699 | e80cfcfc | bellard | + pa += PAGE_SIZE;
|
| 700 | e80cfcfc | bellard | + }
|
| 701 | e80cfcfc | bellard | + pa = highbase + PROLDATA - PROLBASE;
|
| 702 | e80cfcfc | bellard | + for (va = PROLDATA; va < PROLBASE + PROLSIZE; va += PAGE_SIZE) {
|
| 703 | e80cfcfc | bellard | + map_page(l1, va, pa, 0, highbase);
|
| 704 | e80cfcfc | bellard | + pa += PAGE_SIZE;
|
| 705 | e80cfcfc | bellard | + }
|
| 706 | e80cfcfc | bellard | +
|
| 707 | e80cfcfc | bellard | + /* We need to start from LOADBASE, but kernel wants PAGE_SIZE. */
|
| 708 | e80cfcfc | bellard | + pa = 0;
|
| 709 | e80cfcfc | bellard | + for (va = 0; va < LOWMEMSZ; va += PAGE_SIZE) {
|
| 710 | e80cfcfc | bellard | + map_page(l1, va, pa, 0, highbase);
|
| 711 | e80cfcfc | bellard | + pa += PAGE_SIZE;
|
| 712 | e80cfcfc | bellard | + }
|
| 713 | e80cfcfc | bellard | +
|
| 714 | e80cfcfc | bellard | + t->pctp = ctp;
|
| 715 | e80cfcfc | bellard | + t->pl1 = l1;
|
| 716 | e80cfcfc | bellard | + t->pbas = highbase;
|
| 717 | e80cfcfc | bellard | +}
|
| 718 | e80cfcfc | bellard | diff -ruN proll_18.orig/qemu/Makefile proll-patch4/qemu/Makefile
|
| 719 | e80cfcfc | bellard | --- proll_18.orig/qemu/Makefile 1970-01-01 00:00:00.000000000 +0000
|
| 720 | e80cfcfc | bellard | +++ proll-patch4/qemu/Makefile 2004-11-13 15:50:49.000000000 +0000
|
| 721 | e80cfcfc | bellard | @@ -0,0 +1,119 @@
|
| 722 | e80cfcfc | bellard | +#
|
| 723 | e80cfcfc | bellard | +# proll:
|
| 724 | e80cfcfc | bellard | +# qemu/Makefile - make PROLL for QEMU
|
| 725 | e80cfcfc | bellard | +# $Id: proll.patch,v 1.2 2004-12-19 23:18:01 bellard Exp $
|
| 726 | e80cfcfc | bellard | +#
|
| 727 | e80cfcfc | bellard | +# Copyright 1999 Pete Zaitcev
|
| 728 | e80cfcfc | bellard | +# This is Free Software is licensed under terms of GNU General Public License.
|
| 729 | e80cfcfc | bellard | +#
|
| 730 | e80cfcfc | bellard | +
|
| 731 | e80cfcfc | bellard | +CC = gcc
|
| 732 | e80cfcfc | bellard | +
|
| 733 | e80cfcfc | bellard | +#CROSS = /usr/local/sparc/bin/sparc-sun-linux-
|
| 734 | e80cfcfc | bellard | +CROSS = sparc-unknown-linux-gnu-
|
| 735 | e80cfcfc | bellard | +
|
| 736 | e80cfcfc | bellard | +CROSSCC = $(CROSS)gcc
|
| 737 | e80cfcfc | bellard | +CROSSLD = $(CROSS)ld
|
| 738 | e80cfcfc | bellard | +CROSSNM = $(CROSS)nm
|
| 739 | e80cfcfc | bellard | +
|
| 740 | e80cfcfc | bellard | +RM = /bin/rm -f
|
| 741 | e80cfcfc | bellard | +ELFTOAOUT = elftoaout
|
| 742 | e80cfcfc | bellard | +
|
| 743 | e80cfcfc | bellard | +#
|
| 744 | e80cfcfc | bellard | +SRC = ../src
|
| 745 | e80cfcfc | bellard | +
|
| 746 | e80cfcfc | bellard | +# Due to remapping algorithm PROLBASE should be algned on PMD.
|
| 747 | e80cfcfc | bellard | +# We make PROLBASE a define instead of using _start because we
|
| 748 | e80cfcfc | bellard | +# want to shift it to form a PGD entry. A relocatable label will not work.
|
| 749 | e80cfcfc | bellard | +# Linux kernel expects us to be at LINUX_OPPROM_BEGVM <asm-sparc/openprom.h>.
|
| 750 | e80cfcfc | bellard | +PROLBASE = 0xffd00000
|
| 751 | e80cfcfc | bellard | +PROLRODATA = 0xffd07000
|
| 752 | e80cfcfc | bellard | +PROLDATA = 0xffd09000
|
| 753 | e80cfcfc | bellard | +PROLSIZE = (240*1024)
|
| 754 | e80cfcfc | bellard | +
|
| 755 | e80cfcfc | bellard | +# Linux
|
| 756 | e80cfcfc | bellard | +# Fixed %g6 is for arch/sparc/kernel/head.S, it seems ok w/o -ffixed-g6.
|
| 757 | e80cfcfc | bellard | +# Kernel uses -fcall-used-g5 -fcall-used-g7, we probably do not need them.
|
| 758 | e80cfcfc | bellard | +# __ANSI__ is supposed to be on by default but it is not.
|
| 759 | e80cfcfc | bellard | +CFLAGS = -O2 -Wall -DPROLBASE=$(PROLBASE) -DPROLDATA=$(PROLDATA) -DPROLRODATA=$(PROLRODATA) -D__ANSI__=1 -I$(SRC) -mcpu=hypersparc -g
|
| 760 | e80cfcfc | bellard | +ASFLAGS = -D__ASSEMBLY__ -I$(SRC) -DPROLRODATA=$(PROLRODATA) -DPROLDATA=$(PROLDATA) -DPROLSIZE=$(PROLSIZE) -g
|
| 761 | e80cfcfc | bellard | +# Solaris or Linux/i386 cross compilation
|
| 762 | e80cfcfc | bellard | +#CFLAGS = -Iinclude -O
|
| 763 | e80cfcfc | bellard | +
|
| 764 | e80cfcfc | bellard | +LDFLAGS = -N -Ttext $(PROLBASE) --section-start .rodata=$(PROLRODATA) -Tdata $(PROLDATA) -Tbss $(PROLDATA)
|
| 765 | e80cfcfc | bellard | +
|
| 766 | e80cfcfc | bellard | +ALL = proll.aout
|
| 767 | e80cfcfc | bellard | +PROLLEXE = proll.elf
|
| 768 | e80cfcfc | bellard | +
|
| 769 | e80cfcfc | bellard | +OBJS = head.o wuf.o wof.o main.o vconsole.o hconsole.o rconsole.o \
|
| 770 | e80cfcfc | bellard | + printf.o le.o system.o iommu.o \
|
| 771 | e80cfcfc | bellard | + arp.o netinit.o bootp.o packet.o tftp.o udp.o sched_4m.o openprom.o
|
| 772 | e80cfcfc | bellard | +
|
| 773 | e80cfcfc | bellard | +all: $(ALL)
|
| 774 | e80cfcfc | bellard | +
|
| 775 | e80cfcfc | bellard | +$(PROLLEXE): $(OBJS)
|
| 776 | e80cfcfc | bellard | + $(CROSSLD) $(LDFLAGS) -o $(PROLLEXE) $(OBJS)
|
| 777 | e80cfcfc | bellard | +
|
| 778 | e80cfcfc | bellard | +head.o: head.S $(SRC)/phys_jj.h \
|
| 779 | e80cfcfc | bellard | + $(SRC)/asi.h $(SRC)/psr.h $(SRC)/crs.h
|
| 780 | e80cfcfc | bellard | + $(CROSSCC) $(ASFLAGS) -DPROLBASE=$(PROLBASE) -o $*.o -c $*.S
|
| 781 | e80cfcfc | bellard | +
|
| 782 | e80cfcfc | bellard | +main.o: main.c $(SRC)/asi.h $(SRC)/pgtsrmmu.h $(SRC)/iommu.h \
|
| 783 | e80cfcfc | bellard | + $(SRC)/phys_jj.h $(SRC)/vconsole.h $(SRC)/version.h $(SRC)/general.h \
|
| 784 | e80cfcfc | bellard | + $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h $(SRC)/arpa.h $(SRC)/system.h
|
| 785 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $*.c
|
| 786 | e80cfcfc | bellard | +openprom.o: openprom.c $(SRC)/openprom.h $(SRC)/general.h $(SRC)/romlib.h \
|
| 787 | e80cfcfc | bellard | + $(SRC)/vconsole.h $(SRC)/system.h $(SRC)/phys_jj.h
|
| 788 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $*.c
|
| 789 | e80cfcfc | bellard | +
|
| 790 | e80cfcfc | bellard | +system.o: $(SRC)/system.c $(SRC)/vconsole.h $(SRC)/pgtsrmmu.h \
|
| 791 | e80cfcfc | bellard | + $(SRC)/timer.h $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/asi.h \
|
| 792 | e80cfcfc | bellard | + $(SRC)/netpriv.h $(SRC)/arpa.h $(SRC)/system.h $(SRC)/crs.h
|
| 793 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 794 | e80cfcfc | bellard | +iommu.o: $(SRC)/iommu.c $(SRC)/pgtsrmmu.h $(SRC)/phys_jj.h $(SRC)/iommu.h \
|
| 795 | e80cfcfc | bellard | + $(SRC)/vconsole.h $(SRC)/general.h $(SRC)/romlib.h $(SRC)/system.h $(SRC)/asi.h
|
| 796 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 797 | e80cfcfc | bellard | +vconsole.o: $(SRC)/vconsole.c $(SRC)/vconsole.h $(SRC)/hconsole.h
|
| 798 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 799 | e80cfcfc | bellard | +hconsole.o: $(SRC)/hconsole.c $(SRC)/hconsole.h $(SRC)/rconsole.h $(SRC)/phys_jj.h
|
| 800 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 801 | e80cfcfc | bellard | +rconsole.o: $(SRC)/rconsole.c $(SRC)/rconsole.h
|
| 802 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 803 | e80cfcfc | bellard | +printf.o: $(SRC)/printf.c
|
| 804 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 805 | e80cfcfc | bellard | +le.o: $(SRC)/le.c $(SRC)/dma.h $(SRC)/system.h $(SRC)/netpriv.h $(SRC)/romlib.h $(SRC)/general.h $(SRC)/net.h $(SRC)/phys_jj.h
|
| 806 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 807 | e80cfcfc | bellard | +
|
| 808 | e80cfcfc | bellard | +arp.o: $(SRC)/arp.c $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h $(SRC)/arp.h
|
| 809 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 810 | e80cfcfc | bellard | +netinit.o: $(SRC)/netinit.c $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h $(SRC)/arp.h $(SRC)/ip.h $(SRC)/udp.h
|
| 811 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 812 | e80cfcfc | bellard | +tftp.o: $(SRC)/tftp.c $(SRC)/general.h $(SRC)/net.h $(SRC)/arpa.h $(SRC)/romlib.h $(SRC)/tftp.h
|
| 813 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 814 | e80cfcfc | bellard | +udp.o: $(SRC)/udp.c $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h $(SRC)/arp.h $(SRC)/ip.h $(SRC)/udp.h
|
| 815 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 816 | e80cfcfc | bellard | +packet.o: $(SRC)/packet.c $(SRC)/general.h $(SRC)/net.h $(SRC)/romlib.h $(SRC)/netpriv.h
|
| 817 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 818 | e80cfcfc | bellard | +sched_4m.o: $(SRC)/sched_4m.c $(SRC)/system.h $(SRC)/general.h $(SRC)/romlib.h $(SRC)/phys_jj.h
|
| 819 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -c $(SRC)/$*.c
|
| 820 | e80cfcfc | bellard | +bootp.o: $(SRC)/bootp.c $(SRC)/general.h $(SRC)/net.h \
|
| 821 | e80cfcfc | bellard | + $(SRC)/arpa.h $(SRC)/romlib.h $(SRC)/system.h $(SRC)/bootp.h
|
| 822 | e80cfcfc | bellard | + $(CROSSCC) $(CFLAGS) -DNOBPEXT=1 -c $(SRC)/$*.c
|
| 823 | e80cfcfc | bellard | +
|
| 824 | e80cfcfc | bellard | +wuf.o: $(SRC)/wuf.S
|
| 825 | e80cfcfc | bellard | + $(CROSSCC) $(ASFLAGS) -o $*.o -c $(SRC)/$*.S
|
| 826 | e80cfcfc | bellard | +wof.o: $(SRC)/wof.S
|
| 827 | e80cfcfc | bellard | + $(CROSSCC) $(ASFLAGS) -o $*.o -c $(SRC)/$*.S
|
| 828 | e80cfcfc | bellard | +
|
| 829 | e80cfcfc | bellard | +#genlab.o: genlab.c
|
| 830 | e80cfcfc | bellard | +# $(CC) -c $*.c
|
| 831 | e80cfcfc | bellard | +#
|
| 832 | e80cfcfc | bellard | +#genlab: genlab.o
|
| 833 | e80cfcfc | bellard | +# $(CC) -o genlab genlab.o
|
| 834 | e80cfcfc | bellard | +
|
| 835 | e80cfcfc | bellard | +clean:
|
| 836 | e80cfcfc | bellard | + $(RM) $(OBJS)
|
| 837 | e80cfcfc | bellard | + $(RM) $(PROLLEXE) proll.aout
|
| 838 | e80cfcfc | bellard | +
|
| 839 | e80cfcfc | bellard | +proll.aout: $(PROLLEXE)
|
| 840 | e80cfcfc | bellard | + $(ELFTOAOUT) -o proll.aout $(PROLLEXE)
|
| 841 | e80cfcfc | bellard | diff -ruN proll_18.orig/qemu/openprom.c proll-patch4/qemu/openprom.c
|
| 842 | e80cfcfc | bellard | --- proll_18.orig/qemu/openprom.c 1970-01-01 00:00:00.000000000 +0000
|
| 843 | e80cfcfc | bellard | +++ proll-patch4/qemu/openprom.c 2004-11-23 19:14:05.000000000 +0000
|
| 844 | e80cfcfc | bellard | @@ -0,0 +1,596 @@
|
| 845 | e80cfcfc | bellard | +/*
|
| 846 | e80cfcfc | bellard | + * PROM interface support
|
| 847 | e80cfcfc | bellard | + * Copyright 1996 The Australian National University.
|
| 848 | e80cfcfc | bellard | + * Copyright 1996 Fujitsu Laboratories Limited
|
| 849 | e80cfcfc | bellard | + * Copyright 1999 Pete A. Zaitcev
|
| 850 | e80cfcfc | bellard | + * This software may be distributed under the terms of the Gnu
|
| 851 | e80cfcfc | bellard | + * Public License version 2 or later
|
| 852 | e80cfcfc | bellard | + */
|
| 853 | e80cfcfc | bellard | +
|
| 854 | e80cfcfc | bellard | +#include <openprom.h>
|
| 855 | e80cfcfc | bellard | +#include <general.h>
|
| 856 | e80cfcfc | bellard | +#include <romlib.h>
|
| 857 | e80cfcfc | bellard | +#include <system.h>
|
| 858 | e80cfcfc | bellard | +#include <vconsole.h>
|
| 859 | e80cfcfc | bellard | +#include "phys_jj.h"
|
| 860 | e80cfcfc | bellard | +
|
| 861 | e80cfcfc | bellard | +struct property {
|
| 862 | e80cfcfc | bellard | + const char *name;
|
| 863 | e80cfcfc | bellard | + const char *value;
|
| 864 | e80cfcfc | bellard | + const int length;
|
| 865 | e80cfcfc | bellard | +};
|
| 866 | e80cfcfc | bellard | +
|
| 867 | e80cfcfc | bellard | +struct node {
|
| 868 | e80cfcfc | bellard | + const struct property *properties;
|
| 869 | e80cfcfc | bellard | + /* short */ const int sibling;
|
| 870 | e80cfcfc | bellard | + /* short */ const int child;
|
| 871 | e80cfcfc | bellard | +};
|
| 872 | e80cfcfc | bellard | +
|
| 873 | e80cfcfc | bellard | +static int obp_nextnode(int node);
|
| 874 | e80cfcfc | bellard | +static int obp_child(int node);
|
| 875 | e80cfcfc | bellard | +static int obp_proplen(int node, char *name);
|
| 876 | e80cfcfc | bellard | +static int obp_getprop(int node, char *name, char *val);
|
| 877 | e80cfcfc | bellard | +static int obp_setprop(int node, char *name, char *val, int len);
|
| 878 | e80cfcfc | bellard | +static const char *obp_nextprop(int node, char *name);
|
| 879 | e80cfcfc | bellard | +
|
| 880 | e80cfcfc | bellard | +static char obp_idprom[IDPROM_SIZE];
|
| 881 | e80cfcfc | bellard | +static const struct property null_properties = { NULL, NULL, -1 };
|
| 882 | e80cfcfc | bellard | +static const int prop_true = -1;
|
| 883 | e80cfcfc | bellard | +
|
| 884 | e80cfcfc | bellard | +static const struct property propv_root[] = {
|
| 885 | e80cfcfc | bellard | + {"name", "SUNW,JavaStation-1", sizeof("SUNW,JavaStation-1") },
|
| 886 | e80cfcfc | bellard | + {"idprom", obp_idprom, IDPROM_SIZE},
|
| 887 | e80cfcfc | bellard | + {"banner-name", "JavaStation", sizeof("JavaStation")},
|
| 888 | e80cfcfc | bellard | + {"compatible", "sun4m", 6},
|
| 889 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 890 | e80cfcfc | bellard | +};
|
| 891 | e80cfcfc | bellard | +
|
| 892 | e80cfcfc | bellard | +static const int prop_iommu_reg[] = {
|
| 893 | e80cfcfc | bellard | + 0x0, 0x10000000, 0x00000300,
|
| 894 | e80cfcfc | bellard | +};
|
| 895 | e80cfcfc | bellard | +static const struct property propv_iommu[] = {
|
| 896 | e80cfcfc | bellard | + {"name", "iommu", sizeof("iommu")},
|
| 897 | e80cfcfc | bellard | + {"reg", (char*)&prop_iommu_reg[0], sizeof(prop_iommu_reg) },
|
| 898 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 899 | e80cfcfc | bellard | +};
|
| 900 | e80cfcfc | bellard | +
|
| 901 | e80cfcfc | bellard | +static const int prop_sbus_ranges[] = {
|
| 902 | e80cfcfc | bellard | + 0x0, 0x0, 0x0, 0x30000000, 0x10000000,
|
| 903 | e80cfcfc | bellard | + 0x1, 0x0, 0x0, 0x40000000, 0x10000000,
|
| 904 | e80cfcfc | bellard | + 0x2, 0x0, 0x0, 0x50000000, 0x10000000,
|
| 905 | e80cfcfc | bellard | + 0x3, 0x0, 0x0, 0x60000000, 0x10000000,
|
| 906 | e80cfcfc | bellard | + 0x4, 0x0, 0x0, 0x70000000, 0x10000000,
|
| 907 | e80cfcfc | bellard | +};
|
| 908 | e80cfcfc | bellard | +static const struct property propv_sbus[] = {
|
| 909 | e80cfcfc | bellard | + {"name", "sbus", 5},
|
| 910 | e80cfcfc | bellard | + {"ranges", (char*)&prop_sbus_ranges[0], sizeof(prop_sbus_ranges)},
|
| 911 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 912 | e80cfcfc | bellard | +};
|
| 913 | e80cfcfc | bellard | +
|
| 914 | e80cfcfc | bellard | +static const int prop_tcx_regs[] = {
|
| 915 | e80cfcfc | bellard | + 0x2, 0x00800000, 0x00100000,
|
| 916 | e80cfcfc | bellard | + 0x2, 0x02000000, 0x00000001,
|
| 917 | e80cfcfc | bellard | + 0x2, 0x04000000, 0x00800000,
|
| 918 | e80cfcfc | bellard | + 0x2, 0x06000000, 0x00800000,
|
| 919 | e80cfcfc | bellard | + 0x2, 0x0a000000, 0x00000001,
|
| 920 | e80cfcfc | bellard | + 0x2, 0x0c000000, 0x00000001,
|
| 921 | e80cfcfc | bellard | + 0x2, 0x0e000000, 0x00000001,
|
| 922 | e80cfcfc | bellard | + 0x2, 0x00700000, 0x00001000,
|
| 923 | e80cfcfc | bellard | + 0x2, 0x00200000, 0x00000004,
|
| 924 | e80cfcfc | bellard | + 0x2, 0x00300000, 0x0000081c,
|
| 925 | e80cfcfc | bellard | + 0x2, 0x00000000, 0x00010000,
|
| 926 | e80cfcfc | bellard | + 0x2, 0x00240000, 0x00000004,
|
| 927 | e80cfcfc | bellard | + 0x2, 0x00280000, 0x00000001,
|
| 928 | e80cfcfc | bellard | +};
|
| 929 | e80cfcfc | bellard | +
|
| 930 | e80cfcfc | bellard | +#if 1 /* Zaitcev */
|
| 931 | e80cfcfc | bellard | +static const int pixfreq = 0x03dfd240;
|
| 932 | e80cfcfc | bellard | +static const int hbporch = 0xa0;
|
| 933 | e80cfcfc | bellard | +static const int vfreq = 0x3c;
|
| 934 | e80cfcfc | bellard | +#endif
|
| 935 | e80cfcfc | bellard | +#if 0 /* Kevin Boone - 70Hz refresh */
|
| 936 | e80cfcfc | bellard | +static const int pixfreq = 0x047868C0;
|
| 937 | e80cfcfc | bellard | +static const int hbporch = 0x90;
|
| 938 | e80cfcfc | bellard | +static const int vfreq = 0x46;
|
| 939 | e80cfcfc | bellard | +#endif
|
| 940 | e80cfcfc | bellard | +
|
| 941 | e80cfcfc | bellard | +static const int vbporch = 0x1d;
|
| 942 | e80cfcfc | bellard | +static const int vsync = 0x6;
|
| 943 | e80cfcfc | bellard | +static const int hsync = 0x88;
|
| 944 | e80cfcfc | bellard | +static const int vfporch = 0x3;
|
| 945 | e80cfcfc | bellard | +static const int hfporch = 0x18;
|
| 946 | e80cfcfc | bellard | +static const int height = 0x300;
|
| 947 | e80cfcfc | bellard | +static const int width = 0x400;
|
| 948 | e80cfcfc | bellard | +static const int linebytes = 0x400;
|
| 949 | e80cfcfc | bellard | +static const int depth = 8;
|
| 950 | e80cfcfc | bellard | +static const int tcx_intr[] = { 5, 0 };
|
| 951 | e80cfcfc | bellard | +static const int tcx_interrupts = 5;
|
| 952 | e80cfcfc | bellard | +static const struct property propv_sbus_tcx[] = {
|
| 953 | e80cfcfc | bellard | + {"name", "SUNW,tcx", sizeof("SUNW,tcx")},
|
| 954 | e80cfcfc | bellard | + {"vbporch", (char*)&vbporch, sizeof(int)},
|
| 955 | e80cfcfc | bellard | + {"hbporch", (char*)&hbporch, sizeof(int)},
|
| 956 | e80cfcfc | bellard | + {"vsync", (char*)&vsync, sizeof(int)},
|
| 957 | e80cfcfc | bellard | + {"hsync", (char*)&hsync, sizeof(int)},
|
| 958 | e80cfcfc | bellard | + {"vfporch", (char*)&vfporch, sizeof(int)},
|
| 959 | e80cfcfc | bellard | + {"hfporch", (char*)&hfporch, sizeof(int)},
|
| 960 | e80cfcfc | bellard | + {"pixfreq", (char*)&pixfreq, sizeof(int)},
|
| 961 | e80cfcfc | bellard | + {"vfreq", (char*)&vfreq, sizeof(int)},
|
| 962 | e80cfcfc | bellard | + {"height", (char*)&height, sizeof(int)},
|
| 963 | e80cfcfc | bellard | + {"width", (char*)&width, sizeof(int)},
|
| 964 | e80cfcfc | bellard | + {"linebytes", (char*)&linebytes, sizeof(int)},
|
| 965 | e80cfcfc | bellard | + {"depth", (char*)&depth, sizeof(int)},
|
| 966 | e80cfcfc | bellard | + {"reg", (char*)&prop_tcx_regs[0], sizeof(prop_tcx_regs)},
|
| 967 | e80cfcfc | bellard | + {"tcx-8-bit", (char*)&prop_true, 0},
|
| 968 | e80cfcfc | bellard | + {"intr", (char*)&tcx_intr[0], sizeof(tcx_intr)},
|
| 969 | e80cfcfc | bellard | + {"interrupts", (char*)&tcx_interrupts, sizeof(tcx_interrupts)},
|
| 970 | e80cfcfc | bellard | + {"device_type", "display", sizeof("display")},
|
| 971 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 972 | e80cfcfc | bellard | +};
|
| 973 | e80cfcfc | bellard | +
|
| 974 | e80cfcfc | bellard | +static const int prop_cs4231_reg[] = {
|
| 975 | e80cfcfc | bellard | + 0x3, 0x0C000000, 0x00000040
|
| 976 | e80cfcfc | bellard | +};
|
| 977 | e80cfcfc | bellard | +static const int cs4231_interrupts = 5;
|
| 978 | e80cfcfc | bellard | +static const int cs4231_intr[] = { 5, 0 };
|
| 979 | e80cfcfc | bellard | +
|
| 980 | e80cfcfc | bellard | +static const struct property propv_sbus_cs4231[] = {
|
| 981 | e80cfcfc | bellard | + {"name", "SUNW,CS4231", sizeof("SUNW,CS4231") },
|
| 982 | e80cfcfc | bellard | + {"intr", (char*)&cs4231_intr[0], sizeof(cs4231_intr) },
|
| 983 | e80cfcfc | bellard | + {"interrupts", (char*)&cs4231_interrupts, sizeof(cs4231_interrupts) },
|
| 984 | e80cfcfc | bellard | + {"reg", (char*)&prop_cs4231_reg[0], sizeof(prop_cs4231_reg) },
|
| 985 | e80cfcfc | bellard | + {"device_type", "serial", sizeof("serial") },
|
| 986 | e80cfcfc | bellard | + {"alias", "audio", sizeof("audio") },
|
| 987 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 988 | e80cfcfc | bellard | +};
|
| 989 | e80cfcfc | bellard | +
|
| 990 | e80cfcfc | bellard | +static const int cpu_nctx = NCTX_SWIFT;
|
| 991 | e80cfcfc | bellard | +static const int cpu_cache_line_size = 0x20;
|
| 992 | e80cfcfc | bellard | +static const int cpu_cache_nlines = 0x200;
|
| 993 | e80cfcfc | bellard | +static const struct property propv_cpu[] = {
|
| 994 | e80cfcfc | bellard | + {"name", "STP1012PGA", sizeof("STP1012PGA") },
|
| 995 | e80cfcfc | bellard | + {"device_type", "cpu", 4 },
|
| 996 | e80cfcfc | bellard | + {"mmu-nctx", (char*)&cpu_nctx, sizeof(int)},
|
| 997 | e80cfcfc | bellard | + {"cache-line-size", (char*)&cpu_cache_line_size, sizeof(int)},
|
| 998 | e80cfcfc | bellard | + {"cache-nlines", (char*)&cpu_cache_nlines, sizeof(int)},
|
| 999 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1000 | e80cfcfc | bellard | +};
|
| 1001 | e80cfcfc | bellard | +
|
| 1002 | e80cfcfc | bellard | +static const int prop_obio_ranges[] = {
|
| 1003 | e80cfcfc | bellard | + 0x0, 0x0, 0x0, 0x71000000, 0x01000000,
|
| 1004 | e80cfcfc | bellard | +};
|
| 1005 | e80cfcfc | bellard | +static const struct property propv_obio[] = {
|
| 1006 | e80cfcfc | bellard | + {"name", "obio", 5 },
|
| 1007 | e80cfcfc | bellard | + {"ranges", (char*)&prop_obio_ranges[0], sizeof(prop_obio_ranges) },
|
| 1008 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1009 | e80cfcfc | bellard | +};
|
| 1010 | e80cfcfc | bellard | +
|
| 1011 | e80cfcfc | bellard | +static const int prop_auxio_reg[] = {
|
| 1012 | e80cfcfc | bellard | + 0x0, 0x00900000, 0x00000001,
|
| 1013 | e80cfcfc | bellard | +};
|
| 1014 | e80cfcfc | bellard | +static const struct property propv_obio_auxio[] = {
|
| 1015 | e80cfcfc | bellard | + {"name", "auxio", sizeof("auxio") },
|
| 1016 | e80cfcfc | bellard | + {"reg", (char*)&prop_auxio_reg[0], sizeof(prop_auxio_reg) },
|
| 1017 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1018 | e80cfcfc | bellard | +};
|
| 1019 | e80cfcfc | bellard | +
|
| 1020 | e80cfcfc | bellard | +static const int prop_int_reg[] = {
|
| 1021 | e80cfcfc | bellard | + 0x0, 0x00e00000, 0x00000010,
|
| 1022 | e80cfcfc | bellard | + 0x0, 0x00e10000, 0x00000010,
|
| 1023 | e80cfcfc | bellard | +};
|
| 1024 | e80cfcfc | bellard | +static const struct property propv_obio_int[] = {
|
| 1025 | e80cfcfc | bellard | + {"name", "interrupt", sizeof("interrupt")},
|
| 1026 | e80cfcfc | bellard | + {"reg", (char*)&prop_int_reg[0], sizeof(prop_int_reg) },
|
| 1027 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1028 | e80cfcfc | bellard | +};
|
| 1029 | e80cfcfc | bellard | +
|
| 1030 | e80cfcfc | bellard | +static const int prop_cnt_reg[] = {
|
| 1031 | e80cfcfc | bellard | + 0x0, 0x00d00000, 0x00000010,
|
| 1032 | e80cfcfc | bellard | + 0x0, 0x00d10000, 0x00000010,
|
| 1033 | e80cfcfc | bellard | +};
|
| 1034 | e80cfcfc | bellard | +static const struct property propv_obio_cnt[] = {
|
| 1035 | e80cfcfc | bellard | + {"name", "counter", sizeof("counter")},
|
| 1036 | e80cfcfc | bellard | + {"reg", (char*)&prop_cnt_reg[0], sizeof(prop_cnt_reg) },
|
| 1037 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1038 | e80cfcfc | bellard | +};
|
| 1039 | e80cfcfc | bellard | +
|
| 1040 | e80cfcfc | bellard | +static const int prop_eeprom_reg[] = {
|
| 1041 | e80cfcfc | bellard | + 0x0, 0x00200000, 0x00002000,
|
| 1042 | e80cfcfc | bellard | +};
|
| 1043 | e80cfcfc | bellard | +static const struct property propv_obio_eep[] = {
|
| 1044 | e80cfcfc | bellard | + {"name", "eeprom", sizeof("eeprom")},
|
| 1045 | e80cfcfc | bellard | + {"reg", (char*)&prop_eeprom_reg[0], sizeof(prop_eeprom_reg) },
|
| 1046 | e80cfcfc | bellard | + {"model", "mk48t08", sizeof("mk48t08")},
|
| 1047 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1048 | e80cfcfc | bellard | +};
|
| 1049 | e80cfcfc | bellard | +
|
| 1050 | e80cfcfc | bellard | +static const int prop_su_reg[] = {
|
| 1051 | e80cfcfc | bellard | + 0x0, 0x003002f8, 0x00000008,
|
| 1052 | e80cfcfc | bellard | +};
|
| 1053 | e80cfcfc | bellard | +static const struct property propv_obio_su[] = {
|
| 1054 | e80cfcfc | bellard | + {"name", "su", sizeof("su")},
|
| 1055 | e80cfcfc | bellard | + {"reg", (char*)&prop_su_reg[0], sizeof(prop_su_reg) },
|
| 1056 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1057 | e80cfcfc | bellard | +};
|
| 1058 | e80cfcfc | bellard | +
|
| 1059 | e80cfcfc | bellard | +static const int prop_zs_intr[] = { 0x26, 0x0 };
|
| 1060 | e80cfcfc | bellard | +static const int prop_zs_reg[] = {
|
| 1061 | e80cfcfc | bellard | + 0x4, 0x00000000, 0x0000000f,
|
| 1062 | e80cfcfc | bellard | +};
|
| 1063 | e80cfcfc | bellard | +static const int prop_zs_slave[] = { 0x1 };
|
| 1064 | e80cfcfc | bellard | +static const struct property propv_obio_zs[] = {
|
| 1065 | e80cfcfc | bellard | + {"name", "zs", sizeof("zs")},
|
| 1066 | e80cfcfc | bellard | + {"reg", (char*)&prop_zs_reg[0], sizeof(prop_zs_reg) },
|
| 1067 | e80cfcfc | bellard | + {"reg", (char*)&prop_zs_slave[0], sizeof(prop_zs_slave) },
|
| 1068 | e80cfcfc | bellard | + {"device_type", "serial", sizeof("serial") },
|
| 1069 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1070 | e80cfcfc | bellard | +};
|
| 1071 | e80cfcfc | bellard | +
|
| 1072 | e80cfcfc | bellard | +static const int prop_zs1_intr[] = { 0x26, 0x0 };
|
| 1073 | e80cfcfc | bellard | +static const int prop_zs1_reg[] = {
|
| 1074 | e80cfcfc | bellard | + 0x4, 0x00100000, 0x0000000f,
|
| 1075 | e80cfcfc | bellard | +};
|
| 1076 | e80cfcfc | bellard | +static const int prop_zs1_slave[] = { 0x0 };
|
| 1077 | e80cfcfc | bellard | +static const struct property propv_obio_zs1[] = {
|
| 1078 | e80cfcfc | bellard | + {"name", "zs", sizeof("zs")},
|
| 1079 | e80cfcfc | bellard | + {"reg", (char*)&prop_zs1_reg[0], sizeof(prop_zs1_reg) },
|
| 1080 | e80cfcfc | bellard | + {"reg", (char*)&prop_zs1_slave[0], sizeof(prop_zs1_slave) },
|
| 1081 | e80cfcfc | bellard | + {"device_type", "serial", sizeof("serial") },
|
| 1082 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1083 | e80cfcfc | bellard | +};
|
| 1084 | e80cfcfc | bellard | +
|
| 1085 | e80cfcfc | bellard | +static const int prop_ledma_reg[] = {
|
| 1086 | e80cfcfc | bellard | + 0x4, 0x08400010, 0x00000020,
|
| 1087 | e80cfcfc | bellard | +};
|
| 1088 | e80cfcfc | bellard | +static const int prop_ledma_burst = 0x3f;
|
| 1089 | e80cfcfc | bellard | +static const struct property propv_sbus_ledma[] = {
|
| 1090 | e80cfcfc | bellard | + {"name", "ledma", sizeof("ledma")},
|
| 1091 | e80cfcfc | bellard | + {"reg", (char*)&prop_ledma_reg[0], sizeof(prop_ledma_reg) },
|
| 1092 | e80cfcfc | bellard | + {"burst-sizes", (char*)&prop_ledma_burst, sizeof(int) },
|
| 1093 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1094 | e80cfcfc | bellard | +};
|
| 1095 | e80cfcfc | bellard | +
|
| 1096 | e80cfcfc | bellard | +static const int prop_le_reg[] = {
|
| 1097 | e80cfcfc | bellard | + 0x4, 0x08c00000, 0x00000004,
|
| 1098 | e80cfcfc | bellard | +};
|
| 1099 | e80cfcfc | bellard | +static const int prop_le_busmaster_regval = 0x7;
|
| 1100 | e80cfcfc | bellard | +static const int prop_le_intr[] = { 0x26, 0x0 };
|
| 1101 | e80cfcfc | bellard | +static const struct property propv_sbus_ledma_le[] = {
|
| 1102 | e80cfcfc | bellard | + {"name", "le", sizeof("le")},
|
| 1103 | e80cfcfc | bellard | + {"reg", (char*)&prop_le_reg[0], sizeof(prop_le_reg) },
|
| 1104 | e80cfcfc | bellard | + {"busmaster-regval", (char*)&prop_le_busmaster_regval, sizeof(int)},
|
| 1105 | e80cfcfc | bellard | + {"intr", (char*)&prop_le_intr[0], sizeof(prop_le_intr) },
|
| 1106 | e80cfcfc | bellard | + {NULL, NULL, -1}
|
| 1107 | e80cfcfc | bellard | +};
|
| 1108 | e80cfcfc | bellard | +
|
| 1109 | e80cfcfc | bellard | +static const struct node nodes[] = {
|
| 1110 | e80cfcfc | bellard | + { &null_properties, 1, 0 }, /* 0 = big brother of root */
|
| 1111 | e80cfcfc | bellard | + { propv_root, 0, 2 }, /* 1 "/" */
|
| 1112 | e80cfcfc | bellard | + { propv_iommu, 8, 3 }, /* 2 "/iommu" */
|
| 1113 | e80cfcfc | bellard | + { propv_sbus, 0, 4 }, /* 3 "/iommu/sbus" */
|
| 1114 | e80cfcfc | bellard | + { propv_sbus_tcx, 5, 0 }, /* 4 "/iommu/sbus/SUNW,tcx" */
|
| 1115 | e80cfcfc | bellard | + { propv_sbus_ledma, 7, 6 }, /* 5 "/iommu/sbus/ledma" */
|
| 1116 | e80cfcfc | bellard | + { propv_sbus_ledma_le, 0, 0 }, /* 6 "/iommu/sbus/ledma/le" */
|
| 1117 | e80cfcfc | bellard | + { propv_sbus_cs4231, 0, 0 }, /* 7 "/iommu/sbus/SUNW,CS4231 */
|
| 1118 | e80cfcfc | bellard | + { propv_cpu, 9, 0 }, /* 8 "/STP1012PGA" */
|
| 1119 | e80cfcfc | bellard | + { propv_obio, 0, 10 }, /* 9 "/obio" */
|
| 1120 | e80cfcfc | bellard | + { propv_obio_int, 11, 0 }, /* 10 "/obio/interrupt" */
|
| 1121 | e80cfcfc | bellard | + { propv_obio_cnt, 12, 0 }, /* 11 "/obio/counter" */
|
| 1122 | e80cfcfc | bellard | + { propv_obio_eep, 13, 0 }, /* 12 "/obio/eeprom" */
|
| 1123 | e80cfcfc | bellard | + { propv_obio_su, 14, 0 }, /* 13 "/obio/su" */
|
| 1124 | e80cfcfc | bellard | + { propv_obio_auxio, 0, 0 }, /* 14 "/obio/auxio" */
|
| 1125 | e80cfcfc | bellard | + { propv_obio_zs, 0, 0 }, /* 14 "/obio/zs@0,0" */
|
| 1126 | e80cfcfc | bellard | + { propv_obio_zs1, 0, 0 }, /* 14 "/obio/zs@0,100000" */
|
| 1127 | e80cfcfc | bellard | +};
|
| 1128 | e80cfcfc | bellard | +
|
| 1129 | e80cfcfc | bellard | +static struct linux_mlist_v0 totphys[MAX_BANKS];
|
| 1130 | e80cfcfc | bellard | +static struct linux_mlist_v0 totmap[1];
|
| 1131 | e80cfcfc | bellard | +static struct linux_mlist_v0 totavail[MAX_BANKS];
|
| 1132 | e80cfcfc | bellard | +
|
| 1133 | e80cfcfc | bellard | +static struct linux_mlist_v0 *ptphys;
|
| 1134 | e80cfcfc | bellard | +static struct linux_mlist_v0 *ptmap;
|
| 1135 | e80cfcfc | bellard | +static struct linux_mlist_v0 *ptavail;
|
| 1136 | e80cfcfc | bellard | +
|
| 1137 | e80cfcfc | bellard | +static const struct linux_nodeops nodeops0 = {
|
| 1138 | e80cfcfc | bellard | + obp_nextnode, /* int (*no_nextnode)(int node); */
|
| 1139 | e80cfcfc | bellard | + obp_child, /* int (*no_child)(int node); */
|
| 1140 | e80cfcfc | bellard | + obp_proplen, /* int (*no_proplen)(int node, char *name); */
|
| 1141 | e80cfcfc | bellard | + obp_getprop, /* int (*no_getprop)(int node,char *name,char *val); */
|
| 1142 | e80cfcfc | bellard | + obp_setprop, /* int (*no_setprop)(int node, char *name,
|
| 1143 | e80cfcfc | bellard | + char *val, int len); */
|
| 1144 | e80cfcfc | bellard | + obp_nextprop /* char * (*no_nextprop)(int node, char *name); */
|
| 1145 | e80cfcfc | bellard | +};
|
| 1146 | e80cfcfc | bellard | +
|
| 1147 | e80cfcfc | bellard | +static const char arg_nfsroot[] = "console=ttyS0 ip=bootp root=nfs";
|
| 1148 | e80cfcfc | bellard | +
|
| 1149 | e80cfcfc | bellard | +static const struct linux_arguments_v0 obp_arg = {
|
| 1150 | e80cfcfc | bellard | + { "le()", arg_nfsroot, NULL, NULL, NULL, NULL, NULL, NULL },
|
| 1151 | e80cfcfc | bellard | + { "" },
|
| 1152 | e80cfcfc | bellard | + { 'l', 'e' }, 0, 0, 0, NULL,
|
| 1153 | e80cfcfc | bellard | + NULL
|
| 1154 | e80cfcfc | bellard | +};
|
| 1155 | e80cfcfc | bellard | +static const struct linux_arguments_v0 * const obp_argp = &obp_arg;
|
| 1156 | e80cfcfc | bellard | +
|
| 1157 | e80cfcfc | bellard | +static const void * const synch_hook = NULL;
|
| 1158 | e80cfcfc | bellard | +#if 0
|
| 1159 | e80cfcfc | bellard | +static const char obp_stdin = PROMDEV_KBD;
|
| 1160 | e80cfcfc | bellard | +static const char obp_stdout = PROMDEV_SCREEN;
|
| 1161 | e80cfcfc | bellard | +#else
|
| 1162 | e80cfcfc | bellard | +static const char obp_stdin = PROMDEV_TTYA;
|
| 1163 | e80cfcfc | bellard | +static const char obp_stdout = PROMDEV_TTYA;
|
| 1164 | e80cfcfc | bellard | +#endif
|
| 1165 | e80cfcfc | bellard | +
|
| 1166 | e80cfcfc | bellard | +static int obp_nbgetchar(void);
|
| 1167 | e80cfcfc | bellard | +static int obp_nbputchar(int ch);
|
| 1168 | e80cfcfc | bellard | +static void obp_reboot(char *);
|
| 1169 | e80cfcfc | bellard | +static void obp_abort(void);
|
| 1170 | e80cfcfc | bellard | +static void obp_halt(void);
|
| 1171 | e80cfcfc | bellard | +static int obp_devopen(char *str);
|
| 1172 | e80cfcfc | bellard | +static int obp_devclose(int dev_desc);
|
| 1173 | e80cfcfc | bellard | +static int obp_rdblkdev(int dev_desc, int num_blks, int blk_st, char *buf);
|
| 1174 | e80cfcfc | bellard | +
|
| 1175 | e80cfcfc | bellard | +static void doublewalk(unsigned ptab1, unsigned va)
|
| 1176 | e80cfcfc | bellard | +{
|
| 1177 | e80cfcfc | bellard | +unsigned int proc_tablewalk(int ctx, unsigned int va);
|
| 1178 | e80cfcfc | bellard | +unsigned int mem_tablewalk(unsigned int pa, unsigned int va);
|
| 1179 | e80cfcfc | bellard | +
|
| 1180 | e80cfcfc | bellard | + proc_tablewalk(0, va);
|
| 1181 | e80cfcfc | bellard | + if (ptab1 != 0) mem_tablewalk(ptab1, va);
|
| 1182 | e80cfcfc | bellard | +}
|
| 1183 | e80cfcfc | bellard | +
|
| 1184 | 8d5f07fa | bellard | +#ifdef ORIG
|
| 1185 | e80cfcfc | bellard | +static const struct linux_romvec romvec0 = {
|
| 1186 | e80cfcfc | bellard | + LINUX_OPPROM_MAGIC, /* pv_magic_cookie */
|
| 1187 | e80cfcfc | bellard | + 0, /* pv_romvers - Format selector! */
|
| 1188 | e80cfcfc | bellard | + 77, /* pv_plugin_revision */
|
| 1189 | e80cfcfc | bellard | + 0x10203, /* pv_printrev */
|
| 1190 | e80cfcfc | bellard | + { /* pv_v0mem */
|
| 1191 | e80cfcfc | bellard | + &ptphys, /* v0_totphys */
|
| 1192 | e80cfcfc | bellard | + &ptmap, /* v0_prommap */
|
| 1193 | e80cfcfc | bellard | + &ptavail /* v0_available */
|
| 1194 | e80cfcfc | bellard | + },
|
| 1195 | e80cfcfc | bellard | + &nodeops0, /* struct linux_nodeops *pv_nodeops; */
|
| 1196 | e80cfcfc | bellard | + (void*)doublewalk, /* P3 */ /* char **pv_bootstr; */
|
| 1197 | e80cfcfc | bellard | + { /* struct linux_dev_v0_funcs pv_v0devops; */
|
| 1198 | e80cfcfc | bellard | + &obp_devopen, /* v0_devopen */
|
| 1199 | e80cfcfc | bellard | + &obp_devclose, /* v0_devclose */
|
| 1200 | e80cfcfc | bellard | + &obp_rdblkdev, /* v0_rdblkdev */
|
| 1201 | e80cfcfc | bellard | + NULL, /* v0_wrblkdev */
|
| 1202 | e80cfcfc | bellard | + NULL, /* v0_wrnetdev */
|
| 1203 | e80cfcfc | bellard | + NULL, /* v0_rdnetdev */
|
| 1204 | e80cfcfc | bellard | + NULL, /* v0_rdchardev */
|
| 1205 | e80cfcfc | bellard | + NULL, /* v0_wrchardev */
|
| 1206 | e80cfcfc | bellard | + NULL /* v0_seekdev */
|
| 1207 | e80cfcfc | bellard | + },
|
| 1208 | e80cfcfc | bellard | + &obp_stdin, /* char *pv_stdin */
|
| 1209 | e80cfcfc | bellard | + &obp_stdout, /* char *pv_stdout; */
|
| 1210 | e80cfcfc | bellard | + obp_nbgetchar, /* int (*pv_getchar)(void); */
|
| 1211 | e80cfcfc | bellard | + obp_nbputchar, /* void (*pv_putchar)(int ch); */
|
| 1212 | e80cfcfc | bellard | + obp_nbgetchar, /* int (*pv_nbgetchar)(void); */
|
| 1213 | e80cfcfc | bellard | + obp_nbputchar, /* int (*pv_nbputchar)(int ch); */
|
| 1214 | e80cfcfc | bellard | + NULL, /* void (*pv_putstr)(char *str, int len); */
|
| 1215 | e80cfcfc | bellard | + obp_reboot, /* void (*pv_reboot)(char *bootstr); */
|
| 1216 | e80cfcfc | bellard | + NULL, /* void (*pv_printf)(__const__ char *fmt, ...); */
|
| 1217 | e80cfcfc | bellard | + obp_abort, /* void (*pv_abort)(void); */
|
| 1218 | e80cfcfc | bellard | + NULL, /* __volatile__ int *pv_ticks; */
|
| 1219 | e80cfcfc | bellard | + obp_halt, /* void (*pv_halt)(void); */
|
| 1220 | e80cfcfc | bellard | + (void *)&synch_hook, /* void (**pv_synchook)(void); */
|
| 1221 | e80cfcfc | bellard | +
|
| 1222 | e80cfcfc | bellard | +#if 0
|
| 1223 | e80cfcfc | bellard | + /* Evaluate a forth string, not different proto for V0 and V2->up. */
|
| 1224 | e80cfcfc | bellard | + union {
|
| 1225 | e80cfcfc | bellard | + void (*v0_eval)(int len, char *str);
|
| 1226 | e80cfcfc | bellard | + void (*v2_eval)(char *str);
|
| 1227 | e80cfcfc | bellard | + } pv_fortheval;
|
| 1228 | e80cfcfc | bellard | +#endif
|
| 1229 | e80cfcfc | bellard | + { 0 }, /* pv_fortheval */
|
| 1230 | e80cfcfc | bellard | +
|
| 1231 | e80cfcfc | bellard | + &obp_argp, /* struct linux_arguments_v0 **pv_v0bootargs; */
|
| 1232 | e80cfcfc | bellard | + NULL, /* pv_enaddr */
|
| 1233 | e80cfcfc | bellard | + { /* pv_v2bootargs */
|
| 1234 | e80cfcfc | bellard | + NULL, /* char **bootpath; */
|
| 1235 | e80cfcfc | bellard | + NULL, /* char **bootargs; */
|
| 1236 | e80cfcfc | bellard | + NULL, /* fd_stdin; */
|
| 1237 | e80cfcfc | bellard | + NULL, /* fd_stdout */
|
| 1238 | e80cfcfc | bellard | + },
|
| 1239 | e80cfcfc | bellard | + { /* pv_v2devops */
|
| 1240 | e80cfcfc | bellard | + NULL, /* v2_inst2pkg */
|
| 1241 | e80cfcfc | bellard | + NULL, /* v2_dumb_mem_alloc */
|
| 1242 | e80cfcfc | bellard | + NULL, /* v2_dumb_mem_free */
|
| 1243 | e80cfcfc | bellard | + NULL, /* v2_dumb_mmap */
|
| 1244 | e80cfcfc | bellard | + NULL, /* v2_dumb_munmap */
|
| 1245 | e80cfcfc | bellard | + NULL, /* v2_dev_open */
|
| 1246 | e80cfcfc | bellard | + NULL, /* v2_dev_close */
|
| 1247 | e80cfcfc | bellard | + NULL, /* v2_dev_read */
|
| 1248 | e80cfcfc | bellard | + NULL, /* v2_dev_write */
|
| 1249 | e80cfcfc | bellard | + NULL, /* v2_dev_seek */
|
| 1250 | e80cfcfc | bellard | + NULL, /* v2_wheee2 */
|
| 1251 | e80cfcfc | bellard | + NULL, /* v2_wheee3 */
|
| 1252 | e80cfcfc | bellard | + },
|
| 1253 | e80cfcfc | bellard | + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* filler[15] */
|
| 1254 | e80cfcfc | bellard | + NULL, /* pv_setctxt */
|
| 1255 | e80cfcfc | bellard | + NULL, /* v3_cpustart */
|
| 1256 | e80cfcfc | bellard | + NULL, /* v3_cpustop */
|
| 1257 | e80cfcfc | bellard | + NULL, /* v3_cpuidle */
|
| 1258 | e80cfcfc | bellard | + NULL /* v3_cpuresume */
|
| 1259 | e80cfcfc | bellard | +};
|
| 1260 | e80cfcfc | bellard | +#endif
|
| 1261 | e80cfcfc | bellard | +
|
| 1262 | e80cfcfc | bellard | +static struct linux_romvec romvec0;
|
| 1263 | e80cfcfc | bellard | +
|
| 1264 | e80cfcfc | bellard | +void *
|
| 1265 | e80cfcfc | bellard | +init_openprom(int bankc, struct bank *bankv, unsigned hiphybas)
|
| 1266 | e80cfcfc | bellard | +{
|
| 1267 | e80cfcfc | bellard | + int i;
|
| 1268 | e80cfcfc | bellard | +
|
| 1269 | e80cfcfc | bellard | + /*
|
| 1270 | e80cfcfc | bellard | + * Avoid data segment allocations
|
| 1271 | e80cfcfc | bellard | + */
|
| 1272 | e80cfcfc | bellard | + ptphys = totphys;
|
| 1273 | e80cfcfc | bellard | + ptmap = totmap;
|
| 1274 | e80cfcfc | bellard | + ptavail = totavail;
|
| 1275 | e80cfcfc | bellard | + /*
|
| 1276 | e80cfcfc | bellard | + * Form memory descriptors.
|
| 1277 | e80cfcfc | bellard | + */
|
| 1278 | e80cfcfc | bellard | + for (i = 0; i < bankc; i++) {
|
| 1279 | e80cfcfc | bellard | + totphys[i].theres_more = &totphys[i+1];
|
| 1280 | e80cfcfc | bellard | + totphys[i].start_adr = (char*) bankv[i].start;
|
| 1281 | e80cfcfc | bellard | + totphys[i].num_bytes = bankv[i].length;
|
| 1282 | e80cfcfc | bellard | + }
|
| 1283 | e80cfcfc | bellard | + totphys[i-1].theres_more = 0;
|
| 1284 | e80cfcfc | bellard | +
|
| 1285 | e80cfcfc | bellard | + /*
|
| 1286 | e80cfcfc | bellard | + * XXX Merged in normal PROM when full banks touch.
|
| 1287 | e80cfcfc | bellard | + */
|
| 1288 | e80cfcfc | bellard | + for (i = 0; i < bankc; i++) {
|
| 1289 | e80cfcfc | bellard | + unsigned bankbase = bankv[i].start;
|
| 1290 | e80cfcfc | bellard | + unsigned banksize = bankv[i].length;
|
| 1291 | e80cfcfc | bellard | + if (hiphybas > bankbase &&
|
| 1292 | e80cfcfc | bellard | + hiphybas < bankbase + banksize) {
|
| 1293 | e80cfcfc | bellard | + banksize = hiphybas - bankbase;
|
| 1294 | e80cfcfc | bellard | + }
|
| 1295 | e80cfcfc | bellard | + totavail[i].theres_more = &totavail[i+1];
|
| 1296 | e80cfcfc | bellard | + totavail[i].start_adr = (char*) bankbase;
|
| 1297 | e80cfcfc | bellard | + totavail[i].num_bytes = banksize;
|
| 1298 | e80cfcfc | bellard | + }
|
| 1299 | e80cfcfc | bellard | + totavail[i-1].theres_more = 0;
|
| 1300 | e80cfcfc | bellard | +
|
| 1301 | e80cfcfc | bellard | + totmap[0].theres_more = 0;
|
| 1302 | e80cfcfc | bellard | + totmap[0].start_adr = (char*) PROLBASE;
|
| 1303 | e80cfcfc | bellard | + totmap[0].num_bytes = PROLSIZE;
|
| 1304 | e80cfcfc | bellard | +
|
| 1305 | e80cfcfc | bellard | + /*
|
| 1306 | e80cfcfc | bellard | + * idprom
|
| 1307 | e80cfcfc | bellard | + */
|
| 1308 | e80cfcfc | bellard | + bcopy(idprom, obp_idprom, IDPROM_SIZE);
|
| 1309 | e80cfcfc | bellard | +
|
| 1310 | e80cfcfc | bellard | + // Linux wants a R/W romvec table
|
| 1311 | e80cfcfc | bellard | + romvec0.pv_magic_cookie = LINUX_OPPROM_MAGIC;
|
| 1312 | e80cfcfc | bellard | + romvec0.pv_plugin_revision = 77;
|
| 1313 | e80cfcfc | bellard | + romvec0.pv_printrev = 0x10203;
|
| 1314 | e80cfcfc | bellard | + romvec0.pv_v0mem.v0_totphys = &ptphys;
|
| 1315 | e80cfcfc | bellard | + romvec0.pv_v0mem.v0_prommap = &ptmap;
|
| 1316 | e80cfcfc | bellard | + romvec0.pv_v0mem.v0_available = &ptavail;
|
| 1317 | e80cfcfc | bellard | + romvec0.pv_nodeops = &nodeops0;
|
| 1318 | e80cfcfc | bellard | + romvec0.pv_bootstr = (void *)doublewalk;
|
| 1319 | e80cfcfc | bellard | + romvec0.pv_stdin = &obp_stdin;
|
| 1320 | e80cfcfc | bellard | + romvec0.pv_stdout = &obp_stdout;
|
| 1321 | e80cfcfc | bellard | + romvec0.pv_getchar = obp_nbgetchar;
|
| 1322 | e80cfcfc | bellard | + romvec0.pv_putchar = obp_nbputchar;
|
| 1323 | e80cfcfc | bellard | + romvec0.pv_nbgetchar = obp_nbgetchar;
|
| 1324 | e80cfcfc | bellard | + romvec0.pv_nbputchar = obp_nbputchar;
|
| 1325 | e80cfcfc | bellard | + romvec0.pv_reboot = obp_reboot;
|
| 1326 | e80cfcfc | bellard | + romvec0.pv_abort = obp_abort;
|
| 1327 | e80cfcfc | bellard | + romvec0.pv_halt = obp_halt;
|
| 1328 | e80cfcfc | bellard | + romvec0.pv_synchook = &synch_hook;
|
| 1329 | e80cfcfc | bellard | + romvec0.pv_v0bootargs = &obp_argp;
|
| 1330 | e80cfcfc | bellard | + return &romvec0;
|
| 1331 | e80cfcfc | bellard | +}
|
| 1332 | e80cfcfc | bellard | +
|
| 1333 | e80cfcfc | bellard | +static const struct property *find_property(int node,char *name)
|
| 1334 | e80cfcfc | bellard | +{
|
| 1335 | e80cfcfc | bellard | + const struct property *prop = &nodes[node].properties[0];
|
| 1336 | e80cfcfc | bellard | + while (prop && prop->name) {
|
| 1337 | e80cfcfc | bellard | + if (bcmp(prop->name, name, 128) == 0) return prop;
|
| 1338 | e80cfcfc | bellard | + prop++;
|
| 1339 | e80cfcfc | bellard | + }
|
| 1340 | e80cfcfc | bellard | + return NULL;
|
| 1341 | e80cfcfc | bellard | +}
|
| 1342 | e80cfcfc | bellard | +
|
| 1343 | e80cfcfc | bellard | +static int obp_nextnode(int node)
|
| 1344 | e80cfcfc | bellard | +{
|
| 1345 | e80cfcfc | bellard | + return nodes[node].sibling;
|
| 1346 | e80cfcfc | bellard | +}
|
| 1347 | e80cfcfc | bellard | +
|
| 1348 | e80cfcfc | bellard | +static int obp_child(int node)
|
| 1349 | e80cfcfc | bellard | +{
|
| 1350 | e80cfcfc | bellard | + return nodes[node].child;
|
| 1351 | e80cfcfc | bellard | +}
|
| 1352 | e80cfcfc | bellard | +
|
| 1353 | e80cfcfc | bellard | +static int obp_proplen(int node, char *name)
|
| 1354 | e80cfcfc | bellard | +{
|
| 1355 | e80cfcfc | bellard | + const struct property *prop = find_property(node,name);
|
| 1356 | e80cfcfc | bellard | + if (prop) return prop->length;
|
| 1357 | e80cfcfc | bellard | + return -1;
|
| 1358 | e80cfcfc | bellard | +}
|
| 1359 | e80cfcfc | bellard | +
|
| 1360 | e80cfcfc | bellard | +static int obp_getprop(int node, char *name, char *value)
|
| 1361 | e80cfcfc | bellard | +{
|
| 1362 | e80cfcfc | bellard | + const struct property *prop;
|
| 1363 | e80cfcfc | bellard | +
|
| 1364 | e80cfcfc | bellard | + prop = find_property(node,name);
|
| 1365 | e80cfcfc | bellard | + if (prop) {
|
| 1366 | e80cfcfc | bellard | + memcpy(value,prop->value,prop->length);
|
| 1367 | e80cfcfc | bellard | + //printk("obp_getprop '%s'= %s\n", name, value);
|
| 1368 | e80cfcfc | bellard | + return prop->length;
|
| 1369 | e80cfcfc | bellard | + }
|
| 1370 | e80cfcfc | bellard | + //printk("obp_getprop: not found\n");
|
| 1371 | e80cfcfc | bellard | + return -1;
|
| 1372 | e80cfcfc | bellard | +}
|
| 1373 | e80cfcfc | bellard | +
|
| 1374 | e80cfcfc | bellard | +static int obp_setprop(int node, char *name, char *value, int len)
|
| 1375 | e80cfcfc | bellard | +{
|
| 1376 | e80cfcfc | bellard | + return -1;
|
| 1377 | e80cfcfc | bellard | +}
|
| 1378 | e80cfcfc | bellard | +
|
| 1379 | e80cfcfc | bellard | +static const char *obp_nextprop(int node,char *name)
|
| 1380 | e80cfcfc | bellard | +{
|
| 1381 | e80cfcfc | bellard | + const struct property *prop = find_property(node,name);
|
| 1382 | e80cfcfc | bellard | + if (prop) return prop[1].name;
|
| 1383 | e80cfcfc | bellard | + return NULL;
|
| 1384 | e80cfcfc | bellard | +}
|
| 1385 | e80cfcfc | bellard | +
|
| 1386 | e80cfcfc | bellard | +#if 0
|
| 1387 | e80cfcfc | bellard | +static unsigned char calc_idprom_cksum(struct idprom *idprom)
|
| 1388 | e80cfcfc | bellard | +{
|
| 1389 | e80cfcfc | bellard | + unsigned char cksum, i, *ptr = (unsigned char *)idprom;
|
| 1390 | e80cfcfc | bellard | +
|
| 1391 | e80cfcfc | bellard | + for (i = cksum = 0; i <= 0x0E; i++)
|
| 1392 | e80cfcfc | bellard | + cksum ^= *ptr++;
|
| 1393 | e80cfcfc | bellard | +
|
| 1394 | e80cfcfc | bellard | + return cksum;
|
| 1395 | e80cfcfc | bellard | +}
|
| 1396 | e80cfcfc | bellard | +#endif
|
| 1397 | e80cfcfc | bellard | +
|
| 1398 | e80cfcfc | bellard | +static int obp_nbgetchar(void) {
|
| 1399 | e80cfcfc | bellard | + return -1;
|
| 1400 | e80cfcfc | bellard | +}
|
| 1401 | e80cfcfc | bellard | +
|
| 1402 | e80cfcfc | bellard | +static int obp_nbputchar(int ch) {
|
| 1403 | e80cfcfc | bellard | + extern struct vconterm dp0;
|
| 1404 | e80cfcfc | bellard | + char buf = ch;
|
| 1405 | e80cfcfc | bellard | +
|
| 1406 | e80cfcfc | bellard | + /* We do not use printk() in order to reduce stack depth. */
|
| 1407 | e80cfcfc | bellard | + vcon_write(&dp0, &buf, 1);
|
| 1408 | e80cfcfc | bellard | + return 0;
|
| 1409 | e80cfcfc | bellard | +}
|
| 1410 | e80cfcfc | bellard | +
|
| 1411 | e80cfcfc | bellard | +static void obp_reboot(char *str) {
|
| 1412 | e80cfcfc | bellard | + printk("rebooting (%s): not implemented, freezing\n", str);
|
| 1413 | e80cfcfc | bellard | + for (;;) {}
|
| 1414 | e80cfcfc | bellard | +}
|
| 1415 | e80cfcfc | bellard | +
|
| 1416 | e80cfcfc | bellard | +static void obp_abort() {
|
| 1417 | e80cfcfc | bellard | + printk("abort, freezing\n");
|
| 1418 | e80cfcfc | bellard | + for (;;) {}
|
| 1419 | e80cfcfc | bellard | +}
|
| 1420 | e80cfcfc | bellard | +
|
| 1421 | e80cfcfc | bellard | +static void obp_halt() {
|
| 1422 | e80cfcfc | bellard | + printk("halt, freezing\n");
|
| 1423 | e80cfcfc | bellard | + for (;;) {}
|
| 1424 | e80cfcfc | bellard | +}
|
| 1425 | e80cfcfc | bellard | +
|
| 1426 | e80cfcfc | bellard | +static int obp_devopen(char *str) {
|
| 1427 | e80cfcfc | bellard | + //printk("open %s\n", str);
|
| 1428 | e80cfcfc | bellard | + return 0;
|
| 1429 | e80cfcfc | bellard | +}
|
| 1430 | e80cfcfc | bellard | +
|
| 1431 | e80cfcfc | bellard | +static int obp_devclose(int dev_desc) {
|
| 1432 | e80cfcfc | bellard | + //printk("close %d\n", dev_desc);
|
| 1433 | e80cfcfc | bellard | + return 0;
|
| 1434 | e80cfcfc | bellard | +}
|
| 1435 | e80cfcfc | bellard | +
|
| 1436 | e80cfcfc | bellard | +static int obp_rdblkdev(int dev_desc, int num_blks, int blk_st, char *buf) {
|
| 1437 | e80cfcfc | bellard | + //printk("rdblkdev: fd %d, num_blks %d, blk_st %d, buf 0x%x\n", dev_desc, num_blks, blk_st, buf);
|
| 1438 | e80cfcfc | bellard | + //buf[8] = 'L';
|
| 1439 | e80cfcfc | bellard | + return num_blks;
|
| 1440 | e80cfcfc | bellard | +}
|
| 1441 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/arp.c proll-patch4/src/arp.c
|
| 1442 | e80cfcfc | bellard | --- proll_18.orig/src/arp.c 2001-12-24 05:12:31.000000000 +0000
|
| 1443 | e80cfcfc | bellard | +++ proll-patch4/src/arp.c 2004-11-13 15:50:49.000000000 +0000
|
| 1444 | e80cfcfc | bellard | @@ -45,7 +45,7 @@
|
| 1445 | e80cfcfc | bellard | #endif
|
| 1446 | e80cfcfc | bellard | static struct arp_cache arp_list[ARPNUM]; /* ARP address cache */ |
| 1447 | e80cfcfc | bellard | static int next_arp; /* next table entry */ |
| 1448 | e80cfcfc | bellard | -static t_ipaddr def_gw = IP_ANY; /* default routing */
|
| 1449 | e80cfcfc | bellard | +static t_ipaddr def_gw; /* default routing */
|
| 1450 | e80cfcfc | bellard | |
| 1451 | e80cfcfc | bellard | |
| 1452 | e80cfcfc | bellard | |
| 1453 | e80cfcfc | bellard | @@ -144,7 +144,7 @@
|
| 1454 | e80cfcfc | bellard | * |
| 1455 | e80cfcfc | bellard | * Resolve IP address and return pointer to hardware address.
|
| 1456 | e80cfcfc | bellard | */ |
| 1457 | e80cfcfc | bellard | -unsigned char *ip_resolve(ip)
|
| 1458 | e80cfcfc | bellard | +const unsigned char *ip_resolve(ip)
|
| 1459 | e80cfcfc | bellard | t_ipaddr ip; |
| 1460 | e80cfcfc | bellard | {
|
| 1461 | e80cfcfc | bellard | int i;
|
| 1462 | e80cfcfc | bellard | @@ -230,14 +230,11 @@
|
| 1463 | e80cfcfc | bellard | */ |
| 1464 | e80cfcfc | bellard | int init_arp()
|
| 1465 | e80cfcfc | bellard | {
|
| 1466 | e80cfcfc | bellard | - /* Set name of module for error messages */
|
| 1467 | e80cfcfc | bellard | - net_module_name = "arp";
|
| 1468 | e80cfcfc | bellard | -
|
| 1469 | e80cfcfc | bellard | #ifndef NOARP
|
| 1470 | e80cfcfc | bellard | /* Register ARP packet type and set send buffer pointer */
|
| 1471 | e80cfcfc | bellard | if ((arpbuf = (struct arphdr *)reg_type(htons(ETH_P_ARP), arp_recv)) == NULL) |
| 1472 | e80cfcfc | bellard | return(FALSE);
|
| 1473 | 8d5f07fa | bellard | #endif
|
| 1474 | e80cfcfc | bellard | -
|
| 1475 | e80cfcfc | bellard | + def_gw = IP_ANY;
|
| 1476 | e80cfcfc | bellard | return(TRUE);
|
| 1477 | e80cfcfc | bellard | } |
| 1478 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/arp.h proll-patch4/src/arp.h
|
| 1479 | e80cfcfc | bellard | --- proll_18.orig/src/arp.h 1999-03-18 03:39:43.000000000 +0000
|
| 1480 | e80cfcfc | bellard | +++ proll-patch4/src/arp.h 2004-11-13 15:50:49.000000000 +0000
|
| 1481 | e80cfcfc | bellard | @@ -104,7 +104,7 @@
|
| 1482 | e80cfcfc | bellard | extern int init_arp __P((void)); |
| 1483 | e80cfcfc | bellard | |
| 1484 | e80cfcfc | bellard | /* Resolve IP address and return pointer to hardware address */
|
| 1485 | e80cfcfc | bellard | -extern unsigned char *ip_resolve __P((t_ipaddr ip));
|
| 1486 | e80cfcfc | bellard | +extern const unsigned char *ip_resolve __P((t_ipaddr ip));
|
| 1487 | e80cfcfc | bellard | |
| 1488 | e80cfcfc | bellard | /* Add a new antry to the ARP cache */
|
| 1489 | e80cfcfc | bellard | extern void addcache __P((unsigned char *ha, t_ipaddr ip)); |
| 1490 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/hconsole.c proll-patch4/src/hconsole.c
|
| 1491 | e80cfcfc | bellard | --- proll_18.orig/src/hconsole.c 2002-07-23 05:52:48.000000000 +0000
|
| 1492 | e80cfcfc | bellard | +++ proll-patch4/src/hconsole.c 2004-11-13 15:50:49.000000000 +0000
|
| 1493 | e80cfcfc | bellard | @@ -42,7 +42,11 @@
|
| 1494 | e80cfcfc | bellard | * No probing sequence or argument passing, hardcode everything. XXX |
| 1495 | e80cfcfc | bellard | */ |
| 1496 | e80cfcfc | bellard | raster8_cons_a(q, 768, 1024, (char *)a0); |
| 1497 | e80cfcfc | bellard | +#if 1
|
| 1498 | e80cfcfc | bellard | raster_cons_2(r, q, 768-(24*11)-1, 1024-(8*80)-1, (24*11), (8*80)); |
| 1499 | e80cfcfc | bellard | +#else
|
| 1500 | e80cfcfc | bellard | + raster_cons_2(r, q, 0, 0, 768, 1024);
|
| 1501 | 8d5f07fa | bellard | +#endif
|
| 1502 | e80cfcfc | bellard | t->r_ = r; |
| 1503 | e80cfcfc | bellard | t->r0_ = q; |
| 1504 | e80cfcfc | bellard | t->f_ = &f_master; |
| 1505 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/lat7_2.bm proll-patch4/src/lat7_2.bm
|
| 1506 | e80cfcfc | bellard | --- proll_18.orig/src/lat7_2.bm 1999-02-27 05:48:54.000000000 +0000
|
| 1507 | e80cfcfc | bellard | +++ proll-patch4/src/lat7_2.bm 2004-11-13 15:50:49.000000000 +0000
|
| 1508 | e80cfcfc | bellard | @@ -1,6 +1,6 @@
|
| 1509 | e80cfcfc | bellard | #define lat7_2_width 128 |
| 1510 | e80cfcfc | bellard | #define lat7_2_height 88 |
| 1511 | e80cfcfc | bellard | -static unsigned char lat7_2_bits[] = {
|
| 1512 | e80cfcfc | bellard | +static unsigned const char lat7_2_bits[] = {
|
| 1513 | e80cfcfc | bellard | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 1514 | e80cfcfc | bellard | 0x00, 0x00, 0x00, 0x00, 0x00, 0xaa, 0x12, 0x1e, 0x0c, 0x02, 0x70, 0x18, |
| 1515 | e80cfcfc | bellard | 0x22, 0x22, 0x18, 0x00, 0x00, 0x18, 0x18, 0xff, 0x18, 0x00, 0x12, 0x02, |
| 1516 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/lat7_2_swapped.bm proll-patch4/src/lat7_2_swapped.bm
|
| 1517 | e80cfcfc | bellard | --- proll_18.orig/src/lat7_2_swapped.bm 1970-01-01 00:00:00.000000000 +0000
|
| 1518 | e80cfcfc | bellard | +++ proll-patch4/src/lat7_2_swapped.bm 2004-11-13 15:50:49.000000000 +0000
|
| 1519 | e80cfcfc | bellard | @@ -0,0 +1,121 @@
|
| 1520 | e80cfcfc | bellard | +#define lat7_2_width 128
|
| 1521 | e80cfcfc | bellard | +#define lat7_2_height 88
|
| 1522 | e80cfcfc | bellard | +static unsigned const char lat7_2_bits[] = {
|
| 1523 | e80cfcfc | bellard | + 0x00, 0x00, 0x18, 0x3c, 0x7e, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1524 | e80cfcfc | bellard | + 0x55, 0x00, 0x2a, 0x00, 0x55, 0x00, 0x2a, 0x00, 0x55, 0x00, 0x00, 0x48,
|
| 1525 | e80cfcfc | bellard | + 0x48, 0x78, 0x48, 0x5f, 0x04, 0x04, 0x04, 0x04, 0x00, 0x00, 0x78, 0x40,
|
| 1526 | e80cfcfc | bellard | + 0x70, 0x40, 0x4f, 0x08, 0x0e, 0x08, 0x08, 0x00, 0x00, 0x30, 0x40, 0x40,
|
| 1527 | e80cfcfc | bellard | + 0x40, 0x3e, 0x09, 0x0e, 0x0a, 0x09, 0x00, 0x00, 0x40, 0x40, 0x40, 0x40,
|
| 1528 | e80cfcfc | bellard | + 0x7f, 0x08, 0x0e, 0x08, 0x08, 0x00, 0x00, 0x0e, 0x0a, 0x0e, 0x00, 0x00,
|
| 1529 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18, 0x18, 0x00,
|
| 1530 | e80cfcfc | bellard | + 0x7e, 0x00, 0x00, 0x00, 0x00, 0x44, 0x64, 0x54, 0x4c, 0x54, 0x10, 0x10,
|
| 1531 | e80cfcfc | bellard | + 0x10, 0x1f, 0x00, 0x00, 0x44, 0x44, 0x44, 0x28, 0x1f, 0x04, 0x04, 0x04,
|
| 1532 | e80cfcfc | bellard | + 0x04, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x00, 0x00, 0x00, 0x00,
|
| 1533 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x18, 0x18, 0x18, 0x18, 0x00,
|
| 1534 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00,
|
| 1535 | e80cfcfc | bellard | + 0x18, 0x18, 0x18, 0x18, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
|
| 1536 | e80cfcfc | bellard | + 0x18, 0x18, 0x18, 0xff, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0xff, 0x00,
|
| 1537 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
|
| 1538 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1539 | e80cfcfc | bellard | + 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1540 | e80cfcfc | bellard | + 0x00, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1541 | e80cfcfc | bellard | + 0x00, 0x00, 0xff, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x1f, 0x18, 0x18,
|
| 1542 | e80cfcfc | bellard | + 0x18, 0x18, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0xf8, 0x18, 0x18, 0x18,
|
| 1543 | e80cfcfc | bellard | + 0x18, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0xff, 0x00, 0x00, 0x00, 0x00,
|
| 1544 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x18, 0x18, 0x18, 0x18, 0x00,
|
| 1545 | e80cfcfc | bellard | + 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00,
|
| 1546 | e80cfcfc | bellard | + 0x06, 0x0c, 0x18, 0x30, 0x18, 0x6c, 0x36, 0x18, 0x0c, 0x00, 0x00, 0x60,
|
| 1547 | e80cfcfc | bellard | + 0x30, 0x18, 0x0c, 0x18, 0x36, 0x6c, 0x18, 0x30, 0x00, 0x00, 0x7f, 0x36,
|
| 1548 | e80cfcfc | bellard | + 0x36, 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x02, 0x04, 0x7e,
|
| 1549 | e80cfcfc | bellard | + 0x18, 0x7e, 0x20, 0x40, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x36, 0x30, 0x78,
|
| 1550 | e80cfcfc | bellard | + 0x30, 0x72, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18,
|
| 1551 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x42,
|
| 1552 | e80cfcfc | bellard | + 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1553 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x18, 0x00,
|
| 1554 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x66, 0x66, 0x22, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1555 | e80cfcfc | bellard | + 0x00, 0x00, 0x36, 0x7f, 0x36, 0x36, 0x36, 0x7f, 0x36, 0x00, 0x00, 0x00,
|
| 1556 | e80cfcfc | bellard | + 0x00, 0x66, 0x3c, 0x66, 0x66, 0x66, 0x3c, 0x66, 0x00, 0x00, 0x00, 0x00,
|
| 1557 | e80cfcfc | bellard | + 0x72, 0x56, 0x6c, 0x18, 0x36, 0x6a, 0x4e, 0x00, 0x00, 0x00, 0x00, 0x18,
|
| 1558 | e80cfcfc | bellard | + 0x24, 0x28, 0x30, 0x4a, 0x44, 0x3a, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18,
|
| 1559 | e80cfcfc | bellard | + 0x08, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x18, 0x18,
|
| 1560 | e80cfcfc | bellard | + 0x18, 0x18, 0x18, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x30, 0x18, 0x18, 0x18,
|
| 1561 | e80cfcfc | bellard | + 0x18, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x3c, 0x7e, 0x3c,
|
| 1562 | e80cfcfc | bellard | + 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7e, 0x18, 0x18,
|
| 1563 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18,
|
| 1564 | e80cfcfc | bellard | + 0x08, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00,
|
| 1565 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
|
| 1566 | e80cfcfc | bellard | + 0x00, 0x00, 0x02, 0x06, 0x0c, 0x18, 0x30, 0x60, 0x40, 0x00, 0x00, 0x00,
|
| 1567 | e80cfcfc | bellard | + 0x00, 0x3c, 0x46, 0x4e, 0x5a, 0x72, 0x62, 0x3c, 0x00, 0x00, 0x00, 0x00,
|
| 1568 | e80cfcfc | bellard | + 0x18, 0x38, 0x58, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x3c,
|
| 1569 | e80cfcfc | bellard | + 0x66, 0x06, 0x0c, 0x18, 0x32, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66,
|
| 1570 | e80cfcfc | bellard | + 0x06, 0x1c, 0x06, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x18, 0x30,
|
| 1571 | e80cfcfc | bellard | + 0x66, 0x7e, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x60, 0x7c, 0x66,
|
| 1572 | e80cfcfc | bellard | + 0x06, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x60, 0x7c, 0x66, 0x66,
|
| 1573 | e80cfcfc | bellard | + 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x46, 0x06, 0x0c, 0x18, 0x30,
|
| 1574 | e80cfcfc | bellard | + 0x30, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x66, 0x3c, 0x66, 0x66, 0x3c,
|
| 1575 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x66, 0x66, 0x3e, 0x06, 0x3c, 0x00,
|
| 1576 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x00, 0x00,
|
| 1577 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x08, 0x10, 0x00,
|
| 1578 | e80cfcfc | bellard | + 0x00, 0x0c, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0c, 0x00, 0x00, 0x00, 0x00,
|
| 1579 | e80cfcfc | bellard | + 0x00, 0x00, 0x7e, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
|
| 1580 | e80cfcfc | bellard | + 0x18, 0x0c, 0x06, 0x0c, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66,
|
| 1581 | e80cfcfc | bellard | + 0x06, 0x0c, 0x18, 0x00, 0x18, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x42, 0x5e,
|
| 1582 | e80cfcfc | bellard | + 0x56, 0x5e, 0x40, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3c, 0x66, 0x66,
|
| 1583 | e80cfcfc | bellard | + 0x7e, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x66, 0x66, 0x7c, 0x66,
|
| 1584 | e80cfcfc | bellard | + 0x66, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x60, 0x60, 0x60, 0x66,
|
| 1585 | e80cfcfc | bellard | + 0x3c, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x66, 0x66, 0x66, 0x66, 0x66, 0x7c,
|
| 1586 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x7e, 0x62, 0x60, 0x78, 0x60, 0x62, 0x7e, 0x00,
|
| 1587 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x7e, 0x62, 0x60, 0x78, 0x60, 0x60, 0x60, 0x00, 0x00,
|
| 1588 | e80cfcfc | bellard | + 0x00, 0x00, 0x3c, 0x66, 0x60, 0x6e, 0x66, 0x66, 0x3e, 0x00, 0x00, 0x00,
|
| 1589 | e80cfcfc | bellard | + 0x00, 0x66, 0x66, 0x66, 0x7e, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00,
|
| 1590 | e80cfcfc | bellard | + 0x3c, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x7e,
|
| 1591 | e80cfcfc | bellard | + 0x46, 0x06, 0x06, 0x06, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x66, 0x6c,
|
| 1592 | e80cfcfc | bellard | + 0x78, 0x70, 0x78, 0x6c, 0x66, 0x00, 0x00, 0x00, 0x00, 0x60, 0x60, 0x60,
|
| 1593 | e80cfcfc | bellard | + 0x60, 0x60, 0x62, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x41, 0x63, 0x77, 0x7f,
|
| 1594 | e80cfcfc | bellard | + 0x6b, 0x63, 0x63, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x76, 0x7e, 0x6e,
|
| 1595 | e80cfcfc | bellard | + 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x66, 0x66, 0x66, 0x66,
|
| 1596 | e80cfcfc | bellard | + 0x3c, 0x00, 0x00, 0x00, 0x00, 0x7c, 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60,
|
| 1597 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66, 0x66, 0x66, 0x66, 0x6e, 0x3c, 0x02,
|
| 1598 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x7c, 0x66, 0x66, 0x66, 0x7c, 0x6c, 0x66, 0x00, 0x00,
|
| 1599 | e80cfcfc | bellard | + 0x00, 0x00, 0x3c, 0x66, 0x60, 0x3c, 0x06, 0x66, 0x3c, 0x00, 0x00, 0x00,
|
| 1600 | e80cfcfc | bellard | + 0x00, 0x7e, 0x5a, 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00,
|
| 1601 | e80cfcfc | bellard | + 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x66,
|
| 1602 | e80cfcfc | bellard | + 0x66, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x00, 0x00, 0x00, 0x00, 0x63, 0x63,
|
| 1603 | e80cfcfc | bellard | + 0x63, 0x6b, 0x6b, 0x7f, 0x36, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x3c,
|
| 1604 | e80cfcfc | bellard | + 0x18, 0x3c, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x3c,
|
| 1605 | e80cfcfc | bellard | + 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x46, 0x0c, 0x18, 0x30,
|
| 1606 | e80cfcfc | bellard | + 0x62, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x30, 0x30, 0x30, 0x30, 0x30,
|
| 1607 | e80cfcfc | bellard | + 0x3c, 0x00, 0x00, 0x00, 0x00, 0x40, 0x60, 0x30, 0x18, 0x0c, 0x06, 0x02,
|
| 1608 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x3c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x3c, 0x00,
|
| 1609 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x18, 0x3c, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1610 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00,
|
| 1611 | e80cfcfc | bellard | + 0x00, 0x08, 0x10, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1612 | e80cfcfc | bellard | + 0x00, 0x3c, 0x06, 0x3e, 0x66, 0x66, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x60,
|
| 1613 | e80cfcfc | bellard | + 0x60, 0x60, 0x7c, 0x66, 0x66, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1614 | e80cfcfc | bellard | + 0x3c, 0x66, 0x60, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x06, 0x06, 0x06,
|
| 1615 | e80cfcfc | bellard | + 0x3e, 0x66, 0x66, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x66,
|
| 1616 | e80cfcfc | bellard | + 0x7e, 0x60, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x1c, 0x36, 0x30, 0x30, 0x78,
|
| 1617 | e80cfcfc | bellard | + 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x66, 0x66, 0x66,
|
| 1618 | e80cfcfc | bellard | + 0x3e, 0x06, 0x3c, 0x00, 0x00, 0x60, 0x60, 0x60, 0x7c, 0x66, 0x66, 0x66,
|
| 1619 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x18, 0x18, 0x18, 0x1c, 0x00,
|
| 1620 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x0c, 0x0c, 0x00, 0x0c, 0x0c, 0x0c, 0x0c, 0x6c, 0x38,
|
| 1621 | e80cfcfc | bellard | + 0x00, 0x00, 0x60, 0x60, 0x66, 0x6c, 0x78, 0x7c, 0x66, 0x00, 0x00, 0x00,
|
| 1622 | e80cfcfc | bellard | + 0x00, 0x60, 0x30, 0x30, 0x30, 0x30, 0x36, 0x1c, 0x00, 0x00, 0x00, 0x00,
|
| 1623 | e80cfcfc | bellard | + 0x00, 0x00, 0x76, 0x7f, 0x6b, 0x6b, 0x6b, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1624 | e80cfcfc | bellard | + 0x00, 0x6c, 0x76, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
| 1625 | e80cfcfc | bellard | + 0x3c, 0x66, 0x66, 0x66, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7c,
|
| 1626 | e80cfcfc | bellard | + 0x66, 0x66, 0x66, 0x7c, 0x60, 0x60, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x66,
|
| 1627 | e80cfcfc | bellard | + 0x66, 0x66, 0x3e, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x6e, 0x72, 0x60,
|
| 1628 | e80cfcfc | bellard | + 0x60, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3c, 0x60, 0x3c, 0x06,
|
| 1629 | e80cfcfc | bellard | + 0x3c, 0x00, 0x00, 0x00, 0x00, 0x30, 0x30, 0x78, 0x30, 0x30, 0x36, 0x1c,
|
| 1630 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x3a, 0x00,
|
| 1631 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x3c, 0x18, 0x00, 0x00,
|
| 1632 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x63, 0x6b, 0x6b, 0x6b, 0x36, 0x00, 0x00, 0x00,
|
| 1633 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x66, 0x3c, 0x18, 0x3c, 0x66, 0x00, 0x00, 0x00, 0x00,
|
| 1634 | e80cfcfc | bellard | + 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x3e, 0x06, 0x3c, 0x00, 0x00, 0x00,
|
| 1635 | e80cfcfc | bellard | + 0x00, 0x7e, 0x0c, 0x18, 0x30, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x18,
|
| 1636 | e80cfcfc | bellard | + 0x18, 0x30, 0x18, 0x18, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18,
|
| 1637 | e80cfcfc | bellard | + 0x18, 0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x30, 0x18, 0x18, 0x0c,
|
| 1638 | e80cfcfc | bellard | + 0x18, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00, 0x36, 0x6c, 0x00, 0x00, 0x00,
|
| 1639 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x42, 0x00, 0x00, 0x00, 0x00,
|
| 1640 | e80cfcfc | bellard | + 0x00, 0x00, 0x00, 0x00};
|
| 1641 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/le.c proll-patch4/src/le.c
|
| 1642 | e80cfcfc | bellard | --- proll_18.orig/src/le.c 2002-07-23 05:52:49.000000000 +0000
|
| 1643 | e80cfcfc | bellard | +++ proll-patch4/src/le.c 2004-11-13 15:50:49.000000000 +0000
|
| 1644 | e80cfcfc | bellard | @@ -185,8 +185,6 @@
|
| 1645 | e80cfcfc | bellard | unsigned short rap; /* register address port */ |
| 1646 | e80cfcfc | bellard | }; |
| 1647 | e80cfcfc | bellard | |
| 1648 | e80cfcfc | bellard | -int sparc_lance_debug = 2;
|
| 1649 | e80cfcfc | bellard | -
|
| 1650 | e80cfcfc | bellard | /* The Lance uses 24 bit addresses */
|
| 1651 | e80cfcfc | bellard | /* On the Sun4c the DVMA will provide the remaining bytes for us */
|
| 1652 | e80cfcfc | bellard | /* On the Sun4m we have to instruct the ledma to provide them */
|
| 1653 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/netinit.c proll-patch4/src/netinit.c
|
| 1654 | e80cfcfc | bellard | --- proll_18.orig/src/netinit.c 2002-09-13 21:53:33.000000000 +0000
|
| 1655 | e80cfcfc | bellard | +++ proll-patch4/src/netinit.c 2004-11-13 15:50:49.000000000 +0000
|
| 1656 | e80cfcfc | bellard | @@ -49,13 +49,20 @@
|
| 1657 | e80cfcfc | bellard | unsigned char myhwaddr[ETH_ALEN]; /* my own hardware addr */ |
| 1658 | e80cfcfc | bellard | t_ipaddr myipaddr; /* my own IP address */
|
| 1659 | e80cfcfc | bellard | t_ipaddr mynetmask; /* my own netmask */
|
| 1660 | e80cfcfc | bellard | - char *net_module_name; /* name of init module */
|
| 1661 | e80cfcfc | bellard | t_ipaddr servaddr; /* IP of RARP&TFTP server */
|
| 1662 | e80cfcfc | bellard | |
| 1663 | e80cfcfc | bellard | /* Broadcast hardware address */
|
| 1664 | e80cfcfc | bellard | -unsigned char bcasthw[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
|
| 1665 | e80cfcfc | bellard | +const unsigned char bcasthw[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
|
| 1666 | e80cfcfc | bellard | |
| 1667 | e80cfcfc | bellard | |
| 1668 | e80cfcfc | bellard | +unsigned int seed;
|
| 1669 | e80cfcfc | bellard | +
|
| 1670 | e80cfcfc | bellard | +/* This is taken from x86 to be used in network kernel. Returns 15 bits. */
|
| 1671 | e80cfcfc | bellard | +short int random()
|
| 1672 | e80cfcfc | bellard | +{
|
| 1673 | e80cfcfc | bellard | + seed = (seed + 23968)*0x015A4E35 >> 1;
|
| 1674 | e80cfcfc | bellard | + return seed & 0x7FFF;
|
| 1675 | e80cfcfc | bellard | +}
|
| 1676 | e80cfcfc | bellard | |
| 1677 | e80cfcfc | bellard | /*
|
| 1678 | e80cfcfc | bellard | ************************************************************************** |
| 1679 | e80cfcfc | bellard | @@ -104,10 +111,17 @@
|
| 1680 | e80cfcfc | bellard | */ |
| 1681 | e80cfcfc | bellard | void init_net()
|
| 1682 | e80cfcfc | bellard | {
|
| 1683 | e80cfcfc | bellard | + /* Avoid data segment allocations */
|
| 1684 | e80cfcfc | bellard | + seed = 151;
|
| 1685 | e80cfcfc | bellard | +
|
| 1686 | e80cfcfc | bellard | /* Initialize the different network layer modules */
|
| 1687 | e80cfcfc | bellard | init_packet(); |
| 1688 | e80cfcfc | bellard | - if (!init_arp() || !init_udp()) {
|
| 1689 | e80cfcfc | bellard | - printf("\nERROR: init_%s\n", net_module_name);
|
| 1690 | e80cfcfc | bellard | + if (!init_arp()) {
|
| 1691 | e80cfcfc | bellard | + printf("\nERROR: init_arp\n");
|
| 1692 | e80cfcfc | bellard | + fatal();
|
| 1693 | e80cfcfc | bellard | + }
|
| 1694 | e80cfcfc | bellard | + if (!init_udp()) {
|
| 1695 | e80cfcfc | bellard | + printf("\nERROR: init_udp\n");
|
| 1696 | e80cfcfc | bellard | fatal(); |
| 1697 | e80cfcfc | bellard | } |
| 1698 | e80cfcfc | bellard | } |
| 1699 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/netpriv.h proll-patch4/src/netpriv.h
|
| 1700 | e80cfcfc | bellard | --- proll_18.orig/src/netpriv.h 1999-04-27 05:39:37.000000000 +0000
|
| 1701 | e80cfcfc | bellard | +++ proll-patch4/src/netpriv.h 2004-11-13 15:50:49.000000000 +0000
|
| 1702 | e80cfcfc | bellard | @@ -130,10 +130,9 @@
|
| 1703 | e80cfcfc | bellard | * |
| 1704 | e80cfcfc | bellard | */ |
| 1705 | e80cfcfc | bellard | extern unsigned char myhwaddr[ETH_ALEN]; /* my own hardware address */ |
| 1706 | e80cfcfc | bellard | -extern unsigned char bcasthw[ETH_ALEN]; /* broadcast hardware addr */
|
| 1707 | e80cfcfc | bellard | +extern const unsigned char bcasthw[ETH_ALEN]; /* broadcast hardware addr */
|
| 1708 | e80cfcfc | bellard | extern t_ipaddr myipaddr; /* my own IP address */ |
| 1709 | e80cfcfc | bellard | extern t_ipaddr mynetmask; /* netmask for my network */ |
| 1710 | e80cfcfc | bellard | -extern char *net_module_name; /* initialized module's name */
|
| 1711 | e80cfcfc | bellard | extern t_ipaddr servaddr; /* server IP address */ |
| 1712 | e80cfcfc | bellard | |
| 1713 | e80cfcfc | bellard | |
| 1714 | e80cfcfc | bellard | @@ -150,7 +149,7 @@
|
| 1715 | e80cfcfc | bellard | extern unsigned char *reg_type __P((int typeval, int (* receive)())); |
| 1716 | e80cfcfc | bellard | |
| 1717 | e80cfcfc | bellard | /* Write a packet to the network */
|
| 1718 | e80cfcfc | bellard | -extern int write_packet __P((int bufsize, int typeval, unsigned char *addr));
|
| 1719 | e80cfcfc | bellard | +extern int write_packet __P((int bufsize, int typeval, const unsigned char *addr));
|
| 1720 | e80cfcfc | bellard | |
| 1721 | e80cfcfc | bellard | /* Empty read buffer */
|
| 1722 | e80cfcfc | bellard | extern void empty_buf __P((void)); |
| 1723 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/openprom.h proll-patch4/src/openprom.h
|
| 1724 | e80cfcfc | bellard | --- proll_18.orig/src/openprom.h 2002-07-14 02:26:30.000000000 +0000
|
| 1725 | e80cfcfc | bellard | +++ proll-patch4/src/openprom.h 2004-11-13 15:50:49.000000000 +0000
|
| 1726 | e80cfcfc | bellard | @@ -54,20 +54,20 @@
|
| 1727 | e80cfcfc | bellard | }; |
| 1728 | e80cfcfc | bellard | |
| 1729 | e80cfcfc | bellard | struct linux_mem_v0 {
|
| 1730 | e80cfcfc | bellard | - struct linux_mlist_v0 **v0_totphys;
|
| 1731 | e80cfcfc | bellard | - struct linux_mlist_v0 **v0_prommap;
|
| 1732 | e80cfcfc | bellard | - struct linux_mlist_v0 **v0_available; /* What we can use */
|
| 1733 | e80cfcfc | bellard | + struct linux_mlist_v0 * const *v0_totphys;
|
| 1734 | e80cfcfc | bellard | + struct linux_mlist_v0 * const *v0_prommap;
|
| 1735 | e80cfcfc | bellard | + struct linux_mlist_v0 * const *v0_available; /* What we can use */
|
| 1736 | e80cfcfc | bellard | }; |
| 1737 | e80cfcfc | bellard | |
| 1738 | e80cfcfc | bellard | /* Arguments sent to the kernel from the boot prompt. */
|
| 1739 | e80cfcfc | bellard | struct linux_arguments_v0 {
|
| 1740 | e80cfcfc | bellard | - char *argv[8];
|
| 1741 | e80cfcfc | bellard | + const char *argv[8];
|
| 1742 | e80cfcfc | bellard | char args[100]; |
| 1743 | e80cfcfc | bellard | char boot_dev[2]; |
| 1744 | e80cfcfc | bellard | int boot_dev_ctrl;
|
| 1745 | e80cfcfc | bellard | int boot_dev_unit;
|
| 1746 | e80cfcfc | bellard | int dev_partition;
|
| 1747 | e80cfcfc | bellard | - char *kernel_file_name;
|
| 1748 | e80cfcfc | bellard | + const char *kernel_file_name;
|
| 1749 | e80cfcfc | bellard | void *aieee1; /* XXX */ |
| 1750 | e80cfcfc | bellard | }; |
| 1751 | 8d5f07fa | bellard | |
| 1752 | e80cfcfc | bellard | @@ -91,13 +91,13 @@
|
| 1753 | e80cfcfc | bellard | struct linux_mem_v0 pv_v0mem;
|
| 1754 | 8d5f07fa | bellard | |
| 1755 | e80cfcfc | bellard | /* Node operations. */
|
| 1756 | e80cfcfc | bellard | - struct linux_nodeops *pv_nodeops;
|
| 1757 | e80cfcfc | bellard | + const struct linux_nodeops *pv_nodeops;
|
| 1758 | e80cfcfc | bellard | |
| 1759 | e80cfcfc | bellard | char **pv_bootstr;
|
| 1760 | e80cfcfc | bellard | struct linux_dev_v0_funcs pv_v0devops;
|
| 1761 | e80cfcfc | bellard | |
| 1762 | e80cfcfc | bellard | - char *pv_stdin;
|
| 1763 | e80cfcfc | bellard | - char *pv_stdout;
|
| 1764 | e80cfcfc | bellard | + const char *pv_stdin;
|
| 1765 | e80cfcfc | bellard | + const char *pv_stdout;
|
| 1766 | e80cfcfc | bellard | #define PROMDEV_KBD 0 /* input from keyboard */ |
| 1767 | e80cfcfc | bellard | #define PROMDEV_SCREEN 0 /* output to screen */ |
| 1768 | e80cfcfc | bellard | #define PROMDEV_TTYA 1 /* in/out to ttya */ |
| 1769 | e80cfcfc | bellard | @@ -127,7 +127,7 @@
|
| 1770 | e80cfcfc | bellard | void (*v2_eval)(char *str); |
| 1771 | e80cfcfc | bellard | } pv_fortheval; |
| 1772 | e80cfcfc | bellard | |
| 1773 | e80cfcfc | bellard | - struct linux_arguments_v0 **pv_v0bootargs;
|
| 1774 | e80cfcfc | bellard | + const struct linux_arguments_v0 * const *pv_v0bootargs;
|
| 1775 | e80cfcfc | bellard | |
| 1776 | e80cfcfc | bellard | /* Get ether address. */
|
| 1777 | e80cfcfc | bellard | unsigned int (*pv_enaddr)(int d, char *enaddr); |
| 1778 | e80cfcfc | bellard | @@ -175,7 +175,7 @@
|
| 1779 | e80cfcfc | bellard | int (*no_proplen)(int node, char *name); |
| 1780 | e80cfcfc | bellard | int (*no_getprop)(int node, char *name, char *val); |
| 1781 | e80cfcfc | bellard | int (*no_setprop)(int node, char *name, char *val, int len); |
| 1782 | e80cfcfc | bellard | - char * (*no_nextprop)(int node, char *name);
|
| 1783 | e80cfcfc | bellard | + const char * (*no_nextprop)(int node, char *name);
|
| 1784 | e80cfcfc | bellard | }; |
| 1785 | e80cfcfc | bellard | |
| 1786 | e80cfcfc | bellard | /* More fun PROM structures for device probing. */
|
| 1787 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/packet.c proll-patch4/src/packet.c
|
| 1788 | e80cfcfc | bellard | --- proll_18.orig/src/packet.c 2000-02-11 04:56:45.000000000 +0000
|
| 1789 | e80cfcfc | bellard | +++ proll-patch4/src/packet.c 2004-11-13 15:50:49.000000000 +0000
|
| 1790 | e80cfcfc | bellard | @@ -41,7 +41,7 @@
|
| 1791 | e80cfcfc | bellard | int aligner;
|
| 1792 | e80cfcfc | bellard | } wbuf; |
| 1793 | e80cfcfc | bellard | static struct sk_buff *rskb; |
| 1794 | e80cfcfc | bellard | -static int nqskb = 0;
|
| 1795 | e80cfcfc | bellard | +static int nqskb;
|
| 1796 | e80cfcfc | bellard | |
| 1797 | e80cfcfc | bellard | |
| 1798 | e80cfcfc | bellard | void init_packet()
|
| 1799 | e80cfcfc | bellard | @@ -62,6 +62,8 @@
|
| 1800 | e80cfcfc | bellard | for (i = 0; i < MAXSKBS; i++) { |
| 1801 | e80cfcfc | bellard | skev[i].skb.allocn = i; |
| 1802 | e80cfcfc | bellard | } |
| 1803 | e80cfcfc | bellard | +
|
| 1804 | e80cfcfc | bellard | + nqskb = 0;
|
| 1805 | e80cfcfc | bellard | } |
| 1806 | e80cfcfc | bellard | |
| 1807 | e80cfcfc | bellard | unsigned char *reg_type(int ptype, int (*func)()) |
| 1808 | e80cfcfc | bellard | @@ -81,7 +83,7 @@
|
| 1809 | e80cfcfc | bellard | return wbuf.s;
|
| 1810 | e80cfcfc | bellard | } |
| 1811 | e80cfcfc | bellard | |
| 1812 | e80cfcfc | bellard | -int write_packet(int leng, int type, unsigned char *dst)
|
| 1813 | e80cfcfc | bellard | +int write_packet(int leng, int type, const unsigned char *dst)
|
| 1814 | e80cfcfc | bellard | {
|
| 1815 | e80cfcfc | bellard | struct sk_buff *skb;
|
| 1816 | e80cfcfc | bellard | unsigned char *s; |
| 1817 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/printf.c proll-patch4/src/printf.c
|
| 1818 | e80cfcfc | bellard | --- proll_18.orig/src/printf.c 1999-03-19 07:03:59.000000000 +0000
|
| 1819 | e80cfcfc | bellard | +++ proll-patch4/src/printf.c 2004-11-13 15:50:49.000000000 +0000
|
| 1820 | e80cfcfc | bellard | @@ -19,7 +19,7 @@
|
| 1821 | e80cfcfc | bellard | static void printn(struct prf_fp *, unsigned long, unsigned int); |
| 1822 | e80cfcfc | bellard | static void putchar(char, struct prf_fp *); |
| 1823 | e80cfcfc | bellard | |
| 1824 | e80cfcfc | bellard | -static char hextab[] = "0123456789ABCDEF";
|
| 1825 | e80cfcfc | bellard | +static const char hextab[] = "0123456789ABCDEF";
|
| 1826 | e80cfcfc | bellard | |
| 1827 | e80cfcfc | bellard | /*
|
| 1828 | e80cfcfc | bellard | * Scaled down version of C Library printf. |
| 1829 | e80cfcfc | bellard | @@ -41,7 +41,7 @@
|
| 1830 | e80cfcfc | bellard | void
|
| 1831 | e80cfcfc | bellard | prf(struct prf_fp *filog, char *fmt, va_list adx) |
| 1832 | e80cfcfc | bellard | {
|
| 1833 | e80cfcfc | bellard | - register c;
|
| 1834 | e80cfcfc | bellard | + register int c;
|
| 1835 | e80cfcfc | bellard | char *s;
|
| 1836 | e80cfcfc | bellard | |
| 1837 | e80cfcfc | bellard | for(;;) {
|
| 1838 | e80cfcfc | bellard | @@ -60,7 +60,7 @@
|
| 1839 | e80cfcfc | bellard | putchar(va_arg(adx,unsigned), filog);
|
| 1840 | e80cfcfc | bellard | } else if(c == 's') { |
| 1841 | e80cfcfc | bellard | s = va_arg(adx,char*);
|
| 1842 | e80cfcfc | bellard | - while(c = *s++)
|
| 1843 | e80cfcfc | bellard | + while((c = *s++))
|
| 1844 | e80cfcfc | bellard | putchar(c,filog); |
| 1845 | e80cfcfc | bellard | } else if (c == 'l' || c == 'O') { |
| 1846 | e80cfcfc | bellard | printn(filog, (long)va_arg(adx,long), c=='l'?10:8); |
| 1847 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/rconsole.c proll-patch4/src/rconsole.c
|
| 1848 | e80cfcfc | bellard | --- proll_18.orig/src/rconsole.c 1999-01-16 07:16:55.000000000 +0000
|
| 1849 | e80cfcfc | bellard | +++ proll-patch4/src/rconsole.c 2004-11-13 15:50:49.000000000 +0000
|
| 1850 | e80cfcfc | bellard | @@ -28,12 +28,18 @@
|
| 1851 | e80cfcfc | bellard | * move to California. Only plain lat7 survived. |
| 1852 | e80cfcfc | bellard | * I recreated lat7-1 changes in lat7-2. --zaitcev |
| 1853 | e80cfcfc | bellard | */ |
| 1854 | 8d5f07fa | bellard | +#ifdef ORIG
|
| 1855 | e80cfcfc | bellard | #include "lat7_2.bm" /* lat7_1.bm */ |
| 1856 | 8d5f07fa | bellard | +#else
|
| 1857 | e80cfcfc | bellard | +#include "lat7_2_swapped.bm" /* lat7_1.bm */
|
| 1858 | 8d5f07fa | bellard | +#endif
|
| 1859 | e80cfcfc | bellard | #define LAT7_NCHARS 128 |
| 1860 | e80cfcfc | bellard | #define LAT7_HEIGHT 11 |
| 1861 | e80cfcfc | bellard | #define LAT7_WIDTH 8 |
| 1862 | 8d5f07fa | bellard | |
| 1863 | e80cfcfc | bellard | +#ifdef ORIG
|
| 1864 | e80cfcfc | bellard | static Rf_scan lat7_body[ LAT7_NCHARS*LAT7_HEIGHT ];
|
| 1865 | e80cfcfc | bellard | +#endif
|
| 1866 | 8d5f07fa | bellard | |
| 1867 | e80cfcfc | bellard | #if 1 |
| 1868 | e80cfcfc | bellard | /*
|
| 1869 | e80cfcfc | bellard | @@ -94,6 +100,7 @@
|
| 1870 | e80cfcfc | bellard | |
| 1871 | e80cfcfc | bellard | #endif
|
| 1872 | e80cfcfc | bellard | |
| 1873 | e80cfcfc | bellard | +#ifdef ORIG
|
| 1874 | e80cfcfc | bellard | static inline int swapbits(int w0) |
| 1875 | e80cfcfc | bellard | {
|
| 1876 | e80cfcfc | bellard | int w1 = 0; |
| 1877 | e80cfcfc | bellard | @@ -105,13 +112,16 @@
|
| 1878 | e80cfcfc | bellard | } |
| 1879 | e80cfcfc | bellard | return w1;
|
| 1880 | e80cfcfc | bellard | } |
| 1881 | e80cfcfc | bellard | +#endif
|
| 1882 | e80cfcfc | bellard | |
| 1883 | e80cfcfc | bellard | void font_cons_7(struct rfont *p) |
| 1884 | e80cfcfc | bellard | {
|
| 1885 | e80cfcfc | bellard | +#ifdef ORIG
|
| 1886 | e80cfcfc | bellard | int x;
|
| 1887 | e80cfcfc | bellard | int col = 0; |
| 1888 | e80cfcfc | bellard | int row = 0; |
| 1889 | e80cfcfc | bellard | int erow = 0; |
| 1890 | e80cfcfc | bellard | +
|
| 1891 | e80cfcfc | bellard | for (x = 0; x < LAT7_NCHARS*LAT7_HEIGHT; x++ ) { |
| 1892 | e80cfcfc | bellard | lat7_body[ (erow * lat7_2_width/8 + col) * LAT7_HEIGHT + row ] =
|
| 1893 | e80cfcfc | bellard | swapbits(lat7_2_bits[x]) & 0xFF;
|
| 1894 | e80cfcfc | bellard | @@ -124,6 +134,9 @@
|
| 1895 | e80cfcfc | bellard | } |
| 1896 | e80cfcfc | bellard | } |
| 1897 | e80cfcfc | bellard | p->body_ = lat7_body; |
| 1898 | e80cfcfc | bellard | +#else
|
| 1899 | e80cfcfc | bellard | + p->body_ = lat7_2_bits;
|
| 1900 | e80cfcfc | bellard | +#endif
|
| 1901 | e80cfcfc | bellard | p->nchars_ = LAT7_NCHARS; |
| 1902 | e80cfcfc | bellard | p->width_ = LAT7_WIDTH; |
| 1903 | e80cfcfc | bellard | p->height_ = LAT7_HEIGHT; |
| 1904 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/rconsole.h proll-patch4/src/rconsole.h
|
| 1905 | e80cfcfc | bellard | --- proll_18.orig/src/rconsole.h 1999-01-16 05:00:59.000000000 +0000
|
| 1906 | e80cfcfc | bellard | +++ proll-patch4/src/rconsole.h 2004-11-13 15:50:49.000000000 +0000
|
| 1907 | e80cfcfc | bellard | @@ -13,10 +13,10 @@
|
| 1908 | e80cfcfc | bellard | */ |
| 1909 | e80cfcfc | bellard | |
| 1910 | e80cfcfc | bellard | #define RF_MAXWIDTH 16 |
| 1911 | e80cfcfc | bellard | -typedef unsigned short Rf_scan; /* __w16 to be used */
|
| 1912 | e80cfcfc | bellard | +typedef unsigned char Rf_scan; /* __w16 to be used */
|
| 1913 | e80cfcfc | bellard | |
| 1914 | e80cfcfc | bellard | struct rfont {
|
| 1915 | e80cfcfc | bellard | - Rf_scan *body_;
|
| 1916 | e80cfcfc | bellard | + const Rf_scan *body_;
|
| 1917 | e80cfcfc | bellard | int nchars_; /* 128 for ASCII ... 65536 for Unicode */ |
| 1918 | e80cfcfc | bellard | int width_; /* [Pixels]. Maximum size is 16. */ |
| 1919 | e80cfcfc | bellard | int height_; /* [Pixels == scan lines]. */ |
| 1920 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/romlib.h proll-patch4/src/romlib.h
|
| 1921 | e80cfcfc | bellard | --- proll_18.orig/src/romlib.h 1999-04-20 04:26:45.000000000 +0000
|
| 1922 | e80cfcfc | bellard | +++ proll-patch4/src/romlib.h 2004-11-13 15:50:49.000000000 +0000
|
| 1923 | e80cfcfc | bellard | @@ -73,12 +73,12 @@
|
| 1924 | e80cfcfc | bellard | #define memcpy(dst, src, len) bcopy(src, dst, len)
|
| 1925 | e80cfcfc | bellard | #define memcmp(x1, x2, len) bcmp(x1, x2, len)
|
| 1926 | e80cfcfc | bellard | #define memset(p, len, zero) bzero(p, len)
|
| 1927 | e80cfcfc | bellard | -extern void bcopy(void *b1, void *b2, int length);
|
| 1928 | e80cfcfc | bellard | -extern int bcmp(void *b1, void *b2, int length);
|
| 1929 | e80cfcfc | bellard | +extern void bcopy(const void *b1, void *b2, int length);
|
| 1930 | e80cfcfc | bellard | +extern int bcmp(const void *b1, const void *b2, int length);
|
| 1931 | e80cfcfc | bellard | extern void bzero(void *b, int c); |
| 1932 | e80cfcfc | bellard | /* gcc complains about "conflicting types for builtin function strlen". */
|
| 1933 | e80cfcfc | bellard | #define strlen(s) ssize(s)
|
| 1934 | e80cfcfc | bellard | -extern int ssize(char *s);
|
| 1935 | e80cfcfc | bellard | +extern int ssize(const char *s);
|
| 1936 | e80cfcfc | bellard | |
| 1937 | e80cfcfc | bellard | |
| 1938 | e80cfcfc | bellard | /*
|
| 1939 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/sched_4m.c proll-patch4/src/sched_4m.c
|
| 1940 | e80cfcfc | bellard | --- proll_18.orig/src/sched_4m.c 1999-04-27 05:48:51.000000000 +0000
|
| 1941 | e80cfcfc | bellard | +++ proll-patch4/src/sched_4m.c 2004-11-13 15:50:49.000000000 +0000
|
| 1942 | e80cfcfc | bellard | @@ -108,7 +108,7 @@
|
| 1943 | e80cfcfc | bellard | static int set_bolt; /* Tick counter limit */ |
| 1944 | e80cfcfc | bellard | static struct handsc hndv[16]; |
| 1945 | e80cfcfc | bellard | |
| 1946 | e80cfcfc | bellard | -static unsigned int intr_to_mask[16] = {
|
| 1947 | e80cfcfc | bellard | +static unsigned const int intr_to_mask[16] = {
|
| 1948 | e80cfcfc | bellard | 0, 0, 0, 0, 0, 0, SUN4M_INT_ETHERNET, 0, |
| 1949 | e80cfcfc | bellard | 0, 0, 0, 0, 0, 0, 0, 0, |
| 1950 | 8d5f07fa | bellard | }; |
| 1951 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/swap.c proll-patch4/src/swap.c
|
| 1952 | e80cfcfc | bellard | --- proll_18.orig/src/swap.c 1970-01-01 00:00:00.000000000 +0000
|
| 1953 | e80cfcfc | bellard | +++ proll-patch4/src/swap.c 2004-11-13 15:50:49.000000000 +0000
|
| 1954 | e80cfcfc | bellard | @@ -0,0 +1,21 @@
|
| 1955 | e80cfcfc | bellard | +// Convert the lat7 font so that no conversion is needed at runtime.
|
| 1956 | e80cfcfc | bellard | +#define ORIG
|
| 1957 | e80cfcfc | bellard | +#include "rconsole.c"
|
| 1958 | e80cfcfc | bellard | +
|
| 1959 | e80cfcfc | bellard | +#include <stdio.h>
|
| 1960 | e80cfcfc | bellard | +
|
| 1961 | e80cfcfc | bellard | +int main()
|
| 1962 | e80cfcfc | bellard | +{
|
| 1963 | e80cfcfc | bellard | + struct rfont p;
|
| 1964 | e80cfcfc | bellard | + int i;
|
| 1965 | e80cfcfc | bellard | +
|
| 1966 | e80cfcfc | bellard | + font_cons_7(&p);
|
| 1967 | e80cfcfc | bellard | +
|
| 1968 | e80cfcfc | bellard | + printf(" ");
|
| 1969 | e80cfcfc | bellard | + for (i = 0; i < LAT7_NCHARS*LAT7_HEIGHT; i++) {
|
| 1970 | e80cfcfc | bellard | + printf("0x%02x, ", p.body_[i]);
|
| 1971 | e80cfcfc | bellard | + if ((i % 12) == 11)
|
| 1972 | e80cfcfc | bellard | + printf("\n ");
|
| 1973 | e80cfcfc | bellard | + }
|
| 1974 | e80cfcfc | bellard | + printf("\n");
|
| 1975 | e80cfcfc | bellard | +}
|
| 1976 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/system.c proll-patch4/src/system.c
|
| 1977 | e80cfcfc | bellard | --- proll_18.orig/src/system.c 2002-07-23 05:52:49.000000000 +0000
|
| 1978 | e80cfcfc | bellard | +++ proll-patch4/src/system.c 2004-11-13 15:50:49.000000000 +0000
|
| 1979 | e80cfcfc | bellard | @@ -298,8 +298,8 @@
|
| 1980 | e80cfcfc | bellard | } |
| 1981 | e80cfcfc | bellard | |
| 1982 | e80cfcfc | bellard | /* We need to start from LOADBASE, but kernel wants PAGE_SIZE. */
|
| 1983 | e80cfcfc | bellard | - pa = PAGE_SIZE;
|
| 1984 | e80cfcfc | bellard | - for (va = PAGE_SIZE; va < LOWMEMSZ; va += PAGE_SIZE) {
|
| 1985 | e80cfcfc | bellard | + pa = 0;
|
| 1986 | e80cfcfc | bellard | + for (va = 0; va < LOWMEMSZ; va += PAGE_SIZE) {
|
| 1987 | e80cfcfc | bellard | map_page(l1, va, pa, 0, highbase);
|
| 1988 | e80cfcfc | bellard | pa += PAGE_SIZE; |
| 1989 | e80cfcfc | bellard | } |
| 1990 | e80cfcfc | bellard | @@ -518,12 +518,12 @@
|
| 1991 | e80cfcfc | bellard | while (len--) *((char *)s)++ = 0; |
| 1992 | e80cfcfc | bellard | } |
| 1993 | e80cfcfc | bellard | |
| 1994 | e80cfcfc | bellard | -void bcopy(void *f, void *t, int len) {
|
| 1995 | e80cfcfc | bellard | +void bcopy(const void *f, void *t, int len) {
|
| 1996 | e80cfcfc | bellard | while (len--) *((char *)t)++ = *((char *)f)++; |
| 1997 | e80cfcfc | bellard | } |
| 1998 | e80cfcfc | bellard | |
| 1999 | e80cfcfc | bellard | /* Comparison is 7-bit */
|
| 2000 | e80cfcfc | bellard | -int bcmp(void *s1, void *s2, int len)
|
| 2001 | e80cfcfc | bellard | +int bcmp(const void *s1, const void *s2, int len)
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| 2002 | e80cfcfc | bellard | {
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| 2003 | e80cfcfc | bellard | int i;
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| 2004 | e80cfcfc | bellard | char ch;
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| 2005 | e80cfcfc | bellard | @@ -538,8 +538,8 @@
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| 2006 | e80cfcfc | bellard | return 0; |
| 2007 | e80cfcfc | bellard | } |
| 2008 | e80cfcfc | bellard | |
| 2009 | e80cfcfc | bellard | -int strlen(char *s) {
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| 2010 | e80cfcfc | bellard | - char *p;
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| 2011 | e80cfcfc | bellard | +int strlen(const char *s) {
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| 2012 | e80cfcfc | bellard | + const char *p;
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| 2013 | e80cfcfc | bellard | for (p = s; *p != 0; p++) { } |
| 2014 | e80cfcfc | bellard | return p - s;
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| 2015 | e80cfcfc | bellard | } |
| 2016 | e80cfcfc | bellard | @@ -560,14 +560,6 @@
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| 2017 | e80cfcfc | bellard | va_end(x1); |
| 2018 | e80cfcfc | bellard | } |
| 2019 | e80cfcfc | bellard | |
| 2020 | e80cfcfc | bellard | -/* This is taken from x86 to be used in network kernel. Returns 15 bits. */
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| 2021 | e80cfcfc | bellard | -short int random()
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| 2022 | e80cfcfc | bellard | -{
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| 2023 | e80cfcfc | bellard | - static unsigned int seed = 151;
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| 2024 | e80cfcfc | bellard | - seed = (seed + 23968)*0x015A4E35 >> 1;
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| 2025 | e80cfcfc | bellard | - return seed & 0x7FFF;
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| 2026 | e80cfcfc | bellard | -}
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| 2027 | e80cfcfc | bellard | -
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| 2028 | e80cfcfc | bellard | void fatal()
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| 2029 | e80cfcfc | bellard | {
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| 2030 | e80cfcfc | bellard | printk("fatal.");
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| 2031 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/system.h proll-patch4/src/system.h
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| 2032 | e80cfcfc | bellard | --- proll_18.orig/src/system.h 2002-09-13 21:53:32.000000000 +0000
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| 2033 | e80cfcfc | bellard | +++ proll-patch4/src/system.h 2004-11-13 15:50:49.000000000 +0000
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| 2034 | e80cfcfc | bellard | @@ -16,7 +16,7 @@
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| 2035 | e80cfcfc | bellard | #define IOMAPSIZE (1*1024*1024) /* 1 Meg maximum: we do not map framebuffer. */ |
| 2036 | e80cfcfc | bellard | #define NCTX_SWIFT 0x100 |
| 2037 | e80cfcfc | bellard | |
| 2038 | e80cfcfc | bellard | -#define MAX_BANKS 3 /* Allocation for all machines */
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| 2039 | e80cfcfc | bellard | +#define MAX_BANKS 8 /* Allocation for all machines */
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| 2040 | e80cfcfc | bellard | |
| 2041 | e80cfcfc | bellard | #ifndef __ASSEMBLY__
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| 2042 | e80cfcfc | bellard | struct bank {
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| 2043 | e80cfcfc | bellard | diff -ruN proll_18.orig/src/udp.c proll-patch4/src/udp.c
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| 2044 | e80cfcfc | bellard | --- proll_18.orig/src/udp.c 2001-12-24 05:12:53.000000000 +0000
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| 2045 | e80cfcfc | bellard | +++ proll-patch4/src/udp.c 2004-11-13 15:50:49.000000000 +0000
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| 2046 | e80cfcfc | bellard | @@ -81,7 +81,7 @@
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| 2047 | e80cfcfc | bellard | int source;
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| 2048 | e80cfcfc | bellard | int dest;
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| 2049 | e80cfcfc | bellard | {
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| 2050 | e80cfcfc | bellard | - register unsigned char *addr;
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| 2051 | e80cfcfc | bellard | + const register unsigned char *addr;
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| 2052 | 8d5f07fa | bellard | |
| 2053 | e80cfcfc | bellard | /* Set global variables */
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| 2054 | e80cfcfc | bellard | usource = source; |
| 2055 | e80cfcfc | bellard | @@ -299,9 +299,6 @@
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| 2056 | e80cfcfc | bellard | */ |
| 2057 | e80cfcfc | bellard | int init_udp()
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| 2058 | e80cfcfc | bellard | {
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| 2059 | e80cfcfc | bellard | - /* Set module name for error handling */
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| 2060 | e80cfcfc | bellard | - net_module_name = "udp";
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| 2061 | e80cfcfc | bellard | -
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| 2062 | e80cfcfc | bellard | /* Register IP packet type and set write buffer pointer */
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| 2063 | e80cfcfc | bellard | if ((writebuf = reg_type(htons(ETH_P_IP), ip_recv)) == NULL) |
| 2064 | e80cfcfc | bellard | return(FALSE); |