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1 | b92e5a22 | bellard | /*
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2 | b92e5a22 | bellard | * Software MMU support
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3 | 5fafdf24 | ths | *
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4 | efbf29b6 | Blue Swirl | * Generate helpers used by TCG for qemu_ld/st ops and code load
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5 | efbf29b6 | Blue Swirl | * functions.
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6 | efbf29b6 | Blue Swirl | *
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7 | efbf29b6 | Blue Swirl | * Included from target op helpers and exec.c.
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8 | efbf29b6 | Blue Swirl | *
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9 | b92e5a22 | bellard | * Copyright (c) 2003 Fabrice Bellard
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10 | b92e5a22 | bellard | *
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11 | b92e5a22 | bellard | * This library is free software; you can redistribute it and/or
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12 | b92e5a22 | bellard | * modify it under the terms of the GNU Lesser General Public
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13 | b92e5a22 | bellard | * License as published by the Free Software Foundation; either
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14 | b92e5a22 | bellard | * version 2 of the License, or (at your option) any later version.
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15 | b92e5a22 | bellard | *
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16 | b92e5a22 | bellard | * This library is distributed in the hope that it will be useful,
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17 | b92e5a22 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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18 | b92e5a22 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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19 | b92e5a22 | bellard | * Lesser General Public License for more details.
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20 | b92e5a22 | bellard | *
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21 | b92e5a22 | bellard | * You should have received a copy of the GNU Lesser General Public
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22 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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23 | b92e5a22 | bellard | */
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24 | 29e922b6 | Blue Swirl | #include "qemu-timer.h" |
25 | 0e0df1e2 | Avi Kivity | #include "memory.h" |
26 | 29e922b6 | Blue Swirl | |
27 | b92e5a22 | bellard | #define DATA_SIZE (1 << SHIFT) |
28 | b92e5a22 | bellard | |
29 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
30 | b92e5a22 | bellard | #define SUFFIX q
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31 | 61382a50 | bellard | #define USUFFIX q
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32 | b92e5a22 | bellard | #define DATA_TYPE uint64_t
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33 | b92e5a22 | bellard | #elif DATA_SIZE == 4 |
34 | b92e5a22 | bellard | #define SUFFIX l
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35 | 61382a50 | bellard | #define USUFFIX l
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36 | b92e5a22 | bellard | #define DATA_TYPE uint32_t
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37 | b92e5a22 | bellard | #elif DATA_SIZE == 2 |
38 | b92e5a22 | bellard | #define SUFFIX w
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39 | 61382a50 | bellard | #define USUFFIX uw
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40 | b92e5a22 | bellard | #define DATA_TYPE uint16_t
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41 | b92e5a22 | bellard | #elif DATA_SIZE == 1 |
42 | b92e5a22 | bellard | #define SUFFIX b
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43 | 61382a50 | bellard | #define USUFFIX ub
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44 | b92e5a22 | bellard | #define DATA_TYPE uint8_t
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45 | b92e5a22 | bellard | #else
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46 | b92e5a22 | bellard | #error unsupported data size
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47 | b92e5a22 | bellard | #endif
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48 | b92e5a22 | bellard | |
49 | b769d8fe | bellard | #ifdef SOFTMMU_CODE_ACCESS
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50 | b769d8fe | bellard | #define READ_ACCESS_TYPE 2 |
51 | 84b7b8e7 | bellard | #define ADDR_READ addr_code
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52 | b769d8fe | bellard | #else
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53 | b769d8fe | bellard | #define READ_ACCESS_TYPE 0 |
54 | 84b7b8e7 | bellard | #define ADDR_READ addr_read
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55 | b769d8fe | bellard | #endif
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56 | b769d8fe | bellard | |
57 | 5fafdf24 | ths | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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58 | 6ebbf390 | j_mayer | int mmu_idx,
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59 | 61382a50 | bellard | void *retaddr);
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60 | c227f099 | Anthony Liguori | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, |
61 | 2e70f6ef | pbrook | target_ulong addr, |
62 | 2e70f6ef | pbrook | void *retaddr)
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63 | b92e5a22 | bellard | { |
64 | b92e5a22 | bellard | DATA_TYPE res; |
65 | b92e5a22 | bellard | int index;
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66 | 11c7ef0c | Avi Kivity | index = physaddr & (IO_MEM_NB_ENTRIES - 1);
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67 | 0f459d16 | pbrook | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
68 | 2e70f6ef | pbrook | env->mem_io_pc = (unsigned long)retaddr; |
69 | 0e0df1e2 | Avi Kivity | if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr
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70 | 0e0df1e2 | Avi Kivity | && index != io_mem_unassigned.ram_addr |
71 | 0e0df1e2 | Avi Kivity | && index != io_mem_notdirty.ram_addr |
72 | 2e70f6ef | pbrook | && !can_do_io(env)) { |
73 | 2e70f6ef | pbrook | cpu_io_recompile(env, retaddr); |
74 | 2e70f6ef | pbrook | } |
75 | b92e5a22 | bellard | |
76 | db8886d3 | aliguori | env->mem_io_vaddr = addr; |
77 | b92e5a22 | bellard | #if SHIFT <= 2 |
78 | acbbec5d | Avi Kivity | res = io_mem_read(index, physaddr, 1 << SHIFT);
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79 | b92e5a22 | bellard | #else
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80 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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81 | acbbec5d | Avi Kivity | res = io_mem_read(index, physaddr, 4) << 32; |
82 | acbbec5d | Avi Kivity | res |= io_mem_read(index, physaddr + 4, 4); |
83 | b92e5a22 | bellard | #else
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84 | acbbec5d | Avi Kivity | res = io_mem_read(index, physaddr, 4);
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85 | acbbec5d | Avi Kivity | res |= io_mem_read(index, physaddr + 4, 4) << 32; |
86 | b92e5a22 | bellard | #endif
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87 | b92e5a22 | bellard | #endif /* SHIFT > 2 */ |
88 | b92e5a22 | bellard | return res;
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89 | b92e5a22 | bellard | } |
90 | b92e5a22 | bellard | |
91 | b92e5a22 | bellard | /* handle all cases except unaligned access which span two pages */
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92 | d656469f | bellard | DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
93 | d656469f | bellard | int mmu_idx)
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94 | b92e5a22 | bellard | { |
95 | b92e5a22 | bellard | DATA_TYPE res; |
96 | 61382a50 | bellard | int index;
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97 | c27004ec | bellard | target_ulong tlb_addr; |
98 | 355b1943 | Paul Brook | target_phys_addr_t ioaddr; |
99 | 355b1943 | Paul Brook | unsigned long addend; |
100 | b92e5a22 | bellard | void *retaddr;
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101 | 3b46e624 | ths | |
102 | b92e5a22 | bellard | /* test if there is match for unaligned or IO access */
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103 | b92e5a22 | bellard | /* XXX: could done more in memory macro in a non portable way */
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104 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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105 | b92e5a22 | bellard | redo:
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106 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
107 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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108 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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109 | b92e5a22 | bellard | /* IO access */
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110 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
111 | b92e5a22 | bellard | goto do_unaligned_access;
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112 | 2e70f6ef | pbrook | retaddr = GETPC(); |
113 | 355b1943 | Paul Brook | ioaddr = env->iotlb[mmu_idx][index]; |
114 | 355b1943 | Paul Brook | res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr); |
115 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
116 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages or IO) */
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117 | b92e5a22 | bellard | do_unaligned_access:
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118 | 61382a50 | bellard | retaddr = GETPC(); |
119 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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120 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
121 | a64d4718 | bellard | #endif
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122 | 5fafdf24 | ths | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, |
123 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
124 | b92e5a22 | bellard | } else {
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125 | a64d4718 | bellard | /* unaligned/aligned access in the same page */
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126 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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127 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) { |
128 | a64d4718 | bellard | retaddr = GETPC(); |
129 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
130 | a64d4718 | bellard | } |
131 | a64d4718 | bellard | #endif
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132 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
133 | 0f459d16 | pbrook | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
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134 | b92e5a22 | bellard | } |
135 | b92e5a22 | bellard | } else {
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136 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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137 | 61382a50 | bellard | retaddr = GETPC(); |
138 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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139 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
140 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
141 | a64d4718 | bellard | #endif
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142 | bccd9ec5 | Blue Swirl | tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
143 | b92e5a22 | bellard | goto redo;
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144 | b92e5a22 | bellard | } |
145 | b92e5a22 | bellard | return res;
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146 | b92e5a22 | bellard | } |
147 | b92e5a22 | bellard | |
148 | b92e5a22 | bellard | /* handle all unaligned cases */
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149 | 5fafdf24 | ths | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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150 | 6ebbf390 | j_mayer | int mmu_idx,
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151 | 61382a50 | bellard | void *retaddr)
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152 | b92e5a22 | bellard | { |
153 | b92e5a22 | bellard | DATA_TYPE res, res1, res2; |
154 | 61382a50 | bellard | int index, shift;
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155 | 355b1943 | Paul Brook | target_phys_addr_t ioaddr; |
156 | 355b1943 | Paul Brook | unsigned long addend; |
157 | c27004ec | bellard | target_ulong tlb_addr, addr1, addr2; |
158 | b92e5a22 | bellard | |
159 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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160 | b92e5a22 | bellard | redo:
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161 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
162 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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163 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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164 | b92e5a22 | bellard | /* IO access */
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165 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
166 | b92e5a22 | bellard | goto do_unaligned_access;
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167 | 355b1943 | Paul Brook | ioaddr = env->iotlb[mmu_idx][index]; |
168 | 355b1943 | Paul Brook | res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr); |
169 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
170 | b92e5a22 | bellard | do_unaligned_access:
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171 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages) */
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172 | b92e5a22 | bellard | addr1 = addr & ~(DATA_SIZE - 1);
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173 | b92e5a22 | bellard | addr2 = addr1 + DATA_SIZE; |
174 | 5fafdf24 | ths | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, |
175 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
176 | 5fafdf24 | ths | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, |
177 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
178 | b92e5a22 | bellard | shift = (addr & (DATA_SIZE - 1)) * 8; |
179 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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180 | b92e5a22 | bellard | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
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181 | b92e5a22 | bellard | #else
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182 | b92e5a22 | bellard | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift));
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183 | b92e5a22 | bellard | #endif
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184 | 6986f88c | bellard | res = (DATA_TYPE)res; |
185 | b92e5a22 | bellard | } else {
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186 | b92e5a22 | bellard | /* unaligned/aligned access in the same page */
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187 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
188 | 0f459d16 | pbrook | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
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189 | b92e5a22 | bellard | } |
190 | b92e5a22 | bellard | } else {
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191 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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192 | bccd9ec5 | Blue Swirl | tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
193 | b92e5a22 | bellard | goto redo;
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194 | b92e5a22 | bellard | } |
195 | b92e5a22 | bellard | return res;
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196 | b92e5a22 | bellard | } |
197 | b92e5a22 | bellard | |
198 | b769d8fe | bellard | #ifndef SOFTMMU_CODE_ACCESS
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199 | b769d8fe | bellard | |
200 | 5fafdf24 | ths | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
201 | 5fafdf24 | ths | DATA_TYPE val, |
202 | 6ebbf390 | j_mayer | int mmu_idx,
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203 | b769d8fe | bellard | void *retaddr);
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204 | b769d8fe | bellard | |
205 | c227f099 | Anthony Liguori | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, |
206 | b769d8fe | bellard | DATA_TYPE val, |
207 | 0f459d16 | pbrook | target_ulong addr, |
208 | b769d8fe | bellard | void *retaddr)
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209 | b769d8fe | bellard | { |
210 | b769d8fe | bellard | int index;
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211 | 11c7ef0c | Avi Kivity | index = physaddr & (IO_MEM_NB_ENTRIES - 1);
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212 | 0f459d16 | pbrook | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
213 | 0e0df1e2 | Avi Kivity | if (index != io_mem_ram.ram_addr && index != io_mem_rom.ram_addr
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214 | 0e0df1e2 | Avi Kivity | && index != io_mem_unassigned.ram_addr |
215 | 0e0df1e2 | Avi Kivity | && index != io_mem_notdirty.ram_addr |
216 | 2e70f6ef | pbrook | && !can_do_io(env)) { |
217 | 2e70f6ef | pbrook | cpu_io_recompile(env, retaddr); |
218 | 2e70f6ef | pbrook | } |
219 | b769d8fe | bellard | |
220 | 2e70f6ef | pbrook | env->mem_io_vaddr = addr; |
221 | 2e70f6ef | pbrook | env->mem_io_pc = (unsigned long)retaddr; |
222 | b769d8fe | bellard | #if SHIFT <= 2 |
223 | acbbec5d | Avi Kivity | io_mem_write(index, physaddr, val, 1 << SHIFT);
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224 | b769d8fe | bellard | #else
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225 | b769d8fe | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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226 | acbbec5d | Avi Kivity | io_mem_write(index, physaddr, (val >> 32), 4); |
227 | acbbec5d | Avi Kivity | io_mem_write(index, physaddr + 4, (uint32_t)val, 4); |
228 | b769d8fe | bellard | #else
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229 | acbbec5d | Avi Kivity | io_mem_write(index, physaddr, (uint32_t)val, 4);
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230 | acbbec5d | Avi Kivity | io_mem_write(index, physaddr + 4, val >> 32, 4); |
231 | b769d8fe | bellard | #endif
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232 | b769d8fe | bellard | #endif /* SHIFT > 2 */ |
233 | b769d8fe | bellard | } |
234 | b92e5a22 | bellard | |
235 | d656469f | bellard | void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
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236 | d656469f | bellard | DATA_TYPE val, |
237 | d656469f | bellard | int mmu_idx)
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238 | b92e5a22 | bellard | { |
239 | 355b1943 | Paul Brook | target_phys_addr_t ioaddr; |
240 | 355b1943 | Paul Brook | unsigned long addend; |
241 | c27004ec | bellard | target_ulong tlb_addr; |
242 | b92e5a22 | bellard | void *retaddr;
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243 | 61382a50 | bellard | int index;
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244 | 3b46e624 | ths | |
245 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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246 | b92e5a22 | bellard | redo:
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247 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
248 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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249 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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250 | b92e5a22 | bellard | /* IO access */
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251 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
252 | b92e5a22 | bellard | goto do_unaligned_access;
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253 | d720b93d | bellard | retaddr = GETPC(); |
254 | 355b1943 | Paul Brook | ioaddr = env->iotlb[mmu_idx][index]; |
255 | 355b1943 | Paul Brook | glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr); |
256 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
257 | b92e5a22 | bellard | do_unaligned_access:
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258 | 61382a50 | bellard | retaddr = GETPC(); |
259 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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260 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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261 | a64d4718 | bellard | #endif
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262 | 5fafdf24 | ths | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, |
263 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
264 | b92e5a22 | bellard | } else {
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265 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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266 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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267 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) { |
268 | a64d4718 | bellard | retaddr = GETPC(); |
269 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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270 | a64d4718 | bellard | } |
271 | a64d4718 | bellard | #endif
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272 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
273 | 0f459d16 | pbrook | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
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274 | b92e5a22 | bellard | } |
275 | b92e5a22 | bellard | } else {
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276 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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277 | 61382a50 | bellard | retaddr = GETPC(); |
278 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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279 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
280 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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281 | a64d4718 | bellard | #endif
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282 | bccd9ec5 | Blue Swirl | tlb_fill(env, addr, 1, mmu_idx, retaddr);
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283 | b92e5a22 | bellard | goto redo;
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284 | b92e5a22 | bellard | } |
285 | b92e5a22 | bellard | } |
286 | b92e5a22 | bellard | |
287 | b92e5a22 | bellard | /* handles all unaligned cases */
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288 | 5fafdf24 | ths | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
289 | 61382a50 | bellard | DATA_TYPE val, |
290 | 6ebbf390 | j_mayer | int mmu_idx,
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291 | 61382a50 | bellard | void *retaddr)
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292 | b92e5a22 | bellard | { |
293 | 355b1943 | Paul Brook | target_phys_addr_t ioaddr; |
294 | 355b1943 | Paul Brook | unsigned long addend; |
295 | c27004ec | bellard | target_ulong tlb_addr; |
296 | 61382a50 | bellard | int index, i;
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297 | b92e5a22 | bellard | |
298 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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299 | b92e5a22 | bellard | redo:
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300 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
301 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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302 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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303 | b92e5a22 | bellard | /* IO access */
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304 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
305 | b92e5a22 | bellard | goto do_unaligned_access;
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306 | 355b1943 | Paul Brook | ioaddr = env->iotlb[mmu_idx][index]; |
307 | 355b1943 | Paul Brook | glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr); |
308 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
309 | b92e5a22 | bellard | do_unaligned_access:
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310 | b92e5a22 | bellard | /* XXX: not efficient, but simple */
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311 | 6c41b272 | balrog | /* Note: relies on the fact that tlb_fill() does not remove the
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312 | 6c41b272 | balrog | * previous page from the TLB cache. */
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313 | 7221fa98 | balrog | for(i = DATA_SIZE - 1; i >= 0; i--) { |
314 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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315 | 5fafdf24 | ths | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
316 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
317 | b92e5a22 | bellard | #else
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318 | 5fafdf24 | ths | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
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319 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
320 | b92e5a22 | bellard | #endif
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321 | b92e5a22 | bellard | } |
322 | b92e5a22 | bellard | } else {
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323 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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324 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
325 | 0f459d16 | pbrook | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
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326 | b92e5a22 | bellard | } |
327 | b92e5a22 | bellard | } else {
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328 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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329 | bccd9ec5 | Blue Swirl | tlb_fill(env, addr, 1, mmu_idx, retaddr);
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330 | b92e5a22 | bellard | goto redo;
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331 | b92e5a22 | bellard | } |
332 | b92e5a22 | bellard | } |
333 | b92e5a22 | bellard | |
334 | b769d8fe | bellard | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
335 | b769d8fe | bellard | |
336 | b769d8fe | bellard | #undef READ_ACCESS_TYPE
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337 | b92e5a22 | bellard | #undef SHIFT
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338 | b92e5a22 | bellard | #undef DATA_TYPE
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339 | b92e5a22 | bellard | #undef SUFFIX
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340 | 61382a50 | bellard | #undef USUFFIX
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341 | b92e5a22 | bellard | #undef DATA_SIZE
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342 | 84b7b8e7 | bellard | #undef ADDR_READ |