Revision b29a0341 target-mips/translate.c

b/target-mips/translate.c
3099 3099 
           rn = "PRid";
3100 3100 
           break;
3101 3101 
        case 1:
3102 
           gen_op_dmfc0_ebase();
3102 
           gen_op_mfc0_ebase();
3103 3103 
           rn = "EBase";
3104 3104 
           break;
3105 3105 
        default:
......
3683 3683 
           rn = "PRid";
3684 3684 
           break;
3685 3685 
        case 1:
3686 
           gen_op_dmtc0_ebase();
3686 
           gen_op_mtc0_ebase();
3687 3687 
           rn = "EBase";
3688 3688 
           break;
3689 3689 
        default:
......
5305 5305 
#endif
5306 5306 
    env->CP0_Wired = 0;
5307 5307 
    /* SMP not implemented */
5308 
    env->CP0_EBase = (int32_t)0x80000000;
5308 
    env->CP0_EBase = 0x80000000;
5309 5309 
    env->CP0_Config0 = MIPS_CONFIG0;
5310 5310 
    env->CP0_Config1 = MIPS_CONFIG1;
5311 5311 
    env->CP0_Config2 = MIPS_CONFIG2;

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