Revision b3440746 target-ppc/mmu-hash32.c
| b/target-ppc/mmu-hash32.c | ||
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| 274 | 274 |
} |
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} |
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static int ppc_hash32_pte_update_flags(struct mmu_ctx_hash32 *ctx, uint32_t *pte1p, |
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int ret, int rwx) |
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{
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int store = 0; |
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/* Update page flags */ |
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if (!(*pte1p & HPTE32_R_R)) {
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/* Update accessed flag */ |
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*pte1p |= HPTE32_R_R; |
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store = 1; |
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} |
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if (!(*pte1p & HPTE32_R_C)) {
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if (rwx == 1 && ret == 0) {
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/* Update changed flag */ |
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*pte1p |= HPTE32_R_C; |
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store = 1; |
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} else {
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/* Force page fault for first write access */ |
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ctx->prot &= ~PAGE_WRITE; |
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} |
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} |
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return store; |
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} |
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hwaddr get_pteg_offset32(CPUPPCState *env, hwaddr hash) |
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{
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return (hash * HASH_PTEG_SIZE_32) & env->htab_mask; |
| ... | ... | |
| 374 | 349 |
target_ulong sr; |
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hwaddr pte_offset; |
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ppc_hash_pte32_t pte; |
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uint32_t new_pte1; |
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const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC};
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assert((rwx == 0) || (rwx == 1) || (rwx == 2)); |
| ... | ... | |
| 432 | 408 |
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/* 8. Update PTE referenced and changed bits if necessary */ |
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if (ppc_hash32_pte_update_flags(ctx, &pte.pte1, 0, rwx) == 1) {
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ppc_hash32_store_hpte1(env, pte_offset, pte.pte1); |
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new_pte1 = pte.pte1 | HPTE32_R_R; /* set referenced bit */ |
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if (rwx == 1) {
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new_pte1 |= HPTE32_R_C; /* set changed (dirty) bit */ |
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} else {
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/* Treat the page as read-only for now, so that a later write |
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* will pass through this function again to set the C bit */ |
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ctx->prot &= ~PAGE_WRITE; |
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} |
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if (new_pte1 != pte.pte1) {
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ppc_hash32_store_hpte1(env, pte_offset, new_pte1); |
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} |
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/* Keep the matching PTE informations */ |
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