root / target-s390x / cpu.h @ b4160af1
History | View | Annotate | Download (37.4 kB)
1 | 10ec5117 | Alexander Graf | /*
|
---|---|---|---|
2 | 10ec5117 | Alexander Graf | * S/390 virtual CPU header
|
3 | 10ec5117 | Alexander Graf | *
|
4 | 10ec5117 | Alexander Graf | * Copyright (c) 2009 Ulrich Hecht
|
5 | 10ec5117 | Alexander Graf | *
|
6 | 10ec5117 | Alexander Graf | * This library is free software; you can redistribute it and/or
|
7 | 10ec5117 | Alexander Graf | * modify it under the terms of the GNU Lesser General Public
|
8 | 10ec5117 | Alexander Graf | * License as published by the Free Software Foundation; either
|
9 | 10ec5117 | Alexander Graf | * version 2 of the License, or (at your option) any later version.
|
10 | 10ec5117 | Alexander Graf | *
|
11 | 10ec5117 | Alexander Graf | * This library is distributed in the hope that it will be useful,
|
12 | 10ec5117 | Alexander Graf | * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 | 10ec5117 | Alexander Graf | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
14 | 10ec5117 | Alexander Graf | * Lesser General Public License for more details.
|
15 | 10ec5117 | Alexander Graf | *
|
16 | ccb084d3 | Christian Borntraeger | * Contributions after 2012-10-29 are licensed under the terms of the
|
17 | ccb084d3 | Christian Borntraeger | * GNU GPL, version 2 or (at your option) any later version.
|
18 | ccb084d3 | Christian Borntraeger | *
|
19 | ccb084d3 | Christian Borntraeger | * You should have received a copy of the GNU (Lesser) General Public
|
20 | 70539e18 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
21 | 10ec5117 | Alexander Graf | */
|
22 | 10ec5117 | Alexander Graf | #ifndef CPU_S390X_H
|
23 | 10ec5117 | Alexander Graf | #define CPU_S390X_H
|
24 | 45133b74 | Stefan Weil | |
25 | 45133b74 | Stefan Weil | #include "config.h" |
26 | 45133b74 | Stefan Weil | #include "qemu-common.h" |
27 | 10ec5117 | Alexander Graf | |
28 | 10ec5117 | Alexander Graf | #define TARGET_LONG_BITS 64 |
29 | 10ec5117 | Alexander Graf | |
30 | 10ec5117 | Alexander Graf | #define ELF_MACHINE EM_S390
|
31 | 10ec5117 | Alexander Graf | |
32 | 9349b4f9 | Andreas Färber | #define CPUArchState struct CPUS390XState |
33 | 10ec5117 | Alexander Graf | |
34 | 022c62cb | Paolo Bonzini | #include "exec/cpu-defs.h" |
35 | bcec36ea | Alexander Graf | #define TARGET_PAGE_BITS 12 |
36 | bcec36ea | Alexander Graf | |
37 | 5b23fd03 | Paolo Bonzini | #define TARGET_PHYS_ADDR_SPACE_BITS 64 |
38 | bcec36ea | Alexander Graf | #define TARGET_VIRT_ADDR_SPACE_BITS 64 |
39 | bcec36ea | Alexander Graf | |
40 | 022c62cb | Paolo Bonzini | #include "exec/cpu-all.h" |
41 | 10ec5117 | Alexander Graf | |
42 | 6b4c305c | Paolo Bonzini | #include "fpu/softfloat.h" |
43 | 10ec5117 | Alexander Graf | |
44 | bcec36ea | Alexander Graf | #define NB_MMU_MODES 3 |
45 | 10ec5117 | Alexander Graf | |
46 | bcec36ea | Alexander Graf | #define MMU_MODE0_SUFFIX _primary
|
47 | bcec36ea | Alexander Graf | #define MMU_MODE1_SUFFIX _secondary
|
48 | bcec36ea | Alexander Graf | #define MMU_MODE2_SUFFIX _home
|
49 | bcec36ea | Alexander Graf | |
50 | bcec36ea | Alexander Graf | #define MMU_USER_IDX 1 |
51 | bcec36ea | Alexander Graf | |
52 | bcec36ea | Alexander Graf | #define MAX_EXT_QUEUE 16 |
53 | 5d69c547 | Cornelia Huck | #define MAX_IO_QUEUE 16 |
54 | 5d69c547 | Cornelia Huck | #define MAX_MCHK_QUEUE 16 |
55 | 5d69c547 | Cornelia Huck | |
56 | 5d69c547 | Cornelia Huck | #define PSW_MCHK_MASK 0x0004000000000000 |
57 | 5d69c547 | Cornelia Huck | #define PSW_IO_MASK 0x0200000000000000 |
58 | bcec36ea | Alexander Graf | |
59 | bcec36ea | Alexander Graf | typedef struct PSW { |
60 | bcec36ea | Alexander Graf | uint64_t mask; |
61 | bcec36ea | Alexander Graf | uint64_t addr; |
62 | bcec36ea | Alexander Graf | } PSW; |
63 | bcec36ea | Alexander Graf | |
64 | bcec36ea | Alexander Graf | typedef struct ExtQueue { |
65 | bcec36ea | Alexander Graf | uint32_t code; |
66 | bcec36ea | Alexander Graf | uint32_t param; |
67 | bcec36ea | Alexander Graf | uint32_t param64; |
68 | bcec36ea | Alexander Graf | } ExtQueue; |
69 | 10ec5117 | Alexander Graf | |
70 | 5d69c547 | Cornelia Huck | typedef struct IOIntQueue { |
71 | 5d69c547 | Cornelia Huck | uint16_t id; |
72 | 5d69c547 | Cornelia Huck | uint16_t nr; |
73 | 5d69c547 | Cornelia Huck | uint32_t parm; |
74 | 5d69c547 | Cornelia Huck | uint32_t word; |
75 | 5d69c547 | Cornelia Huck | } IOIntQueue; |
76 | 5d69c547 | Cornelia Huck | |
77 | 5d69c547 | Cornelia Huck | typedef struct MchkQueue { |
78 | 5d69c547 | Cornelia Huck | uint16_t type; |
79 | 5d69c547 | Cornelia Huck | } MchkQueue; |
80 | 5d69c547 | Cornelia Huck | |
81 | 10ec5117 | Alexander Graf | typedef struct CPUS390XState { |
82 | 1ac5889f | Richard Henderson | uint64_t regs[16]; /* GP registers */ |
83 | 1ac5889f | Richard Henderson | CPU_DoubleU fregs[16]; /* FP registers */ |
84 | 1ac5889f | Richard Henderson | uint32_t aregs[16]; /* access registers */ |
85 | 10ec5117 | Alexander Graf | |
86 | 1ac5889f | Richard Henderson | uint32_t fpc; /* floating-point control register */
|
87 | 1ac5889f | Richard Henderson | uint32_t cc_op; |
88 | 10ec5117 | Alexander Graf | |
89 | 10ec5117 | Alexander Graf | float_status fpu_status; /* passed to softfloat lib */
|
90 | 10ec5117 | Alexander Graf | |
91 | 1ac5889f | Richard Henderson | /* The low part of a 128-bit return, or remainder of a divide. */
|
92 | 1ac5889f | Richard Henderson | uint64_t retxl; |
93 | 1ac5889f | Richard Henderson | |
94 | bcec36ea | Alexander Graf | PSW psw; |
95 | 10ec5117 | Alexander Graf | |
96 | bcec36ea | Alexander Graf | uint64_t cc_src; |
97 | bcec36ea | Alexander Graf | uint64_t cc_dst; |
98 | bcec36ea | Alexander Graf | uint64_t cc_vr; |
99 | 10ec5117 | Alexander Graf | |
100 | 10ec5117 | Alexander Graf | uint64_t __excp_addr; |
101 | bcec36ea | Alexander Graf | uint64_t psa; |
102 | bcec36ea | Alexander Graf | |
103 | bcec36ea | Alexander Graf | uint32_t int_pgm_code; |
104 | d5a103cd | Richard Henderson | uint32_t int_pgm_ilen; |
105 | bcec36ea | Alexander Graf | |
106 | bcec36ea | Alexander Graf | uint32_t int_svc_code; |
107 | d5a103cd | Richard Henderson | uint32_t int_svc_ilen; |
108 | bcec36ea | Alexander Graf | |
109 | bcec36ea | Alexander Graf | uint64_t cregs[16]; /* control registers */ |
110 | bcec36ea | Alexander Graf | |
111 | bcec36ea | Alexander Graf | ExtQueue ext_queue[MAX_EXT_QUEUE]; |
112 | 5d69c547 | Cornelia Huck | IOIntQueue io_queue[MAX_IO_QUEUE][8];
|
113 | 5d69c547 | Cornelia Huck | MchkQueue mchk_queue[MAX_MCHK_QUEUE]; |
114 | bcec36ea | Alexander Graf | |
115 | 5d69c547 | Cornelia Huck | int pending_int;
|
116 | 4e836781 | Alexander Graf | int ext_index;
|
117 | 5d69c547 | Cornelia Huck | int io_index[8]; |
118 | 5d69c547 | Cornelia Huck | int mchk_index;
|
119 | 5d69c547 | Cornelia Huck | |
120 | 5d69c547 | Cornelia Huck | uint64_t ckc; |
121 | 5d69c547 | Cornelia Huck | uint64_t cputm; |
122 | 5d69c547 | Cornelia Huck | uint32_t todpr; |
123 | 4e836781 | Alexander Graf | |
124 | 4e836781 | Alexander Graf | CPU_COMMON |
125 | 4e836781 | Alexander Graf | |
126 | bcec36ea | Alexander Graf | /* reset does memset(0) up to here */
|
127 | bcec36ea | Alexander Graf | |
128 | bcec36ea | Alexander Graf | int cpu_num;
|
129 | bcec36ea | Alexander Graf | uint8_t *storage_keys; |
130 | bcec36ea | Alexander Graf | |
131 | bcec36ea | Alexander Graf | uint64_t tod_offset; |
132 | bcec36ea | Alexander Graf | uint64_t tod_basetime; |
133 | bcec36ea | Alexander Graf | QEMUTimer *tod_timer; |
134 | bcec36ea | Alexander Graf | |
135 | bcec36ea | Alexander Graf | QEMUTimer *cpu_timer; |
136 | 10ec5117 | Alexander Graf | } CPUS390XState; |
137 | 10ec5117 | Alexander Graf | |
138 | 564b863d | Andreas Färber | #include "cpu-qom.h" |
139 | 3d0a615f | Thomas Huth | #include <sysemu/kvm.h> |
140 | 564b863d | Andreas Färber | |
141 | 7b18aad5 | Cornelia Huck | /* distinguish between 24 bit and 31 bit addressing */
|
142 | 7b18aad5 | Cornelia Huck | #define HIGH_ORDER_BIT 0x80000000 |
143 | 7b18aad5 | Cornelia Huck | |
144 | bcec36ea | Alexander Graf | /* Interrupt Codes */
|
145 | bcec36ea | Alexander Graf | /* Program Interrupts */
|
146 | bcec36ea | Alexander Graf | #define PGM_OPERATION 0x0001 |
147 | bcec36ea | Alexander Graf | #define PGM_PRIVILEGED 0x0002 |
148 | bcec36ea | Alexander Graf | #define PGM_EXECUTE 0x0003 |
149 | bcec36ea | Alexander Graf | #define PGM_PROTECTION 0x0004 |
150 | bcec36ea | Alexander Graf | #define PGM_ADDRESSING 0x0005 |
151 | bcec36ea | Alexander Graf | #define PGM_SPECIFICATION 0x0006 |
152 | bcec36ea | Alexander Graf | #define PGM_DATA 0x0007 |
153 | bcec36ea | Alexander Graf | #define PGM_FIXPT_OVERFLOW 0x0008 |
154 | bcec36ea | Alexander Graf | #define PGM_FIXPT_DIVIDE 0x0009 |
155 | bcec36ea | Alexander Graf | #define PGM_DEC_OVERFLOW 0x000a |
156 | bcec36ea | Alexander Graf | #define PGM_DEC_DIVIDE 0x000b |
157 | bcec36ea | Alexander Graf | #define PGM_HFP_EXP_OVERFLOW 0x000c |
158 | bcec36ea | Alexander Graf | #define PGM_HFP_EXP_UNDERFLOW 0x000d |
159 | bcec36ea | Alexander Graf | #define PGM_HFP_SIGNIFICANCE 0x000e |
160 | bcec36ea | Alexander Graf | #define PGM_HFP_DIVIDE 0x000f |
161 | bcec36ea | Alexander Graf | #define PGM_SEGMENT_TRANS 0x0010 |
162 | bcec36ea | Alexander Graf | #define PGM_PAGE_TRANS 0x0011 |
163 | bcec36ea | Alexander Graf | #define PGM_TRANS_SPEC 0x0012 |
164 | bcec36ea | Alexander Graf | #define PGM_SPECIAL_OP 0x0013 |
165 | bcec36ea | Alexander Graf | #define PGM_OPERAND 0x0015 |
166 | bcec36ea | Alexander Graf | #define PGM_TRACE_TABLE 0x0016 |
167 | bcec36ea | Alexander Graf | #define PGM_SPACE_SWITCH 0x001c |
168 | bcec36ea | Alexander Graf | #define PGM_HFP_SQRT 0x001d |
169 | bcec36ea | Alexander Graf | #define PGM_PC_TRANS_SPEC 0x001f |
170 | bcec36ea | Alexander Graf | #define PGM_AFX_TRANS 0x0020 |
171 | bcec36ea | Alexander Graf | #define PGM_ASX_TRANS 0x0021 |
172 | bcec36ea | Alexander Graf | #define PGM_LX_TRANS 0x0022 |
173 | bcec36ea | Alexander Graf | #define PGM_EX_TRANS 0x0023 |
174 | bcec36ea | Alexander Graf | #define PGM_PRIM_AUTH 0x0024 |
175 | bcec36ea | Alexander Graf | #define PGM_SEC_AUTH 0x0025 |
176 | bcec36ea | Alexander Graf | #define PGM_ALET_SPEC 0x0028 |
177 | bcec36ea | Alexander Graf | #define PGM_ALEN_SPEC 0x0029 |
178 | bcec36ea | Alexander Graf | #define PGM_ALE_SEQ 0x002a |
179 | bcec36ea | Alexander Graf | #define PGM_ASTE_VALID 0x002b |
180 | bcec36ea | Alexander Graf | #define PGM_ASTE_SEQ 0x002c |
181 | bcec36ea | Alexander Graf | #define PGM_EXT_AUTH 0x002d |
182 | bcec36ea | Alexander Graf | #define PGM_STACK_FULL 0x0030 |
183 | bcec36ea | Alexander Graf | #define PGM_STACK_EMPTY 0x0031 |
184 | bcec36ea | Alexander Graf | #define PGM_STACK_SPEC 0x0032 |
185 | bcec36ea | Alexander Graf | #define PGM_STACK_TYPE 0x0033 |
186 | bcec36ea | Alexander Graf | #define PGM_STACK_OP 0x0034 |
187 | bcec36ea | Alexander Graf | #define PGM_ASCE_TYPE 0x0038 |
188 | bcec36ea | Alexander Graf | #define PGM_REG_FIRST_TRANS 0x0039 |
189 | bcec36ea | Alexander Graf | #define PGM_REG_SEC_TRANS 0x003a |
190 | bcec36ea | Alexander Graf | #define PGM_REG_THIRD_TRANS 0x003b |
191 | bcec36ea | Alexander Graf | #define PGM_MONITOR 0x0040 |
192 | bcec36ea | Alexander Graf | #define PGM_PER 0x0080 |
193 | bcec36ea | Alexander Graf | #define PGM_CRYPTO 0x0119 |
194 | bcec36ea | Alexander Graf | |
195 | bcec36ea | Alexander Graf | /* External Interrupts */
|
196 | bcec36ea | Alexander Graf | #define EXT_INTERRUPT_KEY 0x0040 |
197 | bcec36ea | Alexander Graf | #define EXT_CLOCK_COMP 0x1004 |
198 | bcec36ea | Alexander Graf | #define EXT_CPU_TIMER 0x1005 |
199 | bcec36ea | Alexander Graf | #define EXT_MALFUNCTION 0x1200 |
200 | bcec36ea | Alexander Graf | #define EXT_EMERGENCY 0x1201 |
201 | bcec36ea | Alexander Graf | #define EXT_EXTERNAL_CALL 0x1202 |
202 | bcec36ea | Alexander Graf | #define EXT_ETR 0x1406 |
203 | bcec36ea | Alexander Graf | #define EXT_SERVICE 0x2401 |
204 | bcec36ea | Alexander Graf | #define EXT_VIRTIO 0x2603 |
205 | bcec36ea | Alexander Graf | |
206 | bcec36ea | Alexander Graf | /* PSW defines */
|
207 | bcec36ea | Alexander Graf | #undef PSW_MASK_PER
|
208 | bcec36ea | Alexander Graf | #undef PSW_MASK_DAT
|
209 | bcec36ea | Alexander Graf | #undef PSW_MASK_IO
|
210 | bcec36ea | Alexander Graf | #undef PSW_MASK_EXT
|
211 | bcec36ea | Alexander Graf | #undef PSW_MASK_KEY
|
212 | bcec36ea | Alexander Graf | #undef PSW_SHIFT_KEY
|
213 | bcec36ea | Alexander Graf | #undef PSW_MASK_MCHECK
|
214 | bcec36ea | Alexander Graf | #undef PSW_MASK_WAIT
|
215 | bcec36ea | Alexander Graf | #undef PSW_MASK_PSTATE
|
216 | bcec36ea | Alexander Graf | #undef PSW_MASK_ASC
|
217 | bcec36ea | Alexander Graf | #undef PSW_MASK_CC
|
218 | bcec36ea | Alexander Graf | #undef PSW_MASK_PM
|
219 | bcec36ea | Alexander Graf | #undef PSW_MASK_64
|
220 | 29c6157c | Christian Borntraeger | #undef PSW_MASK_32
|
221 | 29c6157c | Christian Borntraeger | #undef PSW_MASK_ESA_ADDR
|
222 | bcec36ea | Alexander Graf | |
223 | bcec36ea | Alexander Graf | #define PSW_MASK_PER 0x4000000000000000ULL |
224 | bcec36ea | Alexander Graf | #define PSW_MASK_DAT 0x0400000000000000ULL |
225 | bcec36ea | Alexander Graf | #define PSW_MASK_IO 0x0200000000000000ULL |
226 | bcec36ea | Alexander Graf | #define PSW_MASK_EXT 0x0100000000000000ULL |
227 | bcec36ea | Alexander Graf | #define PSW_MASK_KEY 0x00F0000000000000ULL |
228 | bcec36ea | Alexander Graf | #define PSW_SHIFT_KEY 56 |
229 | bcec36ea | Alexander Graf | #define PSW_MASK_MCHECK 0x0004000000000000ULL |
230 | bcec36ea | Alexander Graf | #define PSW_MASK_WAIT 0x0002000000000000ULL |
231 | bcec36ea | Alexander Graf | #define PSW_MASK_PSTATE 0x0001000000000000ULL |
232 | bcec36ea | Alexander Graf | #define PSW_MASK_ASC 0x0000C00000000000ULL |
233 | bcec36ea | Alexander Graf | #define PSW_MASK_CC 0x0000300000000000ULL |
234 | bcec36ea | Alexander Graf | #define PSW_MASK_PM 0x00000F0000000000ULL |
235 | bcec36ea | Alexander Graf | #define PSW_MASK_64 0x0000000100000000ULL |
236 | bcec36ea | Alexander Graf | #define PSW_MASK_32 0x0000000080000000ULL |
237 | 29c6157c | Christian Borntraeger | #define PSW_MASK_ESA_ADDR 0x000000007fffffffULL |
238 | bcec36ea | Alexander Graf | |
239 | bcec36ea | Alexander Graf | #undef PSW_ASC_PRIMARY
|
240 | bcec36ea | Alexander Graf | #undef PSW_ASC_ACCREG
|
241 | bcec36ea | Alexander Graf | #undef PSW_ASC_SECONDARY
|
242 | bcec36ea | Alexander Graf | #undef PSW_ASC_HOME
|
243 | bcec36ea | Alexander Graf | |
244 | bcec36ea | Alexander Graf | #define PSW_ASC_PRIMARY 0x0000000000000000ULL |
245 | bcec36ea | Alexander Graf | #define PSW_ASC_ACCREG 0x0000400000000000ULL |
246 | bcec36ea | Alexander Graf | #define PSW_ASC_SECONDARY 0x0000800000000000ULL |
247 | bcec36ea | Alexander Graf | #define PSW_ASC_HOME 0x0000C00000000000ULL |
248 | bcec36ea | Alexander Graf | |
249 | bcec36ea | Alexander Graf | /* tb flags */
|
250 | bcec36ea | Alexander Graf | |
251 | bcec36ea | Alexander Graf | #define FLAG_MASK_PER (PSW_MASK_PER >> 32) |
252 | bcec36ea | Alexander Graf | #define FLAG_MASK_DAT (PSW_MASK_DAT >> 32) |
253 | bcec36ea | Alexander Graf | #define FLAG_MASK_IO (PSW_MASK_IO >> 32) |
254 | bcec36ea | Alexander Graf | #define FLAG_MASK_EXT (PSW_MASK_EXT >> 32) |
255 | bcec36ea | Alexander Graf | #define FLAG_MASK_KEY (PSW_MASK_KEY >> 32) |
256 | bcec36ea | Alexander Graf | #define FLAG_MASK_MCHECK (PSW_MASK_MCHECK >> 32) |
257 | bcec36ea | Alexander Graf | #define FLAG_MASK_WAIT (PSW_MASK_WAIT >> 32) |
258 | bcec36ea | Alexander Graf | #define FLAG_MASK_PSTATE (PSW_MASK_PSTATE >> 32) |
259 | bcec36ea | Alexander Graf | #define FLAG_MASK_ASC (PSW_MASK_ASC >> 32) |
260 | bcec36ea | Alexander Graf | #define FLAG_MASK_CC (PSW_MASK_CC >> 32) |
261 | bcec36ea | Alexander Graf | #define FLAG_MASK_PM (PSW_MASK_PM >> 32) |
262 | bcec36ea | Alexander Graf | #define FLAG_MASK_64 (PSW_MASK_64 >> 32) |
263 | bcec36ea | Alexander Graf | #define FLAG_MASK_32 0x00001000 |
264 | bcec36ea | Alexander Graf | |
265 | a4e3ad19 | Andreas Färber | static inline int cpu_mmu_index (CPUS390XState *env) |
266 | 10c339a0 | Alexander Graf | { |
267 | bcec36ea | Alexander Graf | if (env->psw.mask & PSW_MASK_PSTATE) {
|
268 | bcec36ea | Alexander Graf | return 1; |
269 | bcec36ea | Alexander Graf | } |
270 | bcec36ea | Alexander Graf | |
271 | 10c339a0 | Alexander Graf | return 0; |
272 | 10c339a0 | Alexander Graf | } |
273 | 10c339a0 | Alexander Graf | |
274 | a4e3ad19 | Andreas Färber | static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc, |
275 | bcec36ea | Alexander Graf | target_ulong *cs_base, int *flags)
|
276 | bcec36ea | Alexander Graf | { |
277 | bcec36ea | Alexander Graf | *pc = env->psw.addr; |
278 | bcec36ea | Alexander Graf | *cs_base = 0;
|
279 | bcec36ea | Alexander Graf | *flags = ((env->psw.mask >> 32) & ~FLAG_MASK_CC) |
|
280 | bcec36ea | Alexander Graf | ((env->psw.mask & PSW_MASK_32) ? FLAG_MASK_32 : 0);
|
281 | bcec36ea | Alexander Graf | } |
282 | bcec36ea | Alexander Graf | |
283 | d5a103cd | Richard Henderson | /* While the PoO talks about ILC (a number between 1-3) what is actually
|
284 | d5a103cd | Richard Henderson | stored in LowCore is shifted left one bit (an even between 2-6). As
|
285 | d5a103cd | Richard Henderson | this is the actual length of the insn and therefore more useful, that
|
286 | d5a103cd | Richard Henderson | is what we want to pass around and manipulate. To make sure that we
|
287 | d5a103cd | Richard Henderson | have applied this distinction universally, rename the "ILC" to "ILEN". */
|
288 | d5a103cd | Richard Henderson | static inline int get_ilen(uint8_t opc) |
289 | bcec36ea | Alexander Graf | { |
290 | bcec36ea | Alexander Graf | switch (opc >> 6) { |
291 | bcec36ea | Alexander Graf | case 0: |
292 | d5a103cd | Richard Henderson | return 2; |
293 | bcec36ea | Alexander Graf | case 1: |
294 | bcec36ea | Alexander Graf | case 2: |
295 | d5a103cd | Richard Henderson | return 4; |
296 | d5a103cd | Richard Henderson | default:
|
297 | d5a103cd | Richard Henderson | return 6; |
298 | bcec36ea | Alexander Graf | } |
299 | bcec36ea | Alexander Graf | } |
300 | bcec36ea | Alexander Graf | |
301 | d5a103cd | Richard Henderson | #ifndef CONFIG_USER_ONLY
|
302 | d5a103cd | Richard Henderson | /* In several cases of runtime exceptions, we havn't recorded the true
|
303 | d5a103cd | Richard Henderson | instruction length. Use these codes when raising exceptions in order
|
304 | d5a103cd | Richard Henderson | to re-compute the length by examining the insn in memory. */
|
305 | d5a103cd | Richard Henderson | #define ILEN_LATER 0x20 |
306 | d5a103cd | Richard Henderson | #define ILEN_LATER_INC 0x21 |
307 | d5a103cd | Richard Henderson | #endif
|
308 | bcec36ea | Alexander Graf | |
309 | 564b863d | Andreas Färber | S390CPU *cpu_s390x_init(const char *cpu_model); |
310 | bcec36ea | Alexander Graf | void s390x_translate_init(void); |
311 | 10ec5117 | Alexander Graf | int cpu_s390x_exec(CPUS390XState *s);
|
312 | 10ec5117 | Alexander Graf | |
313 | 10ec5117 | Alexander Graf | /* you can call this signal handler from your SIGBUS and SIGSEGV
|
314 | 10ec5117 | Alexander Graf | signal handlers to inform the virtual CPU of exceptions. non zero
|
315 | 10ec5117 | Alexander Graf | is returned if the signal was handled by the virtual CPU. */
|
316 | 10ec5117 | Alexander Graf | int cpu_s390x_signal_handler(int host_signum, void *pinfo, |
317 | 10ec5117 | Alexander Graf | void *puc);
|
318 | 10ec5117 | Alexander Graf | int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong address, int rw, |
319 | 97b348e7 | Blue Swirl | int mmu_idx);
|
320 | 10ec5117 | Alexander Graf | #define cpu_handle_mmu_fault cpu_s390x_handle_mmu_fault
|
321 | 10ec5117 | Alexander Graf | |
322 | db1c8f53 | Cornelia Huck | #include "ioinst.h" |
323 | 52705890 | Richard Henderson | |
324 | 10c339a0 | Alexander Graf | #ifndef CONFIG_USER_ONLY
|
325 | 38322ed6 | Cornelia Huck | void *s390_cpu_physical_memory_map(CPUS390XState *env, hwaddr addr, hwaddr *len,
|
326 | 38322ed6 | Cornelia Huck | int is_write);
|
327 | 38322ed6 | Cornelia Huck | void s390_cpu_physical_memory_unmap(CPUS390XState *env, void *addr, hwaddr len, |
328 | 38322ed6 | Cornelia Huck | int is_write);
|
329 | 7b18aad5 | Cornelia Huck | static inline hwaddr decode_basedisp_s(CPUS390XState *env, uint32_t ipb) |
330 | 7b18aad5 | Cornelia Huck | { |
331 | 7b18aad5 | Cornelia Huck | hwaddr addr = 0;
|
332 | 7b18aad5 | Cornelia Huck | uint8_t reg; |
333 | 7b18aad5 | Cornelia Huck | |
334 | 7b18aad5 | Cornelia Huck | reg = ipb >> 28;
|
335 | 7b18aad5 | Cornelia Huck | if (reg > 0) { |
336 | 7b18aad5 | Cornelia Huck | addr = env->regs[reg]; |
337 | 7b18aad5 | Cornelia Huck | } |
338 | 7b18aad5 | Cornelia Huck | addr += (ipb >> 16) & 0xfff; |
339 | 7b18aad5 | Cornelia Huck | |
340 | 7b18aad5 | Cornelia Huck | return addr;
|
341 | 7b18aad5 | Cornelia Huck | } |
342 | 7b18aad5 | Cornelia Huck | |
343 | 638129ff | Cornelia Huck | /* Base/displacement are at the same locations. */
|
344 | 638129ff | Cornelia Huck | #define decode_basedisp_rs decode_basedisp_s
|
345 | 638129ff | Cornelia Huck | |
346 | 8f22e0df | Andreas Färber | void s390x_tod_timer(void *opaque); |
347 | 8f22e0df | Andreas Färber | void s390x_cpu_timer(void *opaque); |
348 | 8f22e0df | Andreas Färber | |
349 | 28e942f8 | Cornelia Huck | int s390_virtio_hypercall(CPUS390XState *env);
|
350 | bcec36ea | Alexander Graf | |
351 | 1f206266 | Alexander Graf | #ifdef CONFIG_KVM
|
352 | 1bc22652 | Andreas Färber | void kvm_s390_interrupt(S390CPU *cpu, int type, uint32_t code); |
353 | 1bc22652 | Andreas Färber | void kvm_s390_virtio_irq(S390CPU *cpu, int config_change, uint64_t token); |
354 | 1bc22652 | Andreas Färber | void kvm_s390_interrupt_internal(S390CPU *cpu, int type, uint32_t parm, |
355 | bcec36ea | Alexander Graf | uint64_t parm64, int vm);
|
356 | 1f206266 | Alexander Graf | #else
|
357 | 1bc22652 | Andreas Färber | static inline void kvm_s390_interrupt(S390CPU *cpu, int type, uint32_t code) |
358 | 1f206266 | Alexander Graf | { |
359 | 1f206266 | Alexander Graf | } |
360 | 1f206266 | Alexander Graf | |
361 | 1bc22652 | Andreas Färber | static inline void kvm_s390_virtio_irq(S390CPU *cpu, int config_change, |
362 | 1f206266 | Alexander Graf | uint64_t token) |
363 | 1f206266 | Alexander Graf | { |
364 | 1f206266 | Alexander Graf | } |
365 | 1f206266 | Alexander Graf | |
366 | 1bc22652 | Andreas Färber | static inline void kvm_s390_interrupt_internal(S390CPU *cpu, int type, |
367 | 1f206266 | Alexander Graf | uint32_t parm, uint64_t parm64, |
368 | 1f206266 | Alexander Graf | int vm)
|
369 | 1f206266 | Alexander Graf | { |
370 | 1f206266 | Alexander Graf | } |
371 | 1f206266 | Alexander Graf | #endif
|
372 | 45fa769b | Andreas Färber | S390CPU *s390_cpu_addr2state(uint16_t cpu_addr); |
373 | 49e15878 | Andreas Färber | void s390_add_running_cpu(S390CPU *cpu);
|
374 | 49e15878 | Andreas Färber | unsigned s390_del_running_cpu(S390CPU *cpu);
|
375 | bcec36ea | Alexander Graf | |
376 | 000a1a38 | Christian Borntraeger | /* service interrupts are floating therefore we must not pass an cpustate */
|
377 | 000a1a38 | Christian Borntraeger | void s390_sclp_extint(uint32_t parm);
|
378 | 000a1a38 | Christian Borntraeger | |
379 | d1ff903c | Alexander Graf | /* from s390-virtio-bus */
|
380 | a8170e5e | Avi Kivity | extern const hwaddr virtio_size; |
381 | d1ff903c | Alexander Graf | |
382 | ef81522b | Alexander Graf | #else
|
383 | 49e15878 | Andreas Färber | static inline void s390_add_running_cpu(S390CPU *cpu) |
384 | ef81522b | Alexander Graf | { |
385 | ef81522b | Alexander Graf | } |
386 | ef81522b | Alexander Graf | |
387 | 49e15878 | Andreas Färber | static inline unsigned s390_del_running_cpu(S390CPU *cpu) |
388 | ef81522b | Alexander Graf | { |
389 | ef81522b | Alexander Graf | return 0; |
390 | ef81522b | Alexander Graf | } |
391 | 10c339a0 | Alexander Graf | #endif
|
392 | bcec36ea | Alexander Graf | void cpu_lock(void); |
393 | bcec36ea | Alexander Graf | void cpu_unlock(void); |
394 | 10c339a0 | Alexander Graf | |
395 | 7b18aad5 | Cornelia Huck | typedef struct SubchDev SubchDev; |
396 | 7b18aad5 | Cornelia Huck | |
397 | df1fe5bb | Cornelia Huck | #ifndef CONFIG_USER_ONLY
|
398 | 4e872a3f | Christian Borntraeger | extern void io_subsystem_reset(void); |
399 | df1fe5bb | Cornelia Huck | SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, |
400 | df1fe5bb | Cornelia Huck | uint16_t schid); |
401 | df1fe5bb | Cornelia Huck | bool css_subch_visible(SubchDev *sch);
|
402 | df1fe5bb | Cornelia Huck | void css_conditional_io_interrupt(SubchDev *sch);
|
403 | df1fe5bb | Cornelia Huck | int css_do_stsch(SubchDev *sch, SCHIB *schib);
|
404 | 38dd7cc7 | Christian Borntraeger | bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid); |
405 | df1fe5bb | Cornelia Huck | int css_do_msch(SubchDev *sch, SCHIB *schib);
|
406 | df1fe5bb | Cornelia Huck | int css_do_xsch(SubchDev *sch);
|
407 | df1fe5bb | Cornelia Huck | int css_do_csch(SubchDev *sch);
|
408 | df1fe5bb | Cornelia Huck | int css_do_hsch(SubchDev *sch);
|
409 | df1fe5bb | Cornelia Huck | int css_do_ssch(SubchDev *sch, ORB *orb);
|
410 | df1fe5bb | Cornelia Huck | int css_do_tsch(SubchDev *sch, IRB *irb);
|
411 | df1fe5bb | Cornelia Huck | int css_do_stcrw(CRW *crw);
|
412 | 50c8d9bf | Cornelia Huck | int css_do_tpi(IOIntCode *int_code, int lowcore); |
413 | df1fe5bb | Cornelia Huck | int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, uint8_t l_chpid, |
414 | df1fe5bb | Cornelia Huck | int rfmt, void *buf); |
415 | df1fe5bb | Cornelia Huck | void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo); |
416 | df1fe5bb | Cornelia Huck | int css_enable_mcsse(void); |
417 | df1fe5bb | Cornelia Huck | int css_enable_mss(void); |
418 | df1fe5bb | Cornelia Huck | int css_do_rsch(SubchDev *sch);
|
419 | df1fe5bb | Cornelia Huck | int css_do_rchp(uint8_t cssid, uint8_t chpid);
|
420 | df1fe5bb | Cornelia Huck | bool css_present(uint8_t cssid);
|
421 | df1fe5bb | Cornelia Huck | #else
|
422 | 7b18aad5 | Cornelia Huck | static inline SubchDev *css_find_subch(uint8_t m, uint8_t cssid, uint8_t ssid, |
423 | 7b18aad5 | Cornelia Huck | uint16_t schid) |
424 | 7b18aad5 | Cornelia Huck | { |
425 | 7b18aad5 | Cornelia Huck | return NULL; |
426 | 7b18aad5 | Cornelia Huck | } |
427 | 7b18aad5 | Cornelia Huck | static inline bool css_subch_visible(SubchDev *sch) |
428 | 7b18aad5 | Cornelia Huck | { |
429 | 7b18aad5 | Cornelia Huck | return false; |
430 | 7b18aad5 | Cornelia Huck | } |
431 | 7b18aad5 | Cornelia Huck | static inline void css_conditional_io_interrupt(SubchDev *sch) |
432 | 7b18aad5 | Cornelia Huck | { |
433 | 7b18aad5 | Cornelia Huck | } |
434 | 7b18aad5 | Cornelia Huck | static inline int css_do_stsch(SubchDev *sch, SCHIB *schib) |
435 | 7b18aad5 | Cornelia Huck | { |
436 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
437 | 7b18aad5 | Cornelia Huck | } |
438 | 7b18aad5 | Cornelia Huck | static inline bool css_schid_final(uint8_t cssid, uint8_t ssid, uint16_t schid) |
439 | 7b18aad5 | Cornelia Huck | { |
440 | 7b18aad5 | Cornelia Huck | return true; |
441 | 7b18aad5 | Cornelia Huck | } |
442 | 7b18aad5 | Cornelia Huck | static inline int css_do_msch(SubchDev *sch, SCHIB *schib) |
443 | 7b18aad5 | Cornelia Huck | { |
444 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
445 | 7b18aad5 | Cornelia Huck | } |
446 | 7b18aad5 | Cornelia Huck | static inline int css_do_xsch(SubchDev *sch) |
447 | 7b18aad5 | Cornelia Huck | { |
448 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
449 | 7b18aad5 | Cornelia Huck | } |
450 | 7b18aad5 | Cornelia Huck | static inline int css_do_csch(SubchDev *sch) |
451 | 7b18aad5 | Cornelia Huck | { |
452 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
453 | 7b18aad5 | Cornelia Huck | } |
454 | 7b18aad5 | Cornelia Huck | static inline int css_do_hsch(SubchDev *sch) |
455 | 7b18aad5 | Cornelia Huck | { |
456 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
457 | 7b18aad5 | Cornelia Huck | } |
458 | 7b18aad5 | Cornelia Huck | static inline int css_do_ssch(SubchDev *sch, ORB *orb) |
459 | 7b18aad5 | Cornelia Huck | { |
460 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
461 | 7b18aad5 | Cornelia Huck | } |
462 | 7b18aad5 | Cornelia Huck | static inline int css_do_tsch(SubchDev *sch, IRB *irb) |
463 | 7b18aad5 | Cornelia Huck | { |
464 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
465 | 7b18aad5 | Cornelia Huck | } |
466 | 7b18aad5 | Cornelia Huck | static inline int css_do_stcrw(CRW *crw) |
467 | 7b18aad5 | Cornelia Huck | { |
468 | 7b18aad5 | Cornelia Huck | return 1; |
469 | 7b18aad5 | Cornelia Huck | } |
470 | 50c8d9bf | Cornelia Huck | static inline int css_do_tpi(IOIntCode *int_code, int lowcore) |
471 | 7b18aad5 | Cornelia Huck | { |
472 | 7b18aad5 | Cornelia Huck | return 0; |
473 | 7b18aad5 | Cornelia Huck | } |
474 | 7b18aad5 | Cornelia Huck | static inline int css_collect_chp_desc(int m, uint8_t cssid, uint8_t f_chpid, |
475 | 7b18aad5 | Cornelia Huck | int rfmt, uint8_t l_chpid, void *buf) |
476 | 7b18aad5 | Cornelia Huck | { |
477 | 7b18aad5 | Cornelia Huck | return 0; |
478 | 7b18aad5 | Cornelia Huck | } |
479 | 7b18aad5 | Cornelia Huck | static inline void css_do_schm(uint8_t mbk, int update, int dct, uint64_t mbo) |
480 | 7b18aad5 | Cornelia Huck | { |
481 | 7b18aad5 | Cornelia Huck | } |
482 | 7b18aad5 | Cornelia Huck | static inline int css_enable_mss(void) |
483 | 7b18aad5 | Cornelia Huck | { |
484 | 7b18aad5 | Cornelia Huck | return -EINVAL;
|
485 | 7b18aad5 | Cornelia Huck | } |
486 | 7b18aad5 | Cornelia Huck | static inline int css_enable_mcsse(void) |
487 | 7b18aad5 | Cornelia Huck | { |
488 | 7b18aad5 | Cornelia Huck | return -EINVAL;
|
489 | 7b18aad5 | Cornelia Huck | } |
490 | 7b18aad5 | Cornelia Huck | static inline int css_do_rsch(SubchDev *sch) |
491 | 7b18aad5 | Cornelia Huck | { |
492 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
493 | 7b18aad5 | Cornelia Huck | } |
494 | 7b18aad5 | Cornelia Huck | static inline int css_do_rchp(uint8_t cssid, uint8_t chpid) |
495 | 7b18aad5 | Cornelia Huck | { |
496 | 7b18aad5 | Cornelia Huck | return -ENODEV;
|
497 | 7b18aad5 | Cornelia Huck | } |
498 | 7b18aad5 | Cornelia Huck | static inline bool css_present(uint8_t cssid) |
499 | 7b18aad5 | Cornelia Huck | { |
500 | 7b18aad5 | Cornelia Huck | return false; |
501 | 7b18aad5 | Cornelia Huck | } |
502 | df1fe5bb | Cornelia Huck | #endif
|
503 | 7b18aad5 | Cornelia Huck | |
504 | 564b863d | Andreas Färber | #define cpu_init(model) (&cpu_s390x_init(model)->env)
|
505 | 10ec5117 | Alexander Graf | #define cpu_exec cpu_s390x_exec
|
506 | 10ec5117 | Alexander Graf | #define cpu_gen_code cpu_s390x_gen_code
|
507 | bcec36ea | Alexander Graf | #define cpu_signal_handler cpu_s390x_signal_handler
|
508 | 10ec5117 | Alexander Graf | |
509 | 904e5fd5 | Viktor Mihajlovski | void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf);
|
510 | 904e5fd5 | Viktor Mihajlovski | #define cpu_list s390_cpu_list
|
511 | 904e5fd5 | Viktor Mihajlovski | |
512 | 022c62cb | Paolo Bonzini | #include "exec/exec-all.h" |
513 | bcec36ea | Alexander Graf | |
514 | bcec36ea | Alexander Graf | #define EXCP_EXT 1 /* external interrupt */ |
515 | bcec36ea | Alexander Graf | #define EXCP_SVC 2 /* supervisor call (syscall) */ |
516 | bcec36ea | Alexander Graf | #define EXCP_PGM 3 /* program interruption */ |
517 | 5d69c547 | Cornelia Huck | #define EXCP_IO 7 /* I/O interrupt */ |
518 | 5d69c547 | Cornelia Huck | #define EXCP_MCHK 8 /* machine check */ |
519 | bcec36ea | Alexander Graf | |
520 | bcec36ea | Alexander Graf | #define INTERRUPT_EXT (1 << 0) |
521 | bcec36ea | Alexander Graf | #define INTERRUPT_TOD (1 << 1) |
522 | bcec36ea | Alexander Graf | #define INTERRUPT_CPUTIMER (1 << 2) |
523 | 5d69c547 | Cornelia Huck | #define INTERRUPT_IO (1 << 3) |
524 | 5d69c547 | Cornelia Huck | #define INTERRUPT_MCHK (1 << 4) |
525 | 10c339a0 | Alexander Graf | |
526 | 10c339a0 | Alexander Graf | /* Program Status Word. */
|
527 | 10c339a0 | Alexander Graf | #define S390_PSWM_REGNUM 0 |
528 | 10c339a0 | Alexander Graf | #define S390_PSWA_REGNUM 1 |
529 | 10c339a0 | Alexander Graf | /* General Purpose Registers. */
|
530 | 10c339a0 | Alexander Graf | #define S390_R0_REGNUM 2 |
531 | 10c339a0 | Alexander Graf | #define S390_R1_REGNUM 3 |
532 | 10c339a0 | Alexander Graf | #define S390_R2_REGNUM 4 |
533 | 10c339a0 | Alexander Graf | #define S390_R3_REGNUM 5 |
534 | 10c339a0 | Alexander Graf | #define S390_R4_REGNUM 6 |
535 | 10c339a0 | Alexander Graf | #define S390_R5_REGNUM 7 |
536 | 10c339a0 | Alexander Graf | #define S390_R6_REGNUM 8 |
537 | 10c339a0 | Alexander Graf | #define S390_R7_REGNUM 9 |
538 | 10c339a0 | Alexander Graf | #define S390_R8_REGNUM 10 |
539 | 10c339a0 | Alexander Graf | #define S390_R9_REGNUM 11 |
540 | 10c339a0 | Alexander Graf | #define S390_R10_REGNUM 12 |
541 | 10c339a0 | Alexander Graf | #define S390_R11_REGNUM 13 |
542 | 10c339a0 | Alexander Graf | #define S390_R12_REGNUM 14 |
543 | 10c339a0 | Alexander Graf | #define S390_R13_REGNUM 15 |
544 | 10c339a0 | Alexander Graf | #define S390_R14_REGNUM 16 |
545 | 10c339a0 | Alexander Graf | #define S390_R15_REGNUM 17 |
546 | 10c339a0 | Alexander Graf | /* Access Registers. */
|
547 | 10c339a0 | Alexander Graf | #define S390_A0_REGNUM 18 |
548 | 10c339a0 | Alexander Graf | #define S390_A1_REGNUM 19 |
549 | 10c339a0 | Alexander Graf | #define S390_A2_REGNUM 20 |
550 | 10c339a0 | Alexander Graf | #define S390_A3_REGNUM 21 |
551 | 10c339a0 | Alexander Graf | #define S390_A4_REGNUM 22 |
552 | 10c339a0 | Alexander Graf | #define S390_A5_REGNUM 23 |
553 | 10c339a0 | Alexander Graf | #define S390_A6_REGNUM 24 |
554 | 10c339a0 | Alexander Graf | #define S390_A7_REGNUM 25 |
555 | 10c339a0 | Alexander Graf | #define S390_A8_REGNUM 26 |
556 | 10c339a0 | Alexander Graf | #define S390_A9_REGNUM 27 |
557 | 10c339a0 | Alexander Graf | #define S390_A10_REGNUM 28 |
558 | 10c339a0 | Alexander Graf | #define S390_A11_REGNUM 29 |
559 | 10c339a0 | Alexander Graf | #define S390_A12_REGNUM 30 |
560 | 10c339a0 | Alexander Graf | #define S390_A13_REGNUM 31 |
561 | 10c339a0 | Alexander Graf | #define S390_A14_REGNUM 32 |
562 | 10c339a0 | Alexander Graf | #define S390_A15_REGNUM 33 |
563 | 10c339a0 | Alexander Graf | /* Floating Point Control Word. */
|
564 | 10c339a0 | Alexander Graf | #define S390_FPC_REGNUM 34 |
565 | 10c339a0 | Alexander Graf | /* Floating Point Registers. */
|
566 | 10c339a0 | Alexander Graf | #define S390_F0_REGNUM 35 |
567 | 10c339a0 | Alexander Graf | #define S390_F1_REGNUM 36 |
568 | 10c339a0 | Alexander Graf | #define S390_F2_REGNUM 37 |
569 | 10c339a0 | Alexander Graf | #define S390_F3_REGNUM 38 |
570 | 10c339a0 | Alexander Graf | #define S390_F4_REGNUM 39 |
571 | 10c339a0 | Alexander Graf | #define S390_F5_REGNUM 40 |
572 | 10c339a0 | Alexander Graf | #define S390_F6_REGNUM 41 |
573 | 10c339a0 | Alexander Graf | #define S390_F7_REGNUM 42 |
574 | 10c339a0 | Alexander Graf | #define S390_F8_REGNUM 43 |
575 | 10c339a0 | Alexander Graf | #define S390_F9_REGNUM 44 |
576 | 10c339a0 | Alexander Graf | #define S390_F10_REGNUM 45 |
577 | 10c339a0 | Alexander Graf | #define S390_F11_REGNUM 46 |
578 | 10c339a0 | Alexander Graf | #define S390_F12_REGNUM 47 |
579 | 10c339a0 | Alexander Graf | #define S390_F13_REGNUM 48 |
580 | 10c339a0 | Alexander Graf | #define S390_F14_REGNUM 49 |
581 | 10c339a0 | Alexander Graf | #define S390_F15_REGNUM 50 |
582 | 10c339a0 | Alexander Graf | /* Total. */
|
583 | 10c339a0 | Alexander Graf | #define S390_NUM_REGS 51 |
584 | 10c339a0 | Alexander Graf | |
585 | bcec36ea | Alexander Graf | /* CC optimization */
|
586 | bcec36ea | Alexander Graf | |
587 | bcec36ea | Alexander Graf | enum cc_op {
|
588 | bcec36ea | Alexander Graf | CC_OP_CONST0 = 0, /* CC is 0 */ |
589 | bcec36ea | Alexander Graf | CC_OP_CONST1, /* CC is 1 */
|
590 | bcec36ea | Alexander Graf | CC_OP_CONST2, /* CC is 2 */
|
591 | bcec36ea | Alexander Graf | CC_OP_CONST3, /* CC is 3 */
|
592 | bcec36ea | Alexander Graf | |
593 | bcec36ea | Alexander Graf | CC_OP_DYNAMIC, /* CC calculation defined by env->cc_op */
|
594 | bcec36ea | Alexander Graf | CC_OP_STATIC, /* CC value is env->cc_op */
|
595 | bcec36ea | Alexander Graf | |
596 | bcec36ea | Alexander Graf | CC_OP_NZ, /* env->cc_dst != 0 */
|
597 | bcec36ea | Alexander Graf | CC_OP_LTGT_32, /* signed less/greater than (32bit) */
|
598 | bcec36ea | Alexander Graf | CC_OP_LTGT_64, /* signed less/greater than (64bit) */
|
599 | bcec36ea | Alexander Graf | CC_OP_LTUGTU_32, /* unsigned less/greater than (32bit) */
|
600 | bcec36ea | Alexander Graf | CC_OP_LTUGTU_64, /* unsigned less/greater than (64bit) */
|
601 | bcec36ea | Alexander Graf | CC_OP_LTGT0_32, /* signed less/greater than 0 (32bit) */
|
602 | bcec36ea | Alexander Graf | CC_OP_LTGT0_64, /* signed less/greater than 0 (64bit) */
|
603 | bcec36ea | Alexander Graf | |
604 | bcec36ea | Alexander Graf | CC_OP_ADD_64, /* overflow on add (64bit) */
|
605 | bcec36ea | Alexander Graf | CC_OP_ADDU_64, /* overflow on unsigned add (64bit) */
|
606 | 4e4bb438 | Richard Henderson | CC_OP_ADDC_64, /* overflow on unsigned add-carry (64bit) */
|
607 | e7d81004 | Stefan Weil | CC_OP_SUB_64, /* overflow on subtraction (64bit) */
|
608 | e7d81004 | Stefan Weil | CC_OP_SUBU_64, /* overflow on unsigned subtraction (64bit) */
|
609 | 4e4bb438 | Richard Henderson | CC_OP_SUBB_64, /* overflow on unsigned sub-borrow (64bit) */
|
610 | bcec36ea | Alexander Graf | CC_OP_ABS_64, /* sign eval on abs (64bit) */
|
611 | bcec36ea | Alexander Graf | CC_OP_NABS_64, /* sign eval on nabs (64bit) */
|
612 | bcec36ea | Alexander Graf | |
613 | bcec36ea | Alexander Graf | CC_OP_ADD_32, /* overflow on add (32bit) */
|
614 | bcec36ea | Alexander Graf | CC_OP_ADDU_32, /* overflow on unsigned add (32bit) */
|
615 | 4e4bb438 | Richard Henderson | CC_OP_ADDC_32, /* overflow on unsigned add-carry (32bit) */
|
616 | e7d81004 | Stefan Weil | CC_OP_SUB_32, /* overflow on subtraction (32bit) */
|
617 | e7d81004 | Stefan Weil | CC_OP_SUBU_32, /* overflow on unsigned subtraction (32bit) */
|
618 | 4e4bb438 | Richard Henderson | CC_OP_SUBB_32, /* overflow on unsigned sub-borrow (32bit) */
|
619 | bcec36ea | Alexander Graf | CC_OP_ABS_32, /* sign eval on abs (64bit) */
|
620 | bcec36ea | Alexander Graf | CC_OP_NABS_32, /* sign eval on nabs (64bit) */
|
621 | bcec36ea | Alexander Graf | |
622 | bcec36ea | Alexander Graf | CC_OP_COMP_32, /* complement */
|
623 | bcec36ea | Alexander Graf | CC_OP_COMP_64, /* complement */
|
624 | bcec36ea | Alexander Graf | |
625 | bcec36ea | Alexander Graf | CC_OP_TM_32, /* test under mask (32bit) */
|
626 | bcec36ea | Alexander Graf | CC_OP_TM_64, /* test under mask (64bit) */
|
627 | bcec36ea | Alexander Graf | |
628 | bcec36ea | Alexander Graf | CC_OP_NZ_F32, /* FP dst != 0 (32bit) */
|
629 | bcec36ea | Alexander Graf | CC_OP_NZ_F64, /* FP dst != 0 (64bit) */
|
630 | 587626f8 | Richard Henderson | CC_OP_NZ_F128, /* FP dst != 0 (128bit) */
|
631 | bcec36ea | Alexander Graf | |
632 | bcec36ea | Alexander Graf | CC_OP_ICM, /* insert characters under mask */
|
633 | cbe24bfa | Richard Henderson | CC_OP_SLA_32, /* Calculate shift left signed (32bit) */
|
634 | cbe24bfa | Richard Henderson | CC_OP_SLA_64, /* Calculate shift left signed (64bit) */
|
635 | 102bf2c6 | Richard Henderson | CC_OP_FLOGR, /* find leftmost one */
|
636 | bcec36ea | Alexander Graf | CC_OP_MAX |
637 | bcec36ea | Alexander Graf | }; |
638 | bcec36ea | Alexander Graf | |
639 | bcec36ea | Alexander Graf | static const char *cc_names[] = { |
640 | bcec36ea | Alexander Graf | [CC_OP_CONST0] = "CC_OP_CONST0",
|
641 | bcec36ea | Alexander Graf | [CC_OP_CONST1] = "CC_OP_CONST1",
|
642 | bcec36ea | Alexander Graf | [CC_OP_CONST2] = "CC_OP_CONST2",
|
643 | bcec36ea | Alexander Graf | [CC_OP_CONST3] = "CC_OP_CONST3",
|
644 | bcec36ea | Alexander Graf | [CC_OP_DYNAMIC] = "CC_OP_DYNAMIC",
|
645 | bcec36ea | Alexander Graf | [CC_OP_STATIC] = "CC_OP_STATIC",
|
646 | bcec36ea | Alexander Graf | [CC_OP_NZ] = "CC_OP_NZ",
|
647 | bcec36ea | Alexander Graf | [CC_OP_LTGT_32] = "CC_OP_LTGT_32",
|
648 | bcec36ea | Alexander Graf | [CC_OP_LTGT_64] = "CC_OP_LTGT_64",
|
649 | bcec36ea | Alexander Graf | [CC_OP_LTUGTU_32] = "CC_OP_LTUGTU_32",
|
650 | bcec36ea | Alexander Graf | [CC_OP_LTUGTU_64] = "CC_OP_LTUGTU_64",
|
651 | bcec36ea | Alexander Graf | [CC_OP_LTGT0_32] = "CC_OP_LTGT0_32",
|
652 | bcec36ea | Alexander Graf | [CC_OP_LTGT0_64] = "CC_OP_LTGT0_64",
|
653 | bcec36ea | Alexander Graf | [CC_OP_ADD_64] = "CC_OP_ADD_64",
|
654 | bcec36ea | Alexander Graf | [CC_OP_ADDU_64] = "CC_OP_ADDU_64",
|
655 | 4e4bb438 | Richard Henderson | [CC_OP_ADDC_64] = "CC_OP_ADDC_64",
|
656 | bcec36ea | Alexander Graf | [CC_OP_SUB_64] = "CC_OP_SUB_64",
|
657 | bcec36ea | Alexander Graf | [CC_OP_SUBU_64] = "CC_OP_SUBU_64",
|
658 | 4e4bb438 | Richard Henderson | [CC_OP_SUBB_64] = "CC_OP_SUBB_64",
|
659 | bcec36ea | Alexander Graf | [CC_OP_ABS_64] = "CC_OP_ABS_64",
|
660 | bcec36ea | Alexander Graf | [CC_OP_NABS_64] = "CC_OP_NABS_64",
|
661 | bcec36ea | Alexander Graf | [CC_OP_ADD_32] = "CC_OP_ADD_32",
|
662 | bcec36ea | Alexander Graf | [CC_OP_ADDU_32] = "CC_OP_ADDU_32",
|
663 | 4e4bb438 | Richard Henderson | [CC_OP_ADDC_32] = "CC_OP_ADDC_32",
|
664 | bcec36ea | Alexander Graf | [CC_OP_SUB_32] = "CC_OP_SUB_32",
|
665 | bcec36ea | Alexander Graf | [CC_OP_SUBU_32] = "CC_OP_SUBU_32",
|
666 | 4e4bb438 | Richard Henderson | [CC_OP_SUBB_32] = "CC_OP_SUBB_32",
|
667 | bcec36ea | Alexander Graf | [CC_OP_ABS_32] = "CC_OP_ABS_32",
|
668 | bcec36ea | Alexander Graf | [CC_OP_NABS_32] = "CC_OP_NABS_32",
|
669 | bcec36ea | Alexander Graf | [CC_OP_COMP_32] = "CC_OP_COMP_32",
|
670 | bcec36ea | Alexander Graf | [CC_OP_COMP_64] = "CC_OP_COMP_64",
|
671 | bcec36ea | Alexander Graf | [CC_OP_TM_32] = "CC_OP_TM_32",
|
672 | bcec36ea | Alexander Graf | [CC_OP_TM_64] = "CC_OP_TM_64",
|
673 | bcec36ea | Alexander Graf | [CC_OP_NZ_F32] = "CC_OP_NZ_F32",
|
674 | bcec36ea | Alexander Graf | [CC_OP_NZ_F64] = "CC_OP_NZ_F64",
|
675 | 587626f8 | Richard Henderson | [CC_OP_NZ_F128] = "CC_OP_NZ_F128",
|
676 | bcec36ea | Alexander Graf | [CC_OP_ICM] = "CC_OP_ICM",
|
677 | cbe24bfa | Richard Henderson | [CC_OP_SLA_32] = "CC_OP_SLA_32",
|
678 | cbe24bfa | Richard Henderson | [CC_OP_SLA_64] = "CC_OP_SLA_64",
|
679 | 102bf2c6 | Richard Henderson | [CC_OP_FLOGR] = "CC_OP_FLOGR",
|
680 | bcec36ea | Alexander Graf | }; |
681 | bcec36ea | Alexander Graf | |
682 | bcec36ea | Alexander Graf | static inline const char *cc_name(int cc_op) |
683 | bcec36ea | Alexander Graf | { |
684 | bcec36ea | Alexander Graf | return cc_names[cc_op];
|
685 | bcec36ea | Alexander Graf | } |
686 | bcec36ea | Alexander Graf | |
687 | 3d0a615f | Thomas Huth | static inline void setcc(S390CPU *cpu, uint64_t cc) |
688 | 3d0a615f | Thomas Huth | { |
689 | 3d0a615f | Thomas Huth | CPUS390XState *env = &cpu->env; |
690 | 3d0a615f | Thomas Huth | |
691 | 3d0a615f | Thomas Huth | env->psw.mask &= ~(3ull << 44); |
692 | 3d0a615f | Thomas Huth | env->psw.mask |= (cc & 3) << 44; |
693 | 3d0a615f | Thomas Huth | } |
694 | 3d0a615f | Thomas Huth | |
695 | bcec36ea | Alexander Graf | typedef struct LowCore |
696 | bcec36ea | Alexander Graf | { |
697 | bcec36ea | Alexander Graf | /* prefix area: defined by architecture */
|
698 | bcec36ea | Alexander Graf | uint32_t ccw1[2]; /* 0x000 */ |
699 | bcec36ea | Alexander Graf | uint32_t ccw2[4]; /* 0x008 */ |
700 | bcec36ea | Alexander Graf | uint8_t pad1[0x80-0x18]; /* 0x018 */ |
701 | bcec36ea | Alexander Graf | uint32_t ext_params; /* 0x080 */
|
702 | bcec36ea | Alexander Graf | uint16_t cpu_addr; /* 0x084 */
|
703 | bcec36ea | Alexander Graf | uint16_t ext_int_code; /* 0x086 */
|
704 | d5a103cd | Richard Henderson | uint16_t svc_ilen; /* 0x088 */
|
705 | bcec36ea | Alexander Graf | uint16_t svc_code; /* 0x08a */
|
706 | d5a103cd | Richard Henderson | uint16_t pgm_ilen; /* 0x08c */
|
707 | bcec36ea | Alexander Graf | uint16_t pgm_code; /* 0x08e */
|
708 | bcec36ea | Alexander Graf | uint32_t data_exc_code; /* 0x090 */
|
709 | bcec36ea | Alexander Graf | uint16_t mon_class_num; /* 0x094 */
|
710 | bcec36ea | Alexander Graf | uint16_t per_perc_atmid; /* 0x096 */
|
711 | bcec36ea | Alexander Graf | uint64_t per_address; /* 0x098 */
|
712 | bcec36ea | Alexander Graf | uint8_t exc_access_id; /* 0x0a0 */
|
713 | bcec36ea | Alexander Graf | uint8_t per_access_id; /* 0x0a1 */
|
714 | bcec36ea | Alexander Graf | uint8_t op_access_id; /* 0x0a2 */
|
715 | bcec36ea | Alexander Graf | uint8_t ar_access_id; /* 0x0a3 */
|
716 | bcec36ea | Alexander Graf | uint8_t pad2[0xA8-0xA4]; /* 0x0a4 */ |
717 | bcec36ea | Alexander Graf | uint64_t trans_exc_code; /* 0x0a8 */
|
718 | bcec36ea | Alexander Graf | uint64_t monitor_code; /* 0x0b0 */
|
719 | bcec36ea | Alexander Graf | uint16_t subchannel_id; /* 0x0b8 */
|
720 | bcec36ea | Alexander Graf | uint16_t subchannel_nr; /* 0x0ba */
|
721 | bcec36ea | Alexander Graf | uint32_t io_int_parm; /* 0x0bc */
|
722 | bcec36ea | Alexander Graf | uint32_t io_int_word; /* 0x0c0 */
|
723 | bcec36ea | Alexander Graf | uint8_t pad3[0xc8-0xc4]; /* 0x0c4 */ |
724 | bcec36ea | Alexander Graf | uint32_t stfl_fac_list; /* 0x0c8 */
|
725 | bcec36ea | Alexander Graf | uint8_t pad4[0xe8-0xcc]; /* 0x0cc */ |
726 | bcec36ea | Alexander Graf | uint32_t mcck_interruption_code[2]; /* 0x0e8 */ |
727 | bcec36ea | Alexander Graf | uint8_t pad5[0xf4-0xf0]; /* 0x0f0 */ |
728 | bcec36ea | Alexander Graf | uint32_t external_damage_code; /* 0x0f4 */
|
729 | bcec36ea | Alexander Graf | uint64_t failing_storage_address; /* 0x0f8 */
|
730 | bcec36ea | Alexander Graf | uint8_t pad6[0x120-0x100]; /* 0x100 */ |
731 | bcec36ea | Alexander Graf | PSW restart_old_psw; /* 0x120 */
|
732 | bcec36ea | Alexander Graf | PSW external_old_psw; /* 0x130 */
|
733 | bcec36ea | Alexander Graf | PSW svc_old_psw; /* 0x140 */
|
734 | bcec36ea | Alexander Graf | PSW program_old_psw; /* 0x150 */
|
735 | bcec36ea | Alexander Graf | PSW mcck_old_psw; /* 0x160 */
|
736 | bcec36ea | Alexander Graf | PSW io_old_psw; /* 0x170 */
|
737 | bcec36ea | Alexander Graf | uint8_t pad7[0x1a0-0x180]; /* 0x180 */ |
738 | bcec36ea | Alexander Graf | PSW restart_psw; /* 0x1a0 */
|
739 | bcec36ea | Alexander Graf | PSW external_new_psw; /* 0x1b0 */
|
740 | bcec36ea | Alexander Graf | PSW svc_new_psw; /* 0x1c0 */
|
741 | bcec36ea | Alexander Graf | PSW program_new_psw; /* 0x1d0 */
|
742 | bcec36ea | Alexander Graf | PSW mcck_new_psw; /* 0x1e0 */
|
743 | bcec36ea | Alexander Graf | PSW io_new_psw; /* 0x1f0 */
|
744 | bcec36ea | Alexander Graf | PSW return_psw; /* 0x200 */
|
745 | bcec36ea | Alexander Graf | uint8_t irb[64]; /* 0x210 */ |
746 | bcec36ea | Alexander Graf | uint64_t sync_enter_timer; /* 0x250 */
|
747 | bcec36ea | Alexander Graf | uint64_t async_enter_timer; /* 0x258 */
|
748 | bcec36ea | Alexander Graf | uint64_t exit_timer; /* 0x260 */
|
749 | bcec36ea | Alexander Graf | uint64_t last_update_timer; /* 0x268 */
|
750 | bcec36ea | Alexander Graf | uint64_t user_timer; /* 0x270 */
|
751 | bcec36ea | Alexander Graf | uint64_t system_timer; /* 0x278 */
|
752 | bcec36ea | Alexander Graf | uint64_t last_update_clock; /* 0x280 */
|
753 | bcec36ea | Alexander Graf | uint64_t steal_clock; /* 0x288 */
|
754 | bcec36ea | Alexander Graf | PSW return_mcck_psw; /* 0x290 */
|
755 | bcec36ea | Alexander Graf | uint8_t pad8[0xc00-0x2a0]; /* 0x2a0 */ |
756 | bcec36ea | Alexander Graf | /* System info area */
|
757 | bcec36ea | Alexander Graf | uint64_t save_area[16]; /* 0xc00 */ |
758 | bcec36ea | Alexander Graf | uint8_t pad9[0xd40-0xc80]; /* 0xc80 */ |
759 | bcec36ea | Alexander Graf | uint64_t kernel_stack; /* 0xd40 */
|
760 | bcec36ea | Alexander Graf | uint64_t thread_info; /* 0xd48 */
|
761 | bcec36ea | Alexander Graf | uint64_t async_stack; /* 0xd50 */
|
762 | bcec36ea | Alexander Graf | uint64_t kernel_asce; /* 0xd58 */
|
763 | bcec36ea | Alexander Graf | uint64_t user_asce; /* 0xd60 */
|
764 | bcec36ea | Alexander Graf | uint64_t panic_stack; /* 0xd68 */
|
765 | bcec36ea | Alexander Graf | uint64_t user_exec_asce; /* 0xd70 */
|
766 | bcec36ea | Alexander Graf | uint8_t pad10[0xdc0-0xd78]; /* 0xd78 */ |
767 | bcec36ea | Alexander Graf | |
768 | bcec36ea | Alexander Graf | /* SMP info area: defined by DJB */
|
769 | bcec36ea | Alexander Graf | uint64_t clock_comparator; /* 0xdc0 */
|
770 | bcec36ea | Alexander Graf | uint64_t ext_call_fast; /* 0xdc8 */
|
771 | bcec36ea | Alexander Graf | uint64_t percpu_offset; /* 0xdd0 */
|
772 | bcec36ea | Alexander Graf | uint64_t current_task; /* 0xdd8 */
|
773 | bcec36ea | Alexander Graf | uint32_t softirq_pending; /* 0xde0 */
|
774 | bcec36ea | Alexander Graf | uint32_t pad_0x0de4; /* 0xde4 */
|
775 | bcec36ea | Alexander Graf | uint64_t int_clock; /* 0xde8 */
|
776 | bcec36ea | Alexander Graf | uint8_t pad12[0xe00-0xdf0]; /* 0xdf0 */ |
777 | bcec36ea | Alexander Graf | |
778 | bcec36ea | Alexander Graf | /* 0xe00 is used as indicator for dump tools */
|
779 | bcec36ea | Alexander Graf | /* whether the kernel died with panic() or not */
|
780 | bcec36ea | Alexander Graf | uint32_t panic_magic; /* 0xe00 */
|
781 | bcec36ea | Alexander Graf | |
782 | bcec36ea | Alexander Graf | uint8_t pad13[0x11b8-0xe04]; /* 0xe04 */ |
783 | bcec36ea | Alexander Graf | |
784 | bcec36ea | Alexander Graf | /* 64 bit extparam used for pfault, diag 250 etc */
|
785 | bcec36ea | Alexander Graf | uint64_t ext_params2; /* 0x11B8 */
|
786 | bcec36ea | Alexander Graf | |
787 | bcec36ea | Alexander Graf | uint8_t pad14[0x1200-0x11C0]; /* 0x11C0 */ |
788 | bcec36ea | Alexander Graf | |
789 | bcec36ea | Alexander Graf | /* System info area */
|
790 | bcec36ea | Alexander Graf | |
791 | bcec36ea | Alexander Graf | uint64_t floating_pt_save_area[16]; /* 0x1200 */ |
792 | bcec36ea | Alexander Graf | uint64_t gpregs_save_area[16]; /* 0x1280 */ |
793 | bcec36ea | Alexander Graf | uint32_t st_status_fixed_logout[4]; /* 0x1300 */ |
794 | bcec36ea | Alexander Graf | uint8_t pad15[0x1318-0x1310]; /* 0x1310 */ |
795 | bcec36ea | Alexander Graf | uint32_t prefixreg_save_area; /* 0x1318 */
|
796 | bcec36ea | Alexander Graf | uint32_t fpt_creg_save_area; /* 0x131c */
|
797 | bcec36ea | Alexander Graf | uint8_t pad16[0x1324-0x1320]; /* 0x1320 */ |
798 | bcec36ea | Alexander Graf | uint32_t tod_progreg_save_area; /* 0x1324 */
|
799 | bcec36ea | Alexander Graf | uint32_t cpu_timer_save_area[2]; /* 0x1328 */ |
800 | bcec36ea | Alexander Graf | uint32_t clock_comp_save_area[2]; /* 0x1330 */ |
801 | bcec36ea | Alexander Graf | uint8_t pad17[0x1340-0x1338]; /* 0x1338 */ |
802 | bcec36ea | Alexander Graf | uint32_t access_regs_save_area[16]; /* 0x1340 */ |
803 | bcec36ea | Alexander Graf | uint64_t cregs_save_area[16]; /* 0x1380 */ |
804 | bcec36ea | Alexander Graf | |
805 | bcec36ea | Alexander Graf | /* align to the top of the prefix area */
|
806 | bcec36ea | Alexander Graf | |
807 | bcec36ea | Alexander Graf | uint8_t pad18[0x2000-0x1400]; /* 0x1400 */ |
808 | 541dc0d4 | Stefan Weil | } QEMU_PACKED LowCore; |
809 | bcec36ea | Alexander Graf | |
810 | bcec36ea | Alexander Graf | /* STSI */
|
811 | bcec36ea | Alexander Graf | #define STSI_LEVEL_MASK 0x00000000f0000000ULL |
812 | bcec36ea | Alexander Graf | #define STSI_LEVEL_CURRENT 0x0000000000000000ULL |
813 | bcec36ea | Alexander Graf | #define STSI_LEVEL_1 0x0000000010000000ULL |
814 | bcec36ea | Alexander Graf | #define STSI_LEVEL_2 0x0000000020000000ULL |
815 | bcec36ea | Alexander Graf | #define STSI_LEVEL_3 0x0000000030000000ULL |
816 | bcec36ea | Alexander Graf | #define STSI_R0_RESERVED_MASK 0x000000000fffff00ULL |
817 | bcec36ea | Alexander Graf | #define STSI_R0_SEL1_MASK 0x00000000000000ffULL |
818 | bcec36ea | Alexander Graf | #define STSI_R1_RESERVED_MASK 0x00000000ffff0000ULL |
819 | bcec36ea | Alexander Graf | #define STSI_R1_SEL2_MASK 0x000000000000ffffULL |
820 | bcec36ea | Alexander Graf | |
821 | bcec36ea | Alexander Graf | /* Basic Machine Configuration */
|
822 | bcec36ea | Alexander Graf | struct sysib_111 {
|
823 | bcec36ea | Alexander Graf | uint32_t res1[8];
|
824 | bcec36ea | Alexander Graf | uint8_t manuf[16];
|
825 | bcec36ea | Alexander Graf | uint8_t type[4];
|
826 | bcec36ea | Alexander Graf | uint8_t res2[12];
|
827 | bcec36ea | Alexander Graf | uint8_t model[16];
|
828 | bcec36ea | Alexander Graf | uint8_t sequence[16];
|
829 | bcec36ea | Alexander Graf | uint8_t plant[4];
|
830 | bcec36ea | Alexander Graf | uint8_t res3[156];
|
831 | bcec36ea | Alexander Graf | }; |
832 | bcec36ea | Alexander Graf | |
833 | bcec36ea | Alexander Graf | /* Basic Machine CPU */
|
834 | bcec36ea | Alexander Graf | struct sysib_121 {
|
835 | bcec36ea | Alexander Graf | uint32_t res1[80];
|
836 | bcec36ea | Alexander Graf | uint8_t sequence[16];
|
837 | bcec36ea | Alexander Graf | uint8_t plant[4];
|
838 | bcec36ea | Alexander Graf | uint8_t res2[2];
|
839 | bcec36ea | Alexander Graf | uint16_t cpu_addr; |
840 | bcec36ea | Alexander Graf | uint8_t res3[152];
|
841 | bcec36ea | Alexander Graf | }; |
842 | bcec36ea | Alexander Graf | |
843 | bcec36ea | Alexander Graf | /* Basic Machine CPUs */
|
844 | bcec36ea | Alexander Graf | struct sysib_122 {
|
845 | bcec36ea | Alexander Graf | uint8_t res1[32];
|
846 | bcec36ea | Alexander Graf | uint32_t capability; |
847 | bcec36ea | Alexander Graf | uint16_t total_cpus; |
848 | bcec36ea | Alexander Graf | uint16_t active_cpus; |
849 | bcec36ea | Alexander Graf | uint16_t standby_cpus; |
850 | bcec36ea | Alexander Graf | uint16_t reserved_cpus; |
851 | bcec36ea | Alexander Graf | uint16_t adjustments[2026];
|
852 | bcec36ea | Alexander Graf | }; |
853 | bcec36ea | Alexander Graf | |
854 | bcec36ea | Alexander Graf | /* LPAR CPU */
|
855 | bcec36ea | Alexander Graf | struct sysib_221 {
|
856 | bcec36ea | Alexander Graf | uint32_t res1[80];
|
857 | bcec36ea | Alexander Graf | uint8_t sequence[16];
|
858 | bcec36ea | Alexander Graf | uint8_t plant[4];
|
859 | bcec36ea | Alexander Graf | uint16_t cpu_id; |
860 | bcec36ea | Alexander Graf | uint16_t cpu_addr; |
861 | bcec36ea | Alexander Graf | uint8_t res3[152];
|
862 | bcec36ea | Alexander Graf | }; |
863 | bcec36ea | Alexander Graf | |
864 | bcec36ea | Alexander Graf | /* LPAR CPUs */
|
865 | bcec36ea | Alexander Graf | struct sysib_222 {
|
866 | bcec36ea | Alexander Graf | uint32_t res1[32];
|
867 | bcec36ea | Alexander Graf | uint16_t lpar_num; |
868 | bcec36ea | Alexander Graf | uint8_t res2; |
869 | bcec36ea | Alexander Graf | uint8_t lcpuc; |
870 | bcec36ea | Alexander Graf | uint16_t total_cpus; |
871 | bcec36ea | Alexander Graf | uint16_t conf_cpus; |
872 | bcec36ea | Alexander Graf | uint16_t standby_cpus; |
873 | bcec36ea | Alexander Graf | uint16_t reserved_cpus; |
874 | bcec36ea | Alexander Graf | uint8_t name[8];
|
875 | bcec36ea | Alexander Graf | uint32_t caf; |
876 | bcec36ea | Alexander Graf | uint8_t res3[16];
|
877 | bcec36ea | Alexander Graf | uint16_t dedicated_cpus; |
878 | bcec36ea | Alexander Graf | uint16_t shared_cpus; |
879 | bcec36ea | Alexander Graf | uint8_t res4[180];
|
880 | bcec36ea | Alexander Graf | }; |
881 | bcec36ea | Alexander Graf | |
882 | bcec36ea | Alexander Graf | /* VM CPUs */
|
883 | bcec36ea | Alexander Graf | struct sysib_322 {
|
884 | bcec36ea | Alexander Graf | uint8_t res1[31];
|
885 | bcec36ea | Alexander Graf | uint8_t count; |
886 | bcec36ea | Alexander Graf | struct {
|
887 | bcec36ea | Alexander Graf | uint8_t res2[4];
|
888 | bcec36ea | Alexander Graf | uint16_t total_cpus; |
889 | bcec36ea | Alexander Graf | uint16_t conf_cpus; |
890 | bcec36ea | Alexander Graf | uint16_t standby_cpus; |
891 | bcec36ea | Alexander Graf | uint16_t reserved_cpus; |
892 | bcec36ea | Alexander Graf | uint8_t name[8];
|
893 | bcec36ea | Alexander Graf | uint32_t caf; |
894 | bcec36ea | Alexander Graf | uint8_t cpi[16];
|
895 | bcec36ea | Alexander Graf | uint8_t res3[24];
|
896 | bcec36ea | Alexander Graf | } vm[8];
|
897 | bcec36ea | Alexander Graf | uint8_t res4[3552];
|
898 | bcec36ea | Alexander Graf | }; |
899 | bcec36ea | Alexander Graf | |
900 | bcec36ea | Alexander Graf | /* MMU defines */
|
901 | bcec36ea | Alexander Graf | #define _ASCE_ORIGIN ~0xfffULL /* segment table origin */ |
902 | bcec36ea | Alexander Graf | #define _ASCE_SUBSPACE 0x200 /* subspace group control */ |
903 | bcec36ea | Alexander Graf | #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */ |
904 | bcec36ea | Alexander Graf | #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */ |
905 | bcec36ea | Alexander Graf | #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */ |
906 | bcec36ea | Alexander Graf | #define _ASCE_REAL_SPACE 0x20 /* real space control */ |
907 | bcec36ea | Alexander Graf | #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */ |
908 | bcec36ea | Alexander Graf | #define _ASCE_TYPE_REGION1 0x0c /* region first table type */ |
909 | bcec36ea | Alexander Graf | #define _ASCE_TYPE_REGION2 0x08 /* region second table type */ |
910 | bcec36ea | Alexander Graf | #define _ASCE_TYPE_REGION3 0x04 /* region third table type */ |
911 | bcec36ea | Alexander Graf | #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */ |
912 | bcec36ea | Alexander Graf | #define _ASCE_TABLE_LENGTH 0x03 /* region table length */ |
913 | bcec36ea | Alexander Graf | |
914 | bcec36ea | Alexander Graf | #define _REGION_ENTRY_ORIGIN ~0xfffULL /* region/segment table origin */ |
915 | bcec36ea | Alexander Graf | #define _REGION_ENTRY_INV 0x20 /* invalid region table entry */ |
916 | bcec36ea | Alexander Graf | #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */ |
917 | bcec36ea | Alexander Graf | #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */ |
918 | bcec36ea | Alexander Graf | #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */ |
919 | bcec36ea | Alexander Graf | #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */ |
920 | bcec36ea | Alexander Graf | #define _REGION_ENTRY_LENGTH 0x03 /* region third length */ |
921 | bcec36ea | Alexander Graf | |
922 | bcec36ea | Alexander Graf | #define _SEGMENT_ENTRY_ORIGIN ~0x7ffULL /* segment table origin */ |
923 | bcec36ea | Alexander Graf | #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */ |
924 | bcec36ea | Alexander Graf | #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */ |
925 | bcec36ea | Alexander Graf | |
926 | bcec36ea | Alexander Graf | #define _PAGE_RO 0x200 /* HW read-only bit */ |
927 | bcec36ea | Alexander Graf | #define _PAGE_INVALID 0x400 /* HW invalid bit */ |
928 | bcec36ea | Alexander Graf | |
929 | b9959138 | Alexander Graf | #define SK_C (0x1 << 1) |
930 | b9959138 | Alexander Graf | #define SK_R (0x1 << 2) |
931 | b9959138 | Alexander Graf | #define SK_F (0x1 << 3) |
932 | b9959138 | Alexander Graf | #define SK_ACC_MASK (0xf << 4) |
933 | bcec36ea | Alexander Graf | |
934 | bcec36ea | Alexander Graf | #define SIGP_SENSE 0x01 |
935 | bcec36ea | Alexander Graf | #define SIGP_EXTERNAL_CALL 0x02 |
936 | bcec36ea | Alexander Graf | #define SIGP_EMERGENCY 0x03 |
937 | bcec36ea | Alexander Graf | #define SIGP_START 0x04 |
938 | bcec36ea | Alexander Graf | #define SIGP_STOP 0x05 |
939 | bcec36ea | Alexander Graf | #define SIGP_RESTART 0x06 |
940 | bcec36ea | Alexander Graf | #define SIGP_STOP_STORE_STATUS 0x09 |
941 | bcec36ea | Alexander Graf | #define SIGP_INITIAL_CPU_RESET 0x0b |
942 | bcec36ea | Alexander Graf | #define SIGP_CPU_RESET 0x0c |
943 | bcec36ea | Alexander Graf | #define SIGP_SET_PREFIX 0x0d |
944 | bcec36ea | Alexander Graf | #define SIGP_STORE_STATUS_ADDR 0x0e |
945 | bcec36ea | Alexander Graf | #define SIGP_SET_ARCH 0x12 |
946 | bcec36ea | Alexander Graf | |
947 | bcec36ea | Alexander Graf | /* cpu status bits */
|
948 | bcec36ea | Alexander Graf | #define SIGP_STAT_EQUIPMENT_CHECK 0x80000000UL |
949 | bcec36ea | Alexander Graf | #define SIGP_STAT_INCORRECT_STATE 0x00000200UL |
950 | bcec36ea | Alexander Graf | #define SIGP_STAT_INVALID_PARAMETER 0x00000100UL |
951 | bcec36ea | Alexander Graf | #define SIGP_STAT_EXT_CALL_PENDING 0x00000080UL |
952 | bcec36ea | Alexander Graf | #define SIGP_STAT_STOPPED 0x00000040UL |
953 | bcec36ea | Alexander Graf | #define SIGP_STAT_OPERATOR_INTERV 0x00000020UL |
954 | bcec36ea | Alexander Graf | #define SIGP_STAT_CHECK_STOP 0x00000010UL |
955 | bcec36ea | Alexander Graf | #define SIGP_STAT_INOPERATIVE 0x00000004UL |
956 | bcec36ea | Alexander Graf | #define SIGP_STAT_INVALID_ORDER 0x00000002UL |
957 | bcec36ea | Alexander Graf | #define SIGP_STAT_RECEIVER_CHECK 0x00000001UL |
958 | bcec36ea | Alexander Graf | |
959 | a4e3ad19 | Andreas Färber | void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr);
|
960 | a4e3ad19 | Andreas Färber | int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, |
961 | bcec36ea | Alexander Graf | target_ulong *raddr, int *flags);
|
962 | f6c98f92 | Heinz Graalfs | int sclp_service_call(uint32_t sccb, uint64_t code);
|
963 | a4e3ad19 | Andreas Färber | uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst, |
964 | bcec36ea | Alexander Graf | uint64_t vr); |
965 | bcec36ea | Alexander Graf | |
966 | bcec36ea | Alexander Graf | #define TARGET_HAS_ICE 1 |
967 | bcec36ea | Alexander Graf | |
968 | bcec36ea | Alexander Graf | /* The value of the TOD clock for 1.1.1970. */
|
969 | bcec36ea | Alexander Graf | #define TOD_UNIX_EPOCH 0x7d91048bca000000ULL |
970 | bcec36ea | Alexander Graf | |
971 | bcec36ea | Alexander Graf | /* Converts ns to s390's clock format */
|
972 | bcec36ea | Alexander Graf | static inline uint64_t time2tod(uint64_t ns) { |
973 | bcec36ea | Alexander Graf | return (ns << 9) / 125; |
974 | bcec36ea | Alexander Graf | } |
975 | bcec36ea | Alexander Graf | |
976 | f9466733 | Andreas Färber | static inline void cpu_inject_ext(S390CPU *cpu, uint32_t code, uint32_t param, |
977 | bcec36ea | Alexander Graf | uint64_t param64) |
978 | bcec36ea | Alexander Graf | { |
979 | f9466733 | Andreas Färber | CPUS390XState *env = &cpu->env; |
980 | f9466733 | Andreas Färber | |
981 | bcec36ea | Alexander Graf | if (env->ext_index == MAX_EXT_QUEUE - 1) { |
982 | bcec36ea | Alexander Graf | /* ugh - can't queue anymore. Let's drop. */
|
983 | bcec36ea | Alexander Graf | return;
|
984 | bcec36ea | Alexander Graf | } |
985 | bcec36ea | Alexander Graf | |
986 | bcec36ea | Alexander Graf | env->ext_index++; |
987 | bcec36ea | Alexander Graf | assert(env->ext_index < MAX_EXT_QUEUE); |
988 | bcec36ea | Alexander Graf | |
989 | bcec36ea | Alexander Graf | env->ext_queue[env->ext_index].code = code; |
990 | bcec36ea | Alexander Graf | env->ext_queue[env->ext_index].param = param; |
991 | bcec36ea | Alexander Graf | env->ext_queue[env->ext_index].param64 = param64; |
992 | bcec36ea | Alexander Graf | |
993 | bcec36ea | Alexander Graf | env->pending_int |= INTERRUPT_EXT; |
994 | c3affe56 | Andreas Färber | cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); |
995 | bcec36ea | Alexander Graf | } |
996 | 10c339a0 | Alexander Graf | |
997 | f9466733 | Andreas Färber | static inline void cpu_inject_io(S390CPU *cpu, uint16_t subchannel_id, |
998 | 5d69c547 | Cornelia Huck | uint16_t subchannel_number, |
999 | 5d69c547 | Cornelia Huck | uint32_t io_int_parm, uint32_t io_int_word) |
1000 | 5d69c547 | Cornelia Huck | { |
1001 | f9466733 | Andreas Färber | CPUS390XState *env = &cpu->env; |
1002 | 91b0a8f3 | Cornelia Huck | int isc = IO_INT_WORD_ISC(io_int_word);
|
1003 | 5d69c547 | Cornelia Huck | |
1004 | 5d69c547 | Cornelia Huck | if (env->io_index[isc] == MAX_IO_QUEUE - 1) { |
1005 | 5d69c547 | Cornelia Huck | /* ugh - can't queue anymore. Let's drop. */
|
1006 | 5d69c547 | Cornelia Huck | return;
|
1007 | 5d69c547 | Cornelia Huck | } |
1008 | 5d69c547 | Cornelia Huck | |
1009 | 5d69c547 | Cornelia Huck | env->io_index[isc]++; |
1010 | 5d69c547 | Cornelia Huck | assert(env->io_index[isc] < MAX_IO_QUEUE); |
1011 | 5d69c547 | Cornelia Huck | |
1012 | 5d69c547 | Cornelia Huck | env->io_queue[env->io_index[isc]][isc].id = subchannel_id; |
1013 | 5d69c547 | Cornelia Huck | env->io_queue[env->io_index[isc]][isc].nr = subchannel_number; |
1014 | 5d69c547 | Cornelia Huck | env->io_queue[env->io_index[isc]][isc].parm = io_int_parm; |
1015 | 5d69c547 | Cornelia Huck | env->io_queue[env->io_index[isc]][isc].word = io_int_word; |
1016 | 5d69c547 | Cornelia Huck | |
1017 | 5d69c547 | Cornelia Huck | env->pending_int |= INTERRUPT_IO; |
1018 | c3affe56 | Andreas Färber | cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); |
1019 | 5d69c547 | Cornelia Huck | } |
1020 | 5d69c547 | Cornelia Huck | |
1021 | f9466733 | Andreas Färber | static inline void cpu_inject_crw_mchk(S390CPU *cpu) |
1022 | 5d69c547 | Cornelia Huck | { |
1023 | f9466733 | Andreas Färber | CPUS390XState *env = &cpu->env; |
1024 | f9466733 | Andreas Färber | |
1025 | 5d69c547 | Cornelia Huck | if (env->mchk_index == MAX_MCHK_QUEUE - 1) { |
1026 | 5d69c547 | Cornelia Huck | /* ugh - can't queue anymore. Let's drop. */
|
1027 | 5d69c547 | Cornelia Huck | return;
|
1028 | 5d69c547 | Cornelia Huck | } |
1029 | 5d69c547 | Cornelia Huck | |
1030 | 5d69c547 | Cornelia Huck | env->mchk_index++; |
1031 | 5d69c547 | Cornelia Huck | assert(env->mchk_index < MAX_MCHK_QUEUE); |
1032 | 5d69c547 | Cornelia Huck | |
1033 | 5d69c547 | Cornelia Huck | env->mchk_queue[env->mchk_index].type = 1;
|
1034 | 5d69c547 | Cornelia Huck | |
1035 | 5d69c547 | Cornelia Huck | env->pending_int |= INTERRUPT_MCHK; |
1036 | c3affe56 | Andreas Färber | cpu_interrupt(CPU(cpu), CPU_INTERRUPT_HARD); |
1037 | 5d69c547 | Cornelia Huck | } |
1038 | 5d69c547 | Cornelia Huck | |
1039 | 3993c6bd | Andreas Färber | static inline bool cpu_has_work(CPUState *cpu) |
1040 | f081c76c | Blue Swirl | { |
1041 | 259186a7 | Andreas Färber | S390CPU *s390_cpu = S390_CPU(cpu); |
1042 | 259186a7 | Andreas Färber | CPUS390XState *env = &s390_cpu->env; |
1043 | 3993c6bd | Andreas Färber | |
1044 | 259186a7 | Andreas Färber | return (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
|
1045 | f081c76c | Blue Swirl | (env->psw.mask & PSW_MASK_EXT); |
1046 | f081c76c | Blue Swirl | } |
1047 | f081c76c | Blue Swirl | |
1048 | e72ca652 | Blue Swirl | /* fpu_helper.c */
|
1049 | e72ca652 | Blue Swirl | uint32_t set_cc_nz_f32(float32 v); |
1050 | e72ca652 | Blue Swirl | uint32_t set_cc_nz_f64(float64 v); |
1051 | 587626f8 | Richard Henderson | uint32_t set_cc_nz_f128(float128 v); |
1052 | e72ca652 | Blue Swirl | |
1053 | aea1e885 | Blue Swirl | /* misc_helper.c */
|
1054 | 268846ba | Eugene (jno) Dvurechenski | #ifndef CONFIG_USER_ONLY
|
1055 | 268846ba | Eugene (jno) Dvurechenski | void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3);
|
1056 | 268846ba | Eugene (jno) Dvurechenski | #endif
|
1057 | d5a103cd | Richard Henderson | void program_interrupt(CPUS390XState *env, uint32_t code, int ilen); |
1058 | b4e2bd35 | Richard Henderson | void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp, |
1059 | b4e2bd35 | Richard Henderson | uintptr_t retaddr); |
1060 | a78b0504 | Blue Swirl | |
1061 | 09b99878 | Cornelia Huck | #ifdef CONFIG_KVM
|
1062 | 09b99878 | Cornelia Huck | void kvm_s390_io_interrupt(S390CPU *cpu, uint16_t subchannel_id,
|
1063 | 09b99878 | Cornelia Huck | uint16_t subchannel_nr, uint32_t io_int_parm, |
1064 | 09b99878 | Cornelia Huck | uint32_t io_int_word); |
1065 | 09b99878 | Cornelia Huck | void kvm_s390_crw_mchk(S390CPU *cpu);
|
1066 | 09b99878 | Cornelia Huck | void kvm_s390_enable_css_support(S390CPU *cpu);
|
1067 | cc3ac9c4 | Cornelia Huck | int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, uint32_t sch,
|
1068 | cc3ac9c4 | Cornelia Huck | int vq, bool assign); |
1069 | 7f7f9752 | Eugene (jno) Dvurechenski | int kvm_s390_cpu_restart(S390CPU *cpu);
|
1070 | 09b99878 | Cornelia Huck | #else
|
1071 | df1fe5bb | Cornelia Huck | static inline void kvm_s390_io_interrupt(S390CPU *cpu, |
1072 | df1fe5bb | Cornelia Huck | uint16_t subchannel_id, |
1073 | df1fe5bb | Cornelia Huck | uint16_t subchannel_nr, |
1074 | df1fe5bb | Cornelia Huck | uint32_t io_int_parm, |
1075 | df1fe5bb | Cornelia Huck | uint32_t io_int_word) |
1076 | df1fe5bb | Cornelia Huck | { |
1077 | df1fe5bb | Cornelia Huck | } |
1078 | df1fe5bb | Cornelia Huck | static inline void kvm_s390_crw_mchk(S390CPU *cpu) |
1079 | df1fe5bb | Cornelia Huck | { |
1080 | df1fe5bb | Cornelia Huck | } |
1081 | 09b99878 | Cornelia Huck | static inline void kvm_s390_enable_css_support(S390CPU *cpu) |
1082 | 09b99878 | Cornelia Huck | { |
1083 | 09b99878 | Cornelia Huck | } |
1084 | cc3ac9c4 | Cornelia Huck | static inline int kvm_s390_assign_subch_ioeventfd(EventNotifier *notifier, |
1085 | cc3ac9c4 | Cornelia Huck | uint32_t sch, int vq,
|
1086 | b4436a0b | Cornelia Huck | bool assign)
|
1087 | b4436a0b | Cornelia Huck | { |
1088 | b4436a0b | Cornelia Huck | return -ENOSYS;
|
1089 | b4436a0b | Cornelia Huck | } |
1090 | 7f7f9752 | Eugene (jno) Dvurechenski | static inline int kvm_s390_cpu_restart(S390CPU *cpu) |
1091 | 7f7f9752 | Eugene (jno) Dvurechenski | { |
1092 | 7f7f9752 | Eugene (jno) Dvurechenski | return -ENOSYS;
|
1093 | 7f7f9752 | Eugene (jno) Dvurechenski | } |
1094 | 09b99878 | Cornelia Huck | #endif
|
1095 | df1fe5bb | Cornelia Huck | |
1096 | 7f7f9752 | Eugene (jno) Dvurechenski | static inline int s390_cpu_restart(S390CPU *cpu) |
1097 | 7f7f9752 | Eugene (jno) Dvurechenski | { |
1098 | 7f7f9752 | Eugene (jno) Dvurechenski | if (kvm_enabled()) {
|
1099 | 7f7f9752 | Eugene (jno) Dvurechenski | return kvm_s390_cpu_restart(cpu);
|
1100 | 7f7f9752 | Eugene (jno) Dvurechenski | } |
1101 | 7f7f9752 | Eugene (jno) Dvurechenski | return -ENOSYS;
|
1102 | 7f7f9752 | Eugene (jno) Dvurechenski | } |
1103 | 7f7f9752 | Eugene (jno) Dvurechenski | |
1104 | df1fe5bb | Cornelia Huck | static inline void s390_io_interrupt(S390CPU *cpu, |
1105 | df1fe5bb | Cornelia Huck | uint16_t subchannel_id, |
1106 | df1fe5bb | Cornelia Huck | uint16_t subchannel_nr, |
1107 | df1fe5bb | Cornelia Huck | uint32_t io_int_parm, |
1108 | df1fe5bb | Cornelia Huck | uint32_t io_int_word) |
1109 | df1fe5bb | Cornelia Huck | { |
1110 | df1fe5bb | Cornelia Huck | if (kvm_enabled()) {
|
1111 | df1fe5bb | Cornelia Huck | kvm_s390_io_interrupt(cpu, subchannel_id, subchannel_nr, io_int_parm, |
1112 | df1fe5bb | Cornelia Huck | io_int_word); |
1113 | df1fe5bb | Cornelia Huck | } else {
|
1114 | f9466733 | Andreas Färber | cpu_inject_io(cpu, subchannel_id, subchannel_nr, io_int_parm, |
1115 | df1fe5bb | Cornelia Huck | io_int_word); |
1116 | df1fe5bb | Cornelia Huck | } |
1117 | df1fe5bb | Cornelia Huck | } |
1118 | df1fe5bb | Cornelia Huck | |
1119 | df1fe5bb | Cornelia Huck | static inline void s390_crw_mchk(S390CPU *cpu) |
1120 | df1fe5bb | Cornelia Huck | { |
1121 | df1fe5bb | Cornelia Huck | if (kvm_enabled()) {
|
1122 | df1fe5bb | Cornelia Huck | kvm_s390_crw_mchk(cpu); |
1123 | df1fe5bb | Cornelia Huck | } else {
|
1124 | f9466733 | Andreas Färber | cpu_inject_crw_mchk(cpu); |
1125 | df1fe5bb | Cornelia Huck | } |
1126 | df1fe5bb | Cornelia Huck | } |
1127 | df1fe5bb | Cornelia Huck | |
1128 | cc3ac9c4 | Cornelia Huck | static inline int s390_assign_subch_ioeventfd(EventNotifier *notifier, |
1129 | cc3ac9c4 | Cornelia Huck | uint32_t sch_id, int vq,
|
1130 | b4436a0b | Cornelia Huck | bool assign)
|
1131 | b4436a0b | Cornelia Huck | { |
1132 | b4436a0b | Cornelia Huck | if (kvm_enabled()) {
|
1133 | cc3ac9c4 | Cornelia Huck | return kvm_s390_assign_subch_ioeventfd(notifier, sch_id, vq, assign);
|
1134 | b4436a0b | Cornelia Huck | } else {
|
1135 | b4436a0b | Cornelia Huck | return -ENOSYS;
|
1136 | b4436a0b | Cornelia Huck | } |
1137 | b4436a0b | Cornelia Huck | } |
1138 | b4436a0b | Cornelia Huck | |
1139 | 10ec5117 | Alexander Graf | #endif |