Revision b41a2cd1 hw/i8259.c

b/hw/i8259.c
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/* debug PIC */
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//#define DEBUG_PIC
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//#define DEBUG_IRQ_LATENCY
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typedef struct PicState {
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    uint8_t last_irr; /* edge detection */
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    uint8_t irr; /* interrupt request register */
......
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    return intno;
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}
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void pic_ioport_write(CPUState *env, uint32_t addr, uint32_t val)
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static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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{
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    PicState *s;
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    PicState *s = opaque;
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    int priority, cmd, irq;
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#ifdef DEBUG_PIC
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    printf("pic_write: addr=0x%02x val=0x%02x\n", addr, val);
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#endif
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    s = &pics[addr >> 7];
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    addr &= 1;
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    if (addr == 0) {
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        if (val & 0x10) {
......
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    return ret;
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}
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uint32_t pic_ioport_read(CPUState *env, uint32_t addr1)
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static uint32_t pic_ioport_read(void *opaque, uint32_t addr1)
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{
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    PicState *s;
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    PicState *s = opaque;
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    unsigned int addr;
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    int ret;
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    addr = addr1;
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    s = &pics[addr >> 7];
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    addr &= 1;
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    if (s->poll) {
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        ret = pic_poll_read(s, addr1);
......
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void pic_init(void)
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{
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#if defined (TARGET_I386) || defined (TARGET_PPC)
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    register_ioport_write(0x20, 2, pic_ioport_write, 1);
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    register_ioport_read(0x20, 2, pic_ioport_read, 1);
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    register_ioport_write(0xa0, 2, pic_ioport_write, 1);
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    register_ioport_read(0xa0, 2, pic_ioport_read, 1);
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#endif
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    register_ioport_write(0x20, 2, 1, pic_ioport_write, &pics[0]);
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    register_ioport_read(0x20, 2, 1, pic_ioport_read, &pics[0]);
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    register_ioport_write(0xa0, 2, 1, pic_ioport_write, &pics[1]);
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    register_ioport_read(0xa0, 2, 1, pic_ioport_read, &pics[1]);
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}
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