root / hw / cirrus_vga_rop.h @ b538e53e
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1 | a5082316 | bellard | /*
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2 | a5082316 | bellard | * QEMU Cirrus CLGD 54xx VGA Emulator.
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3 | 5fafdf24 | ths | *
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4 | a5082316 | bellard | * Copyright (c) 2004 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | a5082316 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | a5082316 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | a5082316 | bellard | * in the Software without restriction, including without limitation the rights
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9 | a5082316 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | a5082316 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | a5082316 | bellard | * furnished to do so, subject to the following conditions:
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12 | a5082316 | bellard | *
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13 | a5082316 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | a5082316 | bellard | * all copies or substantial portions of the Software.
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15 | a5082316 | bellard | *
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16 | a5082316 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | a5082316 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | a5082316 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | a5082316 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | a5082316 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | a5082316 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | a5082316 | bellard | * THE SOFTWARE.
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23 | a5082316 | bellard | */
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24 | a5082316 | bellard | |
25 | 8c78881f | Blue Swirl | static inline void glue(rop_8_,ROP_NAME)(uint8_t *dst, uint8_t src) |
26 | 8c78881f | Blue Swirl | { |
27 | 8c78881f | Blue Swirl | *dst = ROP_FN(*dst, src); |
28 | 8c78881f | Blue Swirl | } |
29 | 8c78881f | Blue Swirl | |
30 | 8c78881f | Blue Swirl | static inline void glue(rop_16_,ROP_NAME)(uint16_t *dst, uint16_t src) |
31 | 8c78881f | Blue Swirl | { |
32 | 8c78881f | Blue Swirl | *dst = ROP_FN(*dst, src); |
33 | 8c78881f | Blue Swirl | } |
34 | 8c78881f | Blue Swirl | |
35 | 8c78881f | Blue Swirl | static inline void glue(rop_32_,ROP_NAME)(uint32_t *dst, uint32_t src) |
36 | 8c78881f | Blue Swirl | { |
37 | 8c78881f | Blue Swirl | *dst = ROP_FN(*dst, src); |
38 | 8c78881f | Blue Swirl | } |
39 | 8c78881f | Blue Swirl | |
40 | 8c78881f | Blue Swirl | #define ROP_OP(d, s) glue(rop_8_,ROP_NAME)(d, s)
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41 | 8c78881f | Blue Swirl | #define ROP_OP_16(d, s) glue(rop_16_,ROP_NAME)(d, s)
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42 | 8c78881f | Blue Swirl | #define ROP_OP_32(d, s) glue(rop_32_,ROP_NAME)(d, s)
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43 | 8c78881f | Blue Swirl | #undef ROP_FN
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44 | 8c78881f | Blue Swirl | |
45 | a5082316 | bellard | static void |
46 | a5082316 | bellard | glue(cirrus_bitblt_rop_fwd_, ROP_NAME)(CirrusVGAState *s, |
47 | a5082316 | bellard | uint8_t *dst,const uint8_t *src,
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48 | a5082316 | bellard | int dstpitch,int srcpitch, |
49 | a5082316 | bellard | int bltwidth,int bltheight) |
50 | a5082316 | bellard | { |
51 | a5082316 | bellard | int x,y;
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52 | a5082316 | bellard | dstpitch -= bltwidth; |
53 | a5082316 | bellard | srcpitch -= bltwidth; |
54 | b2eb849d | aurel32 | |
55 | b2eb849d | aurel32 | if (dstpitch < 0 || srcpitch < 0) { |
56 | b2eb849d | aurel32 | /* is 0 valid? srcpitch == 0 could be useful */
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57 | b2eb849d | aurel32 | return;
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58 | b2eb849d | aurel32 | } |
59 | b2eb849d | aurel32 | |
60 | a5082316 | bellard | for (y = 0; y < bltheight; y++) { |
61 | a5082316 | bellard | for (x = 0; x < bltwidth; x++) { |
62 | 8c78881f | Blue Swirl | ROP_OP(dst, *src); |
63 | a5082316 | bellard | dst++; |
64 | a5082316 | bellard | src++; |
65 | a5082316 | bellard | } |
66 | a5082316 | bellard | dst += dstpitch; |
67 | a5082316 | bellard | src += srcpitch; |
68 | a5082316 | bellard | } |
69 | a5082316 | bellard | } |
70 | a5082316 | bellard | |
71 | a5082316 | bellard | static void |
72 | a5082316 | bellard | glue(cirrus_bitblt_rop_bkwd_, ROP_NAME)(CirrusVGAState *s, |
73 | a5082316 | bellard | uint8_t *dst,const uint8_t *src,
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74 | a5082316 | bellard | int dstpitch,int srcpitch, |
75 | a5082316 | bellard | int bltwidth,int bltheight) |
76 | a5082316 | bellard | { |
77 | a5082316 | bellard | int x,y;
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78 | a5082316 | bellard | dstpitch += bltwidth; |
79 | a5082316 | bellard | srcpitch += bltwidth; |
80 | a5082316 | bellard | for (y = 0; y < bltheight; y++) { |
81 | a5082316 | bellard | for (x = 0; x < bltwidth; x++) { |
82 | 8c78881f | Blue Swirl | ROP_OP(dst, *src); |
83 | a5082316 | bellard | dst--; |
84 | a5082316 | bellard | src--; |
85 | a5082316 | bellard | } |
86 | a5082316 | bellard | dst += dstpitch; |
87 | a5082316 | bellard | src += srcpitch; |
88 | a5082316 | bellard | } |
89 | a5082316 | bellard | } |
90 | a5082316 | bellard | |
91 | 96cf2df8 | ths | static void |
92 | 96cf2df8 | ths | glue(glue(cirrus_bitblt_rop_fwd_transp_, ROP_NAME),_8)(CirrusVGAState *s, |
93 | 96cf2df8 | ths | uint8_t *dst,const uint8_t *src,
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94 | 96cf2df8 | ths | int dstpitch,int srcpitch, |
95 | 96cf2df8 | ths | int bltwidth,int bltheight) |
96 | 96cf2df8 | ths | { |
97 | 96cf2df8 | ths | int x,y;
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98 | 96cf2df8 | ths | uint8_t p; |
99 | 96cf2df8 | ths | dstpitch -= bltwidth; |
100 | 96cf2df8 | ths | srcpitch -= bltwidth; |
101 | 96cf2df8 | ths | for (y = 0; y < bltheight; y++) { |
102 | 96cf2df8 | ths | for (x = 0; x < bltwidth; x++) { |
103 | 96cf2df8 | ths | p = *dst; |
104 | 8c78881f | Blue Swirl | ROP_OP(&p, *src); |
105 | 4e12cd94 | Avi Kivity | if (p != s->vga.gr[0x34]) *dst = p; |
106 | 96cf2df8 | ths | dst++; |
107 | 96cf2df8 | ths | src++; |
108 | 96cf2df8 | ths | } |
109 | 96cf2df8 | ths | dst += dstpitch; |
110 | 96cf2df8 | ths | src += srcpitch; |
111 | 96cf2df8 | ths | } |
112 | 96cf2df8 | ths | } |
113 | 96cf2df8 | ths | |
114 | 96cf2df8 | ths | static void |
115 | 96cf2df8 | ths | glue(glue(cirrus_bitblt_rop_bkwd_transp_, ROP_NAME),_8)(CirrusVGAState *s, |
116 | 96cf2df8 | ths | uint8_t *dst,const uint8_t *src,
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117 | 96cf2df8 | ths | int dstpitch,int srcpitch, |
118 | 96cf2df8 | ths | int bltwidth,int bltheight) |
119 | 96cf2df8 | ths | { |
120 | 96cf2df8 | ths | int x,y;
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121 | 96cf2df8 | ths | uint8_t p; |
122 | 96cf2df8 | ths | dstpitch += bltwidth; |
123 | 96cf2df8 | ths | srcpitch += bltwidth; |
124 | 96cf2df8 | ths | for (y = 0; y < bltheight; y++) { |
125 | 96cf2df8 | ths | for (x = 0; x < bltwidth; x++) { |
126 | 96cf2df8 | ths | p = *dst; |
127 | 8c78881f | Blue Swirl | ROP_OP(&p, *src); |
128 | 4e12cd94 | Avi Kivity | if (p != s->vga.gr[0x34]) *dst = p; |
129 | 96cf2df8 | ths | dst--; |
130 | 96cf2df8 | ths | src--; |
131 | 96cf2df8 | ths | } |
132 | 96cf2df8 | ths | dst += dstpitch; |
133 | 96cf2df8 | ths | src += srcpitch; |
134 | 96cf2df8 | ths | } |
135 | 96cf2df8 | ths | } |
136 | 96cf2df8 | ths | |
137 | 96cf2df8 | ths | static void |
138 | 96cf2df8 | ths | glue(glue(cirrus_bitblt_rop_fwd_transp_, ROP_NAME),_16)(CirrusVGAState *s, |
139 | 96cf2df8 | ths | uint8_t *dst,const uint8_t *src,
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140 | 96cf2df8 | ths | int dstpitch,int srcpitch, |
141 | 96cf2df8 | ths | int bltwidth,int bltheight) |
142 | 96cf2df8 | ths | { |
143 | 96cf2df8 | ths | int x,y;
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144 | 96cf2df8 | ths | uint8_t p1, p2; |
145 | 96cf2df8 | ths | dstpitch -= bltwidth; |
146 | 96cf2df8 | ths | srcpitch -= bltwidth; |
147 | 96cf2df8 | ths | for (y = 0; y < bltheight; y++) { |
148 | 96cf2df8 | ths | for (x = 0; x < bltwidth; x+=2) { |
149 | 96cf2df8 | ths | p1 = *dst; |
150 | 96cf2df8 | ths | p2 = *(dst+1);
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151 | 8c78881f | Blue Swirl | ROP_OP(&p1, *src); |
152 | 8c78881f | Blue Swirl | ROP_OP(&p2, *(src + 1));
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153 | 4e12cd94 | Avi Kivity | if ((p1 != s->vga.gr[0x34]) || (p2 != s->vga.gr[0x35])) { |
154 | 96cf2df8 | ths | *dst = p1; |
155 | 96cf2df8 | ths | *(dst+1) = p2;
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156 | 96cf2df8 | ths | } |
157 | 96cf2df8 | ths | dst+=2;
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158 | 96cf2df8 | ths | src+=2;
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159 | 96cf2df8 | ths | } |
160 | 96cf2df8 | ths | dst += dstpitch; |
161 | 96cf2df8 | ths | src += srcpitch; |
162 | 96cf2df8 | ths | } |
163 | 96cf2df8 | ths | } |
164 | 96cf2df8 | ths | |
165 | 96cf2df8 | ths | static void |
166 | 96cf2df8 | ths | glue(glue(cirrus_bitblt_rop_bkwd_transp_, ROP_NAME),_16)(CirrusVGAState *s, |
167 | 96cf2df8 | ths | uint8_t *dst,const uint8_t *src,
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168 | 96cf2df8 | ths | int dstpitch,int srcpitch, |
169 | 96cf2df8 | ths | int bltwidth,int bltheight) |
170 | 96cf2df8 | ths | { |
171 | 96cf2df8 | ths | int x,y;
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172 | 96cf2df8 | ths | uint8_t p1, p2; |
173 | 96cf2df8 | ths | dstpitch += bltwidth; |
174 | 96cf2df8 | ths | srcpitch += bltwidth; |
175 | 96cf2df8 | ths | for (y = 0; y < bltheight; y++) { |
176 | 96cf2df8 | ths | for (x = 0; x < bltwidth; x+=2) { |
177 | 96cf2df8 | ths | p1 = *(dst-1);
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178 | 96cf2df8 | ths | p2 = *dst; |
179 | 8c78881f | Blue Swirl | ROP_OP(&p1, *(src - 1));
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180 | 8c78881f | Blue Swirl | ROP_OP(&p2, *src); |
181 | 4e12cd94 | Avi Kivity | if ((p1 != s->vga.gr[0x34]) || (p2 != s->vga.gr[0x35])) { |
182 | 96cf2df8 | ths | *(dst-1) = p1;
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183 | 96cf2df8 | ths | *dst = p2; |
184 | 96cf2df8 | ths | } |
185 | 96cf2df8 | ths | dst-=2;
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186 | 96cf2df8 | ths | src-=2;
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187 | 96cf2df8 | ths | } |
188 | 96cf2df8 | ths | dst += dstpitch; |
189 | 96cf2df8 | ths | src += srcpitch; |
190 | 96cf2df8 | ths | } |
191 | 96cf2df8 | ths | } |
192 | 96cf2df8 | ths | |
193 | a5082316 | bellard | #define DEPTH 8 |
194 | a5082316 | bellard | #include "cirrus_vga_rop2.h" |
195 | a5082316 | bellard | |
196 | a5082316 | bellard | #define DEPTH 16 |
197 | a5082316 | bellard | #include "cirrus_vga_rop2.h" |
198 | a5082316 | bellard | |
199 | a5082316 | bellard | #define DEPTH 24 |
200 | a5082316 | bellard | #include "cirrus_vga_rop2.h" |
201 | a5082316 | bellard | |
202 | a5082316 | bellard | #define DEPTH 32 |
203 | a5082316 | bellard | #include "cirrus_vga_rop2.h" |
204 | a5082316 | bellard | |
205 | a5082316 | bellard | #undef ROP_NAME
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206 | a5082316 | bellard | #undef ROP_OP
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207 | 8c78881f | Blue Swirl | #undef ROP_OP_16
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208 | 8c78881f | Blue Swirl | #undef ROP_OP_32 |