root / target-ppc / helper_regs.h @ b53d44e5
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1 | 0411a972 | j_mayer | /*
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2 | 0411a972 | j_mayer | * PowerPC emulation special registers manipulation helpers for qemu.
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3 | 0411a972 | j_mayer | *
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4 | 0411a972 | j_mayer | * Copyright (c) 2003-2007 Jocelyn Mayer
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5 | 0411a972 | j_mayer | *
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6 | 0411a972 | j_mayer | * This library is free software; you can redistribute it and/or
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7 | 0411a972 | j_mayer | * modify it under the terms of the GNU Lesser General Public
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8 | 0411a972 | j_mayer | * License as published by the Free Software Foundation; either
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9 | 0411a972 | j_mayer | * version 2 of the License, or (at your option) any later version.
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10 | 0411a972 | j_mayer | *
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11 | 0411a972 | j_mayer | * This library is distributed in the hope that it will be useful,
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12 | 0411a972 | j_mayer | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 0411a972 | j_mayer | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 0411a972 | j_mayer | * Lesser General Public License for more details.
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15 | 0411a972 | j_mayer | *
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16 | 0411a972 | j_mayer | * You should have received a copy of the GNU Lesser General Public
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17 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 | 0411a972 | j_mayer | */
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19 | 0411a972 | j_mayer | |
20 | 0411a972 | j_mayer | #if !defined(__HELPER_REGS_H__)
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21 | 0411a972 | j_mayer | #define __HELPER_REGS_H__
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22 | 0411a972 | j_mayer | |
23 | 0411a972 | j_mayer | /* Swap temporary saved registers with GPRs */
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24 | 636aa200 | Blue Swirl | static inline void hreg_swap_gpr_tgpr(CPUPPCState *env) |
25 | 0411a972 | j_mayer | { |
26 | bd7d9a6d | aurel32 | target_ulong tmp; |
27 | 0411a972 | j_mayer | |
28 | 0411a972 | j_mayer | tmp = env->gpr[0];
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29 | 0411a972 | j_mayer | env->gpr[0] = env->tgpr[0]; |
30 | 0411a972 | j_mayer | env->tgpr[0] = tmp;
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31 | 0411a972 | j_mayer | tmp = env->gpr[1];
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32 | 0411a972 | j_mayer | env->gpr[1] = env->tgpr[1]; |
33 | 0411a972 | j_mayer | env->tgpr[1] = tmp;
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34 | 0411a972 | j_mayer | tmp = env->gpr[2];
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35 | 0411a972 | j_mayer | env->gpr[2] = env->tgpr[2]; |
36 | 0411a972 | j_mayer | env->tgpr[2] = tmp;
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37 | 0411a972 | j_mayer | tmp = env->gpr[3];
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38 | 0411a972 | j_mayer | env->gpr[3] = env->tgpr[3]; |
39 | 0411a972 | j_mayer | env->tgpr[3] = tmp;
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40 | 0411a972 | j_mayer | } |
41 | 0411a972 | j_mayer | |
42 | 636aa200 | Blue Swirl | static inline void hreg_compute_mem_idx(CPUPPCState *env) |
43 | 056401ea | j_mayer | { |
44 | 056401ea | j_mayer | /* Precompute MMU index */
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45 | a4f30719 | j_mayer | if (msr_pr == 0 && msr_hv != 0) { |
46 | 056401ea | j_mayer | env->mmu_idx = 2;
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47 | a4f30719 | j_mayer | } else {
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48 | 056401ea | j_mayer | env->mmu_idx = 1 - msr_pr;
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49 | a4f30719 | j_mayer | } |
50 | 056401ea | j_mayer | } |
51 | 056401ea | j_mayer | |
52 | 636aa200 | Blue Swirl | static inline void hreg_compute_hflags(CPUPPCState *env) |
53 | 0411a972 | j_mayer | { |
54 | 0411a972 | j_mayer | target_ulong hflags_mask; |
55 | 0411a972 | j_mayer | |
56 | 0411a972 | j_mayer | /* We 'forget' FE0 & FE1: we'll never generate imprecise exceptions */
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57 | 0411a972 | j_mayer | hflags_mask = (1 << MSR_VR) | (1 << MSR_AP) | (1 << MSR_SA) | |
58 | 0411a972 | j_mayer | (1 << MSR_PR) | (1 << MSR_FP) | (1 << MSR_SE) | (1 << MSR_BE) | |
59 | 0411a972 | j_mayer | (1 << MSR_LE);
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60 | a4f30719 | j_mayer | hflags_mask |= (1ULL << MSR_CM) | (1ULL << MSR_SF) | MSR_HVB; |
61 | 056401ea | j_mayer | hreg_compute_mem_idx(env); |
62 | 0411a972 | j_mayer | env->hflags = env->msr & hflags_mask; |
63 | 056401ea | j_mayer | /* Merge with hflags coming from other registers */
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64 | 056401ea | j_mayer | env->hflags |= env->hflags_nmsr; |
65 | 0411a972 | j_mayer | } |
66 | 0411a972 | j_mayer | |
67 | 636aa200 | Blue Swirl | static inline int hreg_store_msr(CPUPPCState *env, target_ulong value, |
68 | 636aa200 | Blue Swirl | int alter_hv)
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69 | 0411a972 | j_mayer | { |
70 | 2f462816 | j_mayer | int excp;
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71 | 0411a972 | j_mayer | |
72 | 0411a972 | j_mayer | excp = 0;
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73 | 0411a972 | j_mayer | value &= env->msr_mask; |
74 | 0411a972 | j_mayer | #if !defined (CONFIG_USER_ONLY)
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75 | a4f30719 | j_mayer | if (!alter_hv) {
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76 | a4f30719 | j_mayer | /* mtmsr cannot alter the hypervisor state */
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77 | a4f30719 | j_mayer | value &= ~MSR_HVB; |
78 | a4f30719 | j_mayer | value |= env->msr & MSR_HVB; |
79 | a4f30719 | j_mayer | } |
80 | 0411a972 | j_mayer | if (((value >> MSR_IR) & 1) != msr_ir || |
81 | 0411a972 | j_mayer | ((value >> MSR_DR) & 1) != msr_dr) {
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82 | 0411a972 | j_mayer | /* Flush all tlb when changing translation mode */
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83 | 0411a972 | j_mayer | tlb_flush(env, 1);
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84 | 0411a972 | j_mayer | excp = POWERPC_EXCP_NONE; |
85 | 0411a972 | j_mayer | env->interrupt_request |= CPU_INTERRUPT_EXITTB; |
86 | 0411a972 | j_mayer | } |
87 | 0411a972 | j_mayer | if (unlikely((env->flags & POWERPC_FLAG_TGPR) &&
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88 | 0411a972 | j_mayer | ((value ^ env->msr) & (1 << MSR_TGPR)))) {
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89 | 0411a972 | j_mayer | /* Swap temporary saved registers with GPRs */
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90 | 0411a972 | j_mayer | hreg_swap_gpr_tgpr(env); |
91 | 0411a972 | j_mayer | } |
92 | 0411a972 | j_mayer | if (unlikely((value >> MSR_EP) & 1) != msr_ep) { |
93 | 0411a972 | j_mayer | /* Change the exception prefix on PowerPC 601 */
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94 | 0411a972 | j_mayer | env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000; |
95 | 0411a972 | j_mayer | } |
96 | 0411a972 | j_mayer | #endif
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97 | 0411a972 | j_mayer | env->msr = value; |
98 | 0411a972 | j_mayer | hreg_compute_hflags(env); |
99 | 0411a972 | j_mayer | #if !defined (CONFIG_USER_ONLY)
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100 | 0411a972 | j_mayer | if (unlikely(msr_pow == 1)) { |
101 | 2f462816 | j_mayer | if ((*env->check_pow)(env)) {
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102 | 0411a972 | j_mayer | env->halted = 1;
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103 | 0411a972 | j_mayer | excp = EXCP_HALTED; |
104 | 0411a972 | j_mayer | } |
105 | 0411a972 | j_mayer | } |
106 | 0411a972 | j_mayer | #endif
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107 | 0411a972 | j_mayer | |
108 | 0411a972 | j_mayer | return excp;
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109 | 0411a972 | j_mayer | } |
110 | 0411a972 | j_mayer | |
111 | 0411a972 | j_mayer | #endif /* !defined(__HELPER_REGS_H__) */ |