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1
/*
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 * QEMU IDE disk and CD-ROM Emulator
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 * 
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 * Copyright (c) 2003 Fabrice Bellard
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 * 
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "vl.h"
25

    
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/* debug IDE devices */
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//#define DEBUG_IDE
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//#define DEBUG_IDE_ATAPI
29

    
30
/* Bits of HD_STATUS */
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#define ERR_STAT                0x01
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#define INDEX_STAT                0x02
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#define ECC_STAT                0x04        /* Corrected error */
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#define DRQ_STAT                0x08
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#define SEEK_STAT                0x10
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#define SRV_STAT                0x10
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#define WRERR_STAT                0x20
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#define READY_STAT                0x40
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#define BUSY_STAT                0x80
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/* Bits for HD_ERROR */
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#define MARK_ERR                0x01        /* Bad address mark */
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#define TRK0_ERR                0x02        /* couldn't find track 0 */
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#define ABRT_ERR                0x04        /* Command aborted */
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#define MCR_ERR                        0x08        /* media change request */
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#define ID_ERR                        0x10        /* ID field not found */
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#define MC_ERR                        0x20        /* media changed */
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#define ECC_ERR                        0x40        /* Uncorrectable ECC error */
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#define BBD_ERR                        0x80        /* pre-EIDE meaning:  block marked bad */
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#define ICRC_ERR                0x80        /* new meaning:  CRC error during transfer */
51

    
52
/* Bits of HD_NSECTOR */
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#define CD                        0x01
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#define IO                        0x02
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#define REL                        0x04
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#define TAG_MASK                0xf8
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#define IDE_CMD_RESET           0x04
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#define IDE_CMD_DISABLE_IRQ     0x02
60

    
61
/* ATA/ATAPI Commands pre T13 Spec */
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#define WIN_NOP                                0x00
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/*
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 *        0x01->0x02 Reserved
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 */
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#define CFA_REQ_EXT_ERROR_CODE                0x03 /* CFA Request Extended Error Code */
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/*
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 *        0x04->0x07 Reserved
69
 */
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#define WIN_SRST                        0x08 /* ATAPI soft reset command */
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#define WIN_DEVICE_RESET                0x08
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/*
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 *        0x09->0x0F Reserved
74
 */
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#define WIN_RECAL                        0x10
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#define WIN_RESTORE                        WIN_RECAL
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/*
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 *        0x10->0x1F Reserved
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 */
80
#define WIN_READ                        0x20 /* 28-Bit */
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#define WIN_READ_ONCE                        0x21 /* 28-Bit without retries */
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#define WIN_READ_LONG                        0x22 /* 28-Bit */
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#define WIN_READ_LONG_ONCE                0x23 /* 28-Bit without retries */
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#define WIN_READ_EXT                        0x24 /* 48-Bit */
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#define WIN_READDMA_EXT                        0x25 /* 48-Bit */
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#define WIN_READDMA_QUEUED_EXT                0x26 /* 48-Bit */
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#define WIN_READ_NATIVE_MAX_EXT                0x27 /* 48-Bit */
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/*
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 *        0x28
90
 */
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#define WIN_MULTREAD_EXT                0x29 /* 48-Bit */
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/*
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 *        0x2A->0x2F Reserved
94
 */
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#define WIN_WRITE                        0x30 /* 28-Bit */
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#define WIN_WRITE_ONCE                        0x31 /* 28-Bit without retries */
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#define WIN_WRITE_LONG                        0x32 /* 28-Bit */
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#define WIN_WRITE_LONG_ONCE                0x33 /* 28-Bit without retries */
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#define WIN_WRITE_EXT                        0x34 /* 48-Bit */
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#define WIN_WRITEDMA_EXT                0x35 /* 48-Bit */
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#define WIN_WRITEDMA_QUEUED_EXT                0x36 /* 48-Bit */
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#define WIN_SET_MAX_EXT                        0x37 /* 48-Bit */
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#define CFA_WRITE_SECT_WO_ERASE                0x38 /* CFA Write Sectors without erase */
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#define WIN_MULTWRITE_EXT                0x39 /* 48-Bit */
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/*
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 *        0x3A->0x3B Reserved
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 */
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#define WIN_WRITE_VERIFY                0x3C /* 28-Bit */
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/*
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 *        0x3D->0x3F Reserved
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 */
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#define WIN_VERIFY                        0x40 /* 28-Bit - Read Verify Sectors */
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#define WIN_VERIFY_ONCE                        0x41 /* 28-Bit - without retries */
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#define WIN_VERIFY_EXT                        0x42 /* 48-Bit */
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/*
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 *        0x43->0x4F Reserved
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 */
118
#define WIN_FORMAT                        0x50
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/*
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 *        0x51->0x5F Reserved
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 */
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#define WIN_INIT                        0x60
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/*
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 *        0x61->0x5F Reserved
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 */
126
#define WIN_SEEK                        0x70 /* 0x70-0x7F Reserved */
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#define CFA_TRANSLATE_SECTOR                0x87 /* CFA Translate Sector */
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#define WIN_DIAGNOSE                        0x90
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#define WIN_SPECIFY                        0x91 /* set drive geometry translation */
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#define WIN_DOWNLOAD_MICROCODE                0x92
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#define WIN_STANDBYNOW2                        0x94
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#define WIN_STANDBY2                        0x96
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#define WIN_SETIDLE2                        0x97
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#define WIN_CHECKPOWERMODE2                0x98
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#define WIN_SLEEPNOW2                        0x99
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/*
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 *        0x9A VENDOR
138
 */
139
#define WIN_PACKETCMD                        0xA0 /* Send a packet command. */
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#define WIN_PIDENTIFY                        0xA1 /* identify ATAPI device        */
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#define WIN_QUEUED_SERVICE                0xA2
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#define WIN_SMART                        0xB0 /* self-monitoring and reporting */
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#define CFA_ERASE_SECTORS               0xC0
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#define WIN_MULTREAD                        0xC4 /* read sectors using multiple mode*/
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#define WIN_MULTWRITE                        0xC5 /* write sectors using multiple mode */
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#define WIN_SETMULT                        0xC6 /* enable/disable multiple mode */
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#define WIN_READDMA_QUEUED                0xC7 /* read sectors using Queued DMA transfers */
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#define WIN_READDMA                        0xC8 /* read sectors using DMA transfers */
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#define WIN_READDMA_ONCE                0xC9 /* 28-Bit - without retries */
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#define WIN_WRITEDMA                        0xCA /* write sectors using DMA transfers */
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#define WIN_WRITEDMA_ONCE                0xCB /* 28-Bit - without retries */
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#define WIN_WRITEDMA_QUEUED                0xCC /* write sectors using Queued DMA transfers */
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#define CFA_WRITE_MULTI_WO_ERASE        0xCD /* CFA Write multiple without erase */
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#define WIN_GETMEDIASTATUS                0xDA        
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#define WIN_ACKMEDIACHANGE                0xDB /* ATA-1, ATA-2 vendor */
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#define WIN_POSTBOOT                        0xDC
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#define WIN_PREBOOT                        0xDD
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#define WIN_DOORLOCK                        0xDE /* lock door on removable drives */
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#define WIN_DOORUNLOCK                        0xDF /* unlock door on removable drives */
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#define WIN_STANDBYNOW1                        0xE0
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#define WIN_IDLEIMMEDIATE                0xE1 /* force drive to become "ready" */
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#define WIN_STANDBY                     0xE2 /* Set device in Standby Mode */
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#define WIN_SETIDLE1                        0xE3
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#define WIN_READ_BUFFER                        0xE4 /* force read only 1 sector */
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#define WIN_CHECKPOWERMODE1                0xE5
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#define WIN_SLEEPNOW1                        0xE6
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#define WIN_FLUSH_CACHE                        0xE7
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#define WIN_WRITE_BUFFER                0xE8 /* force write only 1 sector */
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#define WIN_WRITE_SAME                        0xE9 /* read ata-2 to use */
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        /* SET_FEATURES 0x22 or 0xDD */
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#define WIN_FLUSH_CACHE_EXT                0xEA /* 48-Bit */
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#define WIN_IDENTIFY                        0xEC /* ask drive to identify itself        */
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#define WIN_MEDIAEJECT                        0xED
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#define WIN_IDENTIFY_DMA                0xEE /* same as WIN_IDENTIFY, but DMA */
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#define WIN_SETFEATURES                        0xEF /* set special drive features */
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#define EXABYTE_ENABLE_NEST                0xF0
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#define WIN_SECURITY_SET_PASS                0xF1
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#define WIN_SECURITY_UNLOCK                0xF2
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#define WIN_SECURITY_ERASE_PREPARE        0xF3
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#define WIN_SECURITY_ERASE_UNIT                0xF4
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#define WIN_SECURITY_FREEZE_LOCK        0xF5
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#define WIN_SECURITY_DISABLE                0xF6
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#define WIN_READ_NATIVE_MAX                0xF8 /* return the native maximum address */
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#define WIN_SET_MAX                        0xF9
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#define DISABLE_SEAGATE                        0xFB
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/* set to 1 set disable mult support */
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#define MAX_MULT_SECTORS 16
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/* ATAPI defines */
191

    
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#define ATAPI_PACKET_SIZE 12
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/* The generic packet command opcodes for CD/DVD Logical Units,
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 * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
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#define GPCMD_BLANK                            0xa1
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#define GPCMD_CLOSE_TRACK                    0x5b
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#define GPCMD_FLUSH_CACHE                    0x35
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#define GPCMD_FORMAT_UNIT                    0x04
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#define GPCMD_GET_CONFIGURATION                    0x46
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#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
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#define GPCMD_GET_PERFORMANCE                    0xac
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#define GPCMD_INQUIRY                            0x12
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#define GPCMD_LOAD_UNLOAD                    0xa6
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#define GPCMD_MECHANISM_STATUS                    0xbd
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#define GPCMD_MODE_SELECT_10                    0x55
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#define GPCMD_MODE_SENSE_10                    0x5a
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#define GPCMD_PAUSE_RESUME                    0x4b
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#define GPCMD_PLAY_AUDIO_10                    0x45
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#define GPCMD_PLAY_AUDIO_MSF                    0x47
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#define GPCMD_PLAY_AUDIO_TI                    0x48
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#define GPCMD_PLAY_CD                            0xbc
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#define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL  0x1e
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#define GPCMD_READ_10                            0x28
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#define GPCMD_READ_12                            0xa8
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#define GPCMD_READ_CDVD_CAPACITY            0x25
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#define GPCMD_READ_CD                            0xbe
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#define GPCMD_READ_CD_MSF                    0xb9
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#define GPCMD_READ_DISC_INFO                    0x51
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#define GPCMD_READ_DVD_STRUCTURE            0xad
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#define GPCMD_READ_FORMAT_CAPACITIES            0x23
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#define GPCMD_READ_HEADER                    0x44
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#define GPCMD_READ_TRACK_RZONE_INFO            0x52
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#define GPCMD_READ_SUBCHANNEL                    0x42
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#define GPCMD_READ_TOC_PMA_ATIP                    0x43
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#define GPCMD_REPAIR_RZONE_TRACK            0x58
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#define GPCMD_REPORT_KEY                    0xa4
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#define GPCMD_REQUEST_SENSE                    0x03
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#define GPCMD_RESERVE_RZONE_TRACK            0x53
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#define GPCMD_SCAN                            0xba
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#define GPCMD_SEEK                            0x2b
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#define GPCMD_SEND_DVD_STRUCTURE            0xad
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#define GPCMD_SEND_EVENT                    0xa2
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#define GPCMD_SEND_KEY                            0xa3
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#define GPCMD_SEND_OPC                            0x54
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#define GPCMD_SET_READ_AHEAD                    0xa7
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#define GPCMD_SET_STREAMING                    0xb6
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#define GPCMD_START_STOP_UNIT                    0x1b
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#define GPCMD_STOP_PLAY_SCAN                    0x4e
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#define GPCMD_TEST_UNIT_READY                    0x00
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#define GPCMD_VERIFY_10                            0x2f
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#define GPCMD_WRITE_10                            0x2a
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#define GPCMD_WRITE_AND_VERIFY_10            0x2e
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/* This is listed as optional in ATAPI 2.6, but is (curiously) 
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 * missing from Mt. Fuji, Table 57.  It _is_ mentioned in Mt. Fuji
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 * Table 377 as an MMC command for SCSi devices though...  Most ATAPI
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 * drives support it. */
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#define GPCMD_SET_SPEED                            0xbb
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/* This seems to be a SCSI specific CD-ROM opcode 
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 * to play data at track/index */
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#define GPCMD_PLAYAUDIO_TI                    0x48
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/*
253
 * From MS Media Status Notification Support Specification. For
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 * older drives only.
255
 */
256
#define GPCMD_GET_MEDIA_STATUS                    0xda
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/* Mode page codes for mode sense/set */
259
#define GPMODE_R_W_ERROR_PAGE                0x01
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#define GPMODE_WRITE_PARMS_PAGE                0x05
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#define GPMODE_AUDIO_CTL_PAGE                0x0e
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#define GPMODE_POWER_PAGE                0x1a
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#define GPMODE_FAULT_FAIL_PAGE                0x1c
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#define GPMODE_TO_PROTECT_PAGE                0x1d
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#define GPMODE_CAPABILITIES_PAGE        0x2a
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#define GPMODE_ALL_PAGES                0x3f
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/* Not in Mt. Fuji, but in ATAPI 2.6 -- depricated now in favor
268
 * of MODE_SENSE_POWER_PAGE */
269
#define GPMODE_CDROM_PAGE                0x0d
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#define ATAPI_INT_REASON_CD             0x01 /* 0 = data transfer */
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#define ATAPI_INT_REASON_IO             0x02 /* 1 = transfer to the host */
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#define ATAPI_INT_REASON_REL            0x04
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#define ATAPI_INT_REASON_TAG            0xf8
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/* same constants as bochs */
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#define ASC_ILLEGAL_OPCODE                   0x20
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#define ASC_LOGICAL_BLOCK_OOR                0x21
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#define ASC_INV_FIELD_IN_CMD_PACKET          0x24
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#define ASC_MEDIUM_NOT_PRESENT               0x3a
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#define ASC_SAVING_PARAMETERS_NOT_SUPPORTED  0x39
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#define SENSE_NONE            0
284
#define SENSE_NOT_READY       2
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#define SENSE_ILLEGAL_REQUEST 5
286
#define SENSE_UNIT_ATTENTION  6
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struct IDEState;
289

    
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typedef void EndTransferFunc(struct IDEState *);
291

    
292
/* NOTE: IDEState represents in fact one drive */
293
typedef struct IDEState {
294
    /* ide config */
295
    int is_cdrom;
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    int cylinders, heads, sectors;
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    int64_t nb_sectors;
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    int mult_sectors;
299
    int irq;
300
    openpic_t *openpic;
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    PCIDevice *pci_dev;
302
    struct BMDMAState *bmdma;
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    int drive_serial;
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    /* ide regs */
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    uint8_t feature;
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    uint8_t error;
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    uint16_t nsector; /* 0 is 256 to ease computations */
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    uint8_t sector;
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    uint8_t lcyl;
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    uint8_t hcyl;
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    uint8_t select;
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    uint8_t status;
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    /* 0x3f6 command, only meaningful for drive 0 */
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    uint8_t cmd;
315
    /* depends on bit 4 in select, only meaningful for drive 0 */
316
    struct IDEState *cur_drive; 
317
    BlockDriverState *bs;
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    /* ATAPI specific */
319
    uint8_t sense_key;
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    uint8_t asc;
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    int packet_transfer_size;
322
    int elementary_transfer_size;
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    int io_buffer_index;
324
    int lba;
325
    int cd_sector_size;
326
    int atapi_dma; /* true if dma is requested for the packet cmd */
327
    /* ATA DMA state */
328
    int io_buffer_size;
329
    /* PIO transfer handling */
330
    int req_nb_sectors; /* number of sectors per interrupt */
331
    EndTransferFunc *end_transfer_func;
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    uint8_t *data_ptr;
333
    uint8_t *data_end;
334
    uint8_t io_buffer[MAX_MULT_SECTORS*512 + 4];
335
    QEMUTimer *sector_write_timer; /* only used for win2k instal hack */
336
} IDEState;
337

    
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#define BM_STATUS_DMAING 0x01
339
#define BM_STATUS_ERROR  0x02
340
#define BM_STATUS_INT    0x04
341

    
342
#define BM_CMD_START     0x01
343
#define BM_CMD_READ      0x08
344

    
345
typedef int IDEDMAFunc(IDEState *s, 
346
                       target_phys_addr_t phys_addr, 
347
                       int transfer_size1);
348

    
349
typedef struct BMDMAState {
350
    uint8_t cmd;
351
    uint8_t status;
352
    uint32_t addr;
353
    /* current transfer state */
354
    IDEState *ide_if;
355
    IDEDMAFunc *dma_cb;
356
} BMDMAState;
357

    
358
typedef struct PCIIDEState {
359
    PCIDevice dev;
360
    IDEState ide_if[4];
361
    BMDMAState bmdma[2];
362
} PCIIDEState;
363

    
364
static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb);
365

    
366
static void padstr(char *str, const char *src, int len)
367
{
368
    int i, v;
369
    for(i = 0; i < len; i++) {
370
        if (*src)
371
            v = *src++;
372
        else
373
            v = ' ';
374
        *(char *)((long)str ^ 1) = v;
375
        str++;
376
    }
377
}
378

    
379
static void padstr8(uint8_t *buf, int buf_size, const char *src)
380
{
381
    int i;
382
    for(i = 0; i < buf_size; i++) {
383
        if (*src)
384
            buf[i] = *src++;
385
        else
386
            buf[i] = ' ';
387
    }
388
}
389

    
390
static void put_le16(uint16_t *p, unsigned int v)
391
{
392
    *p = cpu_to_le16(v);
393
}
394

    
395
static void ide_identify(IDEState *s)
396
{
397
    uint16_t *p;
398
    unsigned int oldsize;
399
    char buf[20];
400

    
401
    memset(s->io_buffer, 0, 512);
402
    p = (uint16_t *)s->io_buffer;
403
    put_le16(p + 0, 0x0040);
404
    put_le16(p + 1, s->cylinders); 
405
    put_le16(p + 3, s->heads);
406
    put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
407
    put_le16(p + 5, 512); /* XXX: retired, remove ? */
408
    put_le16(p + 6, s->sectors); 
409
    snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
410
    padstr((uint8_t *)(p + 10), buf, 20); /* serial number */
411
    put_le16(p + 20, 3); /* XXX: retired, remove ? */
412
    put_le16(p + 21, 512); /* cache size in sectors */
413
    put_le16(p + 22, 4); /* ecc bytes */
414
    padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
415
    padstr((uint8_t *)(p + 27), "QEMU HARDDISK", 40); /* model */
416
#if MAX_MULT_SECTORS > 1    
417
    put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
418
#endif
419
    put_le16(p + 48, 1); /* dword I/O */
420
    put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
421
    put_le16(p + 51, 0x200); /* PIO transfer cycle */
422
    put_le16(p + 52, 0x200); /* DMA transfer cycle */
423
    put_le16(p + 53, 1 | 1 << 2); /* words 54-58,88 are valid */
424
    put_le16(p + 54, s->cylinders);
425
    put_le16(p + 55, s->heads);
426
    put_le16(p + 56, s->sectors);
427
    oldsize = s->cylinders * s->heads * s->sectors;
428
    put_le16(p + 57, oldsize);
429
    put_le16(p + 58, oldsize >> 16);
430
    if (s->mult_sectors)
431
        put_le16(p + 59, 0x100 | s->mult_sectors);
432
    put_le16(p + 60, s->nb_sectors);
433
    put_le16(p + 61, s->nb_sectors >> 16);
434
    put_le16(p + 80, (1 << 1) | (1 << 2));
435
    put_le16(p + 82, (1 << 14));
436
    put_le16(p + 83, (1 << 14));
437
    put_le16(p + 84, (1 << 14));
438
    put_le16(p + 85, (1 << 14));
439
    put_le16(p + 86, 0);
440
    put_le16(p + 87, (1 << 14));
441
    put_le16(p + 88, 0x1f | (1 << 13));
442
    put_le16(p + 93, 1 | (1 << 14) | 0x2000 | 0x4000);
443
}
444

    
445
static void ide_atapi_identify(IDEState *s)
446
{
447
    uint16_t *p;
448
    char buf[20];
449

    
450
    memset(s->io_buffer, 0, 512);
451
    p = (uint16_t *)s->io_buffer;
452
    /* Removable CDROM, 50us response, 12 byte packets */
453
    put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
454
    snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
455
    padstr((uint8_t *)(p + 10), buf, 20); /* serial number */
456
    put_le16(p + 20, 3); /* buffer type */
457
    put_le16(p + 21, 512); /* cache size in sectors */
458
    put_le16(p + 22, 4); /* ecc bytes */
459
    padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
460
    padstr((uint8_t *)(p + 27), "QEMU CD-ROM", 40); /* model */
461
    put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
462
    put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
463
    put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
464
    put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
465
    put_le16(p + 64, 1); /* PIO modes */
466
    put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
467
    put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
468
    put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
469
    put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
470
    
471
    put_le16(p + 71, 30); /* in ns */
472
    put_le16(p + 72, 30); /* in ns */
473

    
474
    put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
475
}
476

    
477
static void ide_set_signature(IDEState *s)
478
{
479
    s->select &= 0xf0; /* clear head */
480
    /* put signature */
481
    s->nsector = 1;
482
    s->sector = 1;
483
    if (s->is_cdrom) {
484
        s->lcyl = 0x14;
485
        s->hcyl = 0xeb;
486
    } else if (s->bs) {
487
        s->lcyl = 0;
488
        s->hcyl = 0;
489
    } else {
490
        s->lcyl = 0xff;
491
        s->hcyl = 0xff;
492
    }
493
}
494

    
495
static inline void ide_abort_command(IDEState *s)
496
{
497
    s->status = READY_STAT | ERR_STAT;
498
    s->error = ABRT_ERR;
499
}
500

    
501
static inline void ide_set_irq(IDEState *s)
502
{
503
    BMDMAState *bm = s->bmdma;
504
    if (!(s->cmd & IDE_CMD_DISABLE_IRQ)) {
505
        if (bm)
506
            bm->status |= BM_STATUS_INT;
507
#ifdef TARGET_PPC
508
        if (s->openpic) 
509
            openpic_set_irq(s->openpic, s->irq, 1);
510
        else 
511
#endif
512
        if (s->irq == 16)
513
            pci_set_irq(s->pci_dev, 0, 1);
514
        else
515
            pic_set_irq(s->irq, 1);
516
    }
517
}
518

    
519
/* prepare data transfer and tell what to do after */
520
static void ide_transfer_start(IDEState *s, uint8_t *buf, int size, 
521
                               EndTransferFunc *end_transfer_func)
522
{
523
    s->end_transfer_func = end_transfer_func;
524
    s->data_ptr = buf;
525
    s->data_end = buf + size;
526
    s->status |= DRQ_STAT;
527
}
528

    
529
static void ide_transfer_stop(IDEState *s)
530
{
531
    s->end_transfer_func = ide_transfer_stop;
532
    s->data_ptr = s->io_buffer;
533
    s->data_end = s->io_buffer;
534
    s->status &= ~DRQ_STAT;
535
}
536

    
537
static int64_t ide_get_sector(IDEState *s)
538
{
539
    int64_t sector_num;
540
    if (s->select & 0x40) {
541
        /* lba */
542
        sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) | 
543
            (s->lcyl << 8) | s->sector;
544
    } else {
545
        sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
546
            (s->select & 0x0f) * s->sectors + 
547
            (s->sector - 1);
548
    }
549
    return sector_num;
550
}
551

    
552
static void ide_set_sector(IDEState *s, int64_t sector_num)
553
{
554
    unsigned int cyl, r;
555
    if (s->select & 0x40) {
556
        s->select = (s->select & 0xf0) | (sector_num >> 24);
557
        s->hcyl = (sector_num >> 16);
558
        s->lcyl = (sector_num >> 8);
559
        s->sector = (sector_num);
560
    } else {
561
        cyl = sector_num / (s->heads * s->sectors);
562
        r = sector_num % (s->heads * s->sectors);
563
        s->hcyl = cyl >> 8;
564
        s->lcyl = cyl;
565
        s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
566
        s->sector = (r % s->sectors) + 1;
567
    }
568
}
569

    
570
static void ide_sector_read(IDEState *s)
571
{
572
    int64_t sector_num;
573
    int ret, n;
574

    
575
    s->status = READY_STAT | SEEK_STAT;
576
    s->error = 0; /* not needed by IDE spec, but needed by Windows */
577
    sector_num = ide_get_sector(s);
578
    n = s->nsector;
579
    if (n == 0) {
580
        /* no more sector to read from disk */
581
        ide_transfer_stop(s);
582
    } else {
583
#if defined(DEBUG_IDE)
584
        printf("read sector=%Ld\n", sector_num);
585
#endif
586
        if (n > s->req_nb_sectors)
587
            n = s->req_nb_sectors;
588
        ret = bdrv_read(s->bs, sector_num, s->io_buffer, n);
589
        ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
590
        ide_set_irq(s);
591
        ide_set_sector(s, sector_num + n);
592
        s->nsector -= n;
593
    }
594
}
595

    
596
static int ide_read_dma_cb(IDEState *s, 
597
                           target_phys_addr_t phys_addr, 
598
                           int transfer_size1)
599
{
600
    int len, transfer_size, n;
601
    int64_t sector_num;
602

    
603
    transfer_size = transfer_size1;
604
    while (transfer_size > 0) {
605
        len = s->io_buffer_size - s->io_buffer_index;
606
        if (len <= 0) {
607
            /* transfert next data */
608
            n = s->nsector;
609
            if (n == 0)
610
                break;
611
            if (n > MAX_MULT_SECTORS)
612
                n = MAX_MULT_SECTORS;
613
            sector_num = ide_get_sector(s);
614
            bdrv_read(s->bs, sector_num, s->io_buffer, n);
615
            s->io_buffer_index = 0;
616
            s->io_buffer_size = n * 512;
617
            len = s->io_buffer_size;
618
            sector_num += n;
619
            ide_set_sector(s, sector_num);
620
            s->nsector -= n;
621
        }
622
        if (len > transfer_size)
623
            len = transfer_size;
624
        cpu_physical_memory_write(phys_addr, 
625
                                  s->io_buffer + s->io_buffer_index, len);
626
        s->io_buffer_index += len;
627
        transfer_size -= len;
628
        phys_addr += len;
629
    }
630
    if (s->io_buffer_index >= s->io_buffer_size && s->nsector == 0) {
631
        s->status = READY_STAT | SEEK_STAT;
632
        ide_set_irq(s);
633
#ifdef DEBUG_IDE_ATAPI
634
        printf("dma status=0x%x\n", s->status);
635
#endif
636
        return 0;
637
    }
638
    return transfer_size1 - transfer_size;
639
}
640

    
641
static void ide_sector_read_dma(IDEState *s)
642
{
643
    s->status = READY_STAT | SEEK_STAT | DRQ_STAT;
644
    s->io_buffer_index = 0;
645
    s->io_buffer_size = 0;
646
    ide_dma_start(s, ide_read_dma_cb);
647
}
648

    
649
static void ide_sector_write_timer_cb(void *opaque)
650
{
651
    IDEState *s = opaque;
652
    ide_set_irq(s);
653
}
654

    
655
static void ide_sector_write(IDEState *s)
656
{
657
    int64_t sector_num;
658
    int ret, n, n1;
659

    
660
    s->status = READY_STAT | SEEK_STAT;
661
    sector_num = ide_get_sector(s);
662
#if defined(DEBUG_IDE)
663
    printf("write sector=%Ld\n", sector_num);
664
#endif
665
    n = s->nsector;
666
    if (n > s->req_nb_sectors)
667
        n = s->req_nb_sectors;
668
    ret = bdrv_write(s->bs, sector_num, s->io_buffer, n);
669
    s->nsector -= n;
670
    if (s->nsector == 0) {
671
        /* no more sector to write */
672
        ide_transfer_stop(s);
673
    } else {
674
        n1 = s->nsector;
675
        if (n1 > s->req_nb_sectors)
676
            n1 = s->req_nb_sectors;
677
        ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
678
    }
679
    ide_set_sector(s, sector_num + n);
680
    
681
#ifdef TARGET_I386
682
    if (win2k_install_hack) {
683
        /* It seems there is a bug in the Windows 2000 installer HDD
684
           IDE driver which fills the disk with empty logs when the
685
           IDE write IRQ comes too early. This hack tries to correct
686
           that at the expense of slower write performances. Use this
687
           option _only_ to install Windows 2000. You must disable it
688
           for normal use. */
689
        qemu_mod_timer(s->sector_write_timer, 
690
                       qemu_get_clock(vm_clock) + (ticks_per_sec / 1000));
691
    } else 
692
#endif
693
    {
694
        ide_set_irq(s);
695
    }
696
}
697

    
698
static int ide_write_dma_cb(IDEState *s, 
699
                            target_phys_addr_t phys_addr, 
700
                            int transfer_size1)
701
{
702
    int len, transfer_size, n;
703
    int64_t sector_num;
704

    
705
    transfer_size = transfer_size1;
706
    for(;;) {
707
        len = s->io_buffer_size - s->io_buffer_index;
708
        if (len == 0) {
709
            n = s->io_buffer_size >> 9;
710
            sector_num = ide_get_sector(s);
711
            bdrv_write(s->bs, sector_num, s->io_buffer, 
712
                       s->io_buffer_size >> 9);
713
            sector_num += n;
714
            ide_set_sector(s, sector_num);
715
            s->nsector -= n;
716
            n = s->nsector;
717
            if (n == 0) {
718
                /* end of transfer */
719
                s->status = READY_STAT | SEEK_STAT;
720
                ide_set_irq(s);
721
                return 0;
722
            }
723
            if (n > MAX_MULT_SECTORS)
724
                n = MAX_MULT_SECTORS;
725
            s->io_buffer_index = 0;
726
            s->io_buffer_size = n * 512;
727
            len = s->io_buffer_size;
728
        }
729
        if (transfer_size <= 0)
730
            break;
731
        if (len > transfer_size)
732
            len = transfer_size;
733
        cpu_physical_memory_read(phys_addr, 
734
                                 s->io_buffer + s->io_buffer_index, len);
735
        s->io_buffer_index += len;
736
        transfer_size -= len;
737
        phys_addr += len;
738
    }
739
    return transfer_size1 - transfer_size;
740
}
741

    
742
static void ide_sector_write_dma(IDEState *s)
743
{
744
    int n;
745
    s->status = READY_STAT | SEEK_STAT | DRQ_STAT;
746
    n = s->nsector;
747
    if (n > MAX_MULT_SECTORS)
748
        n = MAX_MULT_SECTORS;
749
    s->io_buffer_index = 0;
750
    s->io_buffer_size = n * 512;
751
    ide_dma_start(s, ide_write_dma_cb);
752
}
753

    
754
static void ide_atapi_cmd_ok(IDEState *s)
755
{
756
    s->error = 0;
757
    s->status = READY_STAT;
758
    s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
759
    ide_set_irq(s);
760
}
761

    
762
static void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc)
763
{
764
#ifdef DEBUG_IDE_ATAPI
765
    printf("atapi_cmd_error: sense=0x%x asc=0x%x\n", sense_key, asc);
766
#endif
767
    s->error = sense_key << 4;
768
    s->status = READY_STAT | ERR_STAT;
769
    s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
770
    s->sense_key = sense_key;
771
    s->asc = asc;
772
    ide_set_irq(s);
773
}
774

    
775
static inline void cpu_to_ube16(uint8_t *buf, int val)
776
{
777
    buf[0] = val >> 8;
778
    buf[1] = val;
779
}
780

    
781
static inline void cpu_to_ube32(uint8_t *buf, unsigned int val)
782
{
783
    buf[0] = val >> 24;
784
    buf[1] = val >> 16;
785
    buf[2] = val >> 8;
786
    buf[3] = val;
787
}
788

    
789
static inline int ube16_to_cpu(const uint8_t *buf)
790
{
791
    return (buf[0] << 8) | buf[1];
792
}
793

    
794
static inline int ube32_to_cpu(const uint8_t *buf)
795
{
796
    return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
797
}
798

    
799
static void lba_to_msf(uint8_t *buf, int lba)
800
{
801
    lba += 150;
802
    buf[0] = (lba / 75) / 60;
803
    buf[1] = (lba / 75) % 60;
804
    buf[2] = lba % 75;
805
}
806

    
807
static void cd_read_sector(BlockDriverState *bs, int lba, uint8_t *buf, 
808
                           int sector_size)
809
{
810
    switch(sector_size) {
811
    case 2048:
812
        bdrv_read(bs, (int64_t)lba << 2, buf, 4);
813
        break;
814
    case 2352:
815
        /* sync bytes */
816
        buf[0] = 0x00;
817
        memset(buf + 1, 0xff, 11);
818
        buf += 12;
819
        /* MSF */
820
        lba_to_msf(buf, lba);
821
        buf[3] = 0x01; /* mode 1 data */
822
        buf += 4;
823
        /* data */
824
        bdrv_read(bs, (int64_t)lba << 2, buf, 4);
825
        buf += 2048;
826
        /* ECC */
827
        memset(buf, 0, 288);
828
        break;
829
    default:
830
        break;
831
    }
832
}
833

    
834
/* The whole ATAPI transfer logic is handled in this function */
835
static void ide_atapi_cmd_reply_end(IDEState *s)
836
{
837
    int byte_count_limit, size;
838
#ifdef DEBUG_IDE_ATAPI
839
    printf("reply: tx_size=%d elem_tx_size=%d index=%d\n", 
840
           s->packet_transfer_size,
841
           s->elementary_transfer_size,
842
           s->io_buffer_index);
843
#endif
844
    if (s->packet_transfer_size <= 0) {
845
        /* end of transfer */
846
        ide_transfer_stop(s);
847
        s->status = READY_STAT;
848
        s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
849
        ide_set_irq(s);
850
#ifdef DEBUG_IDE_ATAPI
851
        printf("status=0x%x\n", s->status);
852
#endif
853
    } else {
854
        /* see if a new sector must be read */
855
        if (s->lba != -1 && s->io_buffer_index >= s->cd_sector_size) {
856
            cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size);
857
            s->lba++;
858
            s->io_buffer_index = 0;
859
        }
860
        if (s->elementary_transfer_size > 0) {
861
            /* there are some data left to transmit in this elementary
862
               transfer */
863
            size = s->cd_sector_size - s->io_buffer_index;
864
            if (size > s->elementary_transfer_size)
865
                size = s->elementary_transfer_size;
866
            ide_transfer_start(s, s->io_buffer + s->io_buffer_index, 
867
                               size, ide_atapi_cmd_reply_end);
868
            s->packet_transfer_size -= size;
869
            s->elementary_transfer_size -= size;
870
            s->io_buffer_index += size;
871
        } else {
872
            /* a new transfer is needed */
873
            s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO;
874
            byte_count_limit = s->lcyl | (s->hcyl << 8);
875
#ifdef DEBUG_IDE_ATAPI
876
            printf("byte_count_limit=%d\n", byte_count_limit);
877
#endif
878
            if (byte_count_limit == 0xffff)
879
                byte_count_limit--;
880
            size = s->packet_transfer_size;
881
            if (size > byte_count_limit) {
882
                /* byte count limit must be even if this case */
883
                if (byte_count_limit & 1)
884
                    byte_count_limit--;
885
                size = byte_count_limit;
886
            }
887
            s->lcyl = size;
888
            s->hcyl = size >> 8;
889
            s->elementary_transfer_size = size;
890
            /* we cannot transmit more than one sector at a time */
891
            if (s->lba != -1) {
892
                if (size > (s->cd_sector_size - s->io_buffer_index))
893
                    size = (s->cd_sector_size - s->io_buffer_index);
894
            }
895
            ide_transfer_start(s, s->io_buffer + s->io_buffer_index, 
896
                               size, ide_atapi_cmd_reply_end);
897
            s->packet_transfer_size -= size;
898
            s->elementary_transfer_size -= size;
899
            s->io_buffer_index += size;
900
            ide_set_irq(s);
901
#ifdef DEBUG_IDE_ATAPI
902
            printf("status=0x%x\n", s->status);
903
#endif
904
        }
905
    }
906
}
907

    
908
/* send a reply of 'size' bytes in s->io_buffer to an ATAPI command */
909
static void ide_atapi_cmd_reply(IDEState *s, int size, int max_size)
910
{
911
    if (size > max_size)
912
        size = max_size;
913
    s->lba = -1; /* no sector read */
914
    s->packet_transfer_size = size;
915
    s->elementary_transfer_size = 0;
916
    s->io_buffer_index = 0;
917

    
918
    s->status = READY_STAT;
919
    ide_atapi_cmd_reply_end(s);
920
}
921

    
922
/* start a CD-CDROM read command */
923
static void ide_atapi_cmd_read_pio(IDEState *s, int lba, int nb_sectors,
924
                                   int sector_size)
925
{
926
    s->lba = lba;
927
    s->packet_transfer_size = nb_sectors * sector_size;
928
    s->elementary_transfer_size = 0;
929
    s->io_buffer_index = sector_size;
930
    s->cd_sector_size = sector_size;
931

    
932
    s->status = READY_STAT;
933
    ide_atapi_cmd_reply_end(s);
934
}
935

    
936
/* ATAPI DMA support */
937
static int ide_atapi_cmd_read_dma_cb(IDEState *s, 
938
                                     target_phys_addr_t phys_addr, 
939
                                     int transfer_size1)
940
{
941
    int len, transfer_size;
942
    
943
    transfer_size = transfer_size1;
944
    while (transfer_size > 0) {
945
        if (s->packet_transfer_size <= 0)
946
            break;
947
        len = s->cd_sector_size - s->io_buffer_index;
948
        if (len <= 0) {
949
            /* transfert next data */
950
            cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size);
951
            s->lba++;
952
            s->io_buffer_index = 0;
953
            len = s->cd_sector_size;
954
        }
955
        if (len > transfer_size)
956
            len = transfer_size;
957
        cpu_physical_memory_write(phys_addr, 
958
                                  s->io_buffer + s->io_buffer_index, len);
959
        s->packet_transfer_size -= len;
960
        s->io_buffer_index += len;
961
        transfer_size -= len;
962
        phys_addr += len;
963
    }
964
    if (s->packet_transfer_size <= 0) {
965
        s->status = READY_STAT;
966
        s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
967
        ide_set_irq(s);
968
#ifdef DEBUG_IDE_ATAPI
969
        printf("dma status=0x%x\n", s->status);
970
#endif
971
        return 0;
972
    }
973
    return transfer_size1 - transfer_size;
974
}
975

    
976
/* start a CD-CDROM read command with DMA */
977
/* XXX: test if DMA is available */
978
static void ide_atapi_cmd_read_dma(IDEState *s, int lba, int nb_sectors,
979
                                   int sector_size)
980
{
981
    s->lba = lba;
982
    s->packet_transfer_size = nb_sectors * sector_size;
983
    s->io_buffer_index = sector_size;
984
    s->cd_sector_size = sector_size;
985

    
986
    s->status = READY_STAT | DRQ_STAT;
987
    ide_dma_start(s, ide_atapi_cmd_read_dma_cb);
988
}
989

    
990
static void ide_atapi_cmd_read(IDEState *s, int lba, int nb_sectors, 
991
                               int sector_size)
992
{
993
#ifdef DEBUG_IDE_ATAPI
994
    printf("read: LBA=%d nb_sectors=%d\n", lba, nb_sectors);
995
#endif
996
    if (s->atapi_dma) {
997
        ide_atapi_cmd_read_dma(s, lba, nb_sectors, sector_size);
998
    } else {
999
        ide_atapi_cmd_read_pio(s, lba, nb_sectors, sector_size);
1000
    }
1001
}
1002

    
1003
/* same toc as bochs. Return -1 if error or the toc length */
1004
/* XXX: check this */
1005
static int cdrom_read_toc(IDEState *s, uint8_t *buf, int msf, int start_track)
1006
{
1007
    uint8_t *q;
1008
    int nb_sectors, len;
1009
    
1010
    if (start_track > 1 && start_track != 0xaa)
1011
        return -1;
1012
    q = buf + 2;
1013
    *q++ = 1; /* first session */
1014
    *q++ = 1; /* last session */
1015
    if (start_track <= 1) {
1016
        *q++ = 0; /* reserved */
1017
        *q++ = 0x14; /* ADR, control */
1018
        *q++ = 1;    /* track number */
1019
        *q++ = 0; /* reserved */
1020
        if (msf) {
1021
            *q++ = 0; /* reserved */
1022
            *q++ = 0; /* minute */
1023
            *q++ = 2; /* second */
1024
            *q++ = 0; /* frame */
1025
        } else {
1026
            /* sector 0 */
1027
            cpu_to_ube32(q, 0);
1028
            q += 4;
1029
        }
1030
    }
1031
    /* lead out track */
1032
    *q++ = 0; /* reserved */
1033
    *q++ = 0x16; /* ADR, control */
1034
    *q++ = 0xaa; /* track number */
1035
    *q++ = 0; /* reserved */
1036
    nb_sectors = s->nb_sectors >> 2;
1037
    if (msf) {
1038
        *q++ = 0; /* reserved */
1039
        lba_to_msf(q, nb_sectors);
1040
        q += 3;
1041
    } else {
1042
        cpu_to_ube32(q, nb_sectors);
1043
        q += 4;
1044
    }
1045
    len = q - buf;
1046
    cpu_to_ube16(buf, len - 2);
1047
    return len;
1048
}
1049

    
1050
/* mostly same info as PearPc */
1051
static int cdrom_read_toc_raw(IDEState *s, uint8_t *buf, int msf, 
1052
                              int session_num)
1053
{
1054
    uint8_t *q;
1055
    int nb_sectors, len;
1056
    
1057
    q = buf + 2;
1058
    *q++ = 1; /* first session */
1059
    *q++ = 1; /* last session */
1060

    
1061
    *q++ = 1; /* session number */
1062
    *q++ = 0x14; /* data track */
1063
    *q++ = 0; /* track number */
1064
    *q++ = 0xa0; /* lead-in */
1065
    *q++ = 0; /* min */
1066
    *q++ = 0; /* sec */
1067
    *q++ = 0; /* frame */
1068
    *q++ = 0;
1069
    *q++ = 1; /* first track */
1070
    *q++ = 0x00; /* disk type */
1071
    *q++ = 0x00;
1072
    
1073
    *q++ = 1; /* session number */
1074
    *q++ = 0x14; /* data track */
1075
    *q++ = 0; /* track number */
1076
    *q++ = 0xa1;
1077
    *q++ = 0; /* min */
1078
    *q++ = 0; /* sec */
1079
    *q++ = 0; /* frame */
1080
    *q++ = 0;
1081
    *q++ = 1; /* last track */
1082
    *q++ = 0x00;
1083
    *q++ = 0x00;
1084
    
1085
    *q++ = 1; /* session number */
1086
    *q++ = 0x14; /* data track */
1087
    *q++ = 0; /* track number */
1088
    *q++ = 0xa2; /* lead-out */
1089
    *q++ = 0; /* min */
1090
    *q++ = 0; /* sec */
1091
    *q++ = 0; /* frame */
1092
    nb_sectors = s->nb_sectors >> 2;
1093
    if (msf) {
1094
        *q++ = 0; /* reserved */
1095
        lba_to_msf(q, nb_sectors);
1096
        q += 3;
1097
    } else {
1098
        cpu_to_ube32(q, nb_sectors);
1099
        q += 4;
1100
    }
1101

    
1102
    *q++ = 1; /* session number */
1103
    *q++ = 0x14; /* ADR, control */
1104
    *q++ = 0;    /* track number */
1105
    *q++ = 1;    /* point */
1106
    *q++ = 0; /* min */
1107
    *q++ = 0; /* sec */
1108
    *q++ = 0; /* frame */
1109
    *q++ = 0; 
1110
    *q++ = 0; 
1111
    *q++ = 0; 
1112
    *q++ = 0; 
1113

    
1114
    len = q - buf;
1115
    cpu_to_ube16(buf, len - 2);
1116
    return len;
1117
}
1118

    
1119
static void ide_atapi_cmd(IDEState *s)
1120
{
1121
    const uint8_t *packet;
1122
    uint8_t *buf;
1123
    int max_len;
1124

    
1125
    packet = s->io_buffer;
1126
    buf = s->io_buffer;
1127
#ifdef DEBUG_IDE_ATAPI
1128
    {
1129
        int i;
1130
        printf("ATAPI limit=0x%x packet:", s->lcyl | (s->hcyl << 8));
1131
        for(i = 0; i < ATAPI_PACKET_SIZE; i++) {
1132
            printf(" %02x", packet[i]);
1133
        }
1134
        printf("\n");
1135
    }
1136
#endif
1137
    switch(s->io_buffer[0]) {
1138
    case GPCMD_TEST_UNIT_READY:
1139
        if (bdrv_is_inserted(s->bs)) {
1140
            ide_atapi_cmd_ok(s);
1141
        } else {
1142
            ide_atapi_cmd_error(s, SENSE_NOT_READY, 
1143
                                ASC_MEDIUM_NOT_PRESENT);
1144
        }
1145
        break;
1146
    case GPCMD_MODE_SENSE_10:
1147
        {
1148
            int action, code;
1149
            max_len = ube16_to_cpu(packet + 7);
1150
            action = packet[2] >> 6;
1151
            code = packet[2] & 0x3f;
1152
            switch(action) {
1153
            case 0: /* current values */
1154
                switch(code) {
1155
                case 0x01: /* error recovery */
1156
                    cpu_to_ube16(&buf[0], 16 + 6);
1157
                    buf[2] = 0x70;
1158
                    buf[3] = 0;
1159
                    buf[4] = 0;
1160
                    buf[5] = 0;
1161
                    buf[6] = 0;
1162
                    buf[7] = 0;
1163

    
1164
                    buf[8] = 0x01;
1165
                    buf[9] = 0x06;
1166
                    buf[10] = 0x00;
1167
                    buf[11] = 0x05;
1168
                    buf[12] = 0x00;
1169
                    buf[13] = 0x00;
1170
                    buf[14] = 0x00;
1171
                    buf[15] = 0x00;
1172
                    ide_atapi_cmd_reply(s, 16, max_len);
1173
                    break;
1174
                case 0x2a:
1175
                    cpu_to_ube16(&buf[0], 28 + 6);
1176
                    buf[2] = 0x70;
1177
                    buf[3] = 0;
1178
                    buf[4] = 0;
1179
                    buf[5] = 0;
1180
                    buf[6] = 0;
1181
                    buf[7] = 0;
1182

    
1183
                    buf[8] = 0x2a;
1184
                    buf[9] = 0x12;
1185
                    buf[10] = 0x00;
1186
                    buf[11] = 0x00;
1187
                    
1188
                    buf[12] = 0x70;
1189
                    buf[13] = 3 << 5;
1190
                    buf[14] = (1 << 0) | (1 << 3) | (1 << 5);
1191
                    if (bdrv_is_locked(s->bs))
1192
                        buf[6] |= 1 << 1;
1193
                    buf[15] = 0x00;
1194
                    cpu_to_ube16(&buf[16], 706);
1195
                    buf[18] = 0;
1196
                    buf[19] = 2;
1197
                    cpu_to_ube16(&buf[20], 512);
1198
                    cpu_to_ube16(&buf[22], 706);
1199
                    buf[24] = 0;
1200
                    buf[25] = 0;
1201
                    buf[26] = 0;
1202
                    buf[27] = 0;
1203
                    ide_atapi_cmd_reply(s, 28, max_len);
1204
                    break;
1205
                default:
1206
                    goto error_cmd;
1207
                }
1208
                break;
1209
            case 1: /* changeable values */
1210
                goto error_cmd;
1211
            case 2: /* default values */
1212
                goto error_cmd;
1213
            default:
1214
            case 3: /* saved values */
1215
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1216
                                    ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
1217
                break;
1218
            }
1219
        }
1220
        break;
1221
    case GPCMD_REQUEST_SENSE:
1222
        max_len = packet[4];
1223
        memset(buf, 0, 18);
1224
        buf[0] = 0x70 | (1 << 7);
1225
        buf[2] = s->sense_key;
1226
        buf[7] = 10;
1227
        buf[12] = s->asc;
1228
        ide_atapi_cmd_reply(s, 18, max_len);
1229
        break;
1230
    case GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
1231
        if (bdrv_is_inserted(s->bs)) {
1232
            bdrv_set_locked(s->bs, packet[4] & 1);
1233
            ide_atapi_cmd_ok(s);
1234
        } else {
1235
            ide_atapi_cmd_error(s, SENSE_NOT_READY, 
1236
                                ASC_MEDIUM_NOT_PRESENT);
1237
        }
1238
        break;
1239
    case GPCMD_READ_10:
1240
    case GPCMD_READ_12:
1241
        {
1242
            int nb_sectors, lba;
1243

    
1244
            if (!bdrv_is_inserted(s->bs)) {
1245
                ide_atapi_cmd_error(s, SENSE_NOT_READY, 
1246
                                    ASC_MEDIUM_NOT_PRESENT);
1247
                break;
1248
            }
1249
            if (packet[0] == GPCMD_READ_10)
1250
                nb_sectors = ube16_to_cpu(packet + 7);
1251
            else
1252
                nb_sectors = ube32_to_cpu(packet + 6);
1253
            lba = ube32_to_cpu(packet + 2);
1254
            if (nb_sectors == 0) {
1255
                ide_atapi_cmd_ok(s);
1256
                break;
1257
            }
1258
            if (((int64_t)(lba + nb_sectors) << 2) > s->nb_sectors) {
1259
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1260
                                    ASC_LOGICAL_BLOCK_OOR);
1261
                break;
1262
            }
1263
            ide_atapi_cmd_read(s, lba, nb_sectors, 2048);
1264
        }
1265
        break;
1266
    case GPCMD_READ_CD:
1267
        {
1268
            int nb_sectors, lba, transfer_request;
1269

    
1270
            if (!bdrv_is_inserted(s->bs)) {
1271
                ide_atapi_cmd_error(s, SENSE_NOT_READY, 
1272
                                    ASC_MEDIUM_NOT_PRESENT);
1273
                break;
1274
            }
1275
            nb_sectors = (packet[6] << 16) | (packet[7] << 8) | packet[8];
1276
            lba = ube32_to_cpu(packet + 2);
1277
            if (nb_sectors == 0) {
1278
                ide_atapi_cmd_ok(s);
1279
                break;
1280
            }
1281
            if (((int64_t)(lba + nb_sectors) << 2) > s->nb_sectors) {
1282
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1283
                                    ASC_LOGICAL_BLOCK_OOR);
1284
                break;
1285
            }
1286
            transfer_request = packet[9];
1287
            switch(transfer_request & 0xf8) {
1288
            case 0x00:
1289
                /* nothing */
1290
                ide_atapi_cmd_ok(s);
1291
                break;
1292
            case 0x10:
1293
                /* normal read */
1294
                ide_atapi_cmd_read(s, lba, nb_sectors, 2048);
1295
                break;
1296
            case 0xf8:
1297
                /* read all data */
1298
                ide_atapi_cmd_read(s, lba, nb_sectors, 2352);
1299
                break;
1300
            default:
1301
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1302
                                    ASC_INV_FIELD_IN_CMD_PACKET);
1303
                break;
1304
            }
1305
        }
1306
        break;
1307
    case GPCMD_SEEK:
1308
        {
1309
            int lba;
1310
            if (!bdrv_is_inserted(s->bs)) {
1311
                ide_atapi_cmd_error(s, SENSE_NOT_READY, 
1312
                                    ASC_MEDIUM_NOT_PRESENT);
1313
                break;
1314
            }
1315
            lba = ube32_to_cpu(packet + 2);
1316
            if (((int64_t)lba << 2) > s->nb_sectors) {
1317
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1318
                                    ASC_LOGICAL_BLOCK_OOR);
1319
                break;
1320
            }
1321
            ide_atapi_cmd_ok(s);
1322
        }
1323
        break;
1324
    case GPCMD_START_STOP_UNIT:
1325
        {
1326
            int start, eject;
1327
            start = packet[4] & 1;
1328
            eject = (packet[4] >> 1) & 1;
1329
            
1330
            if (eject && !start) {
1331
                /* eject the disk */
1332
                bdrv_close(s->bs);
1333
            }
1334
            ide_atapi_cmd_ok(s);
1335
        }
1336
        break;
1337
    case GPCMD_MECHANISM_STATUS:
1338
        {
1339
            max_len = ube16_to_cpu(packet + 8);
1340
            cpu_to_ube16(buf, 0);
1341
            /* no current LBA */
1342
            buf[2] = 0;
1343
            buf[3] = 0;
1344
            buf[4] = 0;
1345
            buf[5] = 1;
1346
            cpu_to_ube16(buf + 6, 0);
1347
            ide_atapi_cmd_reply(s, 8, max_len);
1348
        }
1349
        break;
1350
    case GPCMD_READ_TOC_PMA_ATIP:
1351
        {
1352
            int format, msf, start_track, len;
1353

    
1354
            if (!bdrv_is_inserted(s->bs)) {
1355
                ide_atapi_cmd_error(s, SENSE_NOT_READY, 
1356
                                    ASC_MEDIUM_NOT_PRESENT);
1357
                break;
1358
            }
1359
            max_len = ube16_to_cpu(packet + 7);
1360
            format = packet[9] >> 6;
1361
            msf = (packet[1] >> 1) & 1;
1362
            start_track = packet[6];
1363
            switch(format) {
1364
            case 0:
1365
                len = cdrom_read_toc(s, buf, msf, start_track);
1366
                if (len < 0)
1367
                    goto error_cmd;
1368
                ide_atapi_cmd_reply(s, len, max_len);
1369
                break;
1370
            case 1:
1371
                /* multi session : only a single session defined */
1372
                memset(buf, 0, 12);
1373
                buf[1] = 0x0a;
1374
                buf[2] = 0x01;
1375
                buf[3] = 0x01;
1376
                ide_atapi_cmd_reply(s, 12, max_len);
1377
                break;
1378
            case 2:
1379
                len = cdrom_read_toc_raw(s, buf, msf, start_track);
1380
                if (len < 0)
1381
                    goto error_cmd;
1382
                ide_atapi_cmd_reply(s, len, max_len);
1383
                break;
1384
            default:
1385
            error_cmd:
1386
                ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1387
                                    ASC_INV_FIELD_IN_CMD_PACKET);
1388
                break;
1389
            }
1390
        }
1391
        break;
1392
    case GPCMD_READ_CDVD_CAPACITY:
1393
        if (!bdrv_is_inserted(s->bs)) {
1394
            ide_atapi_cmd_error(s, SENSE_NOT_READY, 
1395
                                ASC_MEDIUM_NOT_PRESENT);
1396
            break;
1397
        }
1398
        /* NOTE: it is really the number of sectors minus 1 */
1399
        cpu_to_ube32(buf, (s->nb_sectors >> 2) - 1);
1400
        cpu_to_ube32(buf + 4, 2048);
1401
        ide_atapi_cmd_reply(s, 8, 8);
1402
        break;
1403
    case GPCMD_INQUIRY:
1404
        max_len = packet[4];
1405
        buf[0] = 0x05; /* CD-ROM */
1406
        buf[1] = 0x80; /* removable */
1407
        buf[2] = 0x00; /* ISO */
1408
        buf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */
1409
        buf[4] = 31; /* additionnal length */
1410
        buf[5] = 0; /* reserved */
1411
        buf[6] = 0; /* reserved */
1412
        buf[7] = 0; /* reserved */
1413
        padstr8(buf + 8, 8, "QEMU");
1414
        padstr8(buf + 16, 16, "QEMU CD-ROM");
1415
        padstr8(buf + 32, 4, QEMU_VERSION);
1416
        ide_atapi_cmd_reply(s, 36, max_len);
1417
        break;
1418
    default:
1419
        ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST, 
1420
                            ASC_ILLEGAL_OPCODE);
1421
        break;
1422
    }
1423
}
1424

    
1425
/* called when the inserted state of the media has changed */
1426
static void cdrom_change_cb(void *opaque)
1427
{
1428
    IDEState *s = opaque;
1429
    int64_t nb_sectors;
1430

    
1431
    /* XXX: send interrupt too */
1432
    bdrv_get_geometry(s->bs, &nb_sectors);
1433
    s->nb_sectors = nb_sectors;
1434
}
1435

    
1436
static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
1437
{
1438
    IDEState *ide_if = opaque;
1439
    IDEState *s;
1440
    int unit, n;
1441

    
1442
#ifdef DEBUG_IDE
1443
    printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
1444
#endif
1445
    addr &= 7;
1446
    switch(addr) {
1447
    case 0:
1448
        break;
1449
    case 1:
1450
        /* NOTE: data is written to the two drives */
1451
        ide_if[0].feature = val;
1452
        ide_if[1].feature = val;
1453
        break;
1454
    case 2:
1455
        if (val == 0)
1456
            val = 256;
1457
        ide_if[0].nsector = val;
1458
        ide_if[1].nsector = val;
1459
        break;
1460
    case 3:
1461
        ide_if[0].sector = val;
1462
        ide_if[1].sector = val;
1463
        break;
1464
    case 4:
1465
        ide_if[0].lcyl = val;
1466
        ide_if[1].lcyl = val;
1467
        break;
1468
    case 5:
1469
        ide_if[0].hcyl = val;
1470
        ide_if[1].hcyl = val;
1471
        break;
1472
    case 6:
1473
        ide_if[0].select = (val & ~0x10) | 0xa0;
1474
        ide_if[1].select = (val | 0x10) | 0xa0;
1475
        /* select drive */
1476
        unit = (val >> 4) & 1;
1477
        s = ide_if + unit;
1478
        ide_if->cur_drive = s;
1479
        break;
1480
    default:
1481
    case 7:
1482
        /* command */
1483
#if defined(DEBUG_IDE)
1484
        printf("ide: CMD=%02x\n", val);
1485
#endif
1486
        s = ide_if->cur_drive;
1487
        /* ignore commands to non existant slave */
1488
        if (s != ide_if && !s->bs) 
1489
            break;
1490
        switch(val) {
1491
        case WIN_IDENTIFY:
1492
            if (s->bs && !s->is_cdrom) {
1493
                ide_identify(s);
1494
                s->status = READY_STAT | SEEK_STAT;
1495
                ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1496
            } else {
1497
                if (s->is_cdrom) {
1498
                    ide_set_signature(s);
1499
                }
1500
                ide_abort_command(s);
1501
            }
1502
            ide_set_irq(s);
1503
            break;
1504
        case WIN_SPECIFY:
1505
        case WIN_RECAL:
1506
            s->error = 0;
1507
            s->status = READY_STAT | SEEK_STAT;
1508
            ide_set_irq(s);
1509
            break;
1510
        case WIN_SETMULT:
1511
            if (s->nsector > MAX_MULT_SECTORS || 
1512
                s->nsector == 0 ||
1513
                (s->nsector & (s->nsector - 1)) != 0) {
1514
                ide_abort_command(s);
1515
            } else {
1516
                s->mult_sectors = s->nsector;
1517
                s->status = READY_STAT;
1518
            }
1519
            ide_set_irq(s);
1520
            break;
1521
        case WIN_VERIFY:
1522
        case WIN_VERIFY_ONCE:
1523
            /* do sector number check ? */
1524
            s->status = READY_STAT;
1525
            ide_set_irq(s);
1526
            break;
1527
        case WIN_READ:
1528
        case WIN_READ_ONCE:
1529
            if (!s->bs) 
1530
                goto abort_cmd;
1531
            s->req_nb_sectors = 1;
1532
            ide_sector_read(s);
1533
            break;
1534
        case WIN_WRITE:
1535
        case WIN_WRITE_ONCE:
1536
            s->error = 0;
1537
            s->status = SEEK_STAT | READY_STAT;
1538
            s->req_nb_sectors = 1;
1539
            ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
1540
            break;
1541
        case WIN_MULTREAD:
1542
            if (!s->mult_sectors)
1543
                goto abort_cmd;
1544
            s->req_nb_sectors = s->mult_sectors;
1545
            ide_sector_read(s);
1546
            break;
1547
        case WIN_MULTWRITE:
1548
            if (!s->mult_sectors)
1549
                goto abort_cmd;
1550
            s->error = 0;
1551
            s->status = SEEK_STAT | READY_STAT;
1552
            s->req_nb_sectors = s->mult_sectors;
1553
            n = s->nsector;
1554
            if (n > s->req_nb_sectors)
1555
                n = s->req_nb_sectors;
1556
            ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
1557
            break;
1558
        case WIN_READDMA:
1559
        case WIN_READDMA_ONCE:
1560
            if (!s->bs) 
1561
                goto abort_cmd;
1562
            ide_sector_read_dma(s);
1563
            break;
1564
        case WIN_WRITEDMA:
1565
        case WIN_WRITEDMA_ONCE:
1566
            if (!s->bs) 
1567
                goto abort_cmd;
1568
            ide_sector_write_dma(s);
1569
            break;
1570
        case WIN_READ_NATIVE_MAX:
1571
            ide_set_sector(s, s->nb_sectors - 1);
1572
            s->status = READY_STAT;
1573
            ide_set_irq(s);
1574
            break;
1575
        case WIN_CHECKPOWERMODE1:
1576
            s->nsector = 0xff; /* device active or idle */
1577
            s->status = READY_STAT;
1578
            ide_set_irq(s);
1579
            break;
1580
        case WIN_SETFEATURES:
1581
            if (!s->bs)
1582
                goto abort_cmd;
1583
            /* XXX: valid for CDROM ? */
1584
            switch(s->feature) {
1585
            case 0x02: /* write cache enable */
1586
            case 0x03: /* set transfer mode */
1587
            case 0x82: /* write cache disable */
1588
            case 0xaa: /* read look-ahead enable */
1589
            case 0x55: /* read look-ahead disable */
1590
                s->status = READY_STAT | SEEK_STAT;
1591
                ide_set_irq(s);
1592
                break;
1593
            default:
1594
                goto abort_cmd;
1595
            }
1596
            break;
1597
        case WIN_STANDBYNOW1:
1598
        case WIN_IDLEIMMEDIATE:
1599
            s->status = READY_STAT;
1600
            ide_set_irq(s);
1601
            break;
1602
            /* ATAPI commands */
1603
        case WIN_PIDENTIFY:
1604
            if (s->is_cdrom) {
1605
                ide_atapi_identify(s);
1606
                s->status = READY_STAT;
1607
                ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1608
            } else {
1609
                ide_abort_command(s);
1610
            }
1611
            ide_set_irq(s);
1612
            break;
1613
        case WIN_DIAGNOSE:
1614
            ide_set_signature(s);
1615
            s->status = 0x00; /* NOTE: READY is _not_ set */
1616
            s->error = 0x01;
1617
            break;
1618
        case WIN_SRST:
1619
            if (!s->is_cdrom)
1620
                goto abort_cmd;
1621
            ide_set_signature(s);
1622
            s->status = 0x00; /* NOTE: READY is _not_ set */
1623
            s->error = 0x01;
1624
            break;
1625
        case WIN_PACKETCMD:
1626
            if (!s->is_cdrom)
1627
                goto abort_cmd;
1628
            /* overlapping commands not supported */
1629
            if (s->feature & 0x02)
1630
                goto abort_cmd;
1631
            s->atapi_dma = s->feature & 1;
1632
            s->nsector = 1;
1633
            ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE, 
1634
                               ide_atapi_cmd);
1635
            break;
1636
        default:
1637
        abort_cmd:
1638
            ide_abort_command(s);
1639
            ide_set_irq(s);
1640
            break;
1641
        }
1642
    }
1643
}
1644

    
1645
static uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
1646
{
1647
    IDEState *ide_if = opaque;
1648
    IDEState *s = ide_if->cur_drive;
1649
    uint32_t addr;
1650
    int ret;
1651

    
1652
    addr = addr1 & 7;
1653
    switch(addr) {
1654
    case 0:
1655
        ret = 0xff;
1656
        break;
1657
    case 1:
1658
        if (!ide_if[0].bs && !ide_if[1].bs)
1659
            ret = 0;
1660
        else
1661
            ret = s->error;
1662
        break;
1663
    case 2:
1664
        if (!ide_if[0].bs && !ide_if[1].bs)
1665
            ret = 0;
1666
        else
1667
            ret = s->nsector & 0xff;
1668
        break;
1669
    case 3:
1670
        if (!ide_if[0].bs && !ide_if[1].bs)
1671
            ret = 0;
1672
        else
1673
            ret = s->sector;
1674
        break;
1675
    case 4:
1676
        if (!ide_if[0].bs && !ide_if[1].bs)
1677
            ret = 0;
1678
        else
1679
            ret = s->lcyl;
1680
        break;
1681
    case 5:
1682
        if (!ide_if[0].bs && !ide_if[1].bs)
1683
            ret = 0;
1684
        else
1685
            ret = s->hcyl;
1686
        break;
1687
    case 6:
1688
        if (!ide_if[0].bs && !ide_if[1].bs)
1689
            ret = 0;
1690
        else
1691
            ret = s->select;
1692
        break;
1693
    default:
1694
    case 7:
1695
        if ((!ide_if[0].bs && !ide_if[1].bs) ||
1696
            (s != ide_if && !s->bs))
1697
            ret = 0;
1698
        else
1699
            ret = s->status;
1700
#ifdef TARGET_PPC
1701
        if (s->openpic) 
1702
            openpic_set_irq(s->openpic, s->irq, 0);
1703
        else 
1704
#endif
1705
        if (s->irq == 16)
1706
            pci_set_irq(s->pci_dev, 0, 0);
1707
        else
1708
            pic_set_irq(s->irq, 0);
1709
        break;
1710
    }
1711
#ifdef DEBUG_IDE
1712
    printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
1713
#endif
1714
    return ret;
1715
}
1716

    
1717
static uint32_t ide_status_read(void *opaque, uint32_t addr)
1718
{
1719
    IDEState *ide_if = opaque;
1720
    IDEState *s = ide_if->cur_drive;
1721
    int ret;
1722

    
1723
    if ((!ide_if[0].bs && !ide_if[1].bs) ||
1724
        (s != ide_if && !s->bs))
1725
        ret = 0;
1726
    else
1727
        ret = s->status;
1728
#ifdef DEBUG_IDE
1729
    printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
1730
#endif
1731
    return ret;
1732
}
1733

    
1734
static void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
1735
{
1736
    IDEState *ide_if = opaque;
1737
    IDEState *s;
1738
    int i;
1739

    
1740
#ifdef DEBUG_IDE
1741
    printf("ide: write control addr=0x%x val=%02x\n", addr, val);
1742
#endif
1743
    /* common for both drives */
1744
    if (!(ide_if[0].cmd & IDE_CMD_RESET) &&
1745
        (val & IDE_CMD_RESET)) {
1746
        /* reset low to high */
1747
        for(i = 0;i < 2; i++) {
1748
            s = &ide_if[i];
1749
            s->status = BUSY_STAT | SEEK_STAT;
1750
            s->error = 0x01;
1751
        }
1752
    } else if ((ide_if[0].cmd & IDE_CMD_RESET) &&
1753
               !(val & IDE_CMD_RESET)) {
1754
        /* high to low */
1755
        for(i = 0;i < 2; i++) {
1756
            s = &ide_if[i];
1757
            if (s->is_cdrom)
1758
                s->status = 0x00; /* NOTE: READY is _not_ set */
1759
            else
1760
                s->status = READY_STAT | SEEK_STAT;
1761
            ide_set_signature(s);
1762
        }
1763
    }
1764

    
1765
    ide_if[0].cmd = val;
1766
    ide_if[1].cmd = val;
1767
}
1768

    
1769
static void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
1770
{
1771
    IDEState *s = ((IDEState *)opaque)->cur_drive;
1772
    uint8_t *p;
1773

    
1774
    p = s->data_ptr;
1775
    *(uint16_t *)p = le16_to_cpu(val);
1776
    p += 2;
1777
    s->data_ptr = p;
1778
    if (p >= s->data_end)
1779
        s->end_transfer_func(s);
1780
}
1781

    
1782
static uint32_t ide_data_readw(void *opaque, uint32_t addr)
1783
{
1784
    IDEState *s = ((IDEState *)opaque)->cur_drive;
1785
    uint8_t *p;
1786
    int ret;
1787
    p = s->data_ptr;
1788
    ret = cpu_to_le16(*(uint16_t *)p);
1789
    p += 2;
1790
    s->data_ptr = p;
1791
    if (p >= s->data_end)
1792
        s->end_transfer_func(s);
1793
    return ret;
1794
}
1795

    
1796
static void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
1797
{
1798
    IDEState *s = ((IDEState *)opaque)->cur_drive;
1799
    uint8_t *p;
1800

    
1801
    p = s->data_ptr;
1802
    *(uint32_t *)p = le32_to_cpu(val);
1803
    p += 4;
1804
    s->data_ptr = p;
1805
    if (p >= s->data_end)
1806
        s->end_transfer_func(s);
1807
}
1808

    
1809
static uint32_t ide_data_readl(void *opaque, uint32_t addr)
1810
{
1811
    IDEState *s = ((IDEState *)opaque)->cur_drive;
1812
    uint8_t *p;
1813
    int ret;
1814
    
1815
    p = s->data_ptr;
1816
    ret = cpu_to_le32(*(uint32_t *)p);
1817
    p += 4;
1818
    s->data_ptr = p;
1819
    if (p >= s->data_end)
1820
        s->end_transfer_func(s);
1821
    return ret;
1822
}
1823

    
1824
static void ide_dummy_transfer_stop(IDEState *s)
1825
{
1826
    s->data_ptr = s->io_buffer;
1827
    s->data_end = s->io_buffer;
1828
    s->io_buffer[0] = 0xff;
1829
    s->io_buffer[1] = 0xff;
1830
    s->io_buffer[2] = 0xff;
1831
    s->io_buffer[3] = 0xff;
1832
}
1833

    
1834
static void ide_reset(IDEState *s)
1835
{
1836
    s->mult_sectors = MAX_MULT_SECTORS;
1837
    s->cur_drive = s;
1838
    s->select = 0xa0;
1839
    s->status = READY_STAT;
1840
    ide_set_signature(s);
1841
    /* init the transfer handler so that 0xffff is returned on data
1842
       accesses */
1843
    s->end_transfer_func = ide_dummy_transfer_stop;
1844
    ide_dummy_transfer_stop(s);
1845
}
1846

    
1847
struct partition {
1848
        uint8_t boot_ind;                /* 0x80 - active */
1849
        uint8_t head;                /* starting head */
1850
        uint8_t sector;                /* starting sector */
1851
        uint8_t cyl;                /* starting cylinder */
1852
        uint8_t sys_ind;                /* What partition type */
1853
        uint8_t end_head;                /* end head */
1854
        uint8_t end_sector;        /* end sector */
1855
        uint8_t end_cyl;                /* end cylinder */
1856
        uint32_t start_sect;        /* starting sector counting from 0 */
1857
        uint32_t nr_sects;                /* nr of sectors in partition */
1858
} __attribute__((packed));
1859

    
1860
/* try to guess the disk logical geometry from the MSDOS partition table. Return 0 if OK, -1 if could not guess */
1861
static int guess_disk_lchs(IDEState *s, 
1862
                           int *pcylinders, int *pheads, int *psectors)
1863
{
1864
    uint8_t buf[512];
1865
    int ret, i, heads, sectors, cylinders;
1866
    struct partition *p;
1867
    uint32_t nr_sects;
1868

    
1869
    ret = bdrv_read(s->bs, 0, buf, 1);
1870
    if (ret < 0)
1871
        return -1;
1872
    /* test msdos magic */
1873
    if (buf[510] != 0x55 || buf[511] != 0xaa)
1874
        return -1;
1875
    for(i = 0; i < 4; i++) {
1876
        p = ((struct partition *)(buf + 0x1be)) + i;
1877
        nr_sects = le32_to_cpu(p->nr_sects);
1878
        if (nr_sects && p->end_head) {
1879
            /* We make the assumption that the partition terminates on
1880
               a cylinder boundary */
1881
            heads = p->end_head + 1;
1882
            sectors = p->end_sector & 63;
1883
            if (sectors == 0)
1884
                continue;
1885
            cylinders = s->nb_sectors / (heads * sectors);
1886
            if (cylinders < 1 || cylinders > 16383)
1887
                continue;
1888
            *pheads = heads;
1889
            *psectors = sectors;
1890
            *pcylinders = cylinders;
1891
#if 0
1892
            printf("guessed geometry: LCHS=%d %d %d\n", 
1893
                   cylinders, heads, sectors);
1894
#endif
1895
            return 0;
1896
        }
1897
    }
1898
    return -1;
1899
}
1900

    
1901
static void ide_init2(IDEState *ide_state, int irq,
1902
                      BlockDriverState *hd0, BlockDriverState *hd1)
1903
{
1904
    IDEState *s;
1905
    static int drive_serial = 1;
1906
    int i, cylinders, heads, secs, translation;
1907
    int64_t nb_sectors;
1908

    
1909
    for(i = 0; i < 2; i++) {
1910
        s = ide_state + i;
1911
        if (i == 0)
1912
            s->bs = hd0;
1913
        else
1914
            s->bs = hd1;
1915
        if (s->bs) {
1916
            bdrv_get_geometry(s->bs, &nb_sectors);
1917
            s->nb_sectors = nb_sectors;
1918
            /* if a geometry hint is available, use it */
1919
            bdrv_get_geometry_hint(s->bs, &cylinders, &heads, &secs);
1920
            if (cylinders != 0) {
1921
                s->cylinders = cylinders;
1922
                s->heads = heads;
1923
                s->sectors = secs;
1924
            } else {
1925
                if (guess_disk_lchs(s, &cylinders, &heads, &secs) == 0) {
1926
                    if (heads > 16) {
1927
                        /* if heads > 16, it means that a BIOS LBA
1928
                           translation was active, so the default
1929
                           hardware geometry is OK */
1930
                        goto default_geometry;
1931
                    } else {
1932
                        s->cylinders = cylinders;
1933
                        s->heads = heads;
1934
                        s->sectors = secs;
1935
                        /* disable any translation to be in sync with
1936
                           the logical geometry */
1937
                        translation = bdrv_get_translation_hint(s->bs);
1938
                        if (translation == BIOS_ATA_TRANSLATION_AUTO) {
1939
                            bdrv_set_translation_hint(s->bs,
1940
                                                      BIOS_ATA_TRANSLATION_NONE);
1941
                        }
1942
                    }
1943
                } else {
1944
                default_geometry:
1945
                    /* if no geometry, use a standard physical disk geometry */
1946
                    cylinders = nb_sectors / (16 * 63);
1947
                    if (cylinders > 16383)
1948
                        cylinders = 16383;
1949
                    else if (cylinders < 2)
1950
                        cylinders = 2;
1951
                    s->cylinders = cylinders;
1952
                    s->heads = 16;
1953
                    s->sectors = 63;
1954
                }
1955
                bdrv_set_geometry_hint(s->bs, s->cylinders, s->heads, s->sectors);
1956
            }
1957
            if (bdrv_get_type_hint(s->bs) == BDRV_TYPE_CDROM) {
1958
                s->is_cdrom = 1;
1959
                bdrv_set_change_cb(s->bs, cdrom_change_cb, s);
1960
            }
1961
        }
1962
        s->drive_serial = drive_serial++;
1963
        s->irq = irq;
1964
        s->sector_write_timer = qemu_new_timer(vm_clock, 
1965
                                               ide_sector_write_timer_cb, s);
1966
        ide_reset(s);
1967
    }
1968
}
1969

    
1970
static void ide_init_ioport(IDEState *ide_state, int iobase, int iobase2)
1971
{
1972
    register_ioport_write(iobase, 8, 1, ide_ioport_write, ide_state);
1973
    register_ioport_read(iobase, 8, 1, ide_ioport_read, ide_state);
1974
    if (iobase2) {
1975
        register_ioport_read(iobase2, 1, 1, ide_status_read, ide_state);
1976
        register_ioport_write(iobase2, 1, 1, ide_cmd_write, ide_state);
1977
    }
1978
    
1979
    /* data ports */
1980
    register_ioport_write(iobase, 2, 2, ide_data_writew, ide_state);
1981
    register_ioport_read(iobase, 2, 2, ide_data_readw, ide_state);
1982
    register_ioport_write(iobase, 4, 4, ide_data_writel, ide_state);
1983
    register_ioport_read(iobase, 4, 4, ide_data_readl, ide_state);
1984
}
1985

    
1986
/***********************************************************/
1987
/* ISA IDE definitions */
1988

    
1989
void isa_ide_init(int iobase, int iobase2, int irq,
1990
                  BlockDriverState *hd0, BlockDriverState *hd1)
1991
{
1992
    IDEState *ide_state;
1993

    
1994
    ide_state = qemu_mallocz(sizeof(IDEState) * 2);
1995
    if (!ide_state)
1996
        return;
1997
    
1998
    ide_init2(ide_state, irq, hd0, hd1);
1999
    ide_init_ioport(ide_state, iobase, iobase2);
2000
}
2001

    
2002
/***********************************************************/
2003
/* PCI IDE definitions */
2004

    
2005
static void ide_map(PCIDevice *pci_dev, int region_num, 
2006
                    uint32_t addr, uint32_t size, int type)
2007
{
2008
    PCIIDEState *d = (PCIIDEState *)pci_dev;
2009
    IDEState *ide_state;
2010

    
2011
    if (region_num <= 3) {
2012
        ide_state = &d->ide_if[(region_num >> 1) * 2];
2013
        if (region_num & 1) {
2014
            register_ioport_read(addr + 2, 1, 1, ide_status_read, ide_state);
2015
            register_ioport_write(addr + 2, 1, 1, ide_cmd_write, ide_state);
2016
        } else {
2017
            register_ioport_write(addr, 8, 1, ide_ioport_write, ide_state);
2018
            register_ioport_read(addr, 8, 1, ide_ioport_read, ide_state);
2019

    
2020
            /* data ports */
2021
            register_ioport_write(addr, 2, 2, ide_data_writew, ide_state);
2022
            register_ioport_read(addr, 2, 2, ide_data_readw, ide_state);
2023
            register_ioport_write(addr, 4, 4, ide_data_writel, ide_state);
2024
            register_ioport_read(addr, 4, 4, ide_data_readl, ide_state);
2025
        }
2026
    }
2027
}
2028

    
2029
/* XXX: full callback usage to prepare non blocking I/Os support -
2030
   error handling */
2031
static void ide_dma_loop(BMDMAState *bm)
2032
{
2033
    struct {
2034
        uint32_t addr;
2035
        uint32_t size;
2036
    } prd;
2037
    target_phys_addr_t cur_addr;
2038
    int len, i, len1;
2039

    
2040
    cur_addr = bm->addr;
2041
    /* at most one page to avoid hanging if erroneous parameters */
2042
    for(i = 0; i < 512; i++) {
2043
        cpu_physical_memory_read(cur_addr, (uint8_t *)&prd, 8);
2044
        prd.addr = le32_to_cpu(prd.addr);
2045
        prd.size = le32_to_cpu(prd.size);
2046
#ifdef DEBUG_IDE
2047
        printf("ide: dma: prd: %08x: addr=0x%08x size=0x%08x\n", 
2048
               (int)cur_addr, prd.addr, prd.size);
2049
#endif
2050
        len = prd.size & 0xfffe;
2051
        if (len == 0)
2052
            len = 0x10000;
2053
        while (len > 0) {
2054
            len1 = bm->dma_cb(bm->ide_if, prd.addr, len);
2055
            if (len1 == 0)
2056
                goto the_end;
2057
            prd.addr += len1;
2058
            len -= len1;
2059
        }
2060
        /* end of transfer */
2061
        if (prd.size & 0x80000000)
2062
            break;
2063
        cur_addr += 8;
2064
    }
2065
    /* end of transfer */
2066
 the_end:
2067
    bm->status &= ~BM_STATUS_DMAING;
2068
    bm->status |= BM_STATUS_INT;
2069
    bm->dma_cb = NULL;
2070
    bm->ide_if = NULL;
2071
}
2072

    
2073
static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb)
2074
{
2075
    BMDMAState *bm = s->bmdma;
2076
    if(!bm)
2077
        return;
2078
    bm->ide_if = s;
2079
    bm->dma_cb = dma_cb;
2080
    if (bm->status & BM_STATUS_DMAING) {
2081
        ide_dma_loop(bm);
2082
    }
2083
}
2084

    
2085
static uint32_t bmdma_cmd_readb(void *opaque, uint32_t addr)
2086
{
2087
    BMDMAState *bm = opaque;
2088
    uint32_t val;
2089
    val = bm->cmd;
2090
#ifdef DEBUG_IDE
2091
    printf("%s: 0x%08x\n", __func__, val);
2092
#endif
2093
    return val;
2094
}
2095

    
2096
static void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val)
2097
{
2098
    BMDMAState *bm = opaque;
2099
#ifdef DEBUG_IDE
2100
    printf("%s: 0x%08x\n", __func__, val);
2101
#endif
2102
    if (!(val & BM_CMD_START)) {
2103
        /* XXX: do it better */
2104
        bm->status &= ~BM_STATUS_DMAING;
2105
        bm->cmd = val & 0x09;
2106
    } else {
2107
        bm->status |= BM_STATUS_DMAING;
2108
        bm->cmd = val & 0x09;
2109
        /* start dma transfer if possible */
2110
        if (bm->dma_cb)
2111
            ide_dma_loop(bm);
2112
    }
2113
}
2114

    
2115
static uint32_t bmdma_status_readb(void *opaque, uint32_t addr)
2116
{
2117
    BMDMAState *bm = opaque;
2118
    uint32_t val;
2119
    val = bm->status;
2120
#ifdef DEBUG_IDE
2121
    printf("%s: 0x%08x\n", __func__, val);
2122
#endif
2123
    return val;
2124
}
2125

    
2126
static void bmdma_status_writeb(void *opaque, uint32_t addr, uint32_t val)
2127
{
2128
    BMDMAState *bm = opaque;
2129
#ifdef DEBUG_IDE
2130
    printf("%s: 0x%08x\n", __func__, val);
2131
#endif
2132
    bm->status = (val & 0x60) | (bm->status & 1) | (bm->status & ~val & 0x06);
2133
}
2134

    
2135
static uint32_t bmdma_addr_readl(void *opaque, uint32_t addr)
2136
{
2137
    BMDMAState *bm = opaque;
2138
    uint32_t val;
2139
    val = bm->addr;
2140
#ifdef DEBUG_IDE
2141
    printf("%s: 0x%08x\n", __func__, val);
2142
#endif
2143
    return val;
2144
}
2145

    
2146
static void bmdma_addr_writel(void *opaque, uint32_t addr, uint32_t val)
2147
{
2148
    BMDMAState *bm = opaque;
2149
#ifdef DEBUG_IDE
2150
    printf("%s: 0x%08x\n", __func__, val);
2151
#endif
2152
    bm->addr = val & ~3;
2153
}
2154

    
2155
static void bmdma_map(PCIDevice *pci_dev, int region_num, 
2156
                    uint32_t addr, uint32_t size, int type)
2157
{
2158
    PCIIDEState *d = (PCIIDEState *)pci_dev;
2159
    int i;
2160

    
2161
    for(i = 0;i < 2; i++) {
2162
        BMDMAState *bm = &d->bmdma[i];
2163
        d->ide_if[2 * i].bmdma = bm;
2164
        d->ide_if[2 * i + 1].bmdma = bm;
2165
        
2166
        register_ioport_write(addr, 1, 1, bmdma_cmd_writeb, bm);
2167
        register_ioport_read(addr, 1, 1, bmdma_cmd_readb, bm);
2168

    
2169
        register_ioport_write(addr + 2, 1, 1, bmdma_status_writeb, bm);
2170
        register_ioport_read(addr + 2, 1, 1, bmdma_status_readb, bm);
2171

    
2172
        register_ioport_write(addr + 4, 4, 4, bmdma_addr_writel, bm);
2173
        register_ioport_read(addr + 4, 4, 4, bmdma_addr_readl, bm);
2174
        addr += 8;
2175
    }
2176
}
2177

    
2178
/* hd_table must contain 4 block drivers */
2179
void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
2180
{
2181
    PCIIDEState *d;
2182
    uint8_t *pci_conf;
2183
    int i;
2184

    
2185
    d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
2186
                                           -1, 
2187
                                           NULL, NULL);
2188
    pci_conf = d->dev.config;
2189
    pci_conf[0x00] = 0x86; // Intel
2190
    pci_conf[0x01] = 0x80;
2191
    pci_conf[0x02] = 0x00; // fake
2192
    pci_conf[0x03] = 0x01; // fake
2193
    pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
2194
    pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
2195
    pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
2196

    
2197
    pci_conf[0x2c] = 0x86; // subsys vendor
2198
    pci_conf[0x2d] = 0x80; // subsys vendor
2199
    pci_conf[0x2e] = 0x00; // fake
2200
    pci_conf[0x2f] = 0x01; // fake
2201

    
2202
    pci_register_io_region((PCIDevice *)d, 0, 0x8, 
2203
                           PCI_ADDRESS_SPACE_IO, ide_map);
2204
    pci_register_io_region((PCIDevice *)d, 1, 0x4, 
2205
                           PCI_ADDRESS_SPACE_IO, ide_map);
2206
    pci_register_io_region((PCIDevice *)d, 2, 0x8, 
2207
                           PCI_ADDRESS_SPACE_IO, ide_map);
2208
    pci_register_io_region((PCIDevice *)d, 3, 0x4, 
2209
                           PCI_ADDRESS_SPACE_IO, ide_map);
2210
    pci_register_io_region((PCIDevice *)d, 4, 0x10, 
2211
                           PCI_ADDRESS_SPACE_IO, bmdma_map);
2212

    
2213
    pci_conf[0x3d] = 0x01; // interrupt on pin 1
2214

    
2215
    for(i = 0; i < 4; i++)
2216
        d->ide_if[i].pci_dev = (PCIDevice *)d;
2217
    ide_init2(&d->ide_if[0], 16, hd_table[0], hd_table[1]);
2218
    ide_init2(&d->ide_if[2], 16, hd_table[2], hd_table[3]);
2219
}
2220

    
2221
/* hd_table must contain 4 block drivers */
2222
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
2223
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
2224
{
2225
    PCIIDEState *d;
2226
    uint8_t *pci_conf;
2227
    
2228
    /* register a function 1 of PIIX3 */
2229
    d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE", 
2230
                                           sizeof(PCIIDEState),
2231
                                           ((PCIDevice *)piix3_state)->devfn + 1, 
2232
                                           NULL, NULL);
2233
    pci_conf = d->dev.config;
2234
    pci_conf[0x00] = 0x86; // Intel
2235
    pci_conf[0x01] = 0x80;
2236
    pci_conf[0x02] = 0x10;
2237
    pci_conf[0x03] = 0x70;
2238
    pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
2239
    pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
2240
    pci_conf[0x0e] = 0x00; // header_type
2241

    
2242
    pci_register_io_region((PCIDevice *)d, 4, 0x10, 
2243
                           PCI_ADDRESS_SPACE_IO, bmdma_map);
2244

    
2245
    ide_init2(&d->ide_if[0], 14, hd_table[0], hd_table[1]);
2246
    ide_init2(&d->ide_if[2], 15, hd_table[2], hd_table[3]);
2247
    ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
2248
    ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
2249
}
2250

    
2251
/***********************************************************/
2252
/* MacIO based PowerPC IDE */
2253

    
2254
/* PowerMac IDE memory IO */
2255
static void pmac_ide_writeb (void *opaque,
2256
                             target_phys_addr_t addr, uint32_t val)
2257
{
2258
    addr = (addr & 0xFFF) >> 4; 
2259
    switch (addr) {
2260
    case 1 ... 7:
2261
        ide_ioport_write(opaque, addr, val);
2262
        break;
2263
    case 8:
2264
    case 22:
2265
        ide_cmd_write(opaque, 0, val);
2266
        break;
2267
    default:
2268
        break;
2269
    }
2270
}
2271

    
2272
static uint32_t pmac_ide_readb (void *opaque,target_phys_addr_t addr)
2273
{
2274
    uint8_t retval;
2275

    
2276
    addr = (addr & 0xFFF) >> 4;
2277
    switch (addr) {
2278
    case 1 ... 7:
2279
        retval = ide_ioport_read(opaque, addr);
2280
        break;
2281
    case 8:
2282
    case 22:
2283
        retval = ide_status_read(opaque, 0);
2284
        break;
2285
    default:
2286
        retval = 0xFF;
2287
        break;
2288
    }
2289
    return retval;
2290
}
2291

    
2292
static void pmac_ide_writew (void *opaque,
2293
                             target_phys_addr_t addr, uint32_t val)
2294
{
2295
    addr = (addr & 0xFFF) >> 4; 
2296
#ifdef TARGET_WORDS_BIGENDIAN
2297
    val = bswap16(val);
2298
#endif
2299
    if (addr == 0) {
2300
        ide_data_writew(opaque, 0, val);
2301
    }
2302
}
2303

    
2304
static uint32_t pmac_ide_readw (void *opaque,target_phys_addr_t addr)
2305
{
2306
    uint16_t retval;
2307

    
2308
    addr = (addr & 0xFFF) >> 4; 
2309
    if (addr == 0) {
2310
        retval = ide_data_readw(opaque, 0);
2311
    } else {
2312
        retval = 0xFFFF;
2313
    }
2314
#ifdef TARGET_WORDS_BIGENDIAN
2315
    retval = bswap16(retval);
2316
#endif
2317
    return retval;
2318
}
2319

    
2320
static void pmac_ide_writel (void *opaque,
2321
                             target_phys_addr_t addr, uint32_t val)
2322
{
2323
    addr = (addr & 0xFFF) >> 4; 
2324
#ifdef TARGET_WORDS_BIGENDIAN
2325
    val = bswap32(val);
2326
#endif
2327
    if (addr == 0) {
2328
        ide_data_writel(opaque, 0, val);
2329
    }
2330
}
2331

    
2332
static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr)
2333
{
2334
    uint32_t retval;
2335

    
2336
    addr = (addr & 0xFFF) >> 4; 
2337
    if (addr == 0) {
2338
        retval = ide_data_readl(opaque, 0);
2339
    } else {
2340
        retval = 0xFFFFFFFF;
2341
    }
2342
#ifdef TARGET_WORDS_BIGENDIAN
2343
    retval = bswap32(retval);
2344
#endif
2345
    return retval;
2346
}
2347

    
2348
static CPUWriteMemoryFunc *pmac_ide_write[] = {
2349
    pmac_ide_writeb,
2350
    pmac_ide_writew,
2351
    pmac_ide_writel,
2352
};
2353

    
2354
static CPUReadMemoryFunc *pmac_ide_read[] = {
2355
    pmac_ide_readb,
2356
    pmac_ide_readw,
2357
    pmac_ide_readl,
2358
};
2359

    
2360
/* hd_table must contain 4 block drivers */
2361
/* PowerMac uses memory mapped registers, not I/O. Return the memory
2362
   I/O index to access the ide. */
2363
int pmac_ide_init (BlockDriverState **hd_table,
2364
                   openpic_t *openpic, int irq)
2365
{
2366
    IDEState *ide_if;
2367
    int pmac_ide_memory;
2368

    
2369
    ide_if = qemu_mallocz(sizeof(IDEState) * 2);
2370
    ide_init2(&ide_if[0], irq, hd_table[0], hd_table[1]);
2371
    ide_if[0].openpic = openpic;
2372
    ide_if[1].openpic = openpic;
2373
    
2374
    pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
2375
                                             pmac_ide_write, &ide_if[0]);
2376
    return pmac_ide_memory;
2377
}