Revision b64b6436
| b/target-sparc/cpu.h | ||
|---|---|---|
| 541 | 541 |
#if !defined(CONFIG_USER_ONLY) |
| 542 | 542 |
void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr, |
| 543 | 543 |
int is_write, int is_exec, int is_asi, int size); |
| 544 |
#if defined(TARGET_SPARC64) |
|
| 544 | 545 |
target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, |
| 545 | 546 |
int mmu_idx); |
| 546 | 547 |
|
| 547 | 548 |
#endif |
| 549 |
#endif |
|
| 548 | 550 |
int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); |
| 549 | 551 |
|
| 550 | 552 |
#define cpu_init cpu_sparc_init |
| b/target-sparc/helper.c | ||
|---|---|---|
| 746 | 746 |
mmu_idx, &page_size); |
| 747 | 747 |
} |
| 748 | 748 |
|
| 749 |
#if defined(TARGET_SPARC64) |
|
| 749 | 750 |
target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, |
| 750 | 751 |
int mmu_idx) |
| 751 | 752 |
{
|
| ... | ... | |
| 760 | 761 |
return -1; |
| 761 | 762 |
return phys_addr; |
| 762 | 763 |
} |
| 764 |
#endif |
|
| 763 | 765 |
|
| 764 | 766 |
target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) |
| 765 | 767 |
{
|
| 766 |
return cpu_get_phys_page_nofault(env, addr, cpu_mmu_index(env)); |
|
| 768 |
target_phys_addr_t phys_addr; |
|
| 769 |
int mmu_idx = cpu_mmu_index(env); |
|
| 770 |
|
|
| 771 |
if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 2, mmu_idx) != 0) {
|
|
| 772 |
if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 0, mmu_idx) != 0) {
|
|
| 773 |
return -1; |
|
| 774 |
} |
|
| 775 |
} |
|
| 776 |
if (cpu_get_physical_page_desc(phys_addr) == IO_MEM_UNASSIGNED) {
|
|
| 777 |
return -1; |
|
| 778 |
} |
|
| 779 |
return phys_addr; |
|
| 767 | 780 |
} |
| 768 | 781 |
#endif |
| 769 | 782 |
|
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