Revision b651fc6f hw/mst_fpga.c

b/hw/mst_fpga.c
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#define MST_PCMCIA0		0xe0
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#define MST_PCMCIA1		0xe4
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#define MST_PCMCIAx_READY	(1 << 10)
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#define MST_PCMCIAx_nCD		(1 << 5)
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#define MST_PCMCIA_CD0_IRQ	9
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#define MST_PCMCIA_CD1_IRQ	13
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typedef struct mst_irq_state{
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	SysBusDevice busdev;
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......
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	else
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		s->prev_level &= ~(1u << irq);
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	switch(irq) {
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	case MST_PCMCIA_CD0_IRQ:
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		if (level)
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			s->pcmcia0 &= ~MST_PCMCIAx_nCD;
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		else
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			s->pcmcia0 |=  MST_PCMCIAx_nCD;
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		break;
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	case MST_PCMCIA_CD1_IRQ:
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		if (level)
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			s->pcmcia1 &= ~MST_PCMCIAx_nCD;
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		else
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			s->pcmcia1 |=  MST_PCMCIAx_nCD;
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		break;
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	}
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	if ((s->intmskena & (1u << irq)) && level)
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		s->intsetclr |= 1u << irq;
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......
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		s->intsetclr = (value & 0xFEEFF);
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		qemu_set_irq(s->parent, s->intsetclr & s->intmskena);
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		break;
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		/* For PCMCIAx allow the to change only power and reset */
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	case MST_PCMCIA0:
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		s->pcmcia0 = value;
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		s->pcmcia0 = (value & 0x1f) | (s->pcmcia0 & ~0x1f);
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		break;
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	case MST_PCMCIA1:
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		s->pcmcia1 = value;
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		s->pcmcia1 = (value & 0x1f) | (s->pcmcia1 & ~0x1f);
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		break;
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	default:
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		printf("Mainstone - mst_fpga_writeb: Bad register offset "
......
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	s = FROM_SYSBUS(mst_irq_state, dev);
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	s->pcmcia0 = MST_PCMCIAx_READY | MST_PCMCIAx_nCD;
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	s->pcmcia1 = MST_PCMCIAx_READY | MST_PCMCIAx_nCD;
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	sysbus_init_irq(dev, &s->parent);
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	/* alloc the external 16 irqs */

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