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1 | 5a9fdfec | bellard | /*
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2 | 5a9fdfec | bellard | * defines common to all virtual CPUs
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3 | 5a9fdfec | bellard | *
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4 | 5a9fdfec | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 5a9fdfec | bellard | *
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6 | 5a9fdfec | bellard | * This library is free software; you can redistribute it and/or
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7 | 5a9fdfec | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 5a9fdfec | bellard | * License as published by the Free Software Foundation; either
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9 | 5a9fdfec | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 5a9fdfec | bellard | *
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11 | 5a9fdfec | bellard | * This library is distributed in the hope that it will be useful,
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12 | 5a9fdfec | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 5a9fdfec | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 5a9fdfec | bellard | * Lesser General Public License for more details.
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15 | 5a9fdfec | bellard | *
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16 | 5a9fdfec | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 5a9fdfec | bellard | * License along with this library; if not, write to the Free Software
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18 | 5a9fdfec | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 5a9fdfec | bellard | */
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20 | 5a9fdfec | bellard | #ifndef CPU_ALL_H
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21 | 5a9fdfec | bellard | #define CPU_ALL_H
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22 | 5a9fdfec | bellard | |
23 | 5a9fdfec | bellard | /* all CPU memory access use these macros */
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24 | 5a9fdfec | bellard | static inline int ldub(void *ptr) |
25 | 5a9fdfec | bellard | { |
26 | 5a9fdfec | bellard | return *(uint8_t *)ptr;
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27 | 5a9fdfec | bellard | } |
28 | 5a9fdfec | bellard | |
29 | 5a9fdfec | bellard | static inline int ldsb(void *ptr) |
30 | 5a9fdfec | bellard | { |
31 | 5a9fdfec | bellard | return *(int8_t *)ptr;
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32 | 5a9fdfec | bellard | } |
33 | 5a9fdfec | bellard | |
34 | 5a9fdfec | bellard | static inline void stb(void *ptr, int v) |
35 | 5a9fdfec | bellard | { |
36 | 5a9fdfec | bellard | *(uint8_t *)ptr = v; |
37 | 5a9fdfec | bellard | } |
38 | 5a9fdfec | bellard | |
39 | 5a9fdfec | bellard | /* NOTE: on arm, putting 2 in /proc/sys/debug/alignment so that the
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40 | 5a9fdfec | bellard | kernel handles unaligned load/stores may give better results, but
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41 | 5a9fdfec | bellard | it is a system wide setting : bad */
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42 | 5a9fdfec | bellard | #if defined(WORDS_BIGENDIAN) || defined(__arm__)
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43 | 5a9fdfec | bellard | |
44 | 5a9fdfec | bellard | /* conservative code for little endian unaligned accesses */
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45 | 5a9fdfec | bellard | static inline int lduw(void *ptr) |
46 | 5a9fdfec | bellard | { |
47 | 5a9fdfec | bellard | #ifdef __powerpc__
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48 | 5a9fdfec | bellard | int val;
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49 | 5a9fdfec | bellard | __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr)); |
50 | 5a9fdfec | bellard | return val;
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51 | 5a9fdfec | bellard | #else
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52 | 5a9fdfec | bellard | uint8_t *p = ptr; |
53 | 5a9fdfec | bellard | return p[0] | (p[1] << 8); |
54 | 5a9fdfec | bellard | #endif
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55 | 5a9fdfec | bellard | } |
56 | 5a9fdfec | bellard | |
57 | 5a9fdfec | bellard | static inline int ldsw(void *ptr) |
58 | 5a9fdfec | bellard | { |
59 | 5a9fdfec | bellard | #ifdef __powerpc__
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60 | 5a9fdfec | bellard | int val;
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61 | 5a9fdfec | bellard | __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (ptr)); |
62 | 5a9fdfec | bellard | return (int16_t)val;
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63 | 5a9fdfec | bellard | #else
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64 | 5a9fdfec | bellard | uint8_t *p = ptr; |
65 | 5a9fdfec | bellard | return (int16_t)(p[0] | (p[1] << 8)); |
66 | 5a9fdfec | bellard | #endif
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67 | 5a9fdfec | bellard | } |
68 | 5a9fdfec | bellard | |
69 | 5a9fdfec | bellard | static inline int ldl(void *ptr) |
70 | 5a9fdfec | bellard | { |
71 | 5a9fdfec | bellard | #ifdef __powerpc__
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72 | 5a9fdfec | bellard | int val;
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73 | 5a9fdfec | bellard | __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (ptr)); |
74 | 5a9fdfec | bellard | return val;
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75 | 5a9fdfec | bellard | #else
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76 | 5a9fdfec | bellard | uint8_t *p = ptr; |
77 | 5a9fdfec | bellard | return p[0] | (p[1] << 8) | (p[2] << 16) | (p[3] << 24); |
78 | 5a9fdfec | bellard | #endif
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79 | 5a9fdfec | bellard | } |
80 | 5a9fdfec | bellard | |
81 | 5a9fdfec | bellard | static inline uint64_t ldq(void *ptr) |
82 | 5a9fdfec | bellard | { |
83 | 5a9fdfec | bellard | uint8_t *p = ptr; |
84 | 5a9fdfec | bellard | uint32_t v1, v2; |
85 | 5a9fdfec | bellard | v1 = ldl(p); |
86 | 5a9fdfec | bellard | v2 = ldl(p + 4);
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87 | 5a9fdfec | bellard | return v1 | ((uint64_t)v2 << 32); |
88 | 5a9fdfec | bellard | } |
89 | 5a9fdfec | bellard | |
90 | 5a9fdfec | bellard | static inline void stw(void *ptr, int v) |
91 | 5a9fdfec | bellard | { |
92 | 5a9fdfec | bellard | #ifdef __powerpc__
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93 | 5a9fdfec | bellard | __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*(uint16_t *)ptr) : "r" (v), "r" (ptr)); |
94 | 5a9fdfec | bellard | #else
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95 | 5a9fdfec | bellard | uint8_t *p = ptr; |
96 | 5a9fdfec | bellard | p[0] = v;
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97 | 5a9fdfec | bellard | p[1] = v >> 8; |
98 | 5a9fdfec | bellard | #endif
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99 | 5a9fdfec | bellard | } |
100 | 5a9fdfec | bellard | |
101 | 5a9fdfec | bellard | static inline void stl(void *ptr, int v) |
102 | 5a9fdfec | bellard | { |
103 | 5a9fdfec | bellard | #ifdef __powerpc__
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104 | 5a9fdfec | bellard | __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*(uint32_t *)ptr) : "r" (v), "r" (ptr)); |
105 | 5a9fdfec | bellard | #else
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106 | 5a9fdfec | bellard | uint8_t *p = ptr; |
107 | 5a9fdfec | bellard | p[0] = v;
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108 | 5a9fdfec | bellard | p[1] = v >> 8; |
109 | 5a9fdfec | bellard | p[2] = v >> 16; |
110 | 5a9fdfec | bellard | p[3] = v >> 24; |
111 | 5a9fdfec | bellard | #endif
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112 | 5a9fdfec | bellard | } |
113 | 5a9fdfec | bellard | |
114 | 5a9fdfec | bellard | static inline void stq(void *ptr, uint64_t v) |
115 | 5a9fdfec | bellard | { |
116 | 5a9fdfec | bellard | uint8_t *p = ptr; |
117 | 5a9fdfec | bellard | stl(p, (uint32_t)v); |
118 | 5a9fdfec | bellard | stl(p + 4, v >> 32); |
119 | 5a9fdfec | bellard | } |
120 | 5a9fdfec | bellard | |
121 | 5a9fdfec | bellard | /* float access */
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122 | 5a9fdfec | bellard | |
123 | 5a9fdfec | bellard | static inline float ldfl(void *ptr) |
124 | 5a9fdfec | bellard | { |
125 | 5a9fdfec | bellard | union {
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126 | 5a9fdfec | bellard | float f;
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127 | 5a9fdfec | bellard | uint32_t i; |
128 | 5a9fdfec | bellard | } u; |
129 | 5a9fdfec | bellard | u.i = ldl(ptr); |
130 | 5a9fdfec | bellard | return u.f;
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131 | 5a9fdfec | bellard | } |
132 | 5a9fdfec | bellard | |
133 | 5a9fdfec | bellard | static inline void stfl(void *ptr, float v) |
134 | 5a9fdfec | bellard | { |
135 | 5a9fdfec | bellard | union {
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136 | 5a9fdfec | bellard | float f;
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137 | 5a9fdfec | bellard | uint32_t i; |
138 | 5a9fdfec | bellard | } u; |
139 | 5a9fdfec | bellard | u.f = v; |
140 | 5a9fdfec | bellard | stl(ptr, u.i); |
141 | 5a9fdfec | bellard | } |
142 | 5a9fdfec | bellard | |
143 | 33417e70 | bellard | |
144 | 5a9fdfec | bellard | #if defined(__arm__) && !defined(WORDS_BIGENDIAN)
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145 | 5a9fdfec | bellard | |
146 | 5a9fdfec | bellard | /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
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147 | 5a9fdfec | bellard | static inline double ldfq(void *ptr) |
148 | 5a9fdfec | bellard | { |
149 | 5a9fdfec | bellard | union {
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150 | 5a9fdfec | bellard | double d;
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151 | 5a9fdfec | bellard | uint32_t tab[2];
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152 | 5a9fdfec | bellard | } u; |
153 | 5a9fdfec | bellard | u.tab[1] = ldl(ptr);
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154 | 5a9fdfec | bellard | u.tab[0] = ldl(ptr + 4); |
155 | 5a9fdfec | bellard | return u.d;
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156 | 5a9fdfec | bellard | } |
157 | 5a9fdfec | bellard | |
158 | 5a9fdfec | bellard | static inline void stfq(void *ptr, double v) |
159 | 5a9fdfec | bellard | { |
160 | 5a9fdfec | bellard | union {
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161 | 5a9fdfec | bellard | double d;
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162 | 5a9fdfec | bellard | uint32_t tab[2];
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163 | 5a9fdfec | bellard | } u; |
164 | 5a9fdfec | bellard | u.d = v; |
165 | 5a9fdfec | bellard | stl(ptr, u.tab[1]);
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166 | 5a9fdfec | bellard | stl(ptr + 4, u.tab[0]); |
167 | 5a9fdfec | bellard | } |
168 | 5a9fdfec | bellard | |
169 | 5a9fdfec | bellard | #else
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170 | 5a9fdfec | bellard | static inline double ldfq(void *ptr) |
171 | 5a9fdfec | bellard | { |
172 | 5a9fdfec | bellard | union {
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173 | 5a9fdfec | bellard | double d;
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174 | 5a9fdfec | bellard | uint64_t i; |
175 | 5a9fdfec | bellard | } u; |
176 | 5a9fdfec | bellard | u.i = ldq(ptr); |
177 | 5a9fdfec | bellard | return u.d;
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178 | 5a9fdfec | bellard | } |
179 | 5a9fdfec | bellard | |
180 | 5a9fdfec | bellard | static inline void stfq(void *ptr, double v) |
181 | 5a9fdfec | bellard | { |
182 | 5a9fdfec | bellard | union {
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183 | 5a9fdfec | bellard | double d;
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184 | 5a9fdfec | bellard | uint64_t i; |
185 | 5a9fdfec | bellard | } u; |
186 | 5a9fdfec | bellard | u.d = v; |
187 | 5a9fdfec | bellard | stq(ptr, u.i); |
188 | 5a9fdfec | bellard | } |
189 | 5a9fdfec | bellard | #endif
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190 | 5a9fdfec | bellard | |
191 | 5a9fdfec | bellard | #else
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192 | 5a9fdfec | bellard | |
193 | 5a9fdfec | bellard | static inline int lduw(void *ptr) |
194 | 5a9fdfec | bellard | { |
195 | 5a9fdfec | bellard | return *(uint16_t *)ptr;
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196 | 5a9fdfec | bellard | } |
197 | 5a9fdfec | bellard | |
198 | 5a9fdfec | bellard | static inline int ldsw(void *ptr) |
199 | 5a9fdfec | bellard | { |
200 | 5a9fdfec | bellard | return *(int16_t *)ptr;
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201 | 5a9fdfec | bellard | } |
202 | 5a9fdfec | bellard | |
203 | 5a9fdfec | bellard | static inline int ldl(void *ptr) |
204 | 5a9fdfec | bellard | { |
205 | 5a9fdfec | bellard | return *(uint32_t *)ptr;
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206 | 5a9fdfec | bellard | } |
207 | 5a9fdfec | bellard | |
208 | 5a9fdfec | bellard | static inline uint64_t ldq(void *ptr) |
209 | 5a9fdfec | bellard | { |
210 | 5a9fdfec | bellard | return *(uint64_t *)ptr;
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211 | 5a9fdfec | bellard | } |
212 | 5a9fdfec | bellard | |
213 | 5a9fdfec | bellard | static inline void stw(void *ptr, int v) |
214 | 5a9fdfec | bellard | { |
215 | 5a9fdfec | bellard | *(uint16_t *)ptr = v; |
216 | 5a9fdfec | bellard | } |
217 | 5a9fdfec | bellard | |
218 | 5a9fdfec | bellard | static inline void stl(void *ptr, int v) |
219 | 5a9fdfec | bellard | { |
220 | 5a9fdfec | bellard | *(uint32_t *)ptr = v; |
221 | 5a9fdfec | bellard | } |
222 | 5a9fdfec | bellard | |
223 | 5a9fdfec | bellard | static inline void stq(void *ptr, uint64_t v) |
224 | 5a9fdfec | bellard | { |
225 | 5a9fdfec | bellard | *(uint64_t *)ptr = v; |
226 | 5a9fdfec | bellard | } |
227 | 5a9fdfec | bellard | |
228 | 5a9fdfec | bellard | /* float access */
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229 | 5a9fdfec | bellard | |
230 | 5a9fdfec | bellard | static inline float ldfl(void *ptr) |
231 | 5a9fdfec | bellard | { |
232 | 5a9fdfec | bellard | return *(float *)ptr; |
233 | 5a9fdfec | bellard | } |
234 | 5a9fdfec | bellard | |
235 | 5a9fdfec | bellard | static inline double ldfq(void *ptr) |
236 | 5a9fdfec | bellard | { |
237 | 5a9fdfec | bellard | return *(double *)ptr; |
238 | 5a9fdfec | bellard | } |
239 | 5a9fdfec | bellard | |
240 | 5a9fdfec | bellard | static inline void stfl(void *ptr, float v) |
241 | 5a9fdfec | bellard | { |
242 | 5a9fdfec | bellard | *(float *)ptr = v;
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243 | 5a9fdfec | bellard | } |
244 | 5a9fdfec | bellard | |
245 | 5a9fdfec | bellard | static inline void stfq(void *ptr, double v) |
246 | 5a9fdfec | bellard | { |
247 | 5a9fdfec | bellard | *(double *)ptr = v;
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248 | 5a9fdfec | bellard | } |
249 | 5a9fdfec | bellard | #endif
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250 | 5a9fdfec | bellard | |
251 | 5a9fdfec | bellard | /* page related stuff */
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252 | 5a9fdfec | bellard | |
253 | 5a9fdfec | bellard | #define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) |
254 | 5a9fdfec | bellard | #define TARGET_PAGE_MASK ~(TARGET_PAGE_SIZE - 1) |
255 | 5a9fdfec | bellard | #define TARGET_PAGE_ALIGN(addr) (((addr) + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK) |
256 | 5a9fdfec | bellard | |
257 | 5a9fdfec | bellard | extern unsigned long real_host_page_size; |
258 | 5a9fdfec | bellard | extern unsigned long host_page_bits; |
259 | 5a9fdfec | bellard | extern unsigned long host_page_size; |
260 | 5a9fdfec | bellard | extern unsigned long host_page_mask; |
261 | 5a9fdfec | bellard | |
262 | 5a9fdfec | bellard | #define HOST_PAGE_ALIGN(addr) (((addr) + host_page_size - 1) & host_page_mask) |
263 | 5a9fdfec | bellard | |
264 | 5a9fdfec | bellard | /* same as PROT_xxx */
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265 | 5a9fdfec | bellard | #define PAGE_READ 0x0001 |
266 | 5a9fdfec | bellard | #define PAGE_WRITE 0x0002 |
267 | 5a9fdfec | bellard | #define PAGE_EXEC 0x0004 |
268 | 5a9fdfec | bellard | #define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC)
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269 | 5a9fdfec | bellard | #define PAGE_VALID 0x0008 |
270 | 5a9fdfec | bellard | /* original state of the write flag (used when tracking self-modifying
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271 | 5a9fdfec | bellard | code */
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272 | 5a9fdfec | bellard | #define PAGE_WRITE_ORG 0x0010 |
273 | 5a9fdfec | bellard | |
274 | 5a9fdfec | bellard | void page_dump(FILE *f);
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275 | 5a9fdfec | bellard | int page_get_flags(unsigned long address); |
276 | 5a9fdfec | bellard | void page_set_flags(unsigned long start, unsigned long end, int flags); |
277 | 5a9fdfec | bellard | void page_unprotect_range(uint8_t *data, unsigned long data_size); |
278 | 5a9fdfec | bellard | |
279 | 5a9fdfec | bellard | #define SINGLE_CPU_DEFINES
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280 | 5a9fdfec | bellard | #ifdef SINGLE_CPU_DEFINES
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281 | 5a9fdfec | bellard | |
282 | 5a9fdfec | bellard | #if defined(TARGET_I386)
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283 | 5a9fdfec | bellard | |
284 | 5a9fdfec | bellard | #define CPUState CPUX86State
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285 | 5a9fdfec | bellard | #define cpu_init cpu_x86_init
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286 | 5a9fdfec | bellard | #define cpu_exec cpu_x86_exec
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287 | 5a9fdfec | bellard | #define cpu_gen_code cpu_x86_gen_code
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288 | 5a9fdfec | bellard | #define cpu_interrupt cpu_x86_interrupt
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289 | 5a9fdfec | bellard | #define cpu_signal_handler cpu_x86_signal_handler
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290 | 5a9fdfec | bellard | |
291 | 5a9fdfec | bellard | #elif defined(TARGET_ARM)
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292 | 5a9fdfec | bellard | |
293 | 5a9fdfec | bellard | #define CPUState CPUARMState
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294 | 5a9fdfec | bellard | #define cpu_init cpu_arm_init
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295 | 5a9fdfec | bellard | #define cpu_exec cpu_arm_exec
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296 | 5a9fdfec | bellard | #define cpu_gen_code cpu_arm_gen_code
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297 | 5a9fdfec | bellard | #define cpu_interrupt cpu_arm_interrupt
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298 | 5a9fdfec | bellard | #define cpu_signal_handler cpu_arm_signal_handler
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299 | 5a9fdfec | bellard | |
300 | 5a9fdfec | bellard | #else
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301 | 5a9fdfec | bellard | |
302 | 5a9fdfec | bellard | #error unsupported target CPU
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303 | 5a9fdfec | bellard | |
304 | 5a9fdfec | bellard | #endif
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305 | 5a9fdfec | bellard | |
306 | 972ddf78 | bellard | #endif /* SINGLE_CPU_DEFINES */ |
307 | 972ddf78 | bellard | |
308 | 3b0dca51 | bellard | #define DEFAULT_GDBSTUB_PORT 1234 |
309 | 3b0dca51 | bellard | |
310 | 972ddf78 | bellard | void cpu_abort(CPUState *env, const char *fmt, ...); |
311 | e2f22898 | bellard | extern CPUState *cpu_single_env;
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312 | 5a9fdfec | bellard | |
313 | 68a79315 | bellard | #define CPU_INTERRUPT_EXIT 0x01 /* wants exit from main loop */ |
314 | 68a79315 | bellard | #define CPU_INTERRUPT_HARD 0x02 /* hardware interrupt pending */ |
315 | 4690764b | bellard | void cpu_interrupt(CPUState *s, int mask); |
316 | 68a79315 | bellard | |
317 | 4c3a88a2 | bellard | int cpu_breakpoint_insert(CPUState *env, uint32_t pc);
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318 | 4c3a88a2 | bellard | int cpu_breakpoint_remove(CPUState *env, uint32_t pc);
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319 | c33a346e | bellard | void cpu_single_step(CPUState *env, int enabled); |
320 | 4c3a88a2 | bellard | |
321 | 33417e70 | bellard | /* memory API */
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322 | 33417e70 | bellard | |
323 | 33417e70 | bellard | typedef void CPUWriteMemoryFunc(uint32_t addr, uint32_t value); |
324 | 33417e70 | bellard | typedef uint32_t CPUReadMemoryFunc(uint32_t addr);
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325 | 33417e70 | bellard | |
326 | 33417e70 | bellard | void cpu_register_physical_memory(unsigned long start_addr, unsigned long size, |
327 | 33417e70 | bellard | long phys_offset);
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328 | 33417e70 | bellard | int cpu_register_io_memory(int io_index, |
329 | 33417e70 | bellard | CPUReadMemoryFunc **mem_read, |
330 | 33417e70 | bellard | CPUWriteMemoryFunc **mem_write); |
331 | 33417e70 | bellard | |
332 | 3b0dca51 | bellard | /* gdb stub API */
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333 | 3b0dca51 | bellard | extern int gdbstub_fd; |
334 | 3b0dca51 | bellard | CPUState *cpu_gdbstub_get_env(void *opaque);
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335 | 4c3a88a2 | bellard | int cpu_gdbstub(void *opaque, int (*main_loop)(void *opaque), int port); |
336 | 3b0dca51 | bellard | |
337 | 5a9fdfec | bellard | #endif /* CPU_ALL_H */ |