Revision b881fbe9
| b/hw/ioapic.h | ||
|---|---|---|
| 17 | 17 |
* License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 18 | 18 |
*/ |
| 19 | 19 |
|
| 20 |
#ifndef HW_IOAPIC_H |
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| 21 |
#define HW_IOAPIC_H |
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| 22 |
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#define IOAPIC_NUM_PINS 24 |
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| 24 |
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| 20 | 25 |
void ioapic_eoi_broadcast(int vector); |
| 26 |
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| 27 |
#endif /* !HW_IOAPIC_H */ |
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| b/hw/isa.h | ||
|---|---|---|
| 7 | 7 |
#include "memory.h" |
| 8 | 8 |
#include "qdev.h" |
| 9 | 9 |
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| 10 |
#define ISA_NUM_IRQS 16 |
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| 11 |
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| 10 | 12 |
typedef struct ISABus ISABus; |
| 11 | 13 |
typedef struct ISADevice ISADevice; |
| 12 | 14 |
typedef struct ISADeviceInfo ISADeviceInfo; |
| b/hw/pc.c | ||
|---|---|---|
| 88 | 88 |
static struct e820_table e820_table; |
| 89 | 89 |
struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
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| 90 | 90 |
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| 91 |
void isa_irq_handler(void *opaque, int n, int level)
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void gsi_handler(void *opaque, int n, int level)
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| 92 | 92 |
{
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IsaIrqState *isa = (IsaIrqState *)opaque;
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GSIState *s = opaque;
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| 94 | 94 |
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DPRINTF("isa_irqs: %s irq %d\n", level? "raise" : "lower", n);
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if (n < 16) {
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qemu_set_irq(isa->i8259[n], level);
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DPRINTF("pc: %s GSI %d\n", level ? "raising" : "lowering", n);
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if (n < ISA_NUM_IRQS) {
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qemu_set_irq(s->i8259_irq[n], level);
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| 98 | 98 |
} |
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qemu_set_irq(isa->ioapic[n], level);
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qemu_set_irq(s->ioapic_irq[n], level);
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| 100 | 100 |
} |
| 101 | 101 |
|
| 102 | 102 |
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
| ... | ... | |
| 1125 | 1125 |
} |
| 1126 | 1126 |
} |
| 1127 | 1127 |
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| 1128 |
void pc_basic_device_init(qemu_irq *isa_irq,
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void pc_basic_device_init(qemu_irq *gsi,
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| 1129 | 1129 |
ISADevice **rtc_state, |
| 1130 | 1130 |
bool no_vmport) |
| 1131 | 1131 |
{
|
| ... | ... | |
| 1144 | 1144 |
DeviceState *hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL);
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| 1145 | 1145 |
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| 1146 | 1146 |
if (hpet) {
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for (i = 0; i < 24; i++) {
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sysbus_connect_irq(sysbus_from_qdev(hpet), i, isa_irq[i]);
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for (i = 0; i < GSI_NUM_PINS; i++) {
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sysbus_connect_irq(sysbus_from_qdev(hpet), i, gsi[i]);
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| 1149 | 1149 |
} |
| 1150 | 1150 |
rtc_irq = qdev_get_gpio_in(hpet, 0); |
| 1151 | 1151 |
} |
| b/hw/pc.h | ||
|---|---|---|
| 8 | 8 |
#include "fdc.h" |
| 9 | 9 |
#include "net.h" |
| 10 | 10 |
#include "memory.h" |
| 11 |
#include "ioapic.h" |
|
| 11 | 12 |
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| 12 | 13 |
/* PC-style peripherals (also used by other machines). */ |
| 13 | 14 |
|
| ... | ... | |
| 70 | 71 |
void pic_info(Monitor *mon); |
| 71 | 72 |
void irq_info(Monitor *mon); |
| 72 | 73 |
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/* ISA */ |
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#define IOAPIC_NUM_PINS 0x18 |
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/* Global System Interrupts */ |
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typedef struct isa_irq_state {
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qemu_irq *i8259; |
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qemu_irq ioapic[IOAPIC_NUM_PINS]; |
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} IsaIrqState; |
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#define GSI_NUM_PINS IOAPIC_NUM_PINS |
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| 80 | 77 |
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void isa_irq_handler(void *opaque, int n, int level); |
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typedef struct GSIState {
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qemu_irq *i8259_irq; |
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qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; |
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} GSIState; |
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void gsi_handler(void *opaque, int n, int level); |
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| 82 | 84 |
|
| 83 | 85 |
/* i8254.c */ |
| 84 | 86 |
|
| ... | ... | |
| 141 | 143 |
MemoryRegion **ram_memory); |
| 142 | 144 |
qemu_irq *pc_allocate_cpu_irq(void); |
| 143 | 145 |
void pc_vga_init(PCIBus *pci_bus); |
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void pc_basic_device_init(qemu_irq *isa_irq,
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void pc_basic_device_init(qemu_irq *gsi,
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| 145 | 147 |
ISADevice **rtc_state, |
| 146 | 148 |
bool no_vmport); |
| 147 | 149 |
void pc_init_ne2k_isa(NICInfo *nd); |
| b/hw/pc_piix.c | ||
|---|---|---|
| 53 | 53 |
static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
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| 54 | 54 |
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
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| 55 | 55 |
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static void ioapic_init(IsaIrqState *isa_irq_state)
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static void ioapic_init(GSIState *gsi_state)
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{
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DeviceState *dev; |
| 59 | 59 |
SysBusDevice *d; |
| ... | ... | |
| 65 | 65 |
sysbus_mmio_map(d, 0, 0xfec00000); |
| 66 | 66 |
|
| 67 | 67 |
for (i = 0; i < IOAPIC_NUM_PINS; i++) {
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isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
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gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i);
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| 69 | 69 |
} |
| 70 | 70 |
} |
| 71 | 71 |
|
| ... | ... | |
| 87 | 87 |
PCII440FXState *i440fx_state; |
| 88 | 88 |
int piix3_devfn = -1; |
| 89 | 89 |
qemu_irq *cpu_irq; |
| 90 |
qemu_irq *isa_irq;
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qemu_irq *gsi;
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| 91 | 91 |
qemu_irq *i8259; |
| 92 | 92 |
qemu_irq *cmos_s3; |
| 93 | 93 |
qemu_irq *smi_irq; |
| 94 |
IsaIrqState *isa_irq_state;
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GSIState *gsi_state;
|
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| 95 | 95 |
DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
| 96 | 96 |
BusState *idebus[MAX_IDE_BUS]; |
| 97 | 97 |
ISADevice *rtc_state; |
| ... | ... | |
| 130 | 130 |
pci_enabled ? rom_memory : system_memory, &ram_memory); |
| 131 | 131 |
} |
| 132 | 132 |
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isa_irq_state = g_malloc0(sizeof(*isa_irq_state));
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isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
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gsi_state = g_malloc0(sizeof(*gsi_state));
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gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
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| 135 | 135 |
|
| 136 | 136 |
if (pci_enabled) {
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pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq,
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pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, gsi,
|
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| 138 | 138 |
system_memory, system_io, ram_size, |
| 139 | 139 |
below_4g_mem_size, |
| 140 | 140 |
0x100000000ULL - below_4g_mem_size, |
| ... | ... | |
| 149 | 149 |
isa_bus_new(NULL, system_io); |
| 150 | 150 |
no_hpet = 1; |
| 151 | 151 |
} |
| 152 |
isa_bus_irqs(isa_irq);
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| 152 |
isa_bus_irqs(gsi);
|
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| 153 | 153 |
|
| 154 | 154 |
if (!xen_enabled()) {
|
| 155 | 155 |
cpu_irq = pc_allocate_cpu_irq(); |
| ... | ... | |
| 158 | 158 |
i8259 = xen_interrupt_controller_init(); |
| 159 | 159 |
} |
| 160 | 160 |
|
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isa_irq_state->i8259 = i8259;
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gsi_state->i8259_irq = i8259;
|
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| 162 | 162 |
if (pci_enabled) {
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ioapic_init(isa_irq_state);
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ioapic_init(gsi_state);
|
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| 164 | 164 |
} |
| 165 | 165 |
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| 166 |
pc_register_ferr_irq(isa_get_irq(13));
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| 166 |
pc_register_ferr_irq(gsi[13]);
|
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| 167 | 167 |
|
| 168 | 168 |
pc_vga_init(pci_enabled? pci_bus: NULL); |
| 169 | 169 |
|
| ... | ... | |
| 172 | 172 |
} |
| 173 | 173 |
|
| 174 | 174 |
/* init basic PC hardware */ |
| 175 |
pc_basic_device_init(isa_irq, &rtc_state, xen_enabled());
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| 175 |
pc_basic_device_init(gsi, &rtc_state, xen_enabled());
|
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| 176 | 176 |
|
| 177 | 177 |
for(i = 0; i < nb_nics; i++) {
|
| 178 | 178 |
NICInfo *nd = &nd_table[i]; |
| ... | ... | |
| 202 | 202 |
} |
| 203 | 203 |
} |
| 204 | 204 |
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| 205 |
audio_init(isa_irq, pci_enabled ? pci_bus : NULL);
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| 205 |
audio_init(gsi, pci_enabled ? pci_bus : NULL);
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| 206 | 206 |
|
| 207 | 207 |
pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, |
| 208 | 208 |
idebus[0], idebus[1], rtc_state); |
| ... | ... | |
| 222 | 222 |
smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); |
| 223 | 223 |
/* TODO: Populate SPD eeprom data. */ |
| 224 | 224 |
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, |
| 225 |
isa_get_irq(9), *cmos_s3, *smi_irq,
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| 225 |
gsi[9], *cmos_s3, *smi_irq,
|
|
| 226 | 226 |
kvm_enabled()); |
| 227 | 227 |
smbus_eeprom_init(smbus, 8, NULL, 0); |
| 228 | 228 |
} |
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