Revision b8f7a738 hw/pl050.c
| b/hw/pl050.c | ||
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| 12 | 12 |
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typedef struct {
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SysBusDevice busdev; |
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MemoryRegion iomem; |
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void *dev; |
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uint32_t cr; |
| 17 | 18 |
uint32_t clk; |
| ... | ... | |
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qemu_set_irq(s->irq, raise); |
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} |
| 59 | 60 |
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static uint32_t pl050_read(void *opaque, target_phys_addr_t offset) |
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static uint64_t pl050_read(void *opaque, target_phys_addr_t offset, |
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unsigned size) |
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{
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pl050_state *s = (pl050_state *)opaque; |
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if (offset >= 0xfe0 && offset < 0x1000) |
| ... | ... | |
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} |
| 100 | 102 |
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static void pl050_write(void *opaque, target_phys_addr_t offset, |
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uint32_t value)
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uint64_t value, unsigned size)
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{
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pl050_state *s = (pl050_state *)opaque; |
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switch (offset >> 2) {
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| ... | ... | |
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hw_error("pl050_write: Bad offset %x\n", (int)offset);
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} |
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} |
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static CPUReadMemoryFunc * const pl050_readfn[] = {
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pl050_read, |
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pl050_read, |
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pl050_read |
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}; |
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static CPUWriteMemoryFunc * const pl050_writefn[] = {
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pl050_write, |
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pl050_write, |
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pl050_write |
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static const MemoryRegionOps pl050_ops = {
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.read = pl050_read, |
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.write = pl050_write, |
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.endianness = DEVICE_NATIVE_ENDIAN, |
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}; |
| 138 | 134 |
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static int pl050_init(SysBusDevice *dev, int is_mouse) |
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{
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pl050_state *s = FROM_SYSBUS(pl050_state, dev); |
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int iomemtype; |
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iomemtype = cpu_register_io_memory(pl050_readfn, |
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pl050_writefn, s, |
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DEVICE_NATIVE_ENDIAN); |
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sysbus_init_mmio(dev, 0x1000, iomemtype); |
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memory_region_init_io(&s->iomem, &pl050_ops, s, "pl050", 0x1000); |
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sysbus_init_mmio_region(dev, &s->iomem); |
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| 148 | 141 |
sysbus_init_irq(dev, &s->irq); |
| 149 | 142 |
s->is_mouse = is_mouse; |
| 150 | 143 |
if (s->is_mouse) |
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