Revision b946a153 hw/pcnet.c

b/hw/pcnet.c
75 75
    uint8_t buffer[4096];
76 76
    int tx_busy;
77 77
    qemu_irq irq;
78
    qemu_irq *reset_irq;
78 79
    void (*phys_mem_read)(void *dma_opaque, target_phys_addr_t addr,
79 80
                         uint8_t *buf, int len, int do_bswap);
80 81
    void (*phys_mem_write)(void *dma_opaque, target_phys_addr_t addr,
......
1929 1930
    return 0;
1930 1931
}
1931 1932

  
1932
static void pcnet_common_init(PCNetState *d, NICInfo *nd)
1933
static void pcnet_common_cleanup(PCNetState *d)
1934
{
1935
    unregister_savevm("pcnet", d);
1936

  
1937
    qemu_del_timer(d->poll_timer);
1938
    qemu_free_timer(d->poll_timer);
1939
}
1940

  
1941
static void pcnet_common_init(PCNetState *d, NICInfo *nd, NetCleanup *cleanup)
1933 1942
{
1934 1943
    d->poll_timer = qemu_new_timer(vm_clock, pcnet_poll_timer, d);
1935 1944

  
......
1937 1946

  
1938 1947
    if (nd && nd->vlan) {
1939 1948
        d->vc = qemu_new_vlan_client(nd->vlan, nd->model, nd->name,
1940
                                     pcnet_receive, pcnet_can_receive, d);
1949
                                     pcnet_receive, pcnet_can_receive,
1950
                                     cleanup, d);
1941 1951

  
1942 1952
        qemu_format_nic_info_str(d->vc, d->nd->macaddr);
1943 1953
    } else {
......
1985 1995
    cpu_physical_memory_read(addr, buf, len);
1986 1996
}
1987 1997

  
1998
static void pci_pcnet_cleanup(VLANClientState *vc)
1999
{
2000
    PCNetState *d = vc->opaque;
2001

  
2002
    pcnet_common_cleanup(d);
2003
}
2004

  
2005
static int pci_pcnet_uninit(PCIDevice *dev)
2006
{
2007
    PCNetState *d = (PCNetState *)dev;
2008

  
2009
    cpu_unregister_io_memory(d->mmio_index);
2010

  
2011
    return 0;
2012
}
2013

  
1988 2014
PCIDevice *pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn)
1989 2015
{
1990 2016
    PCNetState *d;
......
1997 2023

  
1998 2024
    d = (PCNetState *)pci_register_device(bus, "PCNet", sizeof(PCNetState),
1999 2025
                                          devfn, NULL, NULL);
2000

  
2026
    d->dev.unregister = pci_pcnet_uninit;
2001 2027
    pci_conf = d->dev.config;
2002 2028

  
2003 2029
    pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_AMD);
......
2031 2057
    d->phys_mem_write = pci_physical_memory_write;
2032 2058
    d->pci_dev = &d->dev;
2033 2059

  
2034
    pcnet_common_init(d, nd);
2060
    pcnet_common_init(d, nd, pci_pcnet_cleanup);
2061

  
2035 2062
    return (PCIDevice *)d;
2036 2063
}
2037 2064

  
......
2081 2108
    NULL,
2082 2109
};
2083 2110

  
2111
static void lance_cleanup(VLANClientState *vc)
2112
{
2113
    PCNetState *d = vc->opaque;
2114

  
2115
    pcnet_common_cleanup(d);
2116

  
2117
    qemu_free_irqs(d->reset_irq);
2118

  
2119
    cpu_unregister_io_memory(d->mmio_index);
2120

  
2121
    qemu_free(d);
2122
}
2123

  
2084 2124
void lance_init(NICInfo *nd, target_phys_addr_t leaddr, void *dma_opaque,
2085 2125
                qemu_irq irq, qemu_irq *reset)
2086 2126
{
2087 2127
    PCNetState *d;
2088
    int lance_io_memory;
2089 2128

  
2090 2129
    qemu_check_nic_model(nd, "lance");
2091 2130

  
2092 2131
    d = qemu_mallocz(sizeof(PCNetState));
2093 2132

  
2094
    lance_io_memory =
2133
    d->mmio_index =
2095 2134
        cpu_register_io_memory(0, lance_mem_read, lance_mem_write, d);
2096 2135

  
2097 2136
    d->dma_opaque = dma_opaque;
2098 2137

  
2099
    *reset = *qemu_allocate_irqs(parent_lance_reset, d, 1);
2138
    d->reset_irq = qemu_allocate_irqs(parent_lance_reset, d, 1);
2139
    *reset = *d->reset_irq;
2100 2140

  
2101
    cpu_register_physical_memory(leaddr, 4, lance_io_memory);
2141
    cpu_register_physical_memory(leaddr, 4, d->mmio_index);
2102 2142

  
2103 2143
    d->irq = irq;
2104 2144
    d->phys_mem_read = ledma_memory_read;
2105 2145
    d->phys_mem_write = ledma_memory_write;
2106 2146

  
2107
    pcnet_common_init(d, nd);
2147
    pcnet_common_init(d, nd, lance_cleanup);
2108 2148
}
2109 2149
#endif /* TARGET_SPARC */

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