Archipelago » qemu

        tcg_out_qemu_st(s, args, 3);

        break;

    case INDEX_op_mulu2_i32:

        tcg_out_modrm(s, OPC_GRP3_Ev, EXT3_MUL, args[3]);

        break;

            tgen_arithr(s, ARITH_SBB, args[1], args[5]);

        }

        break;

#else /* TCG_TARGET_REG_BITS == 64 */

    case INDEX_op_movi_i64:

        tcg_out_movi(s, TCG_TYPE_I64, args[0], args[1]);

    { INDEX_op_movcond_i32, { "r", "r", "ri", "r", "0" } },

#endif

    { INDEX_op_mulu2_i32, { "a", "d", "a", "r" } },

    { INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } },

    { INDEX_op_sub2_i32, { "r", "r", "0", "1", "ri", "ri" } },

    { INDEX_op_brcond2_i32, { "r", "r", "ri", "ri" } },

    { INDEX_op_setcond2_i32, { "r", "r", "r", "ri", "ri" } },

#else

#define TCG_TARGET_HAS_nor_i32          0

#define TCG_TARGET_HAS_deposit_i32      1

#define TCG_TARGET_HAS_movcond_i32      1

#if TCG_TARGET_REG_BITS == 64

#define TCG_TARGET_HAS_div2_i64         1

#define TCG_TARGET_HAS_nor_i64          0

#define TCG_TARGET_HAS_deposit_i64      1

#define TCG_TARGET_HAS_movcond_i64      1

#endif

#define TCG_TARGET_deposit_i32_valid(ofs, len) \