Revision bc265319 target-sparc/translate.c
| b/target-sparc/translate.c | ||
|---|---|---|
| 294 | 294 |
tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31)); |
| 295 | 295 |
tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1); |
| 296 | 296 |
r_const = tcg_const_i32(TT_TOVF); |
| 297 |
gen_helper_raise_exception(r_const); |
|
| 297 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 298 | 298 |
tcg_temp_free_i32(r_const); |
| 299 | 299 |
gen_set_label(l1); |
| 300 | 300 |
tcg_temp_free(r_temp); |
| ... | ... | |
| 310 | 310 |
tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x3); |
| 311 | 311 |
tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1); |
| 312 | 312 |
r_const = tcg_const_i32(TT_TOVF); |
| 313 |
gen_helper_raise_exception(r_const); |
|
| 313 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 314 | 314 |
tcg_temp_free_i32(r_const); |
| 315 | 315 |
gen_set_label(l1); |
| 316 | 316 |
} |
| ... | ... | |
| 492 | 492 |
tcg_gen_andi_tl(r_temp, r_temp, (1ULL << 31)); |
| 493 | 493 |
tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1); |
| 494 | 494 |
r_const = tcg_const_i32(TT_TOVF); |
| 495 |
gen_helper_raise_exception(r_const); |
|
| 495 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 496 | 496 |
tcg_temp_free_i32(r_const); |
| 497 | 497 |
gen_set_label(l1); |
| 498 | 498 |
tcg_temp_free(r_temp); |
| ... | ... | |
| 719 | 719 |
l1 = gen_new_label(); |
| 720 | 720 |
tcg_gen_brcondi_tl(TCG_COND_NE, divisor, 0, l1); |
| 721 | 721 |
r_const = tcg_const_i32(TT_DIV_ZERO); |
| 722 |
gen_helper_raise_exception(r_const); |
|
| 722 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 723 | 723 |
tcg_temp_free_i32(r_const); |
| 724 | 724 |
gen_set_label(l1); |
| 725 | 725 |
} |
| ... | ... | |
| 1549 | 1549 |
tcg_gen_andi_tl(cpu_fsr, cpu_fsr, FSR_FTT_NMASK); |
| 1550 | 1550 |
tcg_gen_ori_tl(cpu_fsr, cpu_fsr, fsr_flags); |
| 1551 | 1551 |
r_const = tcg_const_i32(TT_FP_EXCP); |
| 1552 |
gen_helper_raise_exception(r_const); |
|
| 1552 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 1553 | 1553 |
tcg_temp_free_i32(r_const); |
| 1554 | 1554 |
} |
| 1555 | 1555 |
|
| ... | ... | |
| 1561 | 1561 |
|
| 1562 | 1562 |
save_state(dc, r_cond); |
| 1563 | 1563 |
r_const = tcg_const_i32(TT_NFPU_INSN); |
| 1564 |
gen_helper_raise_exception(r_const); |
|
| 1564 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 1565 | 1565 |
tcg_temp_free_i32(r_const); |
| 1566 | 1566 |
dc->is_br = 1; |
| 1567 | 1567 |
return 1; |
| ... | ... | |
| 2038 | 2038 |
gen_helper_shutdown(); |
| 2039 | 2039 |
|
| 2040 | 2040 |
} else {
|
| 2041 |
gen_helper_raise_exception(cpu_tmp32); |
|
| 2041 |
gen_helper_raise_exception(cpu_env, cpu_tmp32);
|
|
| 2042 | 2042 |
} |
| 2043 | 2043 |
} else if (cond != 0) {
|
| 2044 | 2044 |
TCGv r_cond = tcg_temp_new(); |
| ... | ... | |
| 2068 | 2068 |
tcg_gen_andi_tl(cpu_dst, cpu_dst, V8_TRAP_MASK); |
| 2069 | 2069 |
tcg_gen_addi_tl(cpu_dst, cpu_dst, TT_TRAP); |
| 2070 | 2070 |
tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_dst); |
| 2071 |
gen_helper_raise_exception(cpu_tmp32); |
|
| 2071 |
gen_helper_raise_exception(cpu_env, cpu_tmp32);
|
|
| 2072 | 2072 |
|
| 2073 | 2073 |
gen_set_label(l1); |
| 2074 | 2074 |
tcg_temp_free(r_cond); |
| ... | ... | |
| 4931 | 4931 |
|
| 4932 | 4932 |
save_state(dc, cpu_cond); |
| 4933 | 4933 |
r_const = tcg_const_i32(TT_ILL_INSN); |
| 4934 |
gen_helper_raise_exception(r_const); |
|
| 4934 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 4935 | 4935 |
tcg_temp_free_i32(r_const); |
| 4936 | 4936 |
dc->is_br = 1; |
| 4937 | 4937 |
} |
| ... | ... | |
| 4942 | 4942 |
|
| 4943 | 4943 |
save_state(dc, cpu_cond); |
| 4944 | 4944 |
r_const = tcg_const_i32(TT_UNIMP_FLUSH); |
| 4945 |
gen_helper_raise_exception(r_const); |
|
| 4945 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 4946 | 4946 |
tcg_temp_free_i32(r_const); |
| 4947 | 4947 |
dc->is_br = 1; |
| 4948 | 4948 |
} |
| ... | ... | |
| 4954 | 4954 |
|
| 4955 | 4955 |
save_state(dc, cpu_cond); |
| 4956 | 4956 |
r_const = tcg_const_i32(TT_PRIV_INSN); |
| 4957 |
gen_helper_raise_exception(r_const); |
|
| 4957 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 4958 | 4958 |
tcg_temp_free_i32(r_const); |
| 4959 | 4959 |
dc->is_br = 1; |
| 4960 | 4960 |
} |
| ... | ... | |
| 4979 | 4979 |
|
| 4980 | 4980 |
save_state(dc, cpu_cond); |
| 4981 | 4981 |
r_const = tcg_const_i32(TT_NCP_INSN); |
| 4982 |
gen_helper_raise_exception(r_const); |
|
| 4982 |
gen_helper_raise_exception(cpu_env, r_const);
|
|
| 4983 | 4983 |
tcg_temp_free(r_const); |
| 4984 | 4984 |
dc->is_br = 1; |
| 4985 | 4985 |
} |
| ... | ... | |
| 5036 | 5036 |
if (bp->pc == dc->pc) {
|
| 5037 | 5037 |
if (dc->pc != pc_start) |
| 5038 | 5038 |
save_state(dc, cpu_cond); |
| 5039 |
gen_helper_debug(); |
|
| 5039 |
gen_helper_debug(cpu_env);
|
|
| 5040 | 5040 |
tcg_gen_exit_tb(0); |
| 5041 | 5041 |
dc->is_br = 1; |
| 5042 | 5042 |
goto exit_gen_loop; |
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