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1 80cabfad bellard
/*
2 80cabfad bellard
 * QEMU PC System Emulator
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 *
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 * Copyright (c) 2003-2004 Fabrice Bellard
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 80cabfad bellard
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
24 87ecb68b pbrook
#include "hw.h"
25 87ecb68b pbrook
#include "pc.h"
26 87ecb68b pbrook
#include "fdc.h"
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#include "pci.h"
28 87ecb68b pbrook
#include "block.h"
29 87ecb68b pbrook
#include "sysemu.h"
30 87ecb68b pbrook
#include "audio/audio.h"
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#include "net.h"
32 87ecb68b pbrook
#include "smbus.h"
33 87ecb68b pbrook
#include "boards.h"
34 376253ec aliguori
#include "monitor.h"
35 3cce6243 blueswir1
#include "fw_cfg.h"
36 16b29ae1 aliguori
#include "hpet_emul.h"
37 9dd986cc Richard W.M. Jones
#include "watchdog.h"
38 b6f6e3d3 aliguori
#include "smbios.h"
39 ec82026c Gerd Hoffmann
#include "ide.h"
40 ca20cf32 Blue Swirl
#include "loader.h"
41 ca20cf32 Blue Swirl
#include "elf.h"
42 80cabfad bellard
43 b41a2cd1 bellard
/* output Bochs bios info messages */
44 b41a2cd1 bellard
//#define DEBUG_BIOS
45 b41a2cd1 bellard
46 f16408df Alexander Graf
/* Show multiboot debug output */
47 f16408df Alexander Graf
//#define DEBUG_MULTIBOOT
48 f16408df Alexander Graf
49 80cabfad bellard
#define BIOS_FILENAME "bios.bin"
50 80cabfad bellard
#define VGABIOS_FILENAME "vgabios.bin"
51 de9258a8 bellard
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
52 80cabfad bellard
53 7fb4fdcf balrog
#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
54 7fb4fdcf balrog
55 a80274c3 pbrook
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
56 a80274c3 pbrook
#define ACPI_DATA_SIZE       0x10000
57 3cce6243 blueswir1
#define BIOS_CFG_IOPORT 0x510
58 8a92ea2f aliguori
#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
59 b6f6e3d3 aliguori
#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
60 6b35e7bf Jes Sorensen
#define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
61 80cabfad bellard
62 e4bcb14c ths
#define MAX_IDE_BUS 2
63 e4bcb14c ths
64 c227f099 Anthony Liguori
static fdctrl_t *floppy_controller;
65 b0a21b53 bellard
static RTCState *rtc_state;
66 ec844b96 bellard
static PITState *pit;
67 0a3bacf3 Juan Quintela
static PCII440FXState *i440fx_state;
68 80cabfad bellard
69 1452411b Avi Kivity
typedef struct isa_irq_state {
70 1452411b Avi Kivity
    qemu_irq *i8259;
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    qemu_irq *ioapic;
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} IsaIrqState;
73 1452411b Avi Kivity
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static void isa_irq_handler(void *opaque, int n, int level)
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{
76 1452411b Avi Kivity
    IsaIrqState *isa = (IsaIrqState *)opaque;
77 1452411b Avi Kivity
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    if (n < 16) {
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        qemu_set_irq(isa->i8259[n], level);
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    }
81 2c8d9340 Gerd Hoffmann
    if (isa->ioapic)
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        qemu_set_irq(isa->ioapic[n], level);
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};
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85 b41a2cd1 bellard
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
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{
87 80cabfad bellard
}
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/* MSDOS compatibility mode FPU exception support */
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static qemu_irq ferr_irq;
91 f929aad6 bellard
/* XXX: add IGNNE support */
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void cpu_set_ferr(CPUX86State *s)
93 f929aad6 bellard
{
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    qemu_irq_raise(ferr_irq);
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}
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
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{
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    qemu_irq_lower(ferr_irq);
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}
101 f929aad6 bellard
102 28ab0e2e bellard
/* TSC handling */
103 28ab0e2e bellard
uint64_t cpu_get_tsc(CPUX86State *env)
104 28ab0e2e bellard
{
105 4a1418e0 Anthony Liguori
    return cpu_get_ticks();
106 28ab0e2e bellard
}
107 28ab0e2e bellard
108 a5954d5c bellard
/* SMM support */
109 a5954d5c bellard
void cpu_smm_update(CPUState *env)
110 a5954d5c bellard
{
111 a5954d5c bellard
    if (i440fx_state && env == first_cpu)
112 a5954d5c bellard
        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
113 a5954d5c bellard
}
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116 3de388f6 bellard
/* IRQ handling */
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int cpu_get_pic_interrupt(CPUState *env)
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{
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    int intno;
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    intno = apic_get_interrupt(env);
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    if (intno >= 0) {
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        /* set irq request if a PIC irq is still pending */
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        /* XXX: improve that */
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        pic_update_irq(isa_pic);
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        return intno;
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    }
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    /* read the irq from the PIC */
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    if (!apic_accept_pic_intr(env))
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        return -1;
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    intno = pic_read_irq(isa_pic);
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    return intno;
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}
135 3de388f6 bellard
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static void pic_irq_request(void *opaque, int irq, int level)
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{
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    CPUState *env = first_cpu;
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    if (env->apic_state) {
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        while (env) {
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            if (apic_accept_pic_intr(env))
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                apic_deliver_pic_intr(env, level);
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            env = env->next_cpu;
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        }
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    } else {
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        if (level)
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            cpu_interrupt(env, CPU_INTERRUPT_HARD);
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        else
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            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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    }
152 3de388f6 bellard
}
153 3de388f6 bellard
154 b0a21b53 bellard
/* PC cmos mappings */
155 b0a21b53 bellard
156 80cabfad bellard
#define REG_EQUIPMENT_BYTE          0x14
157 80cabfad bellard
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static int cmos_get_fd_drive_type(int fd0)
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{
160 777428f2 bellard
    int val;
161 777428f2 bellard
162 777428f2 bellard
    switch (fd0) {
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    case 0:
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        /* 1.44 Mb 3"5 drive */
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        val = 4;
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        break;
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    case 1:
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        /* 2.88 Mb 3"5 drive */
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        val = 5;
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        break;
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    case 2:
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        /* 1.2 Mb 5"5 drive */
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        val = 2;
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        break;
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    default:
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        val = 0;
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        break;
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    }
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    return val;
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}
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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
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{
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    RTCState *s = rtc_state;
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    int cylinders, heads, sectors;
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    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
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    rtc_set_memory(s, type_ofs, 47);
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    rtc_set_memory(s, info_ofs, cylinders);
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    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 2, heads);
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    rtc_set_memory(s, info_ofs + 3, 0xff);
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    rtc_set_memory(s, info_ofs + 4, 0xff);
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    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
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    rtc_set_memory(s, info_ofs + 6, cylinders);
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    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 8, sectors);
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}
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/* convert boot_device letter to something recognizable by the bios */
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static int boot_device2nibble(char boot_device)
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{
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    switch(boot_device) {
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    case 'a':
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    case 'b':
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        return 0x01; /* floppy boot */
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    case 'c':
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        return 0x02; /* hard drive boot */
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    case 'd':
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        return 0x03; /* CD-ROM boot */
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    case 'n':
211 6ac0e82d balrog
        return 0x04; /* Network boot */
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    }
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    return 0;
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}
215 6ac0e82d balrog
216 0ecdffbb aurel32
/* copy/pasted from cmos_init, should be made a general function
217 0ecdffbb aurel32
 and used there as well */
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static int pc_boot_set(void *opaque, const char *boot_device)
219 0ecdffbb aurel32
{
220 376253ec aliguori
    Monitor *mon = cur_mon;
221 0ecdffbb aurel32
#define PC_MAX_BOOT_DEVICES 3
222 3b4366de blueswir1
    RTCState *s = (RTCState *)opaque;
223 0ecdffbb aurel32
    int nbds, bds[3] = { 0, };
224 0ecdffbb aurel32
    int i;
225 0ecdffbb aurel32
226 0ecdffbb aurel32
    nbds = strlen(boot_device);
227 0ecdffbb aurel32
    if (nbds > PC_MAX_BOOT_DEVICES) {
228 376253ec aliguori
        monitor_printf(mon, "Too many boot devices for PC\n");
229 0ecdffbb aurel32
        return(1);
230 0ecdffbb aurel32
    }
231 0ecdffbb aurel32
    for (i = 0; i < nbds; i++) {
232 0ecdffbb aurel32
        bds[i] = boot_device2nibble(boot_device[i]);
233 0ecdffbb aurel32
        if (bds[i] == 0) {
234 376253ec aliguori
            monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
235 376253ec aliguori
                           boot_device[i]);
236 0ecdffbb aurel32
            return(1);
237 0ecdffbb aurel32
        }
238 0ecdffbb aurel32
    }
239 0ecdffbb aurel32
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
240 0ecdffbb aurel32
    rtc_set_memory(s, 0x38, (bds[2] << 4));
241 0ecdffbb aurel32
    return(0);
242 0ecdffbb aurel32
}
243 0ecdffbb aurel32
244 ba6c2377 bellard
/* hd_table must contain 4 block drivers */
245 c227f099 Anthony Liguori
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
246 f455e98c Gerd Hoffmann
                      const char *boot_device, DriveInfo **hd_table)
247 80cabfad bellard
{
248 b0a21b53 bellard
    RTCState *s = rtc_state;
249 28c5af54 j_mayer
    int nbds, bds[3] = { 0, };
250 80cabfad bellard
    int val;
251 b41a2cd1 bellard
    int fd0, fd1, nb;
252 ba6c2377 bellard
    int i;
253 b0a21b53 bellard
254 b0a21b53 bellard
    /* various important CMOS locations needed by PC/Bochs bios */
255 80cabfad bellard
256 80cabfad bellard
    /* memory size */
257 333190eb bellard
    val = 640; /* base memory in K */
258 333190eb bellard
    rtc_set_memory(s, 0x15, val);
259 333190eb bellard
    rtc_set_memory(s, 0x16, val >> 8);
260 333190eb bellard
261 80cabfad bellard
    val = (ram_size / 1024) - 1024;
262 80cabfad bellard
    if (val > 65535)
263 80cabfad bellard
        val = 65535;
264 b0a21b53 bellard
    rtc_set_memory(s, 0x17, val);
265 b0a21b53 bellard
    rtc_set_memory(s, 0x18, val >> 8);
266 b0a21b53 bellard
    rtc_set_memory(s, 0x30, val);
267 b0a21b53 bellard
    rtc_set_memory(s, 0x31, val >> 8);
268 80cabfad bellard
269 00f82b8a aurel32
    if (above_4g_mem_size) {
270 00f82b8a aurel32
        rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
271 00f82b8a aurel32
        rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
272 00f82b8a aurel32
        rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
273 00f82b8a aurel32
    }
274 00f82b8a aurel32
275 9da98861 bellard
    if (ram_size > (16 * 1024 * 1024))
276 9da98861 bellard
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
277 9da98861 bellard
    else
278 9da98861 bellard
        val = 0;
279 80cabfad bellard
    if (val > 65535)
280 80cabfad bellard
        val = 65535;
281 b0a21b53 bellard
    rtc_set_memory(s, 0x34, val);
282 b0a21b53 bellard
    rtc_set_memory(s, 0x35, val >> 8);
283 3b46e624 ths
284 298e01b6 aurel32
    /* set the number of CPU */
285 298e01b6 aurel32
    rtc_set_memory(s, 0x5f, smp_cpus - 1);
286 298e01b6 aurel32
287 6ac0e82d balrog
    /* set boot devices, and disable floppy signature check if requested */
288 28c5af54 j_mayer
#define PC_MAX_BOOT_DEVICES 3
289 28c5af54 j_mayer
    nbds = strlen(boot_device);
290 28c5af54 j_mayer
    if (nbds > PC_MAX_BOOT_DEVICES) {
291 28c5af54 j_mayer
        fprintf(stderr, "Too many boot devices for PC\n");
292 28c5af54 j_mayer
        exit(1);
293 28c5af54 j_mayer
    }
294 28c5af54 j_mayer
    for (i = 0; i < nbds; i++) {
295 28c5af54 j_mayer
        bds[i] = boot_device2nibble(boot_device[i]);
296 28c5af54 j_mayer
        if (bds[i] == 0) {
297 28c5af54 j_mayer
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
298 28c5af54 j_mayer
                    boot_device[i]);
299 28c5af54 j_mayer
            exit(1);
300 28c5af54 j_mayer
        }
301 28c5af54 j_mayer
    }
302 28c5af54 j_mayer
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
303 28c5af54 j_mayer
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
304 80cabfad bellard
305 b41a2cd1 bellard
    /* floppy type */
306 b41a2cd1 bellard
307 baca51fa bellard
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
308 baca51fa bellard
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
309 80cabfad bellard
310 777428f2 bellard
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
311 b0a21b53 bellard
    rtc_set_memory(s, 0x10, val);
312 3b46e624 ths
313 b0a21b53 bellard
    val = 0;
314 b41a2cd1 bellard
    nb = 0;
315 80cabfad bellard
    if (fd0 < 3)
316 80cabfad bellard
        nb++;
317 80cabfad bellard
    if (fd1 < 3)
318 80cabfad bellard
        nb++;
319 80cabfad bellard
    switch (nb) {
320 80cabfad bellard
    case 0:
321 80cabfad bellard
        break;
322 80cabfad bellard
    case 1:
323 b0a21b53 bellard
        val |= 0x01; /* 1 drive, ready for boot */
324 80cabfad bellard
        break;
325 80cabfad bellard
    case 2:
326 b0a21b53 bellard
        val |= 0x41; /* 2 drives, ready for boot */
327 80cabfad bellard
        break;
328 80cabfad bellard
    }
329 b0a21b53 bellard
    val |= 0x02; /* FPU is there */
330 b0a21b53 bellard
    val |= 0x04; /* PS/2 mouse installed */
331 b0a21b53 bellard
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
332 b0a21b53 bellard
333 ba6c2377 bellard
    /* hard drives */
334 ba6c2377 bellard
335 ba6c2377 bellard
    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
336 ba6c2377 bellard
    if (hd_table[0])
337 f455e98c Gerd Hoffmann
        cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
338 5fafdf24 ths
    if (hd_table[1])
339 f455e98c Gerd Hoffmann
        cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
340 ba6c2377 bellard
341 ba6c2377 bellard
    val = 0;
342 40b6ecc6 bellard
    for (i = 0; i < 4; i++) {
343 ba6c2377 bellard
        if (hd_table[i]) {
344 46d4767d bellard
            int cylinders, heads, sectors, translation;
345 46d4767d bellard
            /* NOTE: bdrv_get_geometry_hint() returns the physical
346 46d4767d bellard
                geometry.  It is always such that: 1 <= sects <= 63, 1
347 46d4767d bellard
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
348 46d4767d bellard
                geometry can be different if a translation is done. */
349 f455e98c Gerd Hoffmann
            translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
350 46d4767d bellard
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
351 f455e98c Gerd Hoffmann
                bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, &sectors);
352 46d4767d bellard
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
353 46d4767d bellard
                    /* No translation. */
354 46d4767d bellard
                    translation = 0;
355 46d4767d bellard
                } else {
356 46d4767d bellard
                    /* LBA translation. */
357 46d4767d bellard
                    translation = 1;
358 46d4767d bellard
                }
359 40b6ecc6 bellard
            } else {
360 46d4767d bellard
                translation--;
361 ba6c2377 bellard
            }
362 ba6c2377 bellard
            val |= translation << (i * 2);
363 ba6c2377 bellard
        }
364 40b6ecc6 bellard
    }
365 ba6c2377 bellard
    rtc_set_memory(s, 0x39, val);
366 80cabfad bellard
}
367 80cabfad bellard
368 59b8ad81 bellard
void ioport_set_a20(int enable)
369 59b8ad81 bellard
{
370 59b8ad81 bellard
    /* XXX: send to all CPUs ? */
371 59b8ad81 bellard
    cpu_x86_set_a20(first_cpu, enable);
372 59b8ad81 bellard
}
373 59b8ad81 bellard
374 59b8ad81 bellard
int ioport_get_a20(void)
375 59b8ad81 bellard
{
376 59b8ad81 bellard
    return ((first_cpu->a20_mask >> 20) & 1);
377 59b8ad81 bellard
}
378 59b8ad81 bellard
379 e1a23744 bellard
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
380 e1a23744 bellard
{
381 59b8ad81 bellard
    ioport_set_a20((val >> 1) & 1);
382 e1a23744 bellard
    /* XXX: bit 0 is fast reset */
383 e1a23744 bellard
}
384 e1a23744 bellard
385 e1a23744 bellard
static uint32_t ioport92_read(void *opaque, uint32_t addr)
386 e1a23744 bellard
{
387 59b8ad81 bellard
    return ioport_get_a20() << 1;
388 e1a23744 bellard
}
389 e1a23744 bellard
390 80cabfad bellard
/***********************************************************/
391 80cabfad bellard
/* Bochs BIOS debug ports */
392 80cabfad bellard
393 9596ebb7 pbrook
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
394 80cabfad bellard
{
395 a2f659ee bellard
    static const char shutdown_str[8] = "Shutdown";
396 a2f659ee bellard
    static int shutdown_index = 0;
397 3b46e624 ths
398 80cabfad bellard
    switch(addr) {
399 80cabfad bellard
        /* Bochs BIOS messages */
400 80cabfad bellard
    case 0x400:
401 80cabfad bellard
    case 0x401:
402 80cabfad bellard
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
403 80cabfad bellard
        exit(1);
404 80cabfad bellard
    case 0x402:
405 80cabfad bellard
    case 0x403:
406 80cabfad bellard
#ifdef DEBUG_BIOS
407 80cabfad bellard
        fprintf(stderr, "%c", val);
408 80cabfad bellard
#endif
409 80cabfad bellard
        break;
410 a2f659ee bellard
    case 0x8900:
411 a2f659ee bellard
        /* same as Bochs power off */
412 a2f659ee bellard
        if (val == shutdown_str[shutdown_index]) {
413 a2f659ee bellard
            shutdown_index++;
414 a2f659ee bellard
            if (shutdown_index == 8) {
415 a2f659ee bellard
                shutdown_index = 0;
416 a2f659ee bellard
                qemu_system_shutdown_request();
417 a2f659ee bellard
            }
418 a2f659ee bellard
        } else {
419 a2f659ee bellard
            shutdown_index = 0;
420 a2f659ee bellard
        }
421 a2f659ee bellard
        break;
422 80cabfad bellard
423 80cabfad bellard
        /* LGPL'ed VGA BIOS messages */
424 80cabfad bellard
    case 0x501:
425 80cabfad bellard
    case 0x502:
426 80cabfad bellard
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
427 80cabfad bellard
        exit(1);
428 80cabfad bellard
    case 0x500:
429 80cabfad bellard
    case 0x503:
430 80cabfad bellard
#ifdef DEBUG_BIOS
431 80cabfad bellard
        fprintf(stderr, "%c", val);
432 80cabfad bellard
#endif
433 80cabfad bellard
        break;
434 80cabfad bellard
    }
435 80cabfad bellard
}
436 80cabfad bellard
437 bf483392 Alexander Graf
static void *bochs_bios_init(void)
438 80cabfad bellard
{
439 3cce6243 blueswir1
    void *fw_cfg;
440 b6f6e3d3 aliguori
    uint8_t *smbios_table;
441 b6f6e3d3 aliguori
    size_t smbios_len;
442 11c2fd3e aliguori
    uint64_t *numa_fw_cfg;
443 11c2fd3e aliguori
    int i, j;
444 3cce6243 blueswir1
445 b41a2cd1 bellard
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
446 b41a2cd1 bellard
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
447 b41a2cd1 bellard
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
448 b41a2cd1 bellard
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
449 a2f659ee bellard
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
450 b41a2cd1 bellard
451 b41a2cd1 bellard
    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
452 b41a2cd1 bellard
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
453 b41a2cd1 bellard
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
454 b41a2cd1 bellard
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
455 3cce6243 blueswir1
456 3cce6243 blueswir1
    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
457 bf483392 Alexander Graf
458 3cce6243 blueswir1
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
459 905fdcb5 blueswir1
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
460 80deece2 blueswir1
    fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
461 80deece2 blueswir1
                     acpi_tables_len);
462 6b35e7bf Jes Sorensen
    fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
463 b6f6e3d3 aliguori
464 b6f6e3d3 aliguori
    smbios_table = smbios_get_table(&smbios_len);
465 b6f6e3d3 aliguori
    if (smbios_table)
466 b6f6e3d3 aliguori
        fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
467 b6f6e3d3 aliguori
                         smbios_table, smbios_len);
468 11c2fd3e aliguori
469 11c2fd3e aliguori
    /* allocate memory for the NUMA channel: one (64bit) word for the number
470 11c2fd3e aliguori
     * of nodes, one word for each VCPU->node and one word for each node to
471 11c2fd3e aliguori
     * hold the amount of memory.
472 11c2fd3e aliguori
     */
473 11c2fd3e aliguori
    numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
474 11c2fd3e aliguori
    numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
475 11c2fd3e aliguori
    for (i = 0; i < smp_cpus; i++) {
476 11c2fd3e aliguori
        for (j = 0; j < nb_numa_nodes; j++) {
477 11c2fd3e aliguori
            if (node_cpumask[j] & (1 << i)) {
478 11c2fd3e aliguori
                numa_fw_cfg[i + 1] = cpu_to_le64(j);
479 11c2fd3e aliguori
                break;
480 11c2fd3e aliguori
            }
481 11c2fd3e aliguori
        }
482 11c2fd3e aliguori
    }
483 11c2fd3e aliguori
    for (i = 0; i < nb_numa_nodes; i++) {
484 11c2fd3e aliguori
        numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
485 11c2fd3e aliguori
    }
486 11c2fd3e aliguori
    fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
487 11c2fd3e aliguori
                     (1 + smp_cpus + nb_numa_nodes) * 8);
488 bf483392 Alexander Graf
489 bf483392 Alexander Graf
    return fw_cfg;
490 80cabfad bellard
}
491 80cabfad bellard
492 642a4f96 ths
/* Generate an initial boot sector which sets state and jump to
493 642a4f96 ths
   a specified vector */
494 45a50b16 Gerd Hoffmann
static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
495 642a4f96 ths
{
496 4fc9af53 aliguori
    uint8_t rom[512], *p, *reloc;
497 4fc9af53 aliguori
    uint8_t sum;
498 642a4f96 ths
    int i;
499 642a4f96 ths
500 4fc9af53 aliguori
    memset(rom, 0, sizeof(rom));
501 4fc9af53 aliguori
502 4fc9af53 aliguori
    p = rom;
503 4fc9af53 aliguori
    /* Make sure we have an option rom signature */
504 4fc9af53 aliguori
    *p++ = 0x55;
505 4fc9af53 aliguori
    *p++ = 0xaa;
506 642a4f96 ths
507 4fc9af53 aliguori
    /* ROM size in sectors*/
508 4fc9af53 aliguori
    *p++ = 1;
509 642a4f96 ths
510 4fc9af53 aliguori
    /* Hook int19 */
511 642a4f96 ths
512 4fc9af53 aliguori
    *p++ = 0x50;                /* push ax */
513 4fc9af53 aliguori
    *p++ = 0x1e;                /* push ds */
514 4fc9af53 aliguori
    *p++ = 0x31; *p++ = 0xc0;        /* xor ax, ax */
515 4fc9af53 aliguori
    *p++ = 0x8e; *p++ = 0xd8;        /* mov ax, ds */
516 642a4f96 ths
517 4fc9af53 aliguori
    *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
518 4fc9af53 aliguori
    *p++ = 0x64; *p++ = 0x00;
519 4fc9af53 aliguori
    reloc = p;
520 4fc9af53 aliguori
    *p++ = 0x00; *p++ = 0x00;
521 4fc9af53 aliguori
522 4fc9af53 aliguori
    *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
523 4fc9af53 aliguori
    *p++ = 0x66; *p++ = 0x00;
524 4fc9af53 aliguori
525 4fc9af53 aliguori
    *p++ = 0x1f;                /* pop ds */
526 4fc9af53 aliguori
    *p++ = 0x58;                /* pop ax */
527 4fc9af53 aliguori
    *p++ = 0xcb;                /* lret */
528 82663ee2 Blue Swirl
529 642a4f96 ths
    /* Actual code */
530 4fc9af53 aliguori
    *reloc = (p - rom);
531 4fc9af53 aliguori
532 642a4f96 ths
    *p++ = 0xfa;                /* CLI */
533 642a4f96 ths
    *p++ = 0xfc;                /* CLD */
534 642a4f96 ths
535 642a4f96 ths
    for (i = 0; i < 6; i++) {
536 642a4f96 ths
        if (i == 1)                /* Skip CS */
537 642a4f96 ths
            continue;
538 642a4f96 ths
539 642a4f96 ths
        *p++ = 0xb8;                /* MOV AX,imm16 */
540 642a4f96 ths
        *p++ = segs[i];
541 642a4f96 ths
        *p++ = segs[i] >> 8;
542 642a4f96 ths
        *p++ = 0x8e;                /* MOV <seg>,AX */
543 642a4f96 ths
        *p++ = 0xc0 + (i << 3);
544 642a4f96 ths
    }
545 642a4f96 ths
546 642a4f96 ths
    for (i = 0; i < 8; i++) {
547 642a4f96 ths
        *p++ = 0x66;                /* 32-bit operand size */
548 642a4f96 ths
        *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
549 642a4f96 ths
        *p++ = gpr[i];
550 642a4f96 ths
        *p++ = gpr[i] >> 8;
551 642a4f96 ths
        *p++ = gpr[i] >> 16;
552 642a4f96 ths
        *p++ = gpr[i] >> 24;
553 642a4f96 ths
    }
554 642a4f96 ths
555 642a4f96 ths
    *p++ = 0xea;                /* JMP FAR */
556 642a4f96 ths
    *p++ = ip;                        /* IP */
557 642a4f96 ths
    *p++ = ip >> 8;
558 642a4f96 ths
    *p++ = segs[1];                /* CS */
559 642a4f96 ths
    *p++ = segs[1] >> 8;
560 642a4f96 ths
561 4fc9af53 aliguori
    /* sign rom */
562 4fc9af53 aliguori
    sum = 0;
563 4fc9af53 aliguori
    for (i = 0; i < (sizeof(rom) - 1); i++)
564 4fc9af53 aliguori
        sum += rom[i];
565 4fc9af53 aliguori
    rom[sizeof(rom) - 1] = -sum;
566 4fc9af53 aliguori
567 45a50b16 Gerd Hoffmann
    rom_add_blob("linux-bootsect", rom, sizeof(rom),
568 45a50b16 Gerd Hoffmann
                 PC_ROM_MIN_OPTION, PC_ROM_MAX, PC_ROM_ALIGN);
569 642a4f96 ths
}
570 80cabfad bellard
571 642a4f96 ths
static long get_file_size(FILE *f)
572 642a4f96 ths
{
573 642a4f96 ths
    long where, size;
574 642a4f96 ths
575 642a4f96 ths
    /* XXX: on Unix systems, using fstat() probably makes more sense */
576 642a4f96 ths
577 642a4f96 ths
    where = ftell(f);
578 642a4f96 ths
    fseek(f, 0, SEEK_END);
579 642a4f96 ths
    size = ftell(f);
580 642a4f96 ths
    fseek(f, where, SEEK_SET);
581 642a4f96 ths
582 642a4f96 ths
    return size;
583 642a4f96 ths
}
584 642a4f96 ths
585 f16408df Alexander Graf
#define MULTIBOOT_STRUCT_ADDR 0x9000
586 f16408df Alexander Graf
587 f16408df Alexander Graf
#if MULTIBOOT_STRUCT_ADDR > 0xf0000
588 f16408df Alexander Graf
#error multiboot struct needs to fit in 16 bit real mode
589 f16408df Alexander Graf
#endif
590 f16408df Alexander Graf
591 f16408df Alexander Graf
static int load_multiboot(void *fw_cfg,
592 f16408df Alexander Graf
                          FILE *f,
593 f16408df Alexander Graf
                          const char *kernel_filename,
594 f16408df Alexander Graf
                          const char *initrd_filename,
595 f16408df Alexander Graf
                          const char *kernel_cmdline,
596 f16408df Alexander Graf
                          uint8_t *header)
597 f16408df Alexander Graf
{
598 45a50b16 Gerd Hoffmann
    int i, is_multiboot = 0;
599 f16408df Alexander Graf
    uint32_t flags = 0;
600 f16408df Alexander Graf
    uint32_t mh_entry_addr;
601 f16408df Alexander Graf
    uint32_t mh_load_addr;
602 f16408df Alexander Graf
    uint32_t mb_kernel_size;
603 f16408df Alexander Graf
    uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
604 f16408df Alexander Graf
    uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
605 f16408df Alexander Graf
    uint32_t mb_mod_end;
606 45a50b16 Gerd Hoffmann
    uint8_t bootinfo[0x500];
607 45a50b16 Gerd Hoffmann
    uint32_t cmdline = 0x200;
608 f16408df Alexander Graf
609 f16408df Alexander Graf
    /* Ok, let's see if it is a multiboot image.
610 f16408df Alexander Graf
       The header is 12x32bit long, so the latest entry may be 8192 - 48. */
611 f16408df Alexander Graf
    for (i = 0; i < (8192 - 48); i += 4) {
612 f16408df Alexander Graf
        if (ldl_p(header+i) == 0x1BADB002) {
613 f16408df Alexander Graf
            uint32_t checksum = ldl_p(header+i+8);
614 f16408df Alexander Graf
            flags = ldl_p(header+i+4);
615 f16408df Alexander Graf
            checksum += flags;
616 f16408df Alexander Graf
            checksum += (uint32_t)0x1BADB002;
617 f16408df Alexander Graf
            if (!checksum) {
618 f16408df Alexander Graf
                is_multiboot = 1;
619 f16408df Alexander Graf
                break;
620 f16408df Alexander Graf
            }
621 f16408df Alexander Graf
        }
622 f16408df Alexander Graf
    }
623 f16408df Alexander Graf
624 f16408df Alexander Graf
    if (!is_multiboot)
625 f16408df Alexander Graf
        return 0; /* no multiboot */
626 f16408df Alexander Graf
627 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
628 f16408df Alexander Graf
    fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
629 f16408df Alexander Graf
#endif
630 45a50b16 Gerd Hoffmann
    memset(bootinfo, 0, sizeof(bootinfo));
631 f16408df Alexander Graf
632 f16408df Alexander Graf
    if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
633 f16408df Alexander Graf
        fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
634 f16408df Alexander Graf
    }
635 f16408df Alexander Graf
    if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
636 f16408df Alexander Graf
        uint64_t elf_entry;
637 f16408df Alexander Graf
        int kernel_size;
638 f16408df Alexander Graf
        fclose(f);
639 ca20cf32 Blue Swirl
        kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL,
640 ca20cf32 Blue Swirl
                               0, ELF_MACHINE, 0);
641 f16408df Alexander Graf
        if (kernel_size < 0) {
642 f16408df Alexander Graf
            fprintf(stderr, "Error while loading elf kernel\n");
643 f16408df Alexander Graf
            exit(1);
644 f16408df Alexander Graf
        }
645 f16408df Alexander Graf
        mh_load_addr = mh_entry_addr = elf_entry;
646 f16408df Alexander Graf
        mb_kernel_size = kernel_size;
647 f16408df Alexander Graf
648 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
649 f16408df Alexander Graf
        fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
650 f16408df Alexander Graf
                mb_kernel_size, (size_t)mh_entry_addr);
651 f16408df Alexander Graf
#endif
652 f16408df Alexander Graf
    } else {
653 f16408df Alexander Graf
        /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
654 f16408df Alexander Graf
        uint32_t mh_header_addr = ldl_p(header+i+12);
655 f16408df Alexander Graf
        mh_load_addr = ldl_p(header+i+16);
656 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
657 f16408df Alexander Graf
        uint32_t mh_load_end_addr = ldl_p(header+i+20);
658 f16408df Alexander Graf
        uint32_t mh_bss_end_addr = ldl_p(header+i+24);
659 f16408df Alexander Graf
#endif
660 f16408df Alexander Graf
        uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
661 45a50b16 Gerd Hoffmann
        uint8_t *kernel;
662 f16408df Alexander Graf
663 f16408df Alexander Graf
        mh_entry_addr = ldl_p(header+i+28);
664 f16408df Alexander Graf
        mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
665 f16408df Alexander Graf
666 f16408df Alexander Graf
        /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
667 f16408df Alexander Graf
        uint32_t mh_mode_type = ldl_p(header+i+32);
668 f16408df Alexander Graf
        uint32_t mh_width = ldl_p(header+i+36);
669 f16408df Alexander Graf
        uint32_t mh_height = ldl_p(header+i+40);
670 f16408df Alexander Graf
        uint32_t mh_depth = ldl_p(header+i+44); */
671 f16408df Alexander Graf
672 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
673 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
674 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
675 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
676 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
677 f16408df Alexander Graf
        fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
678 f16408df Alexander Graf
                mb_kernel_size, mh_load_addr);
679 f16408df Alexander Graf
#endif
680 f16408df Alexander Graf
681 45a50b16 Gerd Hoffmann
        kernel = qemu_malloc(mb_kernel_size);
682 45a50b16 Gerd Hoffmann
        fseek(f, mb_kernel_text_offset, SEEK_SET);
683 45a50b16 Gerd Hoffmann
        fread(kernel, 1, mb_kernel_size, f);
684 45a50b16 Gerd Hoffmann
        rom_add_blob_fixed(kernel_filename, kernel, mb_kernel_size,
685 45a50b16 Gerd Hoffmann
                           mh_load_addr);
686 45a50b16 Gerd Hoffmann
        qemu_free(kernel);
687 f16408df Alexander Graf
        fclose(f);
688 f16408df Alexander Graf
    }
689 f16408df Alexander Graf
690 f16408df Alexander Graf
    /* blob size is only the kernel for now */
691 f16408df Alexander Graf
    mb_mod_end = mh_load_addr + mb_kernel_size;
692 f16408df Alexander Graf
693 f16408df Alexander Graf
    /* load modules */
694 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 20, 0x0); /* mods_count */
695 f16408df Alexander Graf
    if (initrd_filename) {
696 45a50b16 Gerd Hoffmann
        uint32_t mb_mod_info = 0x100;
697 45a50b16 Gerd Hoffmann
        uint32_t mb_mod_cmdline = 0x300;
698 f16408df Alexander Graf
        uint32_t mb_mod_start = mh_load_addr;
699 f16408df Alexander Graf
        uint32_t mb_mod_length = mb_kernel_size;
700 f16408df Alexander Graf
        char *next_initrd;
701 f16408df Alexander Graf
        char *next_space;
702 f16408df Alexander Graf
        int mb_mod_count = 0;
703 f16408df Alexander Graf
704 f16408df Alexander Graf
        do {
705 f16408df Alexander Graf
            next_initrd = strchr(initrd_filename, ',');
706 f16408df Alexander Graf
            if (next_initrd)
707 f16408df Alexander Graf
                *next_initrd = '\0';
708 f16408df Alexander Graf
            /* if a space comes after the module filename, treat everything
709 f16408df Alexander Graf
               after that as parameters */
710 45a50b16 Gerd Hoffmann
            pstrcpy((char*)bootinfo + mb_mod_cmdline,
711 45a50b16 Gerd Hoffmann
                    sizeof(bootinfo) - mb_mod_cmdline,
712 45a50b16 Gerd Hoffmann
                    initrd_filename);
713 45a50b16 Gerd Hoffmann
            stl_p(bootinfo + mb_mod_info + 8, mb_mod_cmdline); /* string */
714 f16408df Alexander Graf
            mb_mod_cmdline += strlen(initrd_filename) + 1;
715 45a50b16 Gerd Hoffmann
            if (mb_mod_cmdline > sizeof(bootinfo))
716 45a50b16 Gerd Hoffmann
                mb_mod_cmdline = sizeof(bootinfo);
717 f16408df Alexander Graf
            if ((next_space = strchr(initrd_filename, ' ')))
718 f16408df Alexander Graf
                *next_space = '\0';
719 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
720 82663ee2 Blue Swirl
            printf("multiboot loading module: %s\n", initrd_filename);
721 f16408df Alexander Graf
#endif
722 45a50b16 Gerd Hoffmann
            mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
723 45a50b16 Gerd Hoffmann
                         & (TARGET_PAGE_MASK);
724 45a50b16 Gerd Hoffmann
            mb_mod_length = get_image_size(initrd_filename);
725 45a50b16 Gerd Hoffmann
            if (mb_mod_length < 0) {
726 45a50b16 Gerd Hoffmann
                fprintf(stderr, "failed to get %s image size\n", initrd_filename);
727 45a50b16 Gerd Hoffmann
                exit(1);
728 45a50b16 Gerd Hoffmann
            }
729 45a50b16 Gerd Hoffmann
            mb_mod_end = mb_mod_start + mb_mod_length;
730 45a50b16 Gerd Hoffmann
            rom_add_file_fixed(initrd_filename, mb_mod_start);
731 f16408df Alexander Graf
732 45a50b16 Gerd Hoffmann
            mb_mod_count++;
733 45a50b16 Gerd Hoffmann
            stl_p(bootinfo + mb_mod_info + 0, mb_mod_start);
734 45a50b16 Gerd Hoffmann
            stl_p(bootinfo + mb_mod_info + 4, mb_mod_start + mb_mod_length);
735 45a50b16 Gerd Hoffmann
            stl_p(bootinfo + mb_mod_info + 12, 0x0); /* reserved */
736 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
737 45a50b16 Gerd Hoffmann
            printf("mod_start: %#x\nmod_end:   %#x\n", mb_mod_start,
738 45a50b16 Gerd Hoffmann
                   mb_mod_start + mb_mod_length);
739 f16408df Alexander Graf
#endif
740 f16408df Alexander Graf
            initrd_filename = next_initrd+1;
741 f16408df Alexander Graf
            mb_mod_info += 16;
742 f16408df Alexander Graf
        } while (next_initrd);
743 45a50b16 Gerd Hoffmann
        stl_p(bootinfo + 20, mb_mod_count); /* mods_count */
744 45a50b16 Gerd Hoffmann
        stl_p(bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
745 f16408df Alexander Graf
    }
746 f16408df Alexander Graf
747 f16408df Alexander Graf
    /* Commandline support */
748 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 16, mb_bootinfo + cmdline);
749 45a50b16 Gerd Hoffmann
    snprintf((char*)bootinfo + cmdline, 0x100, "%s %s",
750 45a50b16 Gerd Hoffmann
             kernel_filename, kernel_cmdline);
751 f16408df Alexander Graf
752 f16408df Alexander Graf
    /* the kernel is where we want it to be now */
753 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MEMORY (1 << 0)
754 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
755 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
756 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MODULES (1 << 3)
757 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MMAP (1 << 6)
758 45a50b16 Gerd Hoffmann
    stl_p(bootinfo, MULTIBOOT_FLAGS_MEMORY
759 45a50b16 Gerd Hoffmann
                  | MULTIBOOT_FLAGS_BOOT_DEVICE
760 45a50b16 Gerd Hoffmann
                  | MULTIBOOT_FLAGS_CMDLINE
761 45a50b16 Gerd Hoffmann
                  | MULTIBOOT_FLAGS_MODULES
762 45a50b16 Gerd Hoffmann
                  | MULTIBOOT_FLAGS_MMAP);
763 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 4, 640); /* mem_lower */
764 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 8, ram_size / 1024); /* mem_upper */
765 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
766 45a50b16 Gerd Hoffmann
    stl_p(bootinfo + 48, mmap_addr); /* mmap_addr */
767 f16408df Alexander Graf
768 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
769 f16408df Alexander Graf
    fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
770 f16408df Alexander Graf
#endif
771 f16408df Alexander Graf
772 f16408df Alexander Graf
    /* Pass variables to option rom */
773 f16408df Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_entry_addr);
774 f16408df Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
775 f16408df Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, mmap_addr);
776 f16408df Alexander Graf
777 45a50b16 Gerd Hoffmann
    rom_add_blob_fixed("multiboot-info", bootinfo, sizeof(bootinfo),
778 45a50b16 Gerd Hoffmann
                       mb_bootinfo);
779 f16408df Alexander Graf
780 f16408df Alexander Graf
    option_rom[nb_option_roms] = "multiboot.bin";
781 f16408df Alexander Graf
    nb_option_roms++;
782 f16408df Alexander Graf
783 f16408df Alexander Graf
    return 1; /* yes, we are multiboot */
784 f16408df Alexander Graf
}
785 f16408df Alexander Graf
786 f16408df Alexander Graf
static void load_linux(void *fw_cfg,
787 4fc9af53 aliguori
                       const char *kernel_filename,
788 642a4f96 ths
                       const char *initrd_filename,
789 e6ade764 Glauber Costa
                       const char *kernel_cmdline,
790 45a50b16 Gerd Hoffmann
                       target_phys_addr_t max_ram_size)
791 642a4f96 ths
{
792 642a4f96 ths
    uint16_t protocol;
793 642a4f96 ths
    uint32_t gpr[8];
794 642a4f96 ths
    uint16_t seg[6];
795 642a4f96 ths
    uint16_t real_seg;
796 5cea8590 Paul Brook
    int setup_size, kernel_size, initrd_size = 0, cmdline_size;
797 642a4f96 ths
    uint32_t initrd_max;
798 45a50b16 Gerd Hoffmann
    uint8_t header[8192], *setup, *kernel;
799 c227f099 Anthony Liguori
    target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
800 45a50b16 Gerd Hoffmann
    FILE *f;
801 bf4e5d92 Pascal Terjan
    char *vmode;
802 642a4f96 ths
803 642a4f96 ths
    /* Align to 16 bytes as a paranoia measure */
804 642a4f96 ths
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
805 642a4f96 ths
806 642a4f96 ths
    /* load the kernel header */
807 642a4f96 ths
    f = fopen(kernel_filename, "rb");
808 642a4f96 ths
    if (!f || !(kernel_size = get_file_size(f)) ||
809 f16408df Alexander Graf
        fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
810 f16408df Alexander Graf
        MIN(ARRAY_SIZE(header), kernel_size)) {
811 850810d0 Justin M. Forbes
        fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
812 850810d0 Justin M. Forbes
                kernel_filename, strerror(errno));
813 642a4f96 ths
        exit(1);
814 642a4f96 ths
    }
815 642a4f96 ths
816 642a4f96 ths
    /* kernel protocol version */
817 bc4edd79 bellard
#if 0
818 642a4f96 ths
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
819 bc4edd79 bellard
#endif
820 642a4f96 ths
    if (ldl_p(header+0x202) == 0x53726448)
821 642a4f96 ths
        protocol = lduw_p(header+0x206);
822 f16408df Alexander Graf
    else {
823 f16408df Alexander Graf
        /* This looks like a multiboot kernel. If it is, let's stop
824 f16408df Alexander Graf
           treating it like a Linux kernel. */
825 f16408df Alexander Graf
        if (load_multiboot(fw_cfg, f, kernel_filename,
826 f16408df Alexander Graf
                           initrd_filename, kernel_cmdline, header))
827 82663ee2 Blue Swirl
            return;
828 642a4f96 ths
        protocol = 0;
829 f16408df Alexander Graf
    }
830 642a4f96 ths
831 642a4f96 ths
    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
832 642a4f96 ths
        /* Low kernel */
833 a37af289 blueswir1
        real_addr    = 0x90000;
834 a37af289 blueswir1
        cmdline_addr = 0x9a000 - cmdline_size;
835 a37af289 blueswir1
        prot_addr    = 0x10000;
836 642a4f96 ths
    } else if (protocol < 0x202) {
837 642a4f96 ths
        /* High but ancient kernel */
838 a37af289 blueswir1
        real_addr    = 0x90000;
839 a37af289 blueswir1
        cmdline_addr = 0x9a000 - cmdline_size;
840 a37af289 blueswir1
        prot_addr    = 0x100000;
841 642a4f96 ths
    } else {
842 642a4f96 ths
        /* High and recent kernel */
843 a37af289 blueswir1
        real_addr    = 0x10000;
844 a37af289 blueswir1
        cmdline_addr = 0x20000;
845 a37af289 blueswir1
        prot_addr    = 0x100000;
846 642a4f96 ths
    }
847 642a4f96 ths
848 bc4edd79 bellard
#if 0
849 642a4f96 ths
    fprintf(stderr,
850 526ccb7a balrog
            "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
851 526ccb7a balrog
            "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
852 526ccb7a balrog
            "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
853 a37af289 blueswir1
            real_addr,
854 a37af289 blueswir1
            cmdline_addr,
855 a37af289 blueswir1
            prot_addr);
856 bc4edd79 bellard
#endif
857 642a4f96 ths
858 642a4f96 ths
    /* highest address for loading the initrd */
859 642a4f96 ths
    if (protocol >= 0x203)
860 642a4f96 ths
        initrd_max = ldl_p(header+0x22c);
861 642a4f96 ths
    else
862 642a4f96 ths
        initrd_max = 0x37ffffff;
863 642a4f96 ths
864 e6ade764 Glauber Costa
    if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
865 e6ade764 Glauber Costa
            initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
866 642a4f96 ths
867 642a4f96 ths
    /* kernel command line */
868 3c178e72 Gerd Hoffmann
    rom_add_blob_fixed("cmdline", kernel_cmdline,
869 45a50b16 Gerd Hoffmann
                       strlen(kernel_cmdline)+1, cmdline_addr);
870 642a4f96 ths
871 642a4f96 ths
    if (protocol >= 0x202) {
872 a37af289 blueswir1
        stl_p(header+0x228, cmdline_addr);
873 642a4f96 ths
    } else {
874 642a4f96 ths
        stw_p(header+0x20, 0xA33F);
875 642a4f96 ths
        stw_p(header+0x22, cmdline_addr-real_addr);
876 642a4f96 ths
    }
877 642a4f96 ths
878 bf4e5d92 Pascal Terjan
    /* handle vga= parameter */
879 bf4e5d92 Pascal Terjan
    vmode = strstr(kernel_cmdline, "vga=");
880 bf4e5d92 Pascal Terjan
    if (vmode) {
881 bf4e5d92 Pascal Terjan
        unsigned int video_mode;
882 bf4e5d92 Pascal Terjan
        /* skip "vga=" */
883 bf4e5d92 Pascal Terjan
        vmode += 4;
884 bf4e5d92 Pascal Terjan
        if (!strncmp(vmode, "normal", 6)) {
885 bf4e5d92 Pascal Terjan
            video_mode = 0xffff;
886 bf4e5d92 Pascal Terjan
        } else if (!strncmp(vmode, "ext", 3)) {
887 bf4e5d92 Pascal Terjan
            video_mode = 0xfffe;
888 bf4e5d92 Pascal Terjan
        } else if (!strncmp(vmode, "ask", 3)) {
889 bf4e5d92 Pascal Terjan
            video_mode = 0xfffd;
890 bf4e5d92 Pascal Terjan
        } else {
891 bf4e5d92 Pascal Terjan
            video_mode = strtol(vmode, NULL, 0);
892 bf4e5d92 Pascal Terjan
        }
893 bf4e5d92 Pascal Terjan
        stw_p(header+0x1fa, video_mode);
894 bf4e5d92 Pascal Terjan
    }
895 bf4e5d92 Pascal Terjan
896 642a4f96 ths
    /* loader type */
897 642a4f96 ths
    /* High nybble = B reserved for Qemu; low nybble is revision number.
898 642a4f96 ths
       If this code is substantially changed, you may want to consider
899 642a4f96 ths
       incrementing the revision. */
900 642a4f96 ths
    if (protocol >= 0x200)
901 642a4f96 ths
        header[0x210] = 0xB0;
902 642a4f96 ths
903 642a4f96 ths
    /* heap */
904 642a4f96 ths
    if (protocol >= 0x201) {
905 642a4f96 ths
        header[0x211] |= 0x80;        /* CAN_USE_HEAP */
906 642a4f96 ths
        stw_p(header+0x224, cmdline_addr-real_addr-0x200);
907 642a4f96 ths
    }
908 642a4f96 ths
909 642a4f96 ths
    /* load initrd */
910 642a4f96 ths
    if (initrd_filename) {
911 642a4f96 ths
        if (protocol < 0x200) {
912 642a4f96 ths
            fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
913 642a4f96 ths
            exit(1);
914 642a4f96 ths
        }
915 642a4f96 ths
916 45a50b16 Gerd Hoffmann
        initrd_size = get_image_size(initrd_filename);
917 45a50b16 Gerd Hoffmann
        initrd_addr = (initrd_max-initrd_size) & ~4095;
918 45a50b16 Gerd Hoffmann
        rom_add_file_fixed(initrd_filename, initrd_addr);
919 642a4f96 ths
920 a37af289 blueswir1
        stl_p(header+0x218, initrd_addr);
921 642a4f96 ths
        stl_p(header+0x21c, initrd_size);
922 642a4f96 ths
    }
923 642a4f96 ths
924 45a50b16 Gerd Hoffmann
    /* load kernel and setup */
925 642a4f96 ths
    setup_size = header[0x1f1];
926 642a4f96 ths
    if (setup_size == 0)
927 642a4f96 ths
        setup_size = 4;
928 642a4f96 ths
    setup_size = (setup_size+1)*512;
929 45a50b16 Gerd Hoffmann
    kernel_size -= setup_size;
930 642a4f96 ths
931 45a50b16 Gerd Hoffmann
    setup  = qemu_malloc(setup_size);
932 45a50b16 Gerd Hoffmann
    kernel = qemu_malloc(kernel_size);
933 45a50b16 Gerd Hoffmann
    fseek(f, 0, SEEK_SET);
934 45a50b16 Gerd Hoffmann
    fread(setup, 1, setup_size, f);
935 45a50b16 Gerd Hoffmann
    fread(kernel, 1, kernel_size, f);
936 642a4f96 ths
    fclose(f);
937 45a50b16 Gerd Hoffmann
    memcpy(setup, header, MIN(sizeof(header), setup_size));
938 45a50b16 Gerd Hoffmann
    rom_add_blob_fixed("linux-setup", setup,
939 45a50b16 Gerd Hoffmann
                       setup_size, real_addr);
940 45a50b16 Gerd Hoffmann
    rom_add_blob_fixed(kernel_filename, kernel,
941 45a50b16 Gerd Hoffmann
                       kernel_size, prot_addr);
942 45a50b16 Gerd Hoffmann
    qemu_free(setup);
943 45a50b16 Gerd Hoffmann
    qemu_free(kernel);
944 642a4f96 ths
945 642a4f96 ths
    /* generate bootsector to set up the initial register state */
946 a37af289 blueswir1
    real_seg = real_addr >> 4;
947 642a4f96 ths
    seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
948 642a4f96 ths
    seg[1] = real_seg+0x20;        /* CS */
949 642a4f96 ths
    memset(gpr, 0, sizeof gpr);
950 642a4f96 ths
    gpr[4] = cmdline_addr-real_addr-16;        /* SP (-16 is paranoia) */
951 642a4f96 ths
952 45a50b16 Gerd Hoffmann
    generate_bootsect(gpr, seg, 0);
953 642a4f96 ths
}
954 642a4f96 ths
955 b41a2cd1 bellard
static const int ide_iobase[2] = { 0x1f0, 0x170 };
956 b41a2cd1 bellard
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
957 b41a2cd1 bellard
static const int ide_irq[2] = { 14, 15 };
958 b41a2cd1 bellard
959 b41a2cd1 bellard
#define NE2000_NB_MAX 6
960 b41a2cd1 bellard
961 675d6f82 Blue Swirl
static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
962 675d6f82 Blue Swirl
                                              0x280, 0x380 };
963 675d6f82 Blue Swirl
static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
964 b41a2cd1 bellard
965 675d6f82 Blue Swirl
static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
966 675d6f82 Blue Swirl
static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
967 6508fe59 bellard
968 6a36d84e bellard
#ifdef HAS_AUDIO
969 d537cf6c pbrook
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
970 6a36d84e bellard
{
971 6a36d84e bellard
    struct soundhw *c;
972 6a36d84e bellard
973 3a8bae3e malc
    for (c = soundhw; c->name; ++c) {
974 3a8bae3e malc
        if (c->enabled) {
975 3a8bae3e malc
            if (c->isa) {
976 3a8bae3e malc
                c->init.init_isa(pic);
977 3a8bae3e malc
            } else {
978 3a8bae3e malc
                if (pci_bus) {
979 3a8bae3e malc
                    c->init.init_pci(pci_bus);
980 6a36d84e bellard
                }
981 6a36d84e bellard
            }
982 6a36d84e bellard
        }
983 6a36d84e bellard
    }
984 6a36d84e bellard
}
985 6a36d84e bellard
#endif
986 6a36d84e bellard
987 3a38d437 Jes Sorensen
static void pc_init_ne2k_isa(NICInfo *nd)
988 a41b2ff2 pbrook
{
989 a41b2ff2 pbrook
    static int nb_ne2k = 0;
990 a41b2ff2 pbrook
991 a41b2ff2 pbrook
    if (nb_ne2k == NE2000_NB_MAX)
992 a41b2ff2 pbrook
        return;
993 3a38d437 Jes Sorensen
    isa_ne2000_init(ne2000_io[nb_ne2k],
994 9453c5bc Gerd Hoffmann
                    ne2000_irq[nb_ne2k], nd);
995 a41b2ff2 pbrook
    nb_ne2k++;
996 a41b2ff2 pbrook
}
997 a41b2ff2 pbrook
998 678e12cc Gleb Natapov
int cpu_is_bsp(CPUState *env)
999 678e12cc Gleb Natapov
{
1000 82663ee2 Blue Swirl
    return env->cpuid_apic_id == 0;
1001 678e12cc Gleb Natapov
}
1002 678e12cc Gleb Natapov
1003 3a31f36a Jan Kiszka
static CPUState *pc_new_cpu(const char *cpu_model)
1004 3a31f36a Jan Kiszka
{
1005 3a31f36a Jan Kiszka
    CPUState *env;
1006 3a31f36a Jan Kiszka
1007 3a31f36a Jan Kiszka
    env = cpu_init(cpu_model);
1008 3a31f36a Jan Kiszka
    if (!env) {
1009 3a31f36a Jan Kiszka
        fprintf(stderr, "Unable to find x86 CPU definition\n");
1010 3a31f36a Jan Kiszka
        exit(1);
1011 3a31f36a Jan Kiszka
    }
1012 3a31f36a Jan Kiszka
    if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
1013 3a31f36a Jan Kiszka
        env->cpuid_apic_id = env->cpu_index;
1014 3a31f36a Jan Kiszka
        /* APIC reset callback resets cpu */
1015 3a31f36a Jan Kiszka
        apic_init(env);
1016 3a31f36a Jan Kiszka
    } else {
1017 3a31f36a Jan Kiszka
        qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
1018 3a31f36a Jan Kiszka
    }
1019 3a31f36a Jan Kiszka
    return env;
1020 3a31f36a Jan Kiszka
}
1021 3a31f36a Jan Kiszka
1022 80cabfad bellard
/* PC hardware initialisation */
1023 c227f099 Anthony Liguori
static void pc_init1(ram_addr_t ram_size,
1024 3023f332 aliguori
                     const char *boot_device,
1025 e8b2a1c6 Mark McLoughlin
                     const char *kernel_filename,
1026 e8b2a1c6 Mark McLoughlin
                     const char *kernel_cmdline,
1027 3dbbdc25 bellard
                     const char *initrd_filename,
1028 e8b2a1c6 Mark McLoughlin
                     const char *cpu_model,
1029 caea79a9 Mark McLoughlin
                     int pci_enabled)
1030 80cabfad bellard
{
1031 5cea8590 Paul Brook
    char *filename;
1032 642a4f96 ths
    int ret, linux_boot, i;
1033 c227f099 Anthony Liguori
    ram_addr_t ram_addr, bios_offset, option_rom_offset;
1034 c227f099 Anthony Liguori
    ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
1035 45a50b16 Gerd Hoffmann
    int bios_size, isa_bios_size;
1036 46e50e9d bellard
    PCIBus *pci_bus;
1037 b3999638 Gerd Hoffmann
    ISADevice *isa_dev;
1038 5c3ff3a7 pbrook
    int piix3_devfn = -1;
1039 59b8ad81 bellard
    CPUState *env;
1040 d537cf6c pbrook
    qemu_irq *cpu_irq;
1041 1452411b Avi Kivity
    qemu_irq *isa_irq;
1042 d537cf6c pbrook
    qemu_irq *i8259;
1043 1452411b Avi Kivity
    IsaIrqState *isa_irq_state;
1044 f455e98c Gerd Hoffmann
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
1045 fd8014e1 Gerd Hoffmann
    DriveInfo *fd[MAX_FD];
1046 34b39c2b aliguori
    int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
1047 bf483392 Alexander Graf
    void *fw_cfg;
1048 d592d303 bellard
1049 00f82b8a aurel32
    if (ram_size >= 0xe0000000 ) {
1050 00f82b8a aurel32
        above_4g_mem_size = ram_size - 0xe0000000;
1051 00f82b8a aurel32
        below_4g_mem_size = 0xe0000000;
1052 00f82b8a aurel32
    } else {
1053 00f82b8a aurel32
        below_4g_mem_size = ram_size;
1054 00f82b8a aurel32
    }
1055 00f82b8a aurel32
1056 80cabfad bellard
    linux_boot = (kernel_filename != NULL);
1057 80cabfad bellard
1058 59b8ad81 bellard
    /* init CPUs */
1059 a049de61 bellard
    if (cpu_model == NULL) {
1060 a049de61 bellard
#ifdef TARGET_X86_64
1061 a049de61 bellard
        cpu_model = "qemu64";
1062 a049de61 bellard
#else
1063 a049de61 bellard
        cpu_model = "qemu32";
1064 a049de61 bellard
#endif
1065 a049de61 bellard
    }
1066 3a31f36a Jan Kiszka
1067 3a31f36a Jan Kiszka
    for (i = 0; i < smp_cpus; i++) {
1068 3a31f36a Jan Kiszka
        env = pc_new_cpu(cpu_model);
1069 59b8ad81 bellard
    }
1070 59b8ad81 bellard
1071 26fb5e48 aurel32
    vmport_init();
1072 26fb5e48 aurel32
1073 80cabfad bellard
    /* allocate RAM */
1074 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(0xa0000);
1075 82b36dc3 aliguori
    cpu_register_physical_memory(0, 0xa0000, ram_addr);
1076 82b36dc3 aliguori
1077 82b36dc3 aliguori
    /* Allocate, even though we won't register, so we don't break the
1078 82b36dc3 aliguori
     * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
1079 82b36dc3 aliguori
     * and some bios areas, which will be registered later
1080 82b36dc3 aliguori
     */
1081 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
1082 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
1083 82b36dc3 aliguori
    cpu_register_physical_memory(0x100000,
1084 82b36dc3 aliguori
                 below_4g_mem_size - 0x100000,
1085 82b36dc3 aliguori
                 ram_addr);
1086 00f82b8a aurel32
1087 00f82b8a aurel32
    /* above 4giga memory allocation */
1088 00f82b8a aurel32
    if (above_4g_mem_size > 0) {
1089 8a637d44 Paul Brook
#if TARGET_PHYS_ADDR_BITS == 32
1090 8a637d44 Paul Brook
        hw_error("To much RAM for 32-bit physical address");
1091 8a637d44 Paul Brook
#else
1092 82b36dc3 aliguori
        ram_addr = qemu_ram_alloc(above_4g_mem_size);
1093 82b36dc3 aliguori
        cpu_register_physical_memory(0x100000000ULL,
1094 526ccb7a balrog
                                     above_4g_mem_size,
1095 82b36dc3 aliguori
                                     ram_addr);
1096 8a637d44 Paul Brook
#endif
1097 00f82b8a aurel32
    }
1098 80cabfad bellard
1099 82b36dc3 aliguori
1100 970ac5a3 bellard
    /* BIOS load */
1101 1192dad8 j_mayer
    if (bios_name == NULL)
1102 1192dad8 j_mayer
        bios_name = BIOS_FILENAME;
1103 5cea8590 Paul Brook
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1104 5cea8590 Paul Brook
    if (filename) {
1105 5cea8590 Paul Brook
        bios_size = get_image_size(filename);
1106 5cea8590 Paul Brook
    } else {
1107 5cea8590 Paul Brook
        bios_size = -1;
1108 5cea8590 Paul Brook
    }
1109 5fafdf24 ths
    if (bios_size <= 0 ||
1110 970ac5a3 bellard
        (bios_size % 65536) != 0) {
1111 7587cf44 bellard
        goto bios_error;
1112 7587cf44 bellard
    }
1113 970ac5a3 bellard
    bios_offset = qemu_ram_alloc(bios_size);
1114 5cea8590 Paul Brook
    ret = load_image(filename, qemu_get_ram_ptr(bios_offset));
1115 7587cf44 bellard
    if (ret != bios_size) {
1116 7587cf44 bellard
    bios_error:
1117 5cea8590 Paul Brook
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1118 80cabfad bellard
        exit(1);
1119 80cabfad bellard
    }
1120 5cea8590 Paul Brook
    if (filename) {
1121 5cea8590 Paul Brook
        qemu_free(filename);
1122 5cea8590 Paul Brook
    }
1123 7587cf44 bellard
    /* map the last 128KB of the BIOS in ISA space */
1124 7587cf44 bellard
    isa_bios_size = bios_size;
1125 7587cf44 bellard
    if (isa_bios_size > (128 * 1024))
1126 7587cf44 bellard
        isa_bios_size = 128 * 1024;
1127 5fafdf24 ths
    cpu_register_physical_memory(0x100000 - isa_bios_size,
1128 5fafdf24 ths
                                 isa_bios_size,
1129 7587cf44 bellard
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
1130 9ae02555 ths
1131 4fc9af53 aliguori
1132 f753ff16 pbrook
1133 45a50b16 Gerd Hoffmann
    option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
1134 45a50b16 Gerd Hoffmann
    cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
1135 f753ff16 pbrook
1136 f753ff16 pbrook
    if (using_vga) {
1137 f753ff16 pbrook
        /* VGA BIOS load */
1138 f753ff16 pbrook
        if (cirrus_vga_enabled) {
1139 45a50b16 Gerd Hoffmann
            rom_add_vga(VGABIOS_CIRRUS_FILENAME);
1140 f753ff16 pbrook
        } else {
1141 45a50b16 Gerd Hoffmann
            rom_add_vga(VGABIOS_FILENAME);
1142 970ac5a3 bellard
        }
1143 f753ff16 pbrook
    }
1144 f753ff16 pbrook
1145 1d108d97 Alexander Graf
    /* map all the bios at the top of memory */
1146 1d108d97 Alexander Graf
    cpu_register_physical_memory((uint32_t)(-bios_size),
1147 1d108d97 Alexander Graf
                                 bios_size, bios_offset | IO_MEM_ROM);
1148 1d108d97 Alexander Graf
1149 bf483392 Alexander Graf
    fw_cfg = bochs_bios_init();
1150 1d108d97 Alexander Graf
1151 f753ff16 pbrook
    if (linux_boot) {
1152 45a50b16 Gerd Hoffmann
        load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1153 f753ff16 pbrook
    }
1154 f753ff16 pbrook
1155 f753ff16 pbrook
    for (i = 0; i < nb_option_roms; i++) {
1156 45a50b16 Gerd Hoffmann
        rom_add_option(option_rom[i]);
1157 406c8df3 Glauber Costa
    }
1158 406c8df3 Glauber Costa
1159 406c8df3 Glauber Costa
    for (i = 0; i < nb_nics; i++) {
1160 406c8df3 Glauber Costa
        char nic_oprom[1024];
1161 406c8df3 Glauber Costa
        const char *model = nd_table[i].model;
1162 406c8df3 Glauber Costa
1163 406c8df3 Glauber Costa
        if (!nd_table[i].bootable)
1164 406c8df3 Glauber Costa
            continue;
1165 406c8df3 Glauber Costa
1166 406c8df3 Glauber Costa
        if (model == NULL)
1167 0d6b0b1d Anthony Liguori
            model = "e1000";
1168 406c8df3 Glauber Costa
        snprintf(nic_oprom, sizeof(nic_oprom), "pxe-%s.bin", model);
1169 406c8df3 Glauber Costa
1170 45a50b16 Gerd Hoffmann
        rom_add_option(nic_oprom);
1171 9ae02555 ths
    }
1172 9ae02555 ths
1173 a5b38b51 aurel32
    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1174 d537cf6c pbrook
    i8259 = i8259_init(cpu_irq[0]);
1175 1452411b Avi Kivity
    isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1176 1452411b Avi Kivity
    isa_irq_state->i8259 = i8259;
1177 1632dc6a Avi Kivity
    isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
1178 d537cf6c pbrook
1179 69b91039 bellard
    if (pci_enabled) {
1180 85a750ca Juan Quintela
        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
1181 46e50e9d bellard
    } else {
1182 46e50e9d bellard
        pci_bus = NULL;
1183 2091ba23 Gerd Hoffmann
        isa_bus_new(NULL);
1184 69b91039 bellard
    }
1185 2091ba23 Gerd Hoffmann
    isa_bus_irqs(isa_irq);
1186 69b91039 bellard
1187 3a38d437 Jes Sorensen
    ferr_irq = isa_reserve_irq(13);
1188 3a38d437 Jes Sorensen
1189 80cabfad bellard
    /* init basic PC hardware */
1190 b41a2cd1 bellard
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1191 80cabfad bellard
1192 f929aad6 bellard
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1193 f929aad6 bellard
1194 1f04275e bellard
    if (cirrus_vga_enabled) {
1195 1f04275e bellard
        if (pci_enabled) {
1196 fbe1b595 Paul Brook
            pci_cirrus_vga_init(pci_bus);
1197 1f04275e bellard
        } else {
1198 fbe1b595 Paul Brook
            isa_cirrus_vga_init();
1199 1f04275e bellard
        }
1200 d34cab9f ths
    } else if (vmsvga_enabled) {
1201 d34cab9f ths
        if (pci_enabled)
1202 fbe1b595 Paul Brook
            pci_vmsvga_init(pci_bus);
1203 d34cab9f ths
        else
1204 d34cab9f ths
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1205 c2b3b41a aliguori
    } else if (std_vga_enabled) {
1206 89b6b508 bellard
        if (pci_enabled) {
1207 fbe1b595 Paul Brook
            pci_vga_init(pci_bus, 0, 0);
1208 89b6b508 bellard
        } else {
1209 fbe1b595 Paul Brook
            isa_vga_init();
1210 89b6b508 bellard
        }
1211 1f04275e bellard
    }
1212 80cabfad bellard
1213 32e0c826 Gerd Hoffmann
    rtc_state = rtc_init(2000);
1214 80cabfad bellard
1215 3b4366de blueswir1
    qemu_register_boot_set(pc_boot_set, rtc_state);
1216 3b4366de blueswir1
1217 e1a23744 bellard
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1218 e1a23744 bellard
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1219 e1a23744 bellard
1220 d592d303 bellard
    if (pci_enabled) {
1221 1632dc6a Avi Kivity
        isa_irq_state->ioapic = ioapic_init();
1222 d592d303 bellard
    }
1223 3a38d437 Jes Sorensen
    pit = pit_init(0x40, isa_reserve_irq(0));
1224 fd06c375 bellard
    pcspk_init(pit);
1225 16b29ae1 aliguori
    if (!no_hpet) {
1226 1452411b Avi Kivity
        hpet_init(isa_irq);
1227 16b29ae1 aliguori
    }
1228 b41a2cd1 bellard
1229 8d11df9e bellard
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1230 8d11df9e bellard
        if (serial_hds[i]) {
1231 ac0be998 Gerd Hoffmann
            serial_isa_init(i, serial_hds[i]);
1232 8d11df9e bellard
        }
1233 8d11df9e bellard
    }
1234 b41a2cd1 bellard
1235 6508fe59 bellard
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1236 6508fe59 bellard
        if (parallel_hds[i]) {
1237 021f0674 Gerd Hoffmann
            parallel_init(i, parallel_hds[i]);
1238 6508fe59 bellard
        }
1239 6508fe59 bellard
    }
1240 6508fe59 bellard
1241 a41b2ff2 pbrook
    for(i = 0; i < nb_nics; i++) {
1242 cb457d76 aliguori
        NICInfo *nd = &nd_table[i];
1243 cb457d76 aliguori
1244 cb457d76 aliguori
        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1245 3a38d437 Jes Sorensen
            pc_init_ne2k_isa(nd);
1246 cb457d76 aliguori
        else
1247 07caea31 Markus Armbruster
            pci_nic_init_nofail(nd, "e1000", NULL);
1248 a41b2ff2 pbrook
    }
1249 b41a2cd1 bellard
1250 e4bcb14c ths
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1251 e4bcb14c ths
        fprintf(stderr, "qemu: too many IDE bus\n");
1252 e4bcb14c ths
        exit(1);
1253 e4bcb14c ths
    }
1254 e4bcb14c ths
1255 e4bcb14c ths
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1256 f455e98c Gerd Hoffmann
        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1257 e4bcb14c ths
    }
1258 e4bcb14c ths
1259 a41b2ff2 pbrook
    if (pci_enabled) {
1260 ae027ad3 Stefan Weil
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
1261 a41b2ff2 pbrook
    } else {
1262 e4bcb14c ths
        for(i = 0; i < MAX_IDE_BUS; i++) {
1263 dea21e97 Gerd Hoffmann
            isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
1264 e4bcb14c ths
                         hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1265 69b91039 bellard
        }
1266 b41a2cd1 bellard
    }
1267 69b91039 bellard
1268 2e15e23b Gerd Hoffmann
    isa_dev = isa_create_simple("i8042");
1269 7c29d0c0 bellard
    DMA_init(0);
1270 6a36d84e bellard
#ifdef HAS_AUDIO
1271 1452411b Avi Kivity
    audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
1272 fb065187 bellard
#endif
1273 80cabfad bellard
1274 e4bcb14c ths
    for(i = 0; i < MAX_FD; i++) {
1275 fd8014e1 Gerd Hoffmann
        fd[i] = drive_get(IF_FLOPPY, 0, i);
1276 e4bcb14c ths
    }
1277 86c86157 Gerd Hoffmann
    floppy_controller = fdctrl_init_isa(fd);
1278 b41a2cd1 bellard
1279 00f82b8a aurel32
    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1280 69b91039 bellard
1281 bb36d470 bellard
    if (pci_enabled && usb_enabled) {
1282 afcc3cdf ths
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1283 bb36d470 bellard
    }
1284 bb36d470 bellard
1285 6515b203 bellard
    if (pci_enabled && acpi_enabled) {
1286 3fffc223 ths
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1287 0ff596d0 pbrook
        i2c_bus *smbus;
1288 0ff596d0 pbrook
1289 0ff596d0 pbrook
        /* TODO: Populate SPD eeprom data.  */
1290 3a38d437 Jes Sorensen
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
1291 3a38d437 Jes Sorensen
                              isa_reserve_irq(9));
1292 3fffc223 ths
        for (i = 0; i < 8; i++) {
1293 1ea96673 Paul Brook
            DeviceState *eeprom;
1294 02e2da45 Paul Brook
            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1295 5b7f5327 Juan Quintela
            qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
1296 ee6847d1 Gerd Hoffmann
            qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1297 e23a1b33 Markus Armbruster
            qdev_init_nofail(eeprom);
1298 3fffc223 ths
        }
1299 3f84865a Gerd Hoffmann
        piix4_acpi_system_hot_add_init(pci_bus);
1300 6515b203 bellard
    }
1301 3b46e624 ths
1302 a5954d5c bellard
    if (i440fx_state) {
1303 a5954d5c bellard
        i440fx_init_memory_mappings(i440fx_state);
1304 a5954d5c bellard
    }
1305 e4bcb14c ths
1306 7d8406be pbrook
    if (pci_enabled) {
1307 e4bcb14c ths
        int max_bus;
1308 9be5dafe Paul Brook
        int bus;
1309 96d30e48 ths
1310 e4bcb14c ths
        max_bus = drive_get_max_bus(IF_SCSI);
1311 e4bcb14c ths
        for (bus = 0; bus <= max_bus; bus++) {
1312 9be5dafe Paul Brook
            pci_create_simple(pci_bus, -1, "lsi53c895a");
1313 e4bcb14c ths
        }
1314 7d8406be pbrook
    }
1315 6e02c38d aliguori
1316 a2fa19f9 aliguori
    /* Add virtio console devices */
1317 a2fa19f9 aliguori
    if (pci_enabled) {
1318 a2fa19f9 aliguori
        for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1319 0e058a8a Paul Brook
            if (virtcon_hds[i]) {
1320 caea79a9 Mark McLoughlin
                pci_create_simple(pci_bus, -1, "virtio-console-pci");
1321 0e058a8a Paul Brook
            }
1322 a2fa19f9 aliguori
        }
1323 a2fa19f9 aliguori
    }
1324 80cabfad bellard
}
1325 b5ff2d6e bellard
1326 c227f099 Anthony Liguori
static void pc_init_pci(ram_addr_t ram_size,
1327 3023f332 aliguori
                        const char *boot_device,
1328 5fafdf24 ths
                        const char *kernel_filename,
1329 3dbbdc25 bellard
                        const char *kernel_cmdline,
1330 94fc95cd j_mayer
                        const char *initrd_filename,
1331 94fc95cd j_mayer
                        const char *cpu_model)
1332 3dbbdc25 bellard
{
1333 fbe1b595 Paul Brook
    pc_init1(ram_size, boot_device,
1334 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
1335 caea79a9 Mark McLoughlin
             initrd_filename, cpu_model, 1);
1336 3dbbdc25 bellard
}
1337 3dbbdc25 bellard
1338 c227f099 Anthony Liguori
static void pc_init_isa(ram_addr_t ram_size,
1339 3023f332 aliguori
                        const char *boot_device,
1340 5fafdf24 ths
                        const char *kernel_filename,
1341 3dbbdc25 bellard
                        const char *kernel_cmdline,
1342 94fc95cd j_mayer
                        const char *initrd_filename,
1343 94fc95cd j_mayer
                        const char *cpu_model)
1344 3dbbdc25 bellard
{
1345 679a37af Gerd Hoffmann
    if (cpu_model == NULL)
1346 679a37af Gerd Hoffmann
        cpu_model = "486";
1347 fbe1b595 Paul Brook
    pc_init1(ram_size, boot_device,
1348 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
1349 caea79a9 Mark McLoughlin
             initrd_filename, cpu_model, 0);
1350 3dbbdc25 bellard
}
1351 3dbbdc25 bellard
1352 0bacd130 aliguori
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1353 0bacd130 aliguori
   BIOS will read it and start S3 resume at POST Entry */
1354 0bacd130 aliguori
void cmos_set_s3_resume(void)
1355 0bacd130 aliguori
{
1356 0bacd130 aliguori
    if (rtc_state)
1357 0bacd130 aliguori
        rtc_set_memory(rtc_state, 0xF, 0xFE);
1358 0bacd130 aliguori
}
1359 0bacd130 aliguori
1360 f80f9ec9 Anthony Liguori
static QEMUMachine pc_machine = {
1361 95747581 Mark McLoughlin
    .name = "pc-0.11",
1362 95747581 Mark McLoughlin
    .alias = "pc",
1363 a245f2e7 aurel32
    .desc = "Standard PC",
1364 a245f2e7 aurel32
    .init = pc_init_pci,
1365 b2097003 aliguori
    .max_cpus = 255,
1366 0c257437 Anthony Liguori
    .is_default = 1,
1367 3dbbdc25 bellard
};
1368 3dbbdc25 bellard
1369 96cc1810 Gerd Hoffmann
static QEMUMachine pc_machine_v0_10 = {
1370 96cc1810 Gerd Hoffmann
    .name = "pc-0.10",
1371 96cc1810 Gerd Hoffmann
    .desc = "Standard PC, qemu 0.10",
1372 96cc1810 Gerd Hoffmann
    .init = pc_init_pci,
1373 96cc1810 Gerd Hoffmann
    .max_cpus = 255,
1374 96cc1810 Gerd Hoffmann
    .compat_props = (CompatProperty[]) {
1375 ab73ff29 Gerd Hoffmann
        {
1376 ab73ff29 Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1377 ab73ff29 Gerd Hoffmann
            .property = "class",
1378 ab73ff29 Gerd Hoffmann
            .value    = stringify(PCI_CLASS_STORAGE_OTHER),
1379 d6beee99 Gerd Hoffmann
        },{
1380 d6beee99 Gerd Hoffmann
            .driver   = "virtio-console-pci",
1381 d6beee99 Gerd Hoffmann
            .property = "class",
1382 d6beee99 Gerd Hoffmann
            .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
1383 a1e0fea5 Gerd Hoffmann
        },{
1384 a1e0fea5 Gerd Hoffmann
            .driver   = "virtio-net-pci",
1385 a1e0fea5 Gerd Hoffmann
            .property = "vectors",
1386 a1e0fea5 Gerd Hoffmann
            .value    = stringify(0),
1387 177539e0 Gerd Hoffmann
        },{
1388 177539e0 Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1389 177539e0 Gerd Hoffmann
            .property = "vectors",
1390 177539e0 Gerd Hoffmann
            .value    = stringify(0),
1391 ab73ff29 Gerd Hoffmann
        },
1392 96cc1810 Gerd Hoffmann
        { /* end of list */ }
1393 96cc1810 Gerd Hoffmann
    },
1394 96cc1810 Gerd Hoffmann
};
1395 96cc1810 Gerd Hoffmann
1396 f80f9ec9 Anthony Liguori
static QEMUMachine isapc_machine = {
1397 a245f2e7 aurel32
    .name = "isapc",
1398 a245f2e7 aurel32
    .desc = "ISA-only PC",
1399 a245f2e7 aurel32
    .init = pc_init_isa,
1400 b2097003 aliguori
    .max_cpus = 1,
1401 b5ff2d6e bellard
};
1402 f80f9ec9 Anthony Liguori
1403 f80f9ec9 Anthony Liguori
static void pc_machine_init(void)
1404 f80f9ec9 Anthony Liguori
{
1405 f80f9ec9 Anthony Liguori
    qemu_register_machine(&pc_machine);
1406 96cc1810 Gerd Hoffmann
    qemu_register_machine(&pc_machine_v0_10);
1407 f80f9ec9 Anthony Liguori
    qemu_register_machine(&isapc_machine);
1408 f80f9ec9 Anthony Liguori
}
1409 f80f9ec9 Anthony Liguori
1410 f80f9ec9 Anthony Liguori
machine_init(pc_machine_init);