root / hw / ide / pci.c @ bc578fe0
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/*
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* QEMU IDE Emulation: PCI Bus support.
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*
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* Copyright (c) 2003 Fabrice Bellard
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* Copyright (c) 2006 Openedhand Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <hw/hw.h> |
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#include <hw/pc.h> |
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#include <hw/pci.h> |
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#include <hw/isa.h> |
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#include "block.h" |
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#include "block_int.h" |
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#include "sysemu.h" |
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#include "dma.h" |
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#include <hw/ide/pci.h> |
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void bmdma_cmd_writeb(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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BMDMAState *bm = opaque; |
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#ifdef DEBUG_IDE
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printf("%s: 0x%08x\n", __func__, val);
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#endif
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if (!(val & BM_CMD_START)) {
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/* XXX: do it better */
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ide_dma_cancel(bm); |
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bm->cmd = val & 0x09;
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} else {
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if (!(bm->status & BM_STATUS_DMAING)) {
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bm->status |= BM_STATUS_DMAING; |
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/* start dma transfer if possible */
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if (bm->dma_cb)
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bm->dma_cb(bm, 0);
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} |
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bm->cmd = val & 0x09;
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} |
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} |
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uint32_t bmdma_addr_readb(void *opaque, uint32_t addr)
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{ |
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BMDMAState *bm = opaque; |
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uint32_t val; |
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val = (bm->addr >> ((addr & 3) * 8)) & 0xff; |
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#ifdef DEBUG_IDE
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printf("%s: 0x%08x\n", __func__, val);
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#endif
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return val;
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} |
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void bmdma_addr_writeb(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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BMDMAState *bm = opaque; |
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int shift = (addr & 3) * 8; |
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#ifdef DEBUG_IDE
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printf("%s: 0x%08x\n", __func__, val);
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#endif
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bm->addr &= ~(0xFF << shift);
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bm->addr |= ((val & 0xFF) << shift) & ~3; |
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bm->cur_addr = bm->addr; |
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} |
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uint32_t bmdma_addr_readw(void *opaque, uint32_t addr)
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{ |
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BMDMAState *bm = opaque; |
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uint32_t val; |
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val = (bm->addr >> ((addr & 3) * 8)) & 0xffff; |
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#ifdef DEBUG_IDE
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printf("%s: 0x%08x\n", __func__, val);
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#endif
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return val;
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} |
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void bmdma_addr_writew(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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BMDMAState *bm = opaque; |
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int shift = (addr & 3) * 8; |
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#ifdef DEBUG_IDE
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printf("%s: 0x%08x\n", __func__, val);
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#endif
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bm->addr &= ~(0xFFFF << shift);
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bm->addr |= ((val & 0xFFFF) << shift) & ~3; |
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bm->cur_addr = bm->addr; |
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} |
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uint32_t bmdma_addr_readl(void *opaque, uint32_t addr)
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{ |
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BMDMAState *bm = opaque; |
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uint32_t val; |
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val = bm->addr; |
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#ifdef DEBUG_IDE
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printf("%s: 0x%08x\n", __func__, val);
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#endif
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return val;
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} |
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void bmdma_addr_writel(void *opaque, uint32_t addr, uint32_t val) |
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{ |
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BMDMAState *bm = opaque; |
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#ifdef DEBUG_IDE
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printf("%s: 0x%08x\n", __func__, val);
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#endif
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bm->addr = val & ~3;
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bm->cur_addr = bm->addr; |
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} |
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void pci_ide_save(QEMUFile* f, void *opaque) |
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{ |
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PCIIDEState *d = opaque; |
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int i;
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pci_device_save(&d->dev, f); |
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for(i = 0; i < 2; i++) { |
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BMDMAState *bm = &d->bmdma[i]; |
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uint8_t ifidx; |
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qemu_put_8s(f, &bm->cmd); |
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qemu_put_8s(f, &bm->status); |
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qemu_put_be32s(f, &bm->addr); |
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qemu_put_sbe64s(f, &bm->sector_num); |
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qemu_put_be32s(f, &bm->nsector); |
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ifidx = bm->unit + 2*i;
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qemu_put_8s(f, &ifidx); |
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/* XXX: if a transfer is pending, we do not save it yet */
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} |
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/* per IDE interface data */
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for(i = 0; i < 2; i++) { |
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idebus_save(f, d->bus+i); |
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} |
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/* per IDE drive data */
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for(i = 0; i < 2; i++) { |
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ide_save(f, &d->bus[i].ifs[0]);
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ide_save(f, &d->bus[i].ifs[1]);
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} |
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} |
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int pci_ide_load(QEMUFile* f, void *opaque, int version_id) |
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{ |
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PCIIDEState *d = opaque; |
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int ret, i;
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if (version_id != 2 && version_id != 3) |
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return -EINVAL;
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ret = pci_device_load(&d->dev, f); |
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if (ret < 0) |
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return ret;
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for(i = 0; i < 2; i++) { |
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BMDMAState *bm = &d->bmdma[i]; |
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uint8_t ifidx; |
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qemu_get_8s(f, &bm->cmd); |
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qemu_get_8s(f, &bm->status); |
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qemu_get_be32s(f, &bm->addr); |
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qemu_get_sbe64s(f, &bm->sector_num); |
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qemu_get_be32s(f, &bm->nsector); |
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qemu_get_8s(f, &ifidx); |
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bm->unit = ifidx & 1;
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/* XXX: if a transfer is pending, we do not save it yet */
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} |
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/* per IDE interface data */
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for(i = 0; i < 2; i++) { |
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idebus_load(f, d->bus+i, version_id); |
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} |
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/* per IDE drive data */
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for(i = 0; i < 2; i++) { |
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ide_load(f, &d->bus[i].ifs[0], version_id);
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ide_load(f, &d->bus[i].ifs[1], version_id);
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} |
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return 0; |
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} |
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void pci_ide_create_devs(PCIDevice *dev, DriveInfo **hd_table)
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{ |
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PCIIDEState *d = DO_UPCAST(PCIIDEState, dev, dev); |
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static const int bus[4] = { 0, 0, 1, 1 }; |
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static const int unit[4] = { 0, 1, 0, 1 }; |
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int i;
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for (i = 0; i < 4; i++) { |
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if (hd_table[i] == NULL) |
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continue;
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ide_create_drive(d->bus+bus[i], unit[i], hd_table[i]); |
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} |
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} |