Revision bd497938 target-sparc/translate.c

b/target-sparc/translate.c
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   SPARC translation
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   Copyright (C) 2003 Thomas M. Ogrisegg <tom@fnord.at>
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   Copyright (C) 2003 Fabrice Bellard
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   This library is free software; you can redistribute it and/or
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   modify it under the terms of the GNU Lesser General Public
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 */
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/*
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   SPARC has two pitfalls: Delay slots and (a)nullification.
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   This is currently solved as follows:
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   'call' instructions simply execute the delay slot before the actual
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   control transfer instructions.
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   'jmpl' instructions execute calculate the destination, then execute
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   the delay slot and then do the control transfer.
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   (conditional) branch instructions are the most difficult ones, as the
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   delay slot may be nullified (ie. not executed). This happens when a
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   conditional branch is not executed (thus no control transfer happens)
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   and the 'anull' bit in the branch instruction opcode is set. This is
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   currently solved by doing a jump after the delay slot instruction.
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   TODO-list:
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   Register window overflow/underflow check
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   NPC/PC static optimisations (use JUMP_TB when possible)
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   FPU-Instructions
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   Coprocessor-Instructions
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   Check signedness issues
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   Privileged instructions
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   Coprocessor-Instructions
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   Optimize synthetic instructions
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   Optional alignment and privileged instruction check
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   -- TMO, 09/03/03
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 */
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*/
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#include <stdarg.h>
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#include <stdlib.h>
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static void disas_sparc_insn(DisasContext * dc);
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typedef void (GenOpFunc) (void);
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typedef void (GenOpFunc1) (long);
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typedef void (GenOpFunc2) (long, long);
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typedef void (GenOpFunc3) (long, long, long);
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static GenOpFunc *gen_op_movl_TN_reg[2][32] = {
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    {
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     gen_op_movl_g0_T0,

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