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1 | b92e5a22 | bellard | /*
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2 | b92e5a22 | bellard | * Software MMU support
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3 | 5fafdf24 | ths | *
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4 | efbf29b6 | Blue Swirl | * Generate helpers used by TCG for qemu_ld/st ops and code load
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5 | efbf29b6 | Blue Swirl | * functions.
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6 | efbf29b6 | Blue Swirl | *
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7 | efbf29b6 | Blue Swirl | * Included from target op helpers and exec.c.
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8 | efbf29b6 | Blue Swirl | *
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9 | b92e5a22 | bellard | * Copyright (c) 2003 Fabrice Bellard
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10 | b92e5a22 | bellard | *
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11 | b92e5a22 | bellard | * This library is free software; you can redistribute it and/or
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12 | b92e5a22 | bellard | * modify it under the terms of the GNU Lesser General Public
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13 | b92e5a22 | bellard | * License as published by the Free Software Foundation; either
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14 | b92e5a22 | bellard | * version 2 of the License, or (at your option) any later version.
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15 | b92e5a22 | bellard | *
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16 | b92e5a22 | bellard | * This library is distributed in the hope that it will be useful,
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17 | b92e5a22 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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18 | b92e5a22 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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19 | b92e5a22 | bellard | * Lesser General Public License for more details.
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20 | b92e5a22 | bellard | *
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21 | b92e5a22 | bellard | * You should have received a copy of the GNU Lesser General Public
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22 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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23 | b92e5a22 | bellard | */
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24 | 29e922b6 | Blue Swirl | #include "qemu-timer.h" |
25 | 29e922b6 | Blue Swirl | |
26 | b92e5a22 | bellard | #define DATA_SIZE (1 << SHIFT) |
27 | b92e5a22 | bellard | |
28 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
29 | b92e5a22 | bellard | #define SUFFIX q
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30 | 61382a50 | bellard | #define USUFFIX q
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31 | b92e5a22 | bellard | #define DATA_TYPE uint64_t
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32 | b92e5a22 | bellard | #elif DATA_SIZE == 4 |
33 | b92e5a22 | bellard | #define SUFFIX l
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34 | 61382a50 | bellard | #define USUFFIX l
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35 | b92e5a22 | bellard | #define DATA_TYPE uint32_t
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36 | b92e5a22 | bellard | #elif DATA_SIZE == 2 |
37 | b92e5a22 | bellard | #define SUFFIX w
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38 | 61382a50 | bellard | #define USUFFIX uw
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39 | b92e5a22 | bellard | #define DATA_TYPE uint16_t
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40 | b92e5a22 | bellard | #elif DATA_SIZE == 1 |
41 | b92e5a22 | bellard | #define SUFFIX b
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42 | 61382a50 | bellard | #define USUFFIX ub
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43 | b92e5a22 | bellard | #define DATA_TYPE uint8_t
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44 | b92e5a22 | bellard | #else
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45 | b92e5a22 | bellard | #error unsupported data size
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46 | b92e5a22 | bellard | #endif
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47 | b92e5a22 | bellard | |
48 | b769d8fe | bellard | #ifdef SOFTMMU_CODE_ACCESS
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49 | b769d8fe | bellard | #define READ_ACCESS_TYPE 2 |
50 | 84b7b8e7 | bellard | #define ADDR_READ addr_code
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51 | b769d8fe | bellard | #else
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52 | b769d8fe | bellard | #define READ_ACCESS_TYPE 0 |
53 | 84b7b8e7 | bellard | #define ADDR_READ addr_read
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54 | b769d8fe | bellard | #endif
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55 | b769d8fe | bellard | |
56 | 5fafdf24 | ths | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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57 | 6ebbf390 | j_mayer | int mmu_idx,
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58 | 61382a50 | bellard | void *retaddr);
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59 | c227f099 | Anthony Liguori | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, |
60 | 2e70f6ef | pbrook | target_ulong addr, |
61 | 2e70f6ef | pbrook | void *retaddr)
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62 | b92e5a22 | bellard | { |
63 | b92e5a22 | bellard | DATA_TYPE res; |
64 | b92e5a22 | bellard | int index;
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65 | 0f459d16 | pbrook | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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66 | 0f459d16 | pbrook | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
67 | 2e70f6ef | pbrook | env->mem_io_pc = (unsigned long)retaddr; |
68 | 2e70f6ef | pbrook | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT)
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69 | 2e70f6ef | pbrook | && !can_do_io(env)) { |
70 | 2e70f6ef | pbrook | cpu_io_recompile(env, retaddr); |
71 | 2e70f6ef | pbrook | } |
72 | b92e5a22 | bellard | |
73 | db8886d3 | aliguori | env->mem_io_vaddr = addr; |
74 | b92e5a22 | bellard | #if SHIFT <= 2 |
75 | a4193c8a | bellard | res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr); |
76 | b92e5a22 | bellard | #else
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77 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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78 | a4193c8a | bellard | res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32; |
79 | a4193c8a | bellard | res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4); |
80 | b92e5a22 | bellard | #else
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81 | a4193c8a | bellard | res = io_mem_read[index][2](io_mem_opaque[index], physaddr);
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82 | a4193c8a | bellard | res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32; |
83 | b92e5a22 | bellard | #endif
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84 | b92e5a22 | bellard | #endif /* SHIFT > 2 */ |
85 | b92e5a22 | bellard | return res;
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86 | b92e5a22 | bellard | } |
87 | b92e5a22 | bellard | |
88 | b92e5a22 | bellard | /* handle all cases except unaligned access which span two pages */
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89 | d656469f | bellard | DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
90 | d656469f | bellard | int mmu_idx)
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91 | b92e5a22 | bellard | { |
92 | b92e5a22 | bellard | DATA_TYPE res; |
93 | 61382a50 | bellard | int index;
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94 | c27004ec | bellard | target_ulong tlb_addr; |
95 | 355b1943 | Paul Brook | target_phys_addr_t ioaddr; |
96 | 355b1943 | Paul Brook | unsigned long addend; |
97 | b92e5a22 | bellard | void *retaddr;
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98 | 3b46e624 | ths | |
99 | b92e5a22 | bellard | /* test if there is match for unaligned or IO access */
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100 | b92e5a22 | bellard | /* XXX: could done more in memory macro in a non portable way */
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101 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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102 | b92e5a22 | bellard | redo:
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103 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
104 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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105 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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106 | b92e5a22 | bellard | /* IO access */
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107 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
108 | b92e5a22 | bellard | goto do_unaligned_access;
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109 | 2e70f6ef | pbrook | retaddr = GETPC(); |
110 | 355b1943 | Paul Brook | ioaddr = env->iotlb[mmu_idx][index]; |
111 | 355b1943 | Paul Brook | res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr); |
112 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
113 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages or IO) */
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114 | b92e5a22 | bellard | do_unaligned_access:
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115 | 61382a50 | bellard | retaddr = GETPC(); |
116 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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117 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
118 | a64d4718 | bellard | #endif
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119 | 5fafdf24 | ths | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, |
120 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
121 | b92e5a22 | bellard | } else {
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122 | a64d4718 | bellard | /* unaligned/aligned access in the same page */
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123 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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124 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) { |
125 | a64d4718 | bellard | retaddr = GETPC(); |
126 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
127 | a64d4718 | bellard | } |
128 | a64d4718 | bellard | #endif
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129 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
130 | 0f459d16 | pbrook | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
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131 | b92e5a22 | bellard | } |
132 | b92e5a22 | bellard | } else {
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133 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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134 | 61382a50 | bellard | retaddr = GETPC(); |
135 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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136 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
137 | 6ebbf390 | j_mayer | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
138 | a64d4718 | bellard | #endif
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139 | bccd9ec5 | Blue Swirl | tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
140 | b92e5a22 | bellard | goto redo;
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141 | b92e5a22 | bellard | } |
142 | b92e5a22 | bellard | return res;
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143 | b92e5a22 | bellard | } |
144 | b92e5a22 | bellard | |
145 | b92e5a22 | bellard | /* handle all unaligned cases */
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146 | 5fafdf24 | ths | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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147 | 6ebbf390 | j_mayer | int mmu_idx,
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148 | 61382a50 | bellard | void *retaddr)
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149 | b92e5a22 | bellard | { |
150 | b92e5a22 | bellard | DATA_TYPE res, res1, res2; |
151 | 61382a50 | bellard | int index, shift;
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152 | 355b1943 | Paul Brook | target_phys_addr_t ioaddr; |
153 | 355b1943 | Paul Brook | unsigned long addend; |
154 | c27004ec | bellard | target_ulong tlb_addr, addr1, addr2; |
155 | b92e5a22 | bellard | |
156 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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157 | b92e5a22 | bellard | redo:
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158 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
159 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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160 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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161 | b92e5a22 | bellard | /* IO access */
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162 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
163 | b92e5a22 | bellard | goto do_unaligned_access;
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164 | 355b1943 | Paul Brook | ioaddr = env->iotlb[mmu_idx][index]; |
165 | 355b1943 | Paul Brook | res = glue(io_read, SUFFIX)(ioaddr, addr, retaddr); |
166 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
167 | b92e5a22 | bellard | do_unaligned_access:
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168 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages) */
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169 | b92e5a22 | bellard | addr1 = addr & ~(DATA_SIZE - 1);
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170 | b92e5a22 | bellard | addr2 = addr1 + DATA_SIZE; |
171 | 5fafdf24 | ths | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, |
172 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
173 | 5fafdf24 | ths | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, |
174 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
175 | b92e5a22 | bellard | shift = (addr & (DATA_SIZE - 1)) * 8; |
176 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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177 | b92e5a22 | bellard | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
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178 | b92e5a22 | bellard | #else
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179 | b92e5a22 | bellard | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift));
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180 | b92e5a22 | bellard | #endif
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181 | 6986f88c | bellard | res = (DATA_TYPE)res; |
182 | b92e5a22 | bellard | } else {
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183 | b92e5a22 | bellard | /* unaligned/aligned access in the same page */
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184 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
185 | 0f459d16 | pbrook | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
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186 | b92e5a22 | bellard | } |
187 | b92e5a22 | bellard | } else {
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188 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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189 | bccd9ec5 | Blue Swirl | tlb_fill(env, addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
190 | b92e5a22 | bellard | goto redo;
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191 | b92e5a22 | bellard | } |
192 | b92e5a22 | bellard | return res;
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193 | b92e5a22 | bellard | } |
194 | b92e5a22 | bellard | |
195 | b769d8fe | bellard | #ifndef SOFTMMU_CODE_ACCESS
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196 | b769d8fe | bellard | |
197 | 5fafdf24 | ths | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
198 | 5fafdf24 | ths | DATA_TYPE val, |
199 | 6ebbf390 | j_mayer | int mmu_idx,
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200 | b769d8fe | bellard | void *retaddr);
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201 | b769d8fe | bellard | |
202 | c227f099 | Anthony Liguori | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, |
203 | b769d8fe | bellard | DATA_TYPE val, |
204 | 0f459d16 | pbrook | target_ulong addr, |
205 | b769d8fe | bellard | void *retaddr)
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206 | b769d8fe | bellard | { |
207 | b769d8fe | bellard | int index;
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208 | 0f459d16 | pbrook | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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209 | 0f459d16 | pbrook | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
210 | 2e70f6ef | pbrook | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT)
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211 | 2e70f6ef | pbrook | && !can_do_io(env)) { |
212 | 2e70f6ef | pbrook | cpu_io_recompile(env, retaddr); |
213 | 2e70f6ef | pbrook | } |
214 | b769d8fe | bellard | |
215 | 2e70f6ef | pbrook | env->mem_io_vaddr = addr; |
216 | 2e70f6ef | pbrook | env->mem_io_pc = (unsigned long)retaddr; |
217 | b769d8fe | bellard | #if SHIFT <= 2 |
218 | b769d8fe | bellard | io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val); |
219 | b769d8fe | bellard | #else
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220 | b769d8fe | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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221 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32); |
222 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val); |
223 | b769d8fe | bellard | #else
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224 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr, val);
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225 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32); |
226 | b769d8fe | bellard | #endif
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227 | b769d8fe | bellard | #endif /* SHIFT > 2 */ |
228 | b769d8fe | bellard | } |
229 | b92e5a22 | bellard | |
230 | d656469f | bellard | void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
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231 | d656469f | bellard | DATA_TYPE val, |
232 | d656469f | bellard | int mmu_idx)
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233 | b92e5a22 | bellard | { |
234 | 355b1943 | Paul Brook | target_phys_addr_t ioaddr; |
235 | 355b1943 | Paul Brook | unsigned long addend; |
236 | c27004ec | bellard | target_ulong tlb_addr; |
237 | b92e5a22 | bellard | void *retaddr;
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238 | 61382a50 | bellard | int index;
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239 | 3b46e624 | ths | |
240 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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241 | b92e5a22 | bellard | redo:
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242 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
243 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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244 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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245 | b92e5a22 | bellard | /* IO access */
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246 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
247 | b92e5a22 | bellard | goto do_unaligned_access;
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248 | d720b93d | bellard | retaddr = GETPC(); |
249 | 355b1943 | Paul Brook | ioaddr = env->iotlb[mmu_idx][index]; |
250 | 355b1943 | Paul Brook | glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr); |
251 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
252 | b92e5a22 | bellard | do_unaligned_access:
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253 | 61382a50 | bellard | retaddr = GETPC(); |
254 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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255 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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256 | a64d4718 | bellard | #endif
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257 | 5fafdf24 | ths | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, |
258 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
259 | b92e5a22 | bellard | } else {
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260 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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261 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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262 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) { |
263 | a64d4718 | bellard | retaddr = GETPC(); |
264 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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265 | a64d4718 | bellard | } |
266 | a64d4718 | bellard | #endif
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267 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
268 | 0f459d16 | pbrook | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
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269 | b92e5a22 | bellard | } |
270 | b92e5a22 | bellard | } else {
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271 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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272 | 61382a50 | bellard | retaddr = GETPC(); |
273 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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274 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
275 | 6ebbf390 | j_mayer | do_unaligned_access(addr, 1, mmu_idx, retaddr);
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276 | a64d4718 | bellard | #endif
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277 | bccd9ec5 | Blue Swirl | tlb_fill(env, addr, 1, mmu_idx, retaddr);
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278 | b92e5a22 | bellard | goto redo;
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279 | b92e5a22 | bellard | } |
280 | b92e5a22 | bellard | } |
281 | b92e5a22 | bellard | |
282 | b92e5a22 | bellard | /* handles all unaligned cases */
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283 | 5fafdf24 | ths | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
284 | 61382a50 | bellard | DATA_TYPE val, |
285 | 6ebbf390 | j_mayer | int mmu_idx,
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286 | 61382a50 | bellard | void *retaddr)
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287 | b92e5a22 | bellard | { |
288 | 355b1943 | Paul Brook | target_phys_addr_t ioaddr; |
289 | 355b1943 | Paul Brook | unsigned long addend; |
290 | c27004ec | bellard | target_ulong tlb_addr; |
291 | 61382a50 | bellard | int index, i;
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292 | b92e5a22 | bellard | |
293 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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294 | b92e5a22 | bellard | redo:
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295 | 6ebbf390 | j_mayer | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
296 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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297 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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298 | b92e5a22 | bellard | /* IO access */
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299 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
300 | b92e5a22 | bellard | goto do_unaligned_access;
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301 | 355b1943 | Paul Brook | ioaddr = env->iotlb[mmu_idx][index]; |
302 | 355b1943 | Paul Brook | glue(io_write, SUFFIX)(ioaddr, val, addr, retaddr); |
303 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
304 | b92e5a22 | bellard | do_unaligned_access:
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305 | b92e5a22 | bellard | /* XXX: not efficient, but simple */
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306 | 6c41b272 | balrog | /* Note: relies on the fact that tlb_fill() does not remove the
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307 | 6c41b272 | balrog | * previous page from the TLB cache. */
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308 | 7221fa98 | balrog | for(i = DATA_SIZE - 1; i >= 0; i--) { |
309 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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310 | 5fafdf24 | ths | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
311 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
312 | b92e5a22 | bellard | #else
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313 | 5fafdf24 | ths | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
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314 | 6ebbf390 | j_mayer | mmu_idx, retaddr); |
315 | b92e5a22 | bellard | #endif
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316 | b92e5a22 | bellard | } |
317 | b92e5a22 | bellard | } else {
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318 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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319 | 0f459d16 | pbrook | addend = env->tlb_table[mmu_idx][index].addend; |
320 | 0f459d16 | pbrook | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
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321 | b92e5a22 | bellard | } |
322 | b92e5a22 | bellard | } else {
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323 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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324 | bccd9ec5 | Blue Swirl | tlb_fill(env, addr, 1, mmu_idx, retaddr);
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325 | b92e5a22 | bellard | goto redo;
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326 | b92e5a22 | bellard | } |
327 | b92e5a22 | bellard | } |
328 | b92e5a22 | bellard | |
329 | b769d8fe | bellard | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
330 | b769d8fe | bellard | |
331 | b769d8fe | bellard | #undef READ_ACCESS_TYPE
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332 | b92e5a22 | bellard | #undef SHIFT
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333 | b92e5a22 | bellard | #undef DATA_TYPE
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334 | b92e5a22 | bellard | #undef SUFFIX
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335 | 61382a50 | bellard | #undef USUFFIX
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336 | b92e5a22 | bellard | #undef DATA_SIZE
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337 | 84b7b8e7 | bellard | #undef ADDR_READ |