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1 | cdbdb648 | pbrook | /*
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2 | 69db0ac7 | pbrook | * Arm PrimeCell PL050 Keyboard / Mouse Interface
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3 | cdbdb648 | pbrook | *
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4 | cdbdb648 | pbrook | * Copyright (c) 2006 CodeSourcery.
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5 | cdbdb648 | pbrook | * Written by Paul Brook
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6 | cdbdb648 | pbrook | *
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7 | cdbdb648 | pbrook | * This code is licenced under the GPL.
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8 | cdbdb648 | pbrook | */
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9 | cdbdb648 | pbrook | |
10 | cdbdb648 | pbrook | #include "vl.h" |
11 | cdbdb648 | pbrook | |
12 | cdbdb648 | pbrook | typedef struct { |
13 | cdbdb648 | pbrook | void *dev;
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14 | cdbdb648 | pbrook | uint32_t base; |
15 | cdbdb648 | pbrook | uint32_t cr; |
16 | cdbdb648 | pbrook | uint32_t clk; |
17 | cdbdb648 | pbrook | uint32_t last; |
18 | cdbdb648 | pbrook | void *pic;
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19 | cdbdb648 | pbrook | int pending;
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20 | cdbdb648 | pbrook | int irq;
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21 | cdbdb648 | pbrook | int is_mouse;
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22 | cdbdb648 | pbrook | } pl050_state; |
23 | cdbdb648 | pbrook | |
24 | cdbdb648 | pbrook | static const unsigned char pl050_id[] = |
25 | cdbdb648 | pbrook | { 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 }; |
26 | cdbdb648 | pbrook | |
27 | cdbdb648 | pbrook | static void pl050_update(void *opaque, int level) |
28 | cdbdb648 | pbrook | { |
29 | cdbdb648 | pbrook | pl050_state *s = (pl050_state *)opaque; |
30 | cdbdb648 | pbrook | int raise;
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31 | cdbdb648 | pbrook | |
32 | cdbdb648 | pbrook | s->pending = level; |
33 | cdbdb648 | pbrook | raise = (s->pending && (s->cr & 0x10) != 0) |
34 | cdbdb648 | pbrook | || (s->cr & 0x08) != 0; |
35 | cdbdb648 | pbrook | pic_set_irq_new(s->pic, s->irq, raise); |
36 | cdbdb648 | pbrook | } |
37 | cdbdb648 | pbrook | |
38 | cdbdb648 | pbrook | static uint32_t pl050_read(void *opaque, target_phys_addr_t offset) |
39 | cdbdb648 | pbrook | { |
40 | cdbdb648 | pbrook | pl050_state *s = (pl050_state *)opaque; |
41 | cdbdb648 | pbrook | offset -= s->base; |
42 | cdbdb648 | pbrook | if (offset >= 0xfe0 && offset < 0x1000) |
43 | cdbdb648 | pbrook | return pl050_id[(offset - 0xfe0) >> 2]; |
44 | cdbdb648 | pbrook | |
45 | cdbdb648 | pbrook | switch (offset >> 2) { |
46 | cdbdb648 | pbrook | case 0: /* KMICR */ |
47 | cdbdb648 | pbrook | return s->cr;
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48 | cdbdb648 | pbrook | case 1: /* KMISTAT */ |
49 | cdbdb648 | pbrook | /* KMIC and KMID bits not implemented. */
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50 | cdbdb648 | pbrook | if (s->pending) {
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51 | cdbdb648 | pbrook | return 0x10; |
52 | cdbdb648 | pbrook | } else {
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53 | cdbdb648 | pbrook | return 0; |
54 | cdbdb648 | pbrook | } |
55 | cdbdb648 | pbrook | case 2: /* KMIDATA */ |
56 | cdbdb648 | pbrook | if (s->pending)
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57 | cdbdb648 | pbrook | s->last = ps2_read_data(s->dev); |
58 | cdbdb648 | pbrook | return s->last;
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59 | cdbdb648 | pbrook | case 3: /* KMICLKDIV */ |
60 | cdbdb648 | pbrook | return s->clk;
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61 | cdbdb648 | pbrook | case 4: /* KMIIR */ |
62 | cdbdb648 | pbrook | return s->pending | 2; |
63 | cdbdb648 | pbrook | default:
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64 | cdbdb648 | pbrook | cpu_abort (cpu_single_env, "pl050_read: Bad offset %x\n", offset);
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65 | cdbdb648 | pbrook | return 0; |
66 | cdbdb648 | pbrook | } |
67 | cdbdb648 | pbrook | } |
68 | cdbdb648 | pbrook | |
69 | cdbdb648 | pbrook | static void pl050_write(void *opaque, target_phys_addr_t offset, |
70 | cdbdb648 | pbrook | uint32_t value) |
71 | cdbdb648 | pbrook | { |
72 | cdbdb648 | pbrook | pl050_state *s = (pl050_state *)opaque; |
73 | cdbdb648 | pbrook | offset -= s->base; |
74 | cdbdb648 | pbrook | switch (offset >> 2) { |
75 | cdbdb648 | pbrook | case 0: /* KMICR */ |
76 | cdbdb648 | pbrook | s->cr = value; |
77 | cdbdb648 | pbrook | pl050_update(s, s->pending); |
78 | cdbdb648 | pbrook | /* ??? Need to implement the enable/disable bit. */
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79 | cdbdb648 | pbrook | break;
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80 | cdbdb648 | pbrook | case 2: /* KMIDATA */ |
81 | cdbdb648 | pbrook | /* ??? This should toggle the TX interrupt line. */
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82 | cdbdb648 | pbrook | /* ??? This means kbd/mouse can block each other. */
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83 | cdbdb648 | pbrook | if (s->is_mouse) {
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84 | cdbdb648 | pbrook | ps2_write_mouse(s->dev, value); |
85 | cdbdb648 | pbrook | } else {
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86 | cdbdb648 | pbrook | ps2_write_keyboard(s->dev, value); |
87 | cdbdb648 | pbrook | } |
88 | cdbdb648 | pbrook | break;
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89 | cdbdb648 | pbrook | case 3: /* KMICLKDIV */ |
90 | cdbdb648 | pbrook | s->clk = value; |
91 | cdbdb648 | pbrook | return;
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92 | cdbdb648 | pbrook | default:
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93 | cdbdb648 | pbrook | cpu_abort (cpu_single_env, "pl050_write: Bad offset %x\n", offset);
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94 | cdbdb648 | pbrook | } |
95 | cdbdb648 | pbrook | } |
96 | cdbdb648 | pbrook | static CPUReadMemoryFunc *pl050_readfn[] = {
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97 | cdbdb648 | pbrook | pl050_read, |
98 | cdbdb648 | pbrook | pl050_read, |
99 | cdbdb648 | pbrook | pl050_read |
100 | cdbdb648 | pbrook | }; |
101 | cdbdb648 | pbrook | |
102 | cdbdb648 | pbrook | static CPUWriteMemoryFunc *pl050_writefn[] = {
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103 | cdbdb648 | pbrook | pl050_write, |
104 | cdbdb648 | pbrook | pl050_write, |
105 | cdbdb648 | pbrook | pl050_write |
106 | cdbdb648 | pbrook | }; |
107 | cdbdb648 | pbrook | |
108 | cdbdb648 | pbrook | void pl050_init(uint32_t base, void *pic, int irq, int is_mouse) |
109 | cdbdb648 | pbrook | { |
110 | cdbdb648 | pbrook | int iomemtype;
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111 | cdbdb648 | pbrook | pl050_state *s; |
112 | cdbdb648 | pbrook | |
113 | cdbdb648 | pbrook | s = (pl050_state *)qemu_mallocz(sizeof(pl050_state));
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114 | cdbdb648 | pbrook | iomemtype = cpu_register_io_memory(0, pl050_readfn,
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115 | cdbdb648 | pbrook | pl050_writefn, s); |
116 | cdbdb648 | pbrook | cpu_register_physical_memory(base, 0x00000fff, iomemtype);
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117 | cdbdb648 | pbrook | s->base = base; |
118 | cdbdb648 | pbrook | s->pic = pic; |
119 | cdbdb648 | pbrook | s->irq = irq; |
120 | cdbdb648 | pbrook | s->is_mouse = is_mouse; |
121 | cdbdb648 | pbrook | if (is_mouse)
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122 | cdbdb648 | pbrook | s->dev = ps2_mouse_init(pl050_update, s); |
123 | cdbdb648 | pbrook | else
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124 | cdbdb648 | pbrook | s->dev = ps2_kbd_init(pl050_update, s); |
125 | cdbdb648 | pbrook | /* ??? Save/restore. */
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126 | cdbdb648 | pbrook | } |