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1 | b92e5a22 | bellard | /*
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2 | b92e5a22 | bellard | * Software MMU support
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3 | b92e5a22 | bellard | *
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4 | b92e5a22 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | b92e5a22 | bellard | *
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6 | b92e5a22 | bellard | * This library is free software; you can redistribute it and/or
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7 | b92e5a22 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | b92e5a22 | bellard | * License as published by the Free Software Foundation; either
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9 | b92e5a22 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | b92e5a22 | bellard | *
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11 | b92e5a22 | bellard | * This library is distributed in the hope that it will be useful,
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12 | b92e5a22 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | b92e5a22 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | b92e5a22 | bellard | * Lesser General Public License for more details.
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15 | b92e5a22 | bellard | *
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16 | b92e5a22 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | b92e5a22 | bellard | * License along with this library; if not, write to the Free Software
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18 | b92e5a22 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | b92e5a22 | bellard | */
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20 | b92e5a22 | bellard | #define DATA_SIZE (1 << SHIFT) |
21 | b92e5a22 | bellard | |
22 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
23 | b92e5a22 | bellard | #define SUFFIX q
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24 | 61382a50 | bellard | #define USUFFIX q
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25 | b92e5a22 | bellard | #define DATA_TYPE uint64_t
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26 | b92e5a22 | bellard | #elif DATA_SIZE == 4 |
27 | b92e5a22 | bellard | #define SUFFIX l
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28 | 61382a50 | bellard | #define USUFFIX l
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29 | b92e5a22 | bellard | #define DATA_TYPE uint32_t
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30 | b92e5a22 | bellard | #elif DATA_SIZE == 2 |
31 | b92e5a22 | bellard | #define SUFFIX w
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32 | 61382a50 | bellard | #define USUFFIX uw
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33 | b92e5a22 | bellard | #define DATA_TYPE uint16_t
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34 | b92e5a22 | bellard | #elif DATA_SIZE == 1 |
35 | b92e5a22 | bellard | #define SUFFIX b
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36 | 61382a50 | bellard | #define USUFFIX ub
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37 | b92e5a22 | bellard | #define DATA_TYPE uint8_t
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38 | b92e5a22 | bellard | #else
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39 | b92e5a22 | bellard | #error unsupported data size
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40 | b92e5a22 | bellard | #endif
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41 | b92e5a22 | bellard | |
42 | b769d8fe | bellard | #ifdef SOFTMMU_CODE_ACCESS
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43 | b769d8fe | bellard | #define READ_ACCESS_TYPE 2 |
44 | 84b7b8e7 | bellard | #define ADDR_READ addr_code
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45 | b769d8fe | bellard | #else
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46 | b769d8fe | bellard | #define READ_ACCESS_TYPE 0 |
47 | 84b7b8e7 | bellard | #define ADDR_READ addr_read
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48 | b769d8fe | bellard | #endif
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49 | b769d8fe | bellard | |
50 | c27004ec | bellard | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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51 | 61382a50 | bellard | int is_user,
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52 | 61382a50 | bellard | void *retaddr);
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53 | 108c49b8 | bellard | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, |
54 | c27004ec | bellard | target_ulong tlb_addr) |
55 | b92e5a22 | bellard | { |
56 | b92e5a22 | bellard | DATA_TYPE res; |
57 | b92e5a22 | bellard | int index;
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58 | b92e5a22 | bellard | |
59 | b92e5a22 | bellard | index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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60 | b92e5a22 | bellard | #if SHIFT <= 2 |
61 | a4193c8a | bellard | res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr); |
62 | b92e5a22 | bellard | #else
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63 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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64 | a4193c8a | bellard | res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32; |
65 | a4193c8a | bellard | res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4); |
66 | b92e5a22 | bellard | #else
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67 | a4193c8a | bellard | res = io_mem_read[index][2](io_mem_opaque[index], physaddr);
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68 | a4193c8a | bellard | res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32; |
69 | b92e5a22 | bellard | #endif
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70 | b92e5a22 | bellard | #endif /* SHIFT > 2 */ |
71 | f1c85677 | bellard | #ifdef USE_KQEMU
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72 | f1c85677 | bellard | env->last_io_time = cpu_get_time_fast(); |
73 | f1c85677 | bellard | #endif
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74 | b92e5a22 | bellard | return res;
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75 | b92e5a22 | bellard | } |
76 | b92e5a22 | bellard | |
77 | b92e5a22 | bellard | /* handle all cases except unaligned access which span two pages */
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78 | c27004ec | bellard | DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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79 | 61382a50 | bellard | int is_user)
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80 | b92e5a22 | bellard | { |
81 | b92e5a22 | bellard | DATA_TYPE res; |
82 | 61382a50 | bellard | int index;
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83 | c27004ec | bellard | target_ulong tlb_addr; |
84 | 108c49b8 | bellard | target_phys_addr_t physaddr; |
85 | b92e5a22 | bellard | void *retaddr;
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86 | b92e5a22 | bellard | |
87 | b92e5a22 | bellard | /* test if there is match for unaligned or IO access */
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88 | b92e5a22 | bellard | /* XXX: could done more in memory macro in a non portable way */
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89 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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90 | b92e5a22 | bellard | redo:
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91 | 84b7b8e7 | bellard | tlb_addr = env->tlb_table[is_user][index].ADDR_READ; |
92 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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93 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
94 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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95 | b92e5a22 | bellard | /* IO access */
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96 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
97 | b92e5a22 | bellard | goto do_unaligned_access;
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98 | b92e5a22 | bellard | res = glue(io_read, SUFFIX)(physaddr, tlb_addr); |
99 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
100 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages or IO) */
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101 | b92e5a22 | bellard | do_unaligned_access:
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102 | 61382a50 | bellard | retaddr = GETPC(); |
103 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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104 | a64d4718 | bellard | do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr); |
105 | a64d4718 | bellard | #endif
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106 | 61382a50 | bellard | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, |
107 | 61382a50 | bellard | is_user, retaddr); |
108 | b92e5a22 | bellard | } else {
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109 | a64d4718 | bellard | /* unaligned/aligned access in the same page */
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110 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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111 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) { |
112 | a64d4718 | bellard | retaddr = GETPC(); |
113 | a64d4718 | bellard | do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr); |
114 | a64d4718 | bellard | } |
115 | a64d4718 | bellard | #endif
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116 | 108c49b8 | bellard | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr);
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117 | b92e5a22 | bellard | } |
118 | b92e5a22 | bellard | } else {
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119 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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120 | 61382a50 | bellard | retaddr = GETPC(); |
121 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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122 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
123 | a64d4718 | bellard | do_unaligned_access(addr, READ_ACCESS_TYPE, is_user, retaddr); |
124 | a64d4718 | bellard | #endif
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125 | b769d8fe | bellard | tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr); |
126 | b92e5a22 | bellard | goto redo;
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127 | b92e5a22 | bellard | } |
128 | b92e5a22 | bellard | return res;
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129 | b92e5a22 | bellard | } |
130 | b92e5a22 | bellard | |
131 | b92e5a22 | bellard | /* handle all unaligned cases */
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132 | c27004ec | bellard | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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133 | 61382a50 | bellard | int is_user,
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134 | 61382a50 | bellard | void *retaddr)
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135 | b92e5a22 | bellard | { |
136 | b92e5a22 | bellard | DATA_TYPE res, res1, res2; |
137 | 61382a50 | bellard | int index, shift;
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138 | 108c49b8 | bellard | target_phys_addr_t physaddr; |
139 | c27004ec | bellard | target_ulong tlb_addr, addr1, addr2; |
140 | b92e5a22 | bellard | |
141 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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142 | b92e5a22 | bellard | redo:
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143 | 84b7b8e7 | bellard | tlb_addr = env->tlb_table[is_user][index].ADDR_READ; |
144 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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145 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
146 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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147 | b92e5a22 | bellard | /* IO access */
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148 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
149 | b92e5a22 | bellard | goto do_unaligned_access;
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150 | b92e5a22 | bellard | res = glue(io_read, SUFFIX)(physaddr, tlb_addr); |
151 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
152 | b92e5a22 | bellard | do_unaligned_access:
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153 | b92e5a22 | bellard | /* slow unaligned access (it spans two pages) */
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154 | b92e5a22 | bellard | addr1 = addr & ~(DATA_SIZE - 1);
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155 | b92e5a22 | bellard | addr2 = addr1 + DATA_SIZE; |
156 | 61382a50 | bellard | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, |
157 | 61382a50 | bellard | is_user, retaddr); |
158 | 61382a50 | bellard | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, |
159 | 61382a50 | bellard | is_user, retaddr); |
160 | b92e5a22 | bellard | shift = (addr & (DATA_SIZE - 1)) * 8; |
161 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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162 | b92e5a22 | bellard | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift));
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163 | b92e5a22 | bellard | #else
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164 | b92e5a22 | bellard | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift));
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165 | b92e5a22 | bellard | #endif
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166 | 6986f88c | bellard | res = (DATA_TYPE)res; |
167 | b92e5a22 | bellard | } else {
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168 | b92e5a22 | bellard | /* unaligned/aligned access in the same page */
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169 | 108c49b8 | bellard | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)physaddr);
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170 | b92e5a22 | bellard | } |
171 | b92e5a22 | bellard | } else {
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172 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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173 | b769d8fe | bellard | tlb_fill(addr, READ_ACCESS_TYPE, is_user, retaddr); |
174 | b92e5a22 | bellard | goto redo;
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175 | b92e5a22 | bellard | } |
176 | b92e5a22 | bellard | return res;
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177 | b92e5a22 | bellard | } |
178 | b92e5a22 | bellard | |
179 | b769d8fe | bellard | #ifndef SOFTMMU_CODE_ACCESS
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180 | b769d8fe | bellard | |
181 | c27004ec | bellard | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
182 | b769d8fe | bellard | DATA_TYPE val, |
183 | b769d8fe | bellard | int is_user,
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184 | b769d8fe | bellard | void *retaddr);
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185 | b769d8fe | bellard | |
186 | 108c49b8 | bellard | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, |
187 | b769d8fe | bellard | DATA_TYPE val, |
188 | c27004ec | bellard | target_ulong tlb_addr, |
189 | b769d8fe | bellard | void *retaddr)
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190 | b769d8fe | bellard | { |
191 | b769d8fe | bellard | int index;
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192 | b769d8fe | bellard | |
193 | b769d8fe | bellard | index = (tlb_addr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);
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194 | b769d8fe | bellard | env->mem_write_vaddr = tlb_addr; |
195 | b769d8fe | bellard | env->mem_write_pc = (unsigned long)retaddr; |
196 | b769d8fe | bellard | #if SHIFT <= 2 |
197 | b769d8fe | bellard | io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val); |
198 | b769d8fe | bellard | #else
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199 | b769d8fe | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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200 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32); |
201 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val); |
202 | b769d8fe | bellard | #else
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203 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr, val);
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204 | b769d8fe | bellard | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32); |
205 | b769d8fe | bellard | #endif
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206 | b769d8fe | bellard | #endif /* SHIFT > 2 */ |
207 | f1c85677 | bellard | #ifdef USE_KQEMU
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208 | f1c85677 | bellard | env->last_io_time = cpu_get_time_fast(); |
209 | f1c85677 | bellard | #endif
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210 | b769d8fe | bellard | } |
211 | b92e5a22 | bellard | |
212 | c27004ec | bellard | void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
213 | 61382a50 | bellard | DATA_TYPE val, |
214 | 61382a50 | bellard | int is_user)
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215 | b92e5a22 | bellard | { |
216 | 108c49b8 | bellard | target_phys_addr_t physaddr; |
217 | c27004ec | bellard | target_ulong tlb_addr; |
218 | b92e5a22 | bellard | void *retaddr;
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219 | 61382a50 | bellard | int index;
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220 | b92e5a22 | bellard | |
221 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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222 | b92e5a22 | bellard | redo:
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223 | 84b7b8e7 | bellard | tlb_addr = env->tlb_table[is_user][index].addr_write; |
224 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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225 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
226 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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227 | b92e5a22 | bellard | /* IO access */
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228 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
229 | b92e5a22 | bellard | goto do_unaligned_access;
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230 | d720b93d | bellard | retaddr = GETPC(); |
231 | d720b93d | bellard | glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr); |
232 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
233 | b92e5a22 | bellard | do_unaligned_access:
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234 | 61382a50 | bellard | retaddr = GETPC(); |
235 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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236 | a64d4718 | bellard | do_unaligned_access(addr, 1, is_user, retaddr);
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237 | a64d4718 | bellard | #endif
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238 | 61382a50 | bellard | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, |
239 | 61382a50 | bellard | is_user, retaddr); |
240 | b92e5a22 | bellard | } else {
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241 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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242 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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243 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) { |
244 | a64d4718 | bellard | retaddr = GETPC(); |
245 | a64d4718 | bellard | do_unaligned_access(addr, 1, is_user, retaddr);
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246 | a64d4718 | bellard | } |
247 | a64d4718 | bellard | #endif
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248 | 108c49b8 | bellard | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val);
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249 | b92e5a22 | bellard | } |
250 | b92e5a22 | bellard | } else {
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251 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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252 | 61382a50 | bellard | retaddr = GETPC(); |
253 | a64d4718 | bellard | #ifdef ALIGNED_ONLY
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254 | a64d4718 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
255 | a64d4718 | bellard | do_unaligned_access(addr, 1, is_user, retaddr);
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256 | a64d4718 | bellard | #endif
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257 | 61382a50 | bellard | tlb_fill(addr, 1, is_user, retaddr);
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258 | b92e5a22 | bellard | goto redo;
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259 | b92e5a22 | bellard | } |
260 | b92e5a22 | bellard | } |
261 | b92e5a22 | bellard | |
262 | b92e5a22 | bellard | /* handles all unaligned cases */
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263 | c27004ec | bellard | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
264 | 61382a50 | bellard | DATA_TYPE val, |
265 | 61382a50 | bellard | int is_user,
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266 | 61382a50 | bellard | void *retaddr)
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267 | b92e5a22 | bellard | { |
268 | 108c49b8 | bellard | target_phys_addr_t physaddr; |
269 | c27004ec | bellard | target_ulong tlb_addr; |
270 | 61382a50 | bellard | int index, i;
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271 | b92e5a22 | bellard | |
272 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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273 | b92e5a22 | bellard | redo:
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274 | 84b7b8e7 | bellard | tlb_addr = env->tlb_table[is_user][index].addr_write; |
275 | b92e5a22 | bellard | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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276 | 84b7b8e7 | bellard | physaddr = addr + env->tlb_table[is_user][index].addend; |
277 | b92e5a22 | bellard | if (tlb_addr & ~TARGET_PAGE_MASK) {
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278 | b92e5a22 | bellard | /* IO access */
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279 | b92e5a22 | bellard | if ((addr & (DATA_SIZE - 1)) != 0) |
280 | b92e5a22 | bellard | goto do_unaligned_access;
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281 | d720b93d | bellard | glue(io_write, SUFFIX)(physaddr, val, tlb_addr, retaddr); |
282 | 98699967 | bellard | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
283 | b92e5a22 | bellard | do_unaligned_access:
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284 | b92e5a22 | bellard | /* XXX: not efficient, but simple */
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285 | b92e5a22 | bellard | for(i = 0;i < DATA_SIZE; i++) { |
286 | b92e5a22 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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287 | 61382a50 | bellard | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
288 | 61382a50 | bellard | is_user, retaddr); |
289 | b92e5a22 | bellard | #else
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290 | 61382a50 | bellard | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8),
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291 | 61382a50 | bellard | is_user, retaddr); |
292 | b92e5a22 | bellard | #endif
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293 | b92e5a22 | bellard | } |
294 | b92e5a22 | bellard | } else {
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295 | b92e5a22 | bellard | /* aligned/unaligned access in the same page */
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296 | 108c49b8 | bellard | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)physaddr, val);
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297 | b92e5a22 | bellard | } |
298 | b92e5a22 | bellard | } else {
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299 | b92e5a22 | bellard | /* the page is not in the TLB : fill it */
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300 | 61382a50 | bellard | tlb_fill(addr, 1, is_user, retaddr);
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301 | b92e5a22 | bellard | goto redo;
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302 | b92e5a22 | bellard | } |
303 | b92e5a22 | bellard | } |
304 | b92e5a22 | bellard | |
305 | b769d8fe | bellard | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
306 | b769d8fe | bellard | |
307 | b769d8fe | bellard | #undef READ_ACCESS_TYPE
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308 | b92e5a22 | bellard | #undef SHIFT
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309 | b92e5a22 | bellard | #undef DATA_TYPE
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310 | b92e5a22 | bellard | #undef SUFFIX
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311 | 61382a50 | bellard | #undef USUFFIX
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312 | b92e5a22 | bellard | #undef DATA_SIZE
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313 | 84b7b8e7 | bellard | #undef ADDR_READ |