root / hw / ppce500_spin.c @ bf3bc4c4
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/*
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* QEMU PowerPC e500v2 ePAPR spinning code
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*
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* Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Alexander Graf, <agraf@suse.de>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*
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* This code is not really a device, but models an interface that usually
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* firmware takes care of. It's used when QEMU plays the role of firmware.
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*
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* Specification:
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*
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* https://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.1.pdf
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*
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*/
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#include "hw.h" |
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#include "sysemu.h" |
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#include "sysbus.h" |
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#include "kvm.h" |
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#define MAX_CPUS 32 |
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typedef struct spin_info { |
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uint64_t addr; |
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uint64_t r3; |
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uint32_t resv; |
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uint32_t pir; |
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uint64_t reserved; |
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} QEMU_PACKED SpinInfo; |
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typedef struct spin_state { |
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SysBusDevice busdev; |
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MemoryRegion iomem; |
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SpinInfo spin[MAX_CPUS]; |
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} SpinState; |
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typedef struct spin_kick { |
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PowerPCCPU *cpu; |
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SpinInfo *spin; |
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} SpinKick; |
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static void spin_reset(void *opaque) |
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{ |
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SpinState *s = opaque; |
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int i;
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for (i = 0; i < MAX_CPUS; i++) { |
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SpinInfo *info = &s->spin[i]; |
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info->pir = i; |
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info->r3 = i; |
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info->addr = 1;
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} |
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} |
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/* Create -kernel TLB entries for BookE, linearly spanning 256MB. */
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static inline hwaddr booke206_page_size_to_tlb(uint64_t size) |
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{ |
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return (ffs(size >> 10) - 1) >> 1; |
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} |
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static void mmubooke_create_initial_mapping(CPUPPCState *env, |
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target_ulong va, |
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hwaddr pa, |
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hwaddr len) |
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{ |
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ppcmas_tlb_t *tlb = booke206_get_tlbm(env, 1, 0, 1); |
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hwaddr size; |
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size = (booke206_page_size_to_tlb(len) << MAS1_TSIZE_SHIFT); |
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tlb->mas1 = MAS1_VALID | size; |
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tlb->mas2 = (va & TARGET_PAGE_MASK) | MAS2_M; |
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tlb->mas7_3 = pa & TARGET_PAGE_MASK; |
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tlb->mas7_3 |= MAS3_UR | MAS3_UW | MAS3_UX | MAS3_SR | MAS3_SW | MAS3_SX; |
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env->tlb_dirty = true;
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} |
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static void spin_kick(void *data) |
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{ |
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SpinKick *kick = data; |
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CPUState *cpu = CPU(kick->cpu); |
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CPUPPCState *env = &kick->cpu->env; |
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SpinInfo *curspin = kick->spin; |
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hwaddr map_size = 64 * 1024 * 1024; |
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hwaddr map_start; |
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cpu_synchronize_state(env); |
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stl_p(&curspin->pir, env->spr[SPR_PIR]); |
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env->nip = ldq_p(&curspin->addr) & (map_size - 1);
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env->gpr[3] = ldq_p(&curspin->r3);
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env->gpr[4] = 0; |
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env->gpr[5] = 0; |
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env->gpr[6] = 0; |
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env->gpr[7] = map_size;
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env->gpr[8] = 0; |
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env->gpr[9] = 0; |
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map_start = ldq_p(&curspin->addr) & ~(map_size - 1);
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mmubooke_create_initial_mapping(env, 0, map_start, map_size);
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env->halted = 0;
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env->exception_index = -1;
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cpu->stopped = false;
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qemu_cpu_kick(cpu); |
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} |
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static void spin_write(void *opaque, hwaddr addr, uint64_t value, |
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unsigned len)
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{ |
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SpinState *s = opaque; |
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int env_idx = addr / sizeof(SpinInfo); |
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CPUPPCState *env; |
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SpinInfo *curspin = &s->spin[env_idx]; |
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uint8_t *curspin_p = (uint8_t*)curspin; |
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for (env = first_cpu; env != NULL; env = env->next_cpu) { |
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if (env->cpu_index == env_idx) {
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break;
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} |
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} |
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if (!env) {
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/* Unknown CPU */
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return;
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} |
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if (!env->cpu_index) {
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/* primary CPU doesn't spin */
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return;
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} |
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curspin_p = &curspin_p[addr % sizeof(SpinInfo)];
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switch (len) {
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case 1: |
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stb_p(curspin_p, value); |
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break;
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case 2: |
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stw_p(curspin_p, value); |
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break;
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case 4: |
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stl_p(curspin_p, value); |
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break;
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} |
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if (!(ldq_p(&curspin->addr) & 1)) { |
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/* run CPU */
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SpinKick kick = { |
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.cpu = ppc_env_get_cpu(env), |
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.spin = curspin, |
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}; |
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run_on_cpu(CPU(kick.cpu), spin_kick, &kick); |
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} |
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} |
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static uint64_t spin_read(void *opaque, hwaddr addr, unsigned len) |
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{ |
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SpinState *s = opaque; |
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uint8_t *spin_p = &((uint8_t*)s->spin)[addr]; |
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switch (len) {
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case 1: |
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return ldub_p(spin_p);
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case 2: |
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return lduw_p(spin_p);
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case 4: |
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return ldl_p(spin_p);
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default:
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hw_error("ppce500: unexpected %s with len = %u", __func__, len);
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} |
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} |
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static const MemoryRegionOps spin_rw_ops = { |
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.read = spin_read, |
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.write = spin_write, |
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.endianness = DEVICE_BIG_ENDIAN, |
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}; |
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static int ppce500_spin_initfn(SysBusDevice *dev) |
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{ |
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SpinState *s; |
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s = FROM_SYSBUS(SpinState, sysbus_from_qdev(dev)); |
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memory_region_init_io(&s->iomem, &spin_rw_ops, s, "e500 spin pv device",
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sizeof(SpinInfo) * MAX_CPUS);
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sysbus_init_mmio(dev, &s->iomem); |
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qemu_register_reset(spin_reset, s); |
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return 0; |
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} |
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static void ppce500_spin_class_init(ObjectClass *klass, void *data) |
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{ |
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SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
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k->init = ppce500_spin_initfn; |
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} |
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static TypeInfo ppce500_spin_info = {
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.name = "e500-spin",
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.parent = TYPE_SYS_BUS_DEVICE, |
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.instance_size = sizeof(SpinState),
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.class_init = ppce500_spin_class_init, |
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}; |
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static void ppce500_spin_register_types(void) |
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{ |
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type_register_static(&ppce500_spin_info); |
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} |
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type_init(ppce500_spin_register_types) |