root / target-sh4 / op.c @ c047da1a
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/*
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* SH4 emulation
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*
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* Copyright (c) 2005 Samuel Tardieu
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h" |
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static inline void set_t(void) |
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{
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env->sr |= SR_T; |
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} |
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static inline void clr_t(void) |
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{
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env->sr &= ~SR_T; |
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} |
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static inline void cond_t(int cond) |
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{
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if (cond)
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set_t(); |
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else
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clr_t(); |
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} |
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void OPPROTO op_cmp_str_T0_T1(void) |
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{
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cond_t((T0 & 0x000000ff) == (T1 & 0x000000ff) || |
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(T0 & 0x0000ff00) == (T1 & 0x0000ff00) || |
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(T0 & 0x00ff0000) == (T1 & 0x00ff0000) || |
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(T0 & 0xff000000) == (T1 & 0xff000000)); |
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RETURN(); |
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} |
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void OPPROTO op_div0s_T0_T1(void) |
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{
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if (T1 & 0x80000000) |
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env->sr |= SR_Q; |
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else
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env->sr &= ~SR_Q; |
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if (T0 & 0x80000000) |
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env->sr |= SR_M; |
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else
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env->sr &= ~SR_M; |
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cond_t((T1 ^ T0) & 0x80000000);
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RETURN(); |
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} |
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void OPPROTO op_div1_T0_T1(void) |
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{
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helper_div1_T0_T1(); |
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RETURN(); |
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} |
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void OPPROTO op_shad_T0_T1(void) |
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{
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if ((T0 & 0x80000000) == 0) |
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T1 <<= (T0 & 0x1f);
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else if ((T0 & 0x1f) == 0) |
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T1 = (T1 & 0x80000000)? 0xffffffff : 0; |
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else
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T1 = ((int32_t) T1) >> ((~T0 & 0x1f) + 1); |
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RETURN(); |
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} |
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void OPPROTO op_shld_T0_T1(void) |
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{
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if ((T0 & 0x80000000) == 0) |
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T1 <<= (T0 & 0x1f);
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else if ((T0 & 0x1f) == 0) |
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T1 = 0;
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else
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T1 = ((uint32_t) T1) >> ((~T0 & 0x1f) + 1); |
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RETURN(); |
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} |
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void OPPROTO op_rotcl_Rn(void) |
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{
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helper_rotcl(&env->gregs[PARAM1]); |
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RETURN(); |
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} |
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void OPPROTO op_rotcr_Rn(void) |
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{
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helper_rotcr(&env->gregs[PARAM1]); |
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RETURN(); |
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} |
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void OPPROTO op_rotl_Rn(void) |
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{
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cond_t(env->gregs[PARAM1] & 0x80000000);
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env->gregs[PARAM1] = (env->gregs[PARAM1] << 1) | (env->sr & SR_T);
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RETURN(); |
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} |
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void OPPROTO op_rotr_Rn(void) |
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{
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cond_t(env->gregs[PARAM1] & 1);
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env->gregs[PARAM1] = (env->gregs[PARAM1] >> 1) |
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((env->sr & SR_T) ? 0x80000000 : 0); |
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RETURN(); |
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} |
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void OPPROTO op_fmov_frN_FT0(void) |
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{
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FT0 = env->fregs[PARAM1]; |
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RETURN(); |
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} |
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void OPPROTO op_fmov_drN_DT0(void) |
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{
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CPU_DoubleU d; |
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d.l.upper = *(uint32_t *)&env->fregs[PARAM1]; |
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d.l.lower = *(uint32_t *)&env->fregs[PARAM1 + 1];
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DT0 = d.d; |
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RETURN(); |
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} |
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void OPPROTO op_fmov_frN_FT1(void) |
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{
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FT1 = env->fregs[PARAM1]; |
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RETURN(); |
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} |
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void OPPROTO op_fmov_drN_DT1(void) |
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{
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CPU_DoubleU d; |
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d.l.upper = *(uint32_t *)&env->fregs[PARAM1]; |
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d.l.lower = *(uint32_t *)&env->fregs[PARAM1 + 1];
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DT1 = d.d; |
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RETURN(); |
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} |
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void OPPROTO op_fmov_FT0_frN(void) |
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{
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env->fregs[PARAM1] = FT0; |
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RETURN(); |
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} |
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void OPPROTO op_fmov_DT0_drN(void) |
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{
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CPU_DoubleU d; |
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d.d = DT0; |
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*(uint32_t *)&env->fregs[PARAM1] = d.l.upper; |
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*(uint32_t *)&env->fregs[PARAM1 + 1] = d.l.lower;
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RETURN(); |
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} |
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void OPPROTO op_fadd_FT(void) |
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{
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FT0 = float32_add(FT0, FT1, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fadd_DT(void) |
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{
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DT0 = float64_add(DT0, DT1, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fsub_FT(void) |
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{
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FT0 = float32_sub(FT0, FT1, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fsub_DT(void) |
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{
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DT0 = float64_sub(DT0, DT1, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fmul_FT(void) |
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{
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FT0 = float32_mul(FT0, FT1, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fmul_DT(void) |
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{
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DT0 = float64_mul(DT0, DT1, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fdiv_FT(void) |
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{
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FT0 = float32_div(FT0, FT1, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fdiv_DT(void) |
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{
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DT0 = float64_div(DT0, DT1, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fcmp_eq_FT(void) |
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{
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cond_t(float32_compare(FT0, FT1, &env->fp_status) == 0);
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RETURN(); |
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} |
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void OPPROTO op_fcmp_eq_DT(void) |
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{
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cond_t(float64_compare(DT0, DT1, &env->fp_status) == 0);
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RETURN(); |
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} |
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void OPPROTO op_fcmp_gt_FT(void) |
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{
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cond_t(float32_compare(FT0, FT1, &env->fp_status) == 1);
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RETURN(); |
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} |
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void OPPROTO op_fcmp_gt_DT(void) |
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{
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cond_t(float64_compare(DT0, DT1, &env->fp_status) == 1);
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RETURN(); |
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} |
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void OPPROTO op_float_FT(void) |
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{
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FT0 = int32_to_float32(env->fpul, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_float_DT(void) |
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{
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DT0 = int32_to_float64(env->fpul, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_ftrc_FT(void) |
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{
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env->fpul = float32_to_int32_round_to_zero(FT0, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_ftrc_DT(void) |
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{
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env->fpul = float64_to_int32_round_to_zero(DT0, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fneg_frN(void) |
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{
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env->fregs[PARAM1] = float32_chs(env->fregs[PARAM1]); |
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RETURN(); |
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} |
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void OPPROTO op_fabs_FT(void) |
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{
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FT0 = float32_abs(FT0); |
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RETURN(); |
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} |
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void OPPROTO op_fabs_DT(void) |
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{
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DT0 = float64_abs(DT0); |
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RETURN(); |
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} |
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void OPPROTO op_fcnvsd_FT_DT(void) |
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{
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DT0 = float32_to_float64(FT0, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fcnvds_DT_FT(void) |
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{
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FT0 = float64_to_float32(DT0, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fsqrt_FT(void) |
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{
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FT0 = float32_sqrt(FT0, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fsqrt_DT(void) |
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{
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DT0 = float64_sqrt(DT0, &env->fp_status); |
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RETURN(); |
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} |
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void OPPROTO op_fmov_T0_frN(void) |
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{
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*(uint32_t *)&env->fregs[PARAM1] = T0; |
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RETURN(); |
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} |
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void OPPROTO op_movl_fpul_FT0(void) |
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{
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FT0 = *(float32 *)&env->fpul; |
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RETURN(); |
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} |
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void OPPROTO op_movl_FT0_fpul(void) |
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{
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*(float32 *)&env->fpul = FT0; |
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RETURN(); |
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} |
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/* Load and store */
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#define MEMSUFFIX _raw
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#include "op_mem.c" |
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#undef MEMSUFFIX
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_mem.c" |
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#undef MEMSUFFIX
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#define MEMSUFFIX _kernel
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#include "op_mem.c" |
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#undef MEMSUFFIX
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#endif
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