Revision c090a8f4

b/target-mips/op.c
1374 1374

  
1375 1375
void op_mtc0_intctl (void)
1376 1376
{
1377
    /* vectored interrupts not implemented */
1378
    env->CP0_IntCtl = 0;
1377
    /* vectored interrupts not implemented, timer on int 7,
1378
       no performance counters. */
1379
    env->CP0_IntCtl |= T0 & 0x000002e0;
1379 1380
    RETURN();
1380 1381
}
1381 1382

  
b/target-mips/translate.c
5405 5405
    /* SMP not implemented */
5406 5406
    env->CP0_EBase = 0x80000000;
5407 5407
    env->CP0_Status = (1 << CP0St_BEV) | (1 << CP0St_ERL);
5408
    /* vectored interrupts not implemented, timer on int 7,
5409
       no performance counters. */
5410
    env->CP0_IntCtl = 0xe0000000;
5408 5411
    env->CP0_WatchLo = 0;
5409 5412
    env->CP0_WatchHi = 0;
5410 5413
    /* Count register increments in debug mode, EJTAG version 1 */

Also available in: Unified diff