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/*
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 * QEMU System Emulator header
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 * 
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 * Copyright (c) 2003 Fabrice Bellard
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 * 
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#ifndef VL_H
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#define VL_H
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/* we put basic includes here to avoid repeating them in device drivers */
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <inttypes.h>
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#include <limits.h>
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#include <time.h>
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#include <ctype.h>
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#include <errno.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <sys/stat.h>
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#include "audio/audio.h"
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#ifndef O_LARGEFILE
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#define O_LARGEFILE 0
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#endif
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#ifndef O_BINARY
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#define O_BINARY 0
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#endif
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#ifdef _WIN32
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#define lseek _lseeki64
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#define ENOTSUP 4096
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/* XXX: find 64 bit version */
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#define ftruncate chsize
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static inline char *realpath(const char *path, char *resolved_path)
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{
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    _fullpath(resolved_path, path, _MAX_PATH);
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    return resolved_path;
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}
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#endif
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#ifdef QEMU_TOOL
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/* we use QEMU_TOOL in the command line tools which do not depend on
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   the target CPU type */
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#include "config-host.h"
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#include <setjmp.h>
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#include "osdep.h"
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#include "bswap.h"
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#else
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#include "cpu.h"
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#include "gdbstub.h"
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#endif /* !defined(QEMU_TOOL) */
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#ifndef glue
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#define xglue(x, y) x ## y
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#define glue(x, y) xglue(x, y)
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#define stringify(s)        tostring(s)
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#define tostring(s)        #s
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#endif
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/* vl.c */
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uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
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void hw_error(const char *fmt, ...);
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int get_image_size(const char *filename);
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int load_image(const char *filename, uint8_t *addr);
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extern const char *bios_dir;
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void pstrcpy(char *buf, int buf_size, const char *str);
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char *pstrcat(char *buf, int buf_size, const char *s);
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int strstart(const char *str, const char *val, const char **ptr);
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extern int vm_running;
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typedef void VMStopHandler(void *opaque, int reason);
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int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
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void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
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void vm_start(void);
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void vm_stop(int reason);
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typedef void QEMUResetHandler(void *opaque);
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void qemu_register_reset(QEMUResetHandler *func, void *opaque);
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void qemu_system_reset_request(void);
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void qemu_system_shutdown_request(void);
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void qemu_system_powerdown_request(void);
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#if !defined(TARGET_SPARC)
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// Please implement a power failure function to signal the OS
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#define qemu_system_powerdown() do{}while(0)
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#else
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void qemu_system_powerdown(void);
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#endif
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void main_loop_wait(int timeout);
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extern int audio_enabled;
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extern int sb16_enabled;
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extern int adlib_enabled;
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extern int gus_enabled;
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extern int es1370_enabled;
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extern int ram_size;
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extern int bios_size;
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extern int rtc_utc;
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extern int cirrus_vga_enabled;
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extern int graphic_width;
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extern int graphic_height;
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extern int graphic_depth;
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extern const char *keyboard_layout;
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extern int kqemu_allowed;
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extern int win2k_install_hack;
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extern int usb_enabled;
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/* XXX: make it dynamic */
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#if defined (TARGET_PPC)
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#define BIOS_SIZE ((512 + 32) * 1024)
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#elif defined(TARGET_MIPS)
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#define BIOS_SIZE (128 * 1024)
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#else
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#define BIOS_SIZE ((256 + 64) * 1024)
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#endif
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/* keyboard/mouse support */
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#define MOUSE_EVENT_LBUTTON 0x01
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#define MOUSE_EVENT_RBUTTON 0x02
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#define MOUSE_EVENT_MBUTTON 0x04
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typedef void QEMUPutKBDEvent(void *opaque, int keycode);
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typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
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void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
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void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
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void kbd_put_keycode(int keycode);
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void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
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/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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   constants) */
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#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
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#define QEMU_KEY_BACKSPACE  0x007f
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#define QEMU_KEY_UP         QEMU_KEY_ESC1('A')
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#define QEMU_KEY_DOWN       QEMU_KEY_ESC1('B')
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#define QEMU_KEY_RIGHT      QEMU_KEY_ESC1('C')
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#define QEMU_KEY_LEFT       QEMU_KEY_ESC1('D')
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#define QEMU_KEY_HOME       QEMU_KEY_ESC1(1)
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#define QEMU_KEY_END        QEMU_KEY_ESC1(4)
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#define QEMU_KEY_PAGEUP     QEMU_KEY_ESC1(5)
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#define QEMU_KEY_PAGEDOWN   QEMU_KEY_ESC1(6)
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#define QEMU_KEY_DELETE     QEMU_KEY_ESC1(3)
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#define QEMU_KEY_CTRL_UP         0xe400
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#define QEMU_KEY_CTRL_DOWN       0xe401
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#define QEMU_KEY_CTRL_LEFT       0xe402
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#define QEMU_KEY_CTRL_RIGHT      0xe403
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#define QEMU_KEY_CTRL_HOME       0xe404
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#define QEMU_KEY_CTRL_END        0xe405
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#define QEMU_KEY_CTRL_PAGEUP     0xe406
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#define QEMU_KEY_CTRL_PAGEDOWN   0xe407
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void kbd_put_keysym(int keysym);
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/* async I/O support */
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typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
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typedef int IOCanRWHandler(void *opaque);
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int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read, 
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                             IOReadHandler *fd_read, void *opaque);
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void qemu_del_fd_read_handler(int fd);
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/* character device */
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#define CHR_EVENT_BREAK 0 /* serial break char */
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#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
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typedef void IOEventHandler(void *opaque, int event);
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typedef struct CharDriverState {
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    int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
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    void (*chr_add_read_handler)(struct CharDriverState *s, 
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                                 IOCanRWHandler *fd_can_read, 
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                                 IOReadHandler *fd_read, void *opaque);
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    IOEventHandler *chr_event;
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    void (*chr_send_event)(struct CharDriverState *chr, int event);
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    void *opaque;
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} CharDriverState;
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void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
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int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
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void qemu_chr_send_event(CharDriverState *s, int event);
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void qemu_chr_add_read_handler(CharDriverState *s, 
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                               IOCanRWHandler *fd_can_read, 
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                               IOReadHandler *fd_read, void *opaque);
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void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
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/* consoles */
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typedef struct DisplayState DisplayState;
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typedef struct TextConsole TextConsole;
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extern TextConsole *vga_console;
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TextConsole *graphic_console_init(DisplayState *ds);
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int is_active_console(TextConsole *s);
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CharDriverState *text_console_init(DisplayState *ds);
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void console_select(unsigned int index);
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/* serial ports */
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#define MAX_SERIAL_PORTS 4
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extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
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/* parallel ports */
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#define MAX_PARALLEL_PORTS 3
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extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
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/* network redirectors support */
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#define MAX_NICS 8
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typedef struct NetDriverState {
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    int index; /* index number in QEMU */
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    uint8_t macaddr[6];
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    char ifname[16];
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    void (*send_packet)(struct NetDriverState *nd, 
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                        const uint8_t *buf, int size);
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    void (*add_read_packet)(struct NetDriverState *nd, 
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                            IOCanRWHandler *fd_can_read, 
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                            IOReadHandler *fd_read, void *opaque);
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    /* tun specific data */
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    int fd;
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    /* slirp specific data */
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} NetDriverState;
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extern int nb_nics;
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extern NetDriverState nd_table[MAX_NICS];
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void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size);
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void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read, 
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                          IOReadHandler *fd_read, void *opaque);
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/* timers */
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typedef struct QEMUClock QEMUClock;
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typedef struct QEMUTimer QEMUTimer;
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typedef void QEMUTimerCB(void *opaque);
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/* The real time clock should be used only for stuff which does not
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   change the virtual machine state, as it is run even if the virtual
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   machine is stopped. The real time clock has a frequency of 1000
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   Hz. */
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extern QEMUClock *rt_clock;
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/* The virtual clock is only run during the emulation. It is stopped
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   when the virtual machine is stopped. Virtual timers use a high
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   precision clock, usually cpu cycles (use ticks_per_sec). */
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extern QEMUClock *vm_clock;
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int64_t qemu_get_clock(QEMUClock *clock);
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QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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void qemu_free_timer(QEMUTimer *ts);
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void qemu_del_timer(QEMUTimer *ts);
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void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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int qemu_timer_pending(QEMUTimer *ts);
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extern int64_t ticks_per_sec;
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extern int pit_min_timer_count;
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void cpu_enable_ticks(void);
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void cpu_disable_ticks(void);
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/* VM Load/Save */
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typedef FILE QEMUFile;
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void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
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void qemu_put_byte(QEMUFile *f, int v);
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void qemu_put_be16(QEMUFile *f, unsigned int v);
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void qemu_put_be32(QEMUFile *f, unsigned int v);
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void qemu_put_be64(QEMUFile *f, uint64_t v);
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int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
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int qemu_get_byte(QEMUFile *f);
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unsigned int qemu_get_be16(QEMUFile *f);
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unsigned int qemu_get_be32(QEMUFile *f);
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uint64_t qemu_get_be64(QEMUFile *f);
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static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
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{
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    qemu_put_be64(f, *pv);
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}
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static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
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{
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    qemu_put_be32(f, *pv);
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}
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static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
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{
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    qemu_put_be16(f, *pv);
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}
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static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
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{
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    qemu_put_byte(f, *pv);
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}
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static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
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{
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    *pv = qemu_get_be64(f);
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}
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static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
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{
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    *pv = qemu_get_be32(f);
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}
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static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
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{
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    *pv = qemu_get_be16(f);
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}
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static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
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{
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    *pv = qemu_get_byte(f);
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}
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#if TARGET_LONG_BITS == 64
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#define qemu_put_betl qemu_put_be64
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#define qemu_get_betl qemu_get_be64
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#define qemu_put_betls qemu_put_be64s
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#define qemu_get_betls qemu_get_be64s
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#else
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#define qemu_put_betl qemu_put_be32
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#define qemu_get_betl qemu_get_be32
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#define qemu_put_betls qemu_put_be32s
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#define qemu_get_betls qemu_get_be32s
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#endif
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int64_t qemu_ftell(QEMUFile *f);
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int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
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typedef void SaveStateHandler(QEMUFile *f, void *opaque);
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typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
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int qemu_loadvm(const char *filename);
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int qemu_savevm(const char *filename);
378 8a7ddc38 bellard
int register_savevm(const char *idstr, 
379 8a7ddc38 bellard
                    int instance_id, 
380 8a7ddc38 bellard
                    int version_id,
381 8a7ddc38 bellard
                    SaveStateHandler *save_state,
382 8a7ddc38 bellard
                    LoadStateHandler *load_state,
383 8a7ddc38 bellard
                    void *opaque);
384 8a7ddc38 bellard
void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
385 8a7ddc38 bellard
void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
386 c4b1fcc0 bellard
387 fc01f7e7 bellard
/* block.c */
388 fc01f7e7 bellard
typedef struct BlockDriverState BlockDriverState;
389 ea2384d3 bellard
typedef struct BlockDriver BlockDriver;
390 ea2384d3 bellard
391 ea2384d3 bellard
extern BlockDriver bdrv_raw;
392 ea2384d3 bellard
extern BlockDriver bdrv_cow;
393 ea2384d3 bellard
extern BlockDriver bdrv_qcow;
394 ea2384d3 bellard
extern BlockDriver bdrv_vmdk;
395 3c56521b bellard
extern BlockDriver bdrv_cloop;
396 585d0ed9 bellard
extern BlockDriver bdrv_dmg;
397 a8753c34 bellard
extern BlockDriver bdrv_bochs;
398 6a0f9e82 bellard
extern BlockDriver bdrv_vpc;
399 de167e41 bellard
extern BlockDriver bdrv_vvfat;
400 ea2384d3 bellard
401 ea2384d3 bellard
void bdrv_init(void);
402 ea2384d3 bellard
BlockDriver *bdrv_find_format(const char *format_name);
403 ea2384d3 bellard
int bdrv_create(BlockDriver *drv, 
404 ea2384d3 bellard
                const char *filename, int64_t size_in_sectors,
405 ea2384d3 bellard
                const char *backing_file, int flags);
406 c4b1fcc0 bellard
BlockDriverState *bdrv_new(const char *device_name);
407 c4b1fcc0 bellard
void bdrv_delete(BlockDriverState *bs);
408 c4b1fcc0 bellard
int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
409 ea2384d3 bellard
int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
410 ea2384d3 bellard
               BlockDriver *drv);
411 fc01f7e7 bellard
void bdrv_close(BlockDriverState *bs);
412 fc01f7e7 bellard
int bdrv_read(BlockDriverState *bs, int64_t sector_num, 
413 fc01f7e7 bellard
              uint8_t *buf, int nb_sectors);
414 fc01f7e7 bellard
int bdrv_write(BlockDriverState *bs, int64_t sector_num, 
415 fc01f7e7 bellard
               const uint8_t *buf, int nb_sectors);
416 fc01f7e7 bellard
void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
417 33e3963e bellard
int bdrv_commit(BlockDriverState *bs);
418 77fef8c1 bellard
void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
419 33e3963e bellard
420 c4b1fcc0 bellard
#define BDRV_TYPE_HD     0
421 c4b1fcc0 bellard
#define BDRV_TYPE_CDROM  1
422 c4b1fcc0 bellard
#define BDRV_TYPE_FLOPPY 2
423 46d4767d bellard
#define BIOS_ATA_TRANSLATION_AUTO 0
424 46d4767d bellard
#define BIOS_ATA_TRANSLATION_NONE 1
425 46d4767d bellard
#define BIOS_ATA_TRANSLATION_LBA  2
426 c4b1fcc0 bellard
427 c4b1fcc0 bellard
void bdrv_set_geometry_hint(BlockDriverState *bs, 
428 c4b1fcc0 bellard
                            int cyls, int heads, int secs);
429 c4b1fcc0 bellard
void bdrv_set_type_hint(BlockDriverState *bs, int type);
430 46d4767d bellard
void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
431 c4b1fcc0 bellard
void bdrv_get_geometry_hint(BlockDriverState *bs, 
432 c4b1fcc0 bellard
                            int *pcyls, int *pheads, int *psecs);
433 c4b1fcc0 bellard
int bdrv_get_type_hint(BlockDriverState *bs);
434 46d4767d bellard
int bdrv_get_translation_hint(BlockDriverState *bs);
435 c4b1fcc0 bellard
int bdrv_is_removable(BlockDriverState *bs);
436 c4b1fcc0 bellard
int bdrv_is_read_only(BlockDriverState *bs);
437 c4b1fcc0 bellard
int bdrv_is_inserted(BlockDriverState *bs);
438 c4b1fcc0 bellard
int bdrv_is_locked(BlockDriverState *bs);
439 c4b1fcc0 bellard
void bdrv_set_locked(BlockDriverState *bs, int locked);
440 c4b1fcc0 bellard
void bdrv_set_change_cb(BlockDriverState *bs, 
441 c4b1fcc0 bellard
                        void (*change_cb)(void *opaque), void *opaque);
442 ea2384d3 bellard
void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
443 c4b1fcc0 bellard
void bdrv_info(void);
444 c4b1fcc0 bellard
BlockDriverState *bdrv_find(const char *name);
445 82c643ff bellard
void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
446 ea2384d3 bellard
int bdrv_is_encrypted(BlockDriverState *bs);
447 ea2384d3 bellard
int bdrv_set_key(BlockDriverState *bs, const char *key);
448 ea2384d3 bellard
void bdrv_iterate_format(void (*it)(void *opaque, const char *name), 
449 ea2384d3 bellard
                         void *opaque);
450 ea2384d3 bellard
const char *bdrv_get_device_name(BlockDriverState *bs);
451 c4b1fcc0 bellard
452 ea2384d3 bellard
int qcow_get_cluster_size(BlockDriverState *bs);
453 ea2384d3 bellard
int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
454 ea2384d3 bellard
                          const uint8_t *buf);
455 ea2384d3 bellard
456 ea2384d3 bellard
#ifndef QEMU_TOOL
457 54fa5af5 bellard
458 54fa5af5 bellard
typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, 
459 54fa5af5 bellard
                                 int boot_device,
460 54fa5af5 bellard
             DisplayState *ds, const char **fd_filename, int snapshot,
461 54fa5af5 bellard
             const char *kernel_filename, const char *kernel_cmdline,
462 54fa5af5 bellard
             const char *initrd_filename);
463 54fa5af5 bellard
464 54fa5af5 bellard
typedef struct QEMUMachine {
465 54fa5af5 bellard
    const char *name;
466 54fa5af5 bellard
    const char *desc;
467 54fa5af5 bellard
    QEMUMachineInitFunc *init;
468 54fa5af5 bellard
    struct QEMUMachine *next;
469 54fa5af5 bellard
} QEMUMachine;
470 54fa5af5 bellard
471 54fa5af5 bellard
int qemu_register_machine(QEMUMachine *m);
472 54fa5af5 bellard
473 54fa5af5 bellard
typedef void SetIRQFunc(void *opaque, int irq_num, int level);
474 3de388f6 bellard
typedef void IRQRequestFunc(void *opaque, int level);
475 54fa5af5 bellard
476 26aa7d72 bellard
/* ISA bus */
477 26aa7d72 bellard
478 26aa7d72 bellard
extern target_phys_addr_t isa_mem_base;
479 26aa7d72 bellard
480 26aa7d72 bellard
typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
481 26aa7d72 bellard
typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
482 26aa7d72 bellard
483 26aa7d72 bellard
int register_ioport_read(int start, int length, int size, 
484 26aa7d72 bellard
                         IOPortReadFunc *func, void *opaque);
485 26aa7d72 bellard
int register_ioport_write(int start, int length, int size, 
486 26aa7d72 bellard
                          IOPortWriteFunc *func, void *opaque);
487 69b91039 bellard
void isa_unassign_ioport(int start, int length);
488 69b91039 bellard
489 69b91039 bellard
/* PCI bus */
490 69b91039 bellard
491 69b91039 bellard
extern int pci_enabled;
492 69b91039 bellard
493 69b91039 bellard
extern target_phys_addr_t pci_mem_base;
494 69b91039 bellard
495 46e50e9d bellard
typedef struct PCIBus PCIBus;
496 69b91039 bellard
typedef struct PCIDevice PCIDevice;
497 69b91039 bellard
498 69b91039 bellard
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, 
499 69b91039 bellard
                                uint32_t address, uint32_t data, int len);
500 69b91039 bellard
typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, 
501 69b91039 bellard
                                   uint32_t address, int len);
502 69b91039 bellard
typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, 
503 69b91039 bellard
                                uint32_t addr, uint32_t size, int type);
504 69b91039 bellard
505 69b91039 bellard
#define PCI_ADDRESS_SPACE_MEM                0x00
506 69b91039 bellard
#define PCI_ADDRESS_SPACE_IO                0x01
507 69b91039 bellard
#define PCI_ADDRESS_SPACE_MEM_PREFETCH        0x08
508 69b91039 bellard
509 69b91039 bellard
typedef struct PCIIORegion {
510 5768f5ac bellard
    uint32_t addr; /* current PCI mapping address. -1 means not mapped */
511 69b91039 bellard
    uint32_t size;
512 69b91039 bellard
    uint8_t type;
513 69b91039 bellard
    PCIMapIORegionFunc *map_func;
514 69b91039 bellard
} PCIIORegion;
515 69b91039 bellard
516 8a8696a3 bellard
#define PCI_ROM_SLOT 6
517 8a8696a3 bellard
#define PCI_NUM_REGIONS 7
518 69b91039 bellard
struct PCIDevice {
519 69b91039 bellard
    /* PCI config space */
520 69b91039 bellard
    uint8_t config[256];
521 69b91039 bellard
522 69b91039 bellard
    /* the following fields are read only */
523 46e50e9d bellard
    PCIBus *bus;
524 69b91039 bellard
    int devfn;
525 69b91039 bellard
    char name[64];
526 8a8696a3 bellard
    PCIIORegion io_regions[PCI_NUM_REGIONS];
527 69b91039 bellard
    
528 69b91039 bellard
    /* do not access the following fields */
529 69b91039 bellard
    PCIConfigReadFunc *config_read;
530 69b91039 bellard
    PCIConfigWriteFunc *config_write;
531 5768f5ac bellard
    int irq_index;
532 69b91039 bellard
};
533 69b91039 bellard
534 46e50e9d bellard
PCIDevice *pci_register_device(PCIBus *bus, const char *name,
535 46e50e9d bellard
                               int instance_size, int devfn,
536 69b91039 bellard
                               PCIConfigReadFunc *config_read, 
537 69b91039 bellard
                               PCIConfigWriteFunc *config_write);
538 69b91039 bellard
539 69b91039 bellard
void pci_register_io_region(PCIDevice *pci_dev, int region_num, 
540 69b91039 bellard
                            uint32_t size, int type, 
541 69b91039 bellard
                            PCIMapIORegionFunc *map_func);
542 69b91039 bellard
543 5768f5ac bellard
void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
544 5768f5ac bellard
545 5768f5ac bellard
uint32_t pci_default_read_config(PCIDevice *d, 
546 5768f5ac bellard
                                 uint32_t address, int len);
547 5768f5ac bellard
void pci_default_write_config(PCIDevice *d, 
548 5768f5ac bellard
                              uint32_t address, uint32_t val, int len);
549 30ca2aab bellard
void generic_pci_save(QEMUFile* f, void *opaque);
550 30ca2aab bellard
int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
551 5768f5ac bellard
552 9995c51f bellard
extern struct PIIX3State *piix3_state;
553 9995c51f bellard
554 46e50e9d bellard
PCIBus *i440fx_init(void);
555 46e50e9d bellard
void piix3_init(PCIBus *bus);
556 69b91039 bellard
void pci_bios_init(void);
557 5768f5ac bellard
void pci_info(void);
558 26aa7d72 bellard
559 77d4bc34 bellard
/* temporary: will be moved in platform specific file */
560 54fa5af5 bellard
void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque);
561 46e50e9d bellard
PCIBus *pci_prep_init(void);
562 54fa5af5 bellard
PCIBus *pci_grackle_init(uint32_t base);
563 46e50e9d bellard
PCIBus *pci_pmac_init(void);
564 83469015 bellard
PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base);
565 77d4bc34 bellard
566 28b9b5af bellard
/* openpic.c */
567 28b9b5af bellard
typedef struct openpic_t openpic_t;
568 54fa5af5 bellard
void openpic_set_irq(void *opaque, int n_IRQ, int level);
569 e2733d20 bellard
openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus);
570 28b9b5af bellard
571 54fa5af5 bellard
/* heathrow_pic.c */
572 54fa5af5 bellard
typedef struct HeathrowPICS HeathrowPICS;
573 54fa5af5 bellard
void heathrow_pic_set_irq(void *opaque, int num, int level);
574 54fa5af5 bellard
HeathrowPICS *heathrow_pic_init(int *pmem_index);
575 54fa5af5 bellard
576 313aa567 bellard
/* vga.c */
577 313aa567 bellard
578 4fa0f5d2 bellard
#define VGA_RAM_SIZE (4096 * 1024)
579 313aa567 bellard
580 82c643ff bellard
struct DisplayState {
581 313aa567 bellard
    uint8_t *data;
582 313aa567 bellard
    int linesize;
583 313aa567 bellard
    int depth;
584 82c643ff bellard
    int width;
585 82c643ff bellard
    int height;
586 313aa567 bellard
    void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
587 313aa567 bellard
    void (*dpy_resize)(struct DisplayState *s, int w, int h);
588 313aa567 bellard
    void (*dpy_refresh)(struct DisplayState *s);
589 82c643ff bellard
};
590 313aa567 bellard
591 313aa567 bellard
static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
592 313aa567 bellard
{
593 313aa567 bellard
    s->dpy_update(s, x, y, w, h);
594 313aa567 bellard
}
595 313aa567 bellard
596 313aa567 bellard
static inline void dpy_resize(DisplayState *s, int w, int h)
597 313aa567 bellard
{
598 313aa567 bellard
    s->dpy_resize(s, w, h);
599 313aa567 bellard
}
600 313aa567 bellard
601 46e50e9d bellard
int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 
602 d5295253 bellard
                   unsigned long vga_ram_offset, int vga_ram_size,
603 d5295253 bellard
                   unsigned long vga_bios_offset, int vga_bios_size);
604 313aa567 bellard
void vga_update_display(void);
605 ee38b4c8 bellard
void vga_invalidate_display(void);
606 59a983b9 bellard
void vga_screen_dump(const char *filename);
607 313aa567 bellard
608 d6bfa22f bellard
/* cirrus_vga.c */
609 46e50e9d bellard
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, 
610 d6bfa22f bellard
                         unsigned long vga_ram_offset, int vga_ram_size);
611 d6bfa22f bellard
void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, 
612 d6bfa22f bellard
                         unsigned long vga_ram_offset, int vga_ram_size);
613 d6bfa22f bellard
614 313aa567 bellard
/* sdl.c */
615 d63d307f bellard
void sdl_display_init(DisplayState *ds, int full_screen);
616 313aa567 bellard
617 da4dbf74 bellard
/* cocoa.m */
618 da4dbf74 bellard
void cocoa_display_init(DisplayState *ds, int full_screen);
619 da4dbf74 bellard
620 5391d806 bellard
/* ide.c */
621 5391d806 bellard
#define MAX_DISKS 4
622 5391d806 bellard
623 5391d806 bellard
extern BlockDriverState *bs_table[MAX_DISKS];
624 5391d806 bellard
625 69b91039 bellard
void isa_ide_init(int iobase, int iobase2, int irq,
626 69b91039 bellard
                  BlockDriverState *hd0, BlockDriverState *hd1);
627 54fa5af5 bellard
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
628 54fa5af5 bellard
                         int secondary_ide_enabled);
629 46e50e9d bellard
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
630 28b9b5af bellard
int pmac_ide_init (BlockDriverState **hd_table,
631 54fa5af5 bellard
                   SetIRQFunc *set_irq, void *irq_opaque, int irq);
632 5391d806 bellard
633 1d14ffa9 bellard
/* es1370.c */
634 c0fe3827 bellard
int es1370_init (PCIBus *bus, AudioState *s);
635 1d14ffa9 bellard
636 fb065187 bellard
/* sb16.c */
637 c0fe3827 bellard
int SB16_init (AudioState *s);
638 fb065187 bellard
639 fb065187 bellard
/* adlib.c */
640 c0fe3827 bellard
int Adlib_init (AudioState *s);
641 fb065187 bellard
642 fb065187 bellard
/* gus.c */
643 c0fe3827 bellard
int GUS_init (AudioState *s);
644 27503323 bellard
645 27503323 bellard
/* dma.c */
646 85571bc7 bellard
typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
647 27503323 bellard
int DMA_get_channel_mode (int nchan);
648 85571bc7 bellard
int DMA_read_memory (int nchan, void *buf, int pos, int size);
649 85571bc7 bellard
int DMA_write_memory (int nchan, void *buf, int pos, int size);
650 27503323 bellard
void DMA_hold_DREQ (int nchan);
651 27503323 bellard
void DMA_release_DREQ (int nchan);
652 16f62432 bellard
void DMA_schedule(int nchan);
653 27503323 bellard
void DMA_run (void);
654 28b9b5af bellard
void DMA_init (int high_page_enable);
655 27503323 bellard
void DMA_register_channel (int nchan,
656 85571bc7 bellard
                           DMA_transfer_handler transfer_handler,
657 85571bc7 bellard
                           void *opaque);
658 7138fcfb bellard
/* fdc.c */
659 7138fcfb bellard
#define MAX_FD 2
660 7138fcfb bellard
extern BlockDriverState *fd_table[MAX_FD];
661 7138fcfb bellard
662 baca51fa bellard
typedef struct fdctrl_t fdctrl_t;
663 baca51fa bellard
664 baca51fa bellard
fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, 
665 baca51fa bellard
                       uint32_t io_base,
666 baca51fa bellard
                       BlockDriverState **fds);
667 baca51fa bellard
int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
668 7138fcfb bellard
669 80cabfad bellard
/* ne2000.c */
670 80cabfad bellard
671 69b91039 bellard
void isa_ne2000_init(int base, int irq, NetDriverState *nd);
672 46e50e9d bellard
void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
673 80cabfad bellard
674 80cabfad bellard
/* pckbd.c */
675 80cabfad bellard
676 80cabfad bellard
void kbd_init(void);
677 80cabfad bellard
678 80cabfad bellard
/* mc146818rtc.c */
679 80cabfad bellard
680 8a7ddc38 bellard
typedef struct RTCState RTCState;
681 80cabfad bellard
682 8a7ddc38 bellard
RTCState *rtc_init(int base, int irq);
683 8a7ddc38 bellard
void rtc_set_memory(RTCState *s, int addr, int val);
684 8a7ddc38 bellard
void rtc_set_date(RTCState *s, const struct tm *tm);
685 80cabfad bellard
686 80cabfad bellard
/* serial.c */
687 80cabfad bellard
688 c4b1fcc0 bellard
typedef struct SerialState SerialState;
689 82c643ff bellard
SerialState *serial_init(int base, int irq, CharDriverState *chr);
690 80cabfad bellard
691 6508fe59 bellard
/* parallel.c */
692 6508fe59 bellard
693 6508fe59 bellard
typedef struct ParallelState ParallelState;
694 6508fe59 bellard
ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
695 6508fe59 bellard
696 80cabfad bellard
/* i8259.c */
697 80cabfad bellard
698 3de388f6 bellard
typedef struct PicState2 PicState2;
699 3de388f6 bellard
extern PicState2 *isa_pic;
700 80cabfad bellard
void pic_set_irq(int irq, int level);
701 54fa5af5 bellard
void pic_set_irq_new(void *opaque, int irq, int level);
702 3de388f6 bellard
PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
703 d592d303 bellard
void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
704 d592d303 bellard
                          void *alt_irq_opaque);
705 3de388f6 bellard
int pic_read_irq(PicState2 *s);
706 3de388f6 bellard
void pic_update_irq(PicState2 *s);
707 3de388f6 bellard
uint32_t pic_intack_read(PicState2 *s);
708 c20709aa bellard
void pic_info(void);
709 4a0fb71e bellard
void irq_info(void);
710 80cabfad bellard
711 c27004ec bellard
/* APIC */
712 d592d303 bellard
typedef struct IOAPICState IOAPICState;
713 d592d303 bellard
714 c27004ec bellard
int apic_init(CPUState *env);
715 c27004ec bellard
int apic_get_interrupt(CPUState *env);
716 d592d303 bellard
IOAPICState *ioapic_init(void);
717 d592d303 bellard
void ioapic_set_irq(void *opaque, int vector, int level);
718 c27004ec bellard
719 80cabfad bellard
/* i8254.c */
720 80cabfad bellard
721 80cabfad bellard
#define PIT_FREQ 1193182
722 80cabfad bellard
723 ec844b96 bellard
typedef struct PITState PITState;
724 ec844b96 bellard
725 ec844b96 bellard
PITState *pit_init(int base, int irq);
726 ec844b96 bellard
void pit_set_gate(PITState *pit, int channel, int val);
727 ec844b96 bellard
int pit_get_gate(PITState *pit, int channel);
728 ec844b96 bellard
int pit_get_out(PITState *pit, int channel, int64_t current_time);
729 80cabfad bellard
730 80cabfad bellard
/* pc.c */
731 54fa5af5 bellard
extern QEMUMachine pc_machine;
732 80cabfad bellard
733 26aa7d72 bellard
/* ppc.c */
734 54fa5af5 bellard
extern QEMUMachine prep_machine;
735 54fa5af5 bellard
extern QEMUMachine core99_machine;
736 54fa5af5 bellard
extern QEMUMachine heathrow_machine;
737 54fa5af5 bellard
738 6af0bf9c bellard
/* mips_r4k.c */
739 6af0bf9c bellard
extern QEMUMachine mips_machine;
740 6af0bf9c bellard
741 8cc43fef bellard
#ifdef TARGET_PPC
742 8cc43fef bellard
ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
743 8cc43fef bellard
#endif
744 64201201 bellard
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
745 77d4bc34 bellard
746 77d4bc34 bellard
extern CPUWriteMemoryFunc *PPC_io_write[];
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extern CPUReadMemoryFunc *PPC_io_read[];
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extern int prep_enabled;
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void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
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/* sun4m.c */
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extern QEMUMachine sun4m_machine;
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uint32_t iommu_translate(uint32_t addr);
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/* iommu.c */
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void *iommu_init(uint32_t addr);
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uint32_t iommu_translate_local(void *opaque, uint32_t addr);
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/* lance.c */
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void lance_init(NetDriverState *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
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/* tcx.c */
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void *tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
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               unsigned long vram_offset, int vram_size, int width, int height);
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void tcx_update_display(void *opaque);
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void tcx_invalidate_display(void *opaque);
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void tcx_screen_dump(void *opaque, const char *filename);
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/* slavio_intctl.c */
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void *slavio_intctl_init();
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void slavio_pic_info(void *opaque);
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void slavio_irq_info(void *opaque);
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void slavio_pic_set_irq(void *opaque, int irq, int level);
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/* magic-load.c */
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int load_elf(const char *filename, uint8_t *addr);
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int load_aout(const char *filename, uint8_t *addr);
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/* slavio_timer.c */
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void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2);
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/* slavio_serial.c */
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SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
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void slavio_serial_ms_kbd_init(int base, int irq);
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/* slavio_misc.c */
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void *slavio_misc_init(uint32_t base, int irq);
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void slavio_set_power_fail(void *opaque, int power_failing);
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/* esp.c */
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void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
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/* sun4u.c */
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extern QEMUMachine sun4u_machine;
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/* NVRAM helpers */
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#include "hw/m48t59.h"
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void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
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uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
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void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
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uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
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void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
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uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
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void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
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                       const unsigned char *str, uint32_t max);
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int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
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void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
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                    uint32_t start, uint32_t count);
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int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
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                          const unsigned char *arch,
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                          uint32_t RAM_size, int boot_device,
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                          uint32_t kernel_image, uint32_t kernel_size,
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                          const char *cmdline,
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                          uint32_t initrd_image, uint32_t initrd_size,
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                          uint32_t NVRAM_image,
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                          int width, int height, int depth);
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/* adb.c */
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#define MAX_ADB_DEVICES 16
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#define ADB_MAX_OUT_LEN 16
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typedef struct ADBDevice ADBDevice;
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/* buf = NULL means polling */
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typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
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                              const uint8_t *buf, int len);
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typedef int ADBDeviceReset(ADBDevice *d);
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struct ADBDevice {
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    struct ADBBusState *bus;
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    int devaddr;
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    int handler;
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    ADBDeviceRequest *devreq;
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    ADBDeviceReset *devreset;
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    void *opaque;
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};
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typedef struct ADBBusState {
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    ADBDevice devices[MAX_ADB_DEVICES];
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    int nb_devices;
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    int poll_index;
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} ADBBusState;
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int adb_request(ADBBusState *s, uint8_t *buf_out,
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                const uint8_t *buf, int len);
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int adb_poll(ADBBusState *s, uint8_t *buf_out);
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ADBDevice *adb_register_device(ADBBusState *s, int devaddr, 
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                               ADBDeviceRequest *devreq, 
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                               ADBDeviceReset *devreset, 
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                               void *opaque);
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void adb_kbd_init(ADBBusState *bus);
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void adb_mouse_init(ADBBusState *bus);
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/* cuda.c */
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extern ADBBusState adb_bus;
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int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
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#include "hw/usb.h"
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#endif /* defined(QEMU_TOOL) */
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/* monitor.c */
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void monitor_init(CharDriverState *hd, int show_banner);
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void term_puts(const char *str);
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void term_vprintf(const char *fmt, va_list ap);
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void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
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void term_flush(void);
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void term_print_help(void);
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void monitor_readline(const char *prompt, int is_password,
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                      char *buf, int buf_size);
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/* readline.c */
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typedef void ReadLineFunc(void *opaque, const char *str);
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extern int completion_index;
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void add_completion(const char *str);
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void readline_handle_byte(int ch);
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void readline_find_completion(const char *cmdline);
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const char *readline_get_history(unsigned int index);
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void readline_start(const char *prompt, int is_password,
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                    ReadLineFunc *readline_func, void *opaque);
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void kqemu_record_dump(void);
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#endif /* VL_H */