root / hw / acpi_piix4.c @ c1ded3dc
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1 | 93d89f63 | Isaku Yamahata | /*
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2 | 93d89f63 | Isaku Yamahata | * ACPI implementation
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3 | 93d89f63 | Isaku Yamahata | *
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4 | 93d89f63 | Isaku Yamahata | * Copyright (c) 2006 Fabrice Bellard
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5 | 93d89f63 | Isaku Yamahata | *
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6 | 93d89f63 | Isaku Yamahata | * This library is free software; you can redistribute it and/or
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7 | 93d89f63 | Isaku Yamahata | * modify it under the terms of the GNU Lesser General Public
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8 | 93d89f63 | Isaku Yamahata | * License version 2 as published by the Free Software Foundation.
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9 | 93d89f63 | Isaku Yamahata | *
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10 | 93d89f63 | Isaku Yamahata | * This library is distributed in the hope that it will be useful,
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11 | 93d89f63 | Isaku Yamahata | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 | 93d89f63 | Isaku Yamahata | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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13 | 93d89f63 | Isaku Yamahata | * Lesser General Public License for more details.
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14 | 93d89f63 | Isaku Yamahata | *
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15 | 93d89f63 | Isaku Yamahata | * You should have received a copy of the GNU Lesser General Public
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16 | 93d89f63 | Isaku Yamahata | * License along with this library; if not, see <http://www.gnu.org/licenses/>
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17 | 93d89f63 | Isaku Yamahata | */
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18 | 93d89f63 | Isaku Yamahata | #include "hw.h" |
19 | 93d89f63 | Isaku Yamahata | #include "pc.h" |
20 | 93d89f63 | Isaku Yamahata | #include "apm.h" |
21 | 93d89f63 | Isaku Yamahata | #include "pm_smbus.h" |
22 | 93d89f63 | Isaku Yamahata | #include "pci.h" |
23 | 93d89f63 | Isaku Yamahata | #include "acpi.h" |
24 | 666daa68 | Markus Armbruster | #include "sysemu.h" |
25 | bf1b0071 | Blue Swirl | #include "range.h" |
26 | 93d89f63 | Isaku Yamahata | |
27 | 93d89f63 | Isaku Yamahata | //#define DEBUG
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28 | 93d89f63 | Isaku Yamahata | |
29 | 50d8ff8b | Isaku Yamahata | #ifdef DEBUG
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30 | 50d8ff8b | Isaku Yamahata | # define PIIX4_DPRINTF(format, ...) printf(format, ## __VA_ARGS__) |
31 | 50d8ff8b | Isaku Yamahata | #else
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32 | 50d8ff8b | Isaku Yamahata | # define PIIX4_DPRINTF(format, ...) do { } while (0) |
33 | 50d8ff8b | Isaku Yamahata | #endif
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34 | 50d8ff8b | Isaku Yamahata | |
35 | 93d89f63 | Isaku Yamahata | #define ACPI_DBG_IO_ADDR 0xb044 |
36 | 93d89f63 | Isaku Yamahata | |
37 | ac404095 | Isaku Yamahata | #define GPE_BASE 0xafe0 |
38 | ac404095 | Isaku Yamahata | #define PCI_BASE 0xae00 |
39 | ac404095 | Isaku Yamahata | #define PCI_EJ_BASE 0xae08 |
40 | ac404095 | Isaku Yamahata | |
41 | 4441a287 | Gleb Natapov | #define PIIX4_PCI_HOTPLUG_STATUS 2 |
42 | 4441a287 | Gleb Natapov | |
43 | ac404095 | Isaku Yamahata | struct gpe_regs {
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44 | ac404095 | Isaku Yamahata | uint16_t sts; /* status */
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45 | ac404095 | Isaku Yamahata | uint16_t en; /* enabled */
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46 | ac404095 | Isaku Yamahata | }; |
47 | ac404095 | Isaku Yamahata | |
48 | ac404095 | Isaku Yamahata | struct pci_status {
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49 | ac404095 | Isaku Yamahata | uint32_t up; |
50 | ac404095 | Isaku Yamahata | uint32_t down; |
51 | ac404095 | Isaku Yamahata | }; |
52 | ac404095 | Isaku Yamahata | |
53 | 93d89f63 | Isaku Yamahata | typedef struct PIIX4PMState { |
54 | 93d89f63 | Isaku Yamahata | PCIDevice dev; |
55 | 2871a3f6 | Avi Kivity | IORange ioport; |
56 | 93d89f63 | Isaku Yamahata | uint16_t pmsts; |
57 | 93d89f63 | Isaku Yamahata | uint16_t pmen; |
58 | 93d89f63 | Isaku Yamahata | uint16_t pmcntrl; |
59 | 93d89f63 | Isaku Yamahata | |
60 | 93d89f63 | Isaku Yamahata | APMState apm; |
61 | 93d89f63 | Isaku Yamahata | |
62 | 93d89f63 | Isaku Yamahata | QEMUTimer *tmr_timer; |
63 | 93d89f63 | Isaku Yamahata | int64_t tmr_overflow_time; |
64 | 93d89f63 | Isaku Yamahata | |
65 | 93d89f63 | Isaku Yamahata | PMSMBus smb; |
66 | e8ec0571 | Isaku Yamahata | uint32_t smb_io_base; |
67 | 93d89f63 | Isaku Yamahata | |
68 | 93d89f63 | Isaku Yamahata | qemu_irq irq; |
69 | 93d89f63 | Isaku Yamahata | qemu_irq cmos_s3; |
70 | 93d89f63 | Isaku Yamahata | qemu_irq smi_irq; |
71 | 93d89f63 | Isaku Yamahata | int kvm_enabled;
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72 | ac404095 | Isaku Yamahata | |
73 | ac404095 | Isaku Yamahata | /* for pci hotplug */
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74 | ac404095 | Isaku Yamahata | struct gpe_regs gpe;
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75 | ac404095 | Isaku Yamahata | struct pci_status pci0_status;
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76 | 93d89f63 | Isaku Yamahata | } PIIX4PMState; |
77 | 93d89f63 | Isaku Yamahata | |
78 | ac404095 | Isaku Yamahata | static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s); |
79 | ac404095 | Isaku Yamahata | |
80 | 93d89f63 | Isaku Yamahata | #define ACPI_ENABLE 0xf1 |
81 | 93d89f63 | Isaku Yamahata | #define ACPI_DISABLE 0xf0 |
82 | 93d89f63 | Isaku Yamahata | |
83 | 93d89f63 | Isaku Yamahata | static uint32_t get_pmtmr(PIIX4PMState *s)
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84 | 93d89f63 | Isaku Yamahata | { |
85 | 93d89f63 | Isaku Yamahata | uint32_t d; |
86 | 93d89f63 | Isaku Yamahata | d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, get_ticks_per_sec()); |
87 | 93d89f63 | Isaku Yamahata | return d & 0xffffff; |
88 | 93d89f63 | Isaku Yamahata | } |
89 | 93d89f63 | Isaku Yamahata | |
90 | 93d89f63 | Isaku Yamahata | static int get_pmsts(PIIX4PMState *s) |
91 | 93d89f63 | Isaku Yamahata | { |
92 | 93d89f63 | Isaku Yamahata | int64_t d; |
93 | 93d89f63 | Isaku Yamahata | |
94 | 93d89f63 | Isaku Yamahata | d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, |
95 | 93d89f63 | Isaku Yamahata | get_ticks_per_sec()); |
96 | 93d89f63 | Isaku Yamahata | if (d >= s->tmr_overflow_time)
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97 | 93d89f63 | Isaku Yamahata | s->pmsts |= ACPI_BITMASK_TIMER_STATUS; |
98 | 93d89f63 | Isaku Yamahata | return s->pmsts;
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99 | 93d89f63 | Isaku Yamahata | } |
100 | 93d89f63 | Isaku Yamahata | |
101 | 93d89f63 | Isaku Yamahata | static void pm_update_sci(PIIX4PMState *s) |
102 | 93d89f63 | Isaku Yamahata | { |
103 | 93d89f63 | Isaku Yamahata | int sci_level, pmsts;
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104 | 93d89f63 | Isaku Yamahata | int64_t expire_time; |
105 | 93d89f63 | Isaku Yamahata | |
106 | 93d89f63 | Isaku Yamahata | pmsts = get_pmsts(s); |
107 | 93d89f63 | Isaku Yamahata | sci_level = (((pmsts & s->pmen) & |
108 | 93d89f63 | Isaku Yamahata | (ACPI_BITMASK_RT_CLOCK_ENABLE | |
109 | 93d89f63 | Isaku Yamahata | ACPI_BITMASK_POWER_BUTTON_ENABLE | |
110 | 93d89f63 | Isaku Yamahata | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | |
111 | 633aa0ac | Gleb Natapov | ACPI_BITMASK_TIMER_ENABLE)) != 0) ||
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112 | 633aa0ac | Gleb Natapov | (((s->gpe.sts & s->gpe.en) & PIIX4_PCI_HOTPLUG_STATUS) != 0);
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113 | 633aa0ac | Gleb Natapov | |
114 | 93d89f63 | Isaku Yamahata | qemu_set_irq(s->irq, sci_level); |
115 | 93d89f63 | Isaku Yamahata | /* schedule a timer interruption if needed */
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116 | 93d89f63 | Isaku Yamahata | if ((s->pmen & ACPI_BITMASK_TIMER_ENABLE) &&
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117 | 93d89f63 | Isaku Yamahata | !(pmsts & ACPI_BITMASK_TIMER_STATUS)) { |
118 | 93d89f63 | Isaku Yamahata | expire_time = muldiv64(s->tmr_overflow_time, get_ticks_per_sec(), |
119 | 93d89f63 | Isaku Yamahata | PM_TIMER_FREQUENCY); |
120 | 93d89f63 | Isaku Yamahata | qemu_mod_timer(s->tmr_timer, expire_time); |
121 | 93d89f63 | Isaku Yamahata | } else {
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122 | 93d89f63 | Isaku Yamahata | qemu_del_timer(s->tmr_timer); |
123 | 93d89f63 | Isaku Yamahata | } |
124 | 93d89f63 | Isaku Yamahata | } |
125 | 93d89f63 | Isaku Yamahata | |
126 | 93d89f63 | Isaku Yamahata | static void pm_tmr_timer(void *opaque) |
127 | 93d89f63 | Isaku Yamahata | { |
128 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
129 | 93d89f63 | Isaku Yamahata | pm_update_sci(s); |
130 | 93d89f63 | Isaku Yamahata | } |
131 | 93d89f63 | Isaku Yamahata | |
132 | 2871a3f6 | Avi Kivity | static void pm_ioport_write(IORange *ioport, uint64_t addr, unsigned width, |
133 | 2871a3f6 | Avi Kivity | uint64_t val) |
134 | 93d89f63 | Isaku Yamahata | { |
135 | 2871a3f6 | Avi Kivity | PIIX4PMState *s = container_of(ioport, PIIX4PMState, ioport); |
136 | 2871a3f6 | Avi Kivity | |
137 | 2871a3f6 | Avi Kivity | if (width != 2) { |
138 | 2871a3f6 | Avi Kivity | PIIX4_DPRINTF("PM write port=0x%04x width=%d val=0x%08x\n",
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139 | 2871a3f6 | Avi Kivity | (unsigned)addr, width, (unsigned)val); |
140 | 2871a3f6 | Avi Kivity | } |
141 | 2871a3f6 | Avi Kivity | |
142 | 93d89f63 | Isaku Yamahata | switch(addr) {
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143 | 93d89f63 | Isaku Yamahata | case 0x00: |
144 | 93d89f63 | Isaku Yamahata | { |
145 | 93d89f63 | Isaku Yamahata | int64_t d; |
146 | 93d89f63 | Isaku Yamahata | int pmsts;
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147 | 93d89f63 | Isaku Yamahata | pmsts = get_pmsts(s); |
148 | 93d89f63 | Isaku Yamahata | if (pmsts & val & ACPI_BITMASK_TIMER_STATUS) {
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149 | 93d89f63 | Isaku Yamahata | /* if TMRSTS is reset, then compute the new overflow time */
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150 | 93d89f63 | Isaku Yamahata | d = muldiv64(qemu_get_clock(vm_clock), PM_TIMER_FREQUENCY, |
151 | 93d89f63 | Isaku Yamahata | get_ticks_per_sec()); |
152 | 93d89f63 | Isaku Yamahata | s->tmr_overflow_time = (d + 0x800000LL) & ~0x7fffffLL; |
153 | 93d89f63 | Isaku Yamahata | } |
154 | 93d89f63 | Isaku Yamahata | s->pmsts &= ~val; |
155 | 93d89f63 | Isaku Yamahata | pm_update_sci(s); |
156 | 93d89f63 | Isaku Yamahata | } |
157 | 93d89f63 | Isaku Yamahata | break;
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158 | 93d89f63 | Isaku Yamahata | case 0x02: |
159 | 93d89f63 | Isaku Yamahata | s->pmen = val; |
160 | 93d89f63 | Isaku Yamahata | pm_update_sci(s); |
161 | 93d89f63 | Isaku Yamahata | break;
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162 | 93d89f63 | Isaku Yamahata | case 0x04: |
163 | 93d89f63 | Isaku Yamahata | { |
164 | 93d89f63 | Isaku Yamahata | int sus_typ;
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165 | 93d89f63 | Isaku Yamahata | s->pmcntrl = val & ~(ACPI_BITMASK_SLEEP_ENABLE); |
166 | 93d89f63 | Isaku Yamahata | if (val & ACPI_BITMASK_SLEEP_ENABLE) {
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167 | 93d89f63 | Isaku Yamahata | /* change suspend type */
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168 | 93d89f63 | Isaku Yamahata | sus_typ = (val >> 10) & 7; |
169 | 93d89f63 | Isaku Yamahata | switch(sus_typ) {
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170 | 93d89f63 | Isaku Yamahata | case 0: /* soft power off */ |
171 | 93d89f63 | Isaku Yamahata | qemu_system_shutdown_request(); |
172 | 93d89f63 | Isaku Yamahata | break;
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173 | 93d89f63 | Isaku Yamahata | case 1: |
174 | 93d89f63 | Isaku Yamahata | /* ACPI_BITMASK_WAKE_STATUS should be set on resume.
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175 | 93d89f63 | Isaku Yamahata | Pretend that resume was caused by power button */
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176 | 93d89f63 | Isaku Yamahata | s->pmsts |= (ACPI_BITMASK_WAKE_STATUS | |
177 | 93d89f63 | Isaku Yamahata | ACPI_BITMASK_POWER_BUTTON_STATUS); |
178 | 93d89f63 | Isaku Yamahata | qemu_system_reset_request(); |
179 | 93d89f63 | Isaku Yamahata | if (s->cmos_s3) {
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180 | 93d89f63 | Isaku Yamahata | qemu_irq_raise(s->cmos_s3); |
181 | 93d89f63 | Isaku Yamahata | } |
182 | 93d89f63 | Isaku Yamahata | default:
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183 | 93d89f63 | Isaku Yamahata | break;
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184 | 93d89f63 | Isaku Yamahata | } |
185 | 93d89f63 | Isaku Yamahata | } |
186 | 93d89f63 | Isaku Yamahata | } |
187 | 93d89f63 | Isaku Yamahata | break;
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188 | 93d89f63 | Isaku Yamahata | default:
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189 | 93d89f63 | Isaku Yamahata | break;
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190 | 93d89f63 | Isaku Yamahata | } |
191 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("PM writew port=0x%04x val=0x%04x\n", addr, val);
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192 | 93d89f63 | Isaku Yamahata | } |
193 | 93d89f63 | Isaku Yamahata | |
194 | 2871a3f6 | Avi Kivity | static void pm_ioport_read(IORange *ioport, uint64_t addr, unsigned width, |
195 | 2871a3f6 | Avi Kivity | uint64_t *data) |
196 | 93d89f63 | Isaku Yamahata | { |
197 | 2871a3f6 | Avi Kivity | PIIX4PMState *s = container_of(ioport, PIIX4PMState, ioport); |
198 | 93d89f63 | Isaku Yamahata | uint32_t val; |
199 | 93d89f63 | Isaku Yamahata | |
200 | 93d89f63 | Isaku Yamahata | switch(addr) {
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201 | 93d89f63 | Isaku Yamahata | case 0x00: |
202 | 93d89f63 | Isaku Yamahata | val = get_pmsts(s); |
203 | 93d89f63 | Isaku Yamahata | break;
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204 | 93d89f63 | Isaku Yamahata | case 0x02: |
205 | 93d89f63 | Isaku Yamahata | val = s->pmen; |
206 | 93d89f63 | Isaku Yamahata | break;
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207 | 93d89f63 | Isaku Yamahata | case 0x04: |
208 | 93d89f63 | Isaku Yamahata | val = s->pmcntrl; |
209 | 93d89f63 | Isaku Yamahata | break;
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210 | 93d89f63 | Isaku Yamahata | case 0x08: |
211 | 93d89f63 | Isaku Yamahata | val = get_pmtmr(s); |
212 | 93d89f63 | Isaku Yamahata | break;
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213 | 93d89f63 | Isaku Yamahata | default:
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214 | 93d89f63 | Isaku Yamahata | val = 0;
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215 | 93d89f63 | Isaku Yamahata | break;
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216 | 93d89f63 | Isaku Yamahata | } |
217 | 2871a3f6 | Avi Kivity | PIIX4_DPRINTF("PM readw port=0x%04x val=0x%04x\n", addr, val);
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218 | 2871a3f6 | Avi Kivity | *data = val; |
219 | 93d89f63 | Isaku Yamahata | } |
220 | 93d89f63 | Isaku Yamahata | |
221 | 2871a3f6 | Avi Kivity | static const IORangeOps pm_iorange_ops = { |
222 | 2871a3f6 | Avi Kivity | .read = pm_ioport_read, |
223 | 2871a3f6 | Avi Kivity | .write = pm_ioport_write, |
224 | 2871a3f6 | Avi Kivity | }; |
225 | 2871a3f6 | Avi Kivity | |
226 | 93d89f63 | Isaku Yamahata | static void apm_ctrl_changed(uint32_t val, void *arg) |
227 | 93d89f63 | Isaku Yamahata | { |
228 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = arg; |
229 | 93d89f63 | Isaku Yamahata | |
230 | 93d89f63 | Isaku Yamahata | /* ACPI specs 3.0, 4.7.2.5 */
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231 | 93d89f63 | Isaku Yamahata | if (val == ACPI_ENABLE) {
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232 | 93d89f63 | Isaku Yamahata | s->pmcntrl |= ACPI_BITMASK_SCI_ENABLE; |
233 | 93d89f63 | Isaku Yamahata | } else if (val == ACPI_DISABLE) { |
234 | 93d89f63 | Isaku Yamahata | s->pmcntrl &= ~ACPI_BITMASK_SCI_ENABLE; |
235 | 93d89f63 | Isaku Yamahata | } |
236 | 93d89f63 | Isaku Yamahata | |
237 | 93d89f63 | Isaku Yamahata | if (s->dev.config[0x5b] & (1 << 1)) { |
238 | 93d89f63 | Isaku Yamahata | if (s->smi_irq) {
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239 | 93d89f63 | Isaku Yamahata | qemu_irq_raise(s->smi_irq); |
240 | 93d89f63 | Isaku Yamahata | } |
241 | 93d89f63 | Isaku Yamahata | } |
242 | 93d89f63 | Isaku Yamahata | } |
243 | 93d89f63 | Isaku Yamahata | |
244 | 93d89f63 | Isaku Yamahata | static void acpi_dbg_writel(void *opaque, uint32_t addr, uint32_t val) |
245 | 93d89f63 | Isaku Yamahata | { |
246 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("ACPI: DBG: 0x%08x\n", val);
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247 | 93d89f63 | Isaku Yamahata | } |
248 | 93d89f63 | Isaku Yamahata | |
249 | 93d89f63 | Isaku Yamahata | static void pm_io_space_update(PIIX4PMState *s) |
250 | 93d89f63 | Isaku Yamahata | { |
251 | 93d89f63 | Isaku Yamahata | uint32_t pm_io_base; |
252 | 93d89f63 | Isaku Yamahata | |
253 | 93d89f63 | Isaku Yamahata | if (s->dev.config[0x80] & 1) { |
254 | 93d89f63 | Isaku Yamahata | pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40));
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255 | 93d89f63 | Isaku Yamahata | pm_io_base &= 0xffc0;
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256 | 93d89f63 | Isaku Yamahata | |
257 | 93d89f63 | Isaku Yamahata | /* XXX: need to improve memory and ioport allocation */
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258 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("PM: mapping to 0x%x\n", pm_io_base);
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259 | 2871a3f6 | Avi Kivity | iorange_init(&s->ioport, &pm_iorange_ops, pm_io_base, 64);
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260 | 2871a3f6 | Avi Kivity | ioport_register(&s->ioport); |
261 | 93d89f63 | Isaku Yamahata | } |
262 | 93d89f63 | Isaku Yamahata | } |
263 | 93d89f63 | Isaku Yamahata | |
264 | 93d89f63 | Isaku Yamahata | static void pm_write_config(PCIDevice *d, |
265 | 93d89f63 | Isaku Yamahata | uint32_t address, uint32_t val, int len)
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266 | 93d89f63 | Isaku Yamahata | { |
267 | 93d89f63 | Isaku Yamahata | pci_default_write_config(d, address, val, len); |
268 | 93d89f63 | Isaku Yamahata | if (range_covers_byte(address, len, 0x80)) |
269 | 93d89f63 | Isaku Yamahata | pm_io_space_update((PIIX4PMState *)d); |
270 | 93d89f63 | Isaku Yamahata | } |
271 | 93d89f63 | Isaku Yamahata | |
272 | 93d89f63 | Isaku Yamahata | static int vmstate_acpi_post_load(void *opaque, int version_id) |
273 | 93d89f63 | Isaku Yamahata | { |
274 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
275 | 93d89f63 | Isaku Yamahata | |
276 | 93d89f63 | Isaku Yamahata | pm_io_space_update(s); |
277 | 93d89f63 | Isaku Yamahata | return 0; |
278 | 93d89f63 | Isaku Yamahata | } |
279 | 93d89f63 | Isaku Yamahata | |
280 | 4cf3e6f3 | Alex Williamson | static const VMStateDescription vmstate_gpe = { |
281 | 4cf3e6f3 | Alex Williamson | .name = "gpe",
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282 | 4cf3e6f3 | Alex Williamson | .version_id = 1,
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283 | 4cf3e6f3 | Alex Williamson | .minimum_version_id = 1,
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284 | 4cf3e6f3 | Alex Williamson | .minimum_version_id_old = 1,
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285 | 4cf3e6f3 | Alex Williamson | .fields = (VMStateField []) { |
286 | 4cf3e6f3 | Alex Williamson | VMSTATE_UINT16(sts, struct gpe_regs),
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287 | 4cf3e6f3 | Alex Williamson | VMSTATE_UINT16(en, struct gpe_regs),
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288 | 4cf3e6f3 | Alex Williamson | VMSTATE_END_OF_LIST() |
289 | 4cf3e6f3 | Alex Williamson | } |
290 | 4cf3e6f3 | Alex Williamson | }; |
291 | 4cf3e6f3 | Alex Williamson | |
292 | 4cf3e6f3 | Alex Williamson | static const VMStateDescription vmstate_pci_status = { |
293 | 4cf3e6f3 | Alex Williamson | .name = "pci_status",
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294 | 4cf3e6f3 | Alex Williamson | .version_id = 1,
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295 | 4cf3e6f3 | Alex Williamson | .minimum_version_id = 1,
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296 | 4cf3e6f3 | Alex Williamson | .minimum_version_id_old = 1,
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297 | 4cf3e6f3 | Alex Williamson | .fields = (VMStateField []) { |
298 | 4cf3e6f3 | Alex Williamson | VMSTATE_UINT32(up, struct pci_status),
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299 | 4cf3e6f3 | Alex Williamson | VMSTATE_UINT32(down, struct pci_status),
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300 | 4cf3e6f3 | Alex Williamson | VMSTATE_END_OF_LIST() |
301 | 4cf3e6f3 | Alex Williamson | } |
302 | 4cf3e6f3 | Alex Williamson | }; |
303 | 4cf3e6f3 | Alex Williamson | |
304 | 93d89f63 | Isaku Yamahata | static const VMStateDescription vmstate_acpi = { |
305 | 93d89f63 | Isaku Yamahata | .name = "piix4_pm",
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306 | 4cf3e6f3 | Alex Williamson | .version_id = 2,
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307 | 93d89f63 | Isaku Yamahata | .minimum_version_id = 1,
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308 | 93d89f63 | Isaku Yamahata | .minimum_version_id_old = 1,
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309 | 93d89f63 | Isaku Yamahata | .post_load = vmstate_acpi_post_load, |
310 | 93d89f63 | Isaku Yamahata | .fields = (VMStateField []) { |
311 | 93d89f63 | Isaku Yamahata | VMSTATE_PCI_DEVICE(dev, PIIX4PMState), |
312 | 93d89f63 | Isaku Yamahata | VMSTATE_UINT16(pmsts, PIIX4PMState), |
313 | 93d89f63 | Isaku Yamahata | VMSTATE_UINT16(pmen, PIIX4PMState), |
314 | 93d89f63 | Isaku Yamahata | VMSTATE_UINT16(pmcntrl, PIIX4PMState), |
315 | 93d89f63 | Isaku Yamahata | VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState),
|
316 | 93d89f63 | Isaku Yamahata | VMSTATE_TIMER(tmr_timer, PIIX4PMState), |
317 | 93d89f63 | Isaku Yamahata | VMSTATE_INT64(tmr_overflow_time, PIIX4PMState), |
318 | 4cf3e6f3 | Alex Williamson | VMSTATE_STRUCT(gpe, PIIX4PMState, 2, vmstate_gpe, struct gpe_regs), |
319 | 4cf3e6f3 | Alex Williamson | VMSTATE_STRUCT(pci0_status, PIIX4PMState, 2, vmstate_pci_status,
|
320 | 4cf3e6f3 | Alex Williamson | struct pci_status),
|
321 | 93d89f63 | Isaku Yamahata | VMSTATE_END_OF_LIST() |
322 | 93d89f63 | Isaku Yamahata | } |
323 | 93d89f63 | Isaku Yamahata | }; |
324 | 93d89f63 | Isaku Yamahata | |
325 | 93d89f63 | Isaku Yamahata | static void piix4_reset(void *opaque) |
326 | 93d89f63 | Isaku Yamahata | { |
327 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
328 | 93d89f63 | Isaku Yamahata | uint8_t *pci_conf = s->dev.config; |
329 | 93d89f63 | Isaku Yamahata | |
330 | 93d89f63 | Isaku Yamahata | pci_conf[0x58] = 0; |
331 | 93d89f63 | Isaku Yamahata | pci_conf[0x59] = 0; |
332 | 93d89f63 | Isaku Yamahata | pci_conf[0x5a] = 0; |
333 | 93d89f63 | Isaku Yamahata | pci_conf[0x5b] = 0; |
334 | 93d89f63 | Isaku Yamahata | |
335 | 93d89f63 | Isaku Yamahata | if (s->kvm_enabled) {
|
336 | 93d89f63 | Isaku Yamahata | /* Mark SMM as already inited (until KVM supports SMM). */
|
337 | 93d89f63 | Isaku Yamahata | pci_conf[0x5B] = 0x02; |
338 | 93d89f63 | Isaku Yamahata | } |
339 | 93d89f63 | Isaku Yamahata | } |
340 | 93d89f63 | Isaku Yamahata | |
341 | 93d89f63 | Isaku Yamahata | static void piix4_powerdown(void *opaque, int irq, int power_failing) |
342 | 93d89f63 | Isaku Yamahata | { |
343 | 93d89f63 | Isaku Yamahata | PIIX4PMState *s = opaque; |
344 | 93d89f63 | Isaku Yamahata | |
345 | 93d89f63 | Isaku Yamahata | if (!s) {
|
346 | 93d89f63 | Isaku Yamahata | qemu_system_shutdown_request(); |
347 | 93d89f63 | Isaku Yamahata | } else if (s->pmen & ACPI_BITMASK_POWER_BUTTON_ENABLE) { |
348 | 93d89f63 | Isaku Yamahata | s->pmsts |= ACPI_BITMASK_POWER_BUTTON_STATUS; |
349 | 93d89f63 | Isaku Yamahata | pm_update_sci(s); |
350 | 93d89f63 | Isaku Yamahata | } |
351 | 93d89f63 | Isaku Yamahata | } |
352 | 93d89f63 | Isaku Yamahata | |
353 | e8ec0571 | Isaku Yamahata | static int piix4_pm_initfn(PCIDevice *dev) |
354 | 93d89f63 | Isaku Yamahata | { |
355 | e8ec0571 | Isaku Yamahata | PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, dev); |
356 | 93d89f63 | Isaku Yamahata | uint8_t *pci_conf; |
357 | 93d89f63 | Isaku Yamahata | |
358 | 93d89f63 | Isaku Yamahata | pci_conf = s->dev.config; |
359 | 93d89f63 | Isaku Yamahata | pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); |
360 | 93d89f63 | Isaku Yamahata | pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_3); |
361 | 93d89f63 | Isaku Yamahata | pci_conf[0x06] = 0x80; |
362 | 93d89f63 | Isaku Yamahata | pci_conf[0x07] = 0x02; |
363 | 93d89f63 | Isaku Yamahata | pci_conf[0x08] = 0x03; // revision number |
364 | 93d89f63 | Isaku Yamahata | pci_conf[0x09] = 0x00; |
365 | 93d89f63 | Isaku Yamahata | pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_OTHER); |
366 | 93d89f63 | Isaku Yamahata | pci_conf[0x3d] = 0x01; // interrupt pin 1 |
367 | 93d89f63 | Isaku Yamahata | |
368 | 93d89f63 | Isaku Yamahata | pci_conf[0x40] = 0x01; /* PM io base read only bit */ |
369 | 93d89f63 | Isaku Yamahata | |
370 | 93d89f63 | Isaku Yamahata | /* APM */
|
371 | 93d89f63 | Isaku Yamahata | apm_init(&s->apm, apm_ctrl_changed, s); |
372 | 93d89f63 | Isaku Yamahata | |
373 | 93d89f63 | Isaku Yamahata | register_ioport_write(ACPI_DBG_IO_ADDR, 4, 4, acpi_dbg_writel, s); |
374 | 93d89f63 | Isaku Yamahata | |
375 | 93d89f63 | Isaku Yamahata | if (s->kvm_enabled) {
|
376 | 93d89f63 | Isaku Yamahata | /* Mark SMM as already inited to prevent SMM from running. KVM does not
|
377 | 93d89f63 | Isaku Yamahata | * support SMM mode. */
|
378 | 93d89f63 | Isaku Yamahata | pci_conf[0x5B] = 0x02; |
379 | 93d89f63 | Isaku Yamahata | } |
380 | 93d89f63 | Isaku Yamahata | |
381 | 93d89f63 | Isaku Yamahata | /* XXX: which specification is used ? The i82731AB has different
|
382 | 93d89f63 | Isaku Yamahata | mappings */
|
383 | 93d89f63 | Isaku Yamahata | pci_conf[0x5f] = (parallel_hds[0] != NULL ? 0x80 : 0) | 0x10; |
384 | 93d89f63 | Isaku Yamahata | pci_conf[0x63] = 0x60; |
385 | 93d89f63 | Isaku Yamahata | pci_conf[0x67] = (serial_hds[0] != NULL ? 0x08 : 0) | |
386 | 93d89f63 | Isaku Yamahata | (serial_hds[1] != NULL ? 0x90 : 0); |
387 | 93d89f63 | Isaku Yamahata | |
388 | e8ec0571 | Isaku Yamahata | pci_conf[0x90] = s->smb_io_base | 1; |
389 | e8ec0571 | Isaku Yamahata | pci_conf[0x91] = s->smb_io_base >> 8; |
390 | 93d89f63 | Isaku Yamahata | pci_conf[0xd2] = 0x09; |
391 | e8ec0571 | Isaku Yamahata | register_ioport_write(s->smb_io_base, 64, 1, smb_ioport_writeb, &s->smb); |
392 | e8ec0571 | Isaku Yamahata | register_ioport_read(s->smb_io_base, 64, 1, smb_ioport_readb, &s->smb); |
393 | 93d89f63 | Isaku Yamahata | |
394 | 93d89f63 | Isaku Yamahata | s->tmr_timer = qemu_new_timer(vm_clock, pm_tmr_timer, s); |
395 | 93d89f63 | Isaku Yamahata | |
396 | 93d89f63 | Isaku Yamahata | qemu_system_powerdown = *qemu_allocate_irqs(piix4_powerdown, s, 1);
|
397 | 93d89f63 | Isaku Yamahata | |
398 | e8ec0571 | Isaku Yamahata | pm_smbus_init(&s->dev.qdev, &s->smb); |
399 | e8ec0571 | Isaku Yamahata | qemu_register_reset(piix4_reset, s); |
400 | ac404095 | Isaku Yamahata | piix4_acpi_system_hot_add_init(dev->bus, s); |
401 | e8ec0571 | Isaku Yamahata | |
402 | e8ec0571 | Isaku Yamahata | return 0; |
403 | e8ec0571 | Isaku Yamahata | } |
404 | e8ec0571 | Isaku Yamahata | |
405 | e8ec0571 | Isaku Yamahata | i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
|
406 | e8ec0571 | Isaku Yamahata | qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq, |
407 | e8ec0571 | Isaku Yamahata | int kvm_enabled)
|
408 | e8ec0571 | Isaku Yamahata | { |
409 | e8ec0571 | Isaku Yamahata | PCIDevice *dev; |
410 | e8ec0571 | Isaku Yamahata | PIIX4PMState *s; |
411 | e8ec0571 | Isaku Yamahata | |
412 | e8ec0571 | Isaku Yamahata | dev = pci_create(bus, devfn, "PIIX4_PM");
|
413 | e8ec0571 | Isaku Yamahata | qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base);
|
414 | 93d89f63 | Isaku Yamahata | |
415 | e8ec0571 | Isaku Yamahata | s = DO_UPCAST(PIIX4PMState, dev, dev); |
416 | 93d89f63 | Isaku Yamahata | s->irq = sci_irq; |
417 | 93d89f63 | Isaku Yamahata | s->cmos_s3 = cmos_s3; |
418 | 93d89f63 | Isaku Yamahata | s->smi_irq = smi_irq; |
419 | e8ec0571 | Isaku Yamahata | s->kvm_enabled = kvm_enabled; |
420 | e8ec0571 | Isaku Yamahata | |
421 | e8ec0571 | Isaku Yamahata | qdev_init_nofail(&dev->qdev); |
422 | 93d89f63 | Isaku Yamahata | |
423 | 93d89f63 | Isaku Yamahata | return s->smb.smbus;
|
424 | 93d89f63 | Isaku Yamahata | } |
425 | 93d89f63 | Isaku Yamahata | |
426 | e8ec0571 | Isaku Yamahata | static PCIDeviceInfo piix4_pm_info = {
|
427 | e8ec0571 | Isaku Yamahata | .qdev.name = "PIIX4_PM",
|
428 | e8ec0571 | Isaku Yamahata | .qdev.desc = "PM",
|
429 | e8ec0571 | Isaku Yamahata | .qdev.size = sizeof(PIIX4PMState),
|
430 | e8ec0571 | Isaku Yamahata | .qdev.vmsd = &vmstate_acpi, |
431 | e8ec0571 | Isaku Yamahata | .init = piix4_pm_initfn, |
432 | e8ec0571 | Isaku Yamahata | .config_write = pm_write_config, |
433 | e8ec0571 | Isaku Yamahata | .qdev.props = (Property[]) { |
434 | e8ec0571 | Isaku Yamahata | DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0), |
435 | e8ec0571 | Isaku Yamahata | DEFINE_PROP_END_OF_LIST(), |
436 | e8ec0571 | Isaku Yamahata | } |
437 | e8ec0571 | Isaku Yamahata | }; |
438 | e8ec0571 | Isaku Yamahata | |
439 | e8ec0571 | Isaku Yamahata | static void piix4_pm_register(void) |
440 | e8ec0571 | Isaku Yamahata | { |
441 | e8ec0571 | Isaku Yamahata | pci_qdev_register(&piix4_pm_info); |
442 | e8ec0571 | Isaku Yamahata | } |
443 | e8ec0571 | Isaku Yamahata | |
444 | e8ec0571 | Isaku Yamahata | device_init(piix4_pm_register); |
445 | e8ec0571 | Isaku Yamahata | |
446 | 93d89f63 | Isaku Yamahata | static uint32_t gpe_read_val(uint16_t val, uint32_t addr)
|
447 | 93d89f63 | Isaku Yamahata | { |
448 | 93d89f63 | Isaku Yamahata | if (addr & 1) |
449 | 93d89f63 | Isaku Yamahata | return (val >> 8) & 0xff; |
450 | 93d89f63 | Isaku Yamahata | return val & 0xff; |
451 | 93d89f63 | Isaku Yamahata | } |
452 | 93d89f63 | Isaku Yamahata | |
453 | 93d89f63 | Isaku Yamahata | static uint32_t gpe_readb(void *opaque, uint32_t addr) |
454 | 93d89f63 | Isaku Yamahata | { |
455 | 93d89f63 | Isaku Yamahata | uint32_t val = 0;
|
456 | 633aa0ac | Gleb Natapov | PIIX4PMState *s = opaque; |
457 | 633aa0ac | Gleb Natapov | struct gpe_regs *g = &s->gpe;
|
458 | 633aa0ac | Gleb Natapov | |
459 | 93d89f63 | Isaku Yamahata | switch (addr) {
|
460 | 93d89f63 | Isaku Yamahata | case GPE_BASE:
|
461 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 1: |
462 | 93d89f63 | Isaku Yamahata | val = gpe_read_val(g->sts, addr); |
463 | 93d89f63 | Isaku Yamahata | break;
|
464 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 2: |
465 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 3: |
466 | 93d89f63 | Isaku Yamahata | val = gpe_read_val(g->en, addr); |
467 | 93d89f63 | Isaku Yamahata | break;
|
468 | 93d89f63 | Isaku Yamahata | default:
|
469 | 93d89f63 | Isaku Yamahata | break;
|
470 | 93d89f63 | Isaku Yamahata | } |
471 | 93d89f63 | Isaku Yamahata | |
472 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("gpe read %x == %x\n", addr, val);
|
473 | 93d89f63 | Isaku Yamahata | return val;
|
474 | 93d89f63 | Isaku Yamahata | } |
475 | 93d89f63 | Isaku Yamahata | |
476 | 93d89f63 | Isaku Yamahata | static void gpe_write_val(uint16_t *cur, int addr, uint32_t val) |
477 | 93d89f63 | Isaku Yamahata | { |
478 | 93d89f63 | Isaku Yamahata | if (addr & 1) |
479 | 93d89f63 | Isaku Yamahata | *cur = (*cur & 0xff) | (val << 8); |
480 | 93d89f63 | Isaku Yamahata | else
|
481 | 93d89f63 | Isaku Yamahata | *cur = (*cur & 0xff00) | (val & 0xff); |
482 | 93d89f63 | Isaku Yamahata | } |
483 | 93d89f63 | Isaku Yamahata | |
484 | 93d89f63 | Isaku Yamahata | static void gpe_reset_val(uint16_t *cur, int addr, uint32_t val) |
485 | 93d89f63 | Isaku Yamahata | { |
486 | 93d89f63 | Isaku Yamahata | uint16_t x1, x0 = val & 0xff;
|
487 | 93d89f63 | Isaku Yamahata | int shift = (addr & 1) ? 8 : 0; |
488 | 93d89f63 | Isaku Yamahata | |
489 | 93d89f63 | Isaku Yamahata | x1 = (*cur >> shift) & 0xff;
|
490 | 93d89f63 | Isaku Yamahata | |
491 | 93d89f63 | Isaku Yamahata | x1 = x1 & ~x0; |
492 | 93d89f63 | Isaku Yamahata | |
493 | 93d89f63 | Isaku Yamahata | *cur = (*cur & (0xff << (8 - shift))) | (x1 << shift); |
494 | 93d89f63 | Isaku Yamahata | } |
495 | 93d89f63 | Isaku Yamahata | |
496 | 93d89f63 | Isaku Yamahata | static void gpe_writeb(void *opaque, uint32_t addr, uint32_t val) |
497 | 93d89f63 | Isaku Yamahata | { |
498 | 633aa0ac | Gleb Natapov | PIIX4PMState *s = opaque; |
499 | 633aa0ac | Gleb Natapov | struct gpe_regs *g = &s->gpe;
|
500 | 633aa0ac | Gleb Natapov | |
501 | 93d89f63 | Isaku Yamahata | switch (addr) {
|
502 | 93d89f63 | Isaku Yamahata | case GPE_BASE:
|
503 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 1: |
504 | 93d89f63 | Isaku Yamahata | gpe_reset_val(&g->sts, addr, val); |
505 | 93d89f63 | Isaku Yamahata | break;
|
506 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 2: |
507 | 93d89f63 | Isaku Yamahata | case GPE_BASE + 3: |
508 | 93d89f63 | Isaku Yamahata | gpe_write_val(&g->en, addr, val); |
509 | 93d89f63 | Isaku Yamahata | break;
|
510 | 93d89f63 | Isaku Yamahata | default:
|
511 | 93d89f63 | Isaku Yamahata | break;
|
512 | 633aa0ac | Gleb Natapov | } |
513 | 633aa0ac | Gleb Natapov | |
514 | 633aa0ac | Gleb Natapov | pm_update_sci(s); |
515 | 93d89f63 | Isaku Yamahata | |
516 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("gpe write %x <== %d\n", addr, val);
|
517 | 93d89f63 | Isaku Yamahata | } |
518 | 93d89f63 | Isaku Yamahata | |
519 | 93d89f63 | Isaku Yamahata | static uint32_t pcihotplug_read(void *opaque, uint32_t addr) |
520 | 93d89f63 | Isaku Yamahata | { |
521 | 93d89f63 | Isaku Yamahata | uint32_t val = 0;
|
522 | 93d89f63 | Isaku Yamahata | struct pci_status *g = opaque;
|
523 | 93d89f63 | Isaku Yamahata | switch (addr) {
|
524 | 93d89f63 | Isaku Yamahata | case PCI_BASE:
|
525 | 93d89f63 | Isaku Yamahata | val = g->up; |
526 | 93d89f63 | Isaku Yamahata | break;
|
527 | 93d89f63 | Isaku Yamahata | case PCI_BASE + 4: |
528 | 93d89f63 | Isaku Yamahata | val = g->down; |
529 | 93d89f63 | Isaku Yamahata | break;
|
530 | 93d89f63 | Isaku Yamahata | default:
|
531 | 93d89f63 | Isaku Yamahata | break;
|
532 | 93d89f63 | Isaku Yamahata | } |
533 | 93d89f63 | Isaku Yamahata | |
534 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("pcihotplug read %x == %x\n", addr, val);
|
535 | 93d89f63 | Isaku Yamahata | return val;
|
536 | 93d89f63 | Isaku Yamahata | } |
537 | 93d89f63 | Isaku Yamahata | |
538 | 93d89f63 | Isaku Yamahata | static void pcihotplug_write(void *opaque, uint32_t addr, uint32_t val) |
539 | 93d89f63 | Isaku Yamahata | { |
540 | 93d89f63 | Isaku Yamahata | struct pci_status *g = opaque;
|
541 | 93d89f63 | Isaku Yamahata | switch (addr) {
|
542 | 93d89f63 | Isaku Yamahata | case PCI_BASE:
|
543 | 93d89f63 | Isaku Yamahata | g->up = val; |
544 | 93d89f63 | Isaku Yamahata | break;
|
545 | 93d89f63 | Isaku Yamahata | case PCI_BASE + 4: |
546 | 93d89f63 | Isaku Yamahata | g->down = val; |
547 | 93d89f63 | Isaku Yamahata | break;
|
548 | 93d89f63 | Isaku Yamahata | } |
549 | 93d89f63 | Isaku Yamahata | |
550 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("pcihotplug write %x <== %d\n", addr, val);
|
551 | 93d89f63 | Isaku Yamahata | } |
552 | 93d89f63 | Isaku Yamahata | |
553 | 93d89f63 | Isaku Yamahata | static uint32_t pciej_read(void *opaque, uint32_t addr) |
554 | 93d89f63 | Isaku Yamahata | { |
555 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("pciej read %x\n", addr);
|
556 | 93d89f63 | Isaku Yamahata | return 0; |
557 | 93d89f63 | Isaku Yamahata | } |
558 | 93d89f63 | Isaku Yamahata | |
559 | 93d89f63 | Isaku Yamahata | static void pciej_write(void *opaque, uint32_t addr, uint32_t val) |
560 | 93d89f63 | Isaku Yamahata | { |
561 | 93d89f63 | Isaku Yamahata | BusState *bus = opaque; |
562 | 93d89f63 | Isaku Yamahata | DeviceState *qdev, *next; |
563 | 93d89f63 | Isaku Yamahata | PCIDevice *dev; |
564 | 93d89f63 | Isaku Yamahata | int slot = ffs(val) - 1; |
565 | 93d89f63 | Isaku Yamahata | |
566 | 93d89f63 | Isaku Yamahata | QLIST_FOREACH_SAFE(qdev, &bus->children, sibling, next) { |
567 | 93d89f63 | Isaku Yamahata | dev = DO_UPCAST(PCIDevice, qdev, qdev); |
568 | 93d89f63 | Isaku Yamahata | if (PCI_SLOT(dev->devfn) == slot) {
|
569 | 93d89f63 | Isaku Yamahata | qdev_free(qdev); |
570 | 93d89f63 | Isaku Yamahata | } |
571 | 93d89f63 | Isaku Yamahata | } |
572 | 93d89f63 | Isaku Yamahata | |
573 | 93d89f63 | Isaku Yamahata | |
574 | 50d8ff8b | Isaku Yamahata | PIIX4_DPRINTF("pciej write %x <== %d\n", addr, val);
|
575 | 93d89f63 | Isaku Yamahata | } |
576 | 93d89f63 | Isaku Yamahata | |
577 | 4cff0a59 | Michael S. Tsirkin | static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, |
578 | 4cff0a59 | Michael S. Tsirkin | PCIHotplugState state); |
579 | 93d89f63 | Isaku Yamahata | |
580 | ac404095 | Isaku Yamahata | static void piix4_acpi_system_hot_add_init(PCIBus *bus, PIIX4PMState *s) |
581 | 93d89f63 | Isaku Yamahata | { |
582 | ac404095 | Isaku Yamahata | struct pci_status *pci0_status = &s->pci0_status;
|
583 | 93d89f63 | Isaku Yamahata | |
584 | 633aa0ac | Gleb Natapov | register_ioport_write(GPE_BASE, 4, 1, gpe_writeb, s); |
585 | 633aa0ac | Gleb Natapov | register_ioport_read(GPE_BASE, 4, 1, gpe_readb, s); |
586 | ac404095 | Isaku Yamahata | |
587 | ac404095 | Isaku Yamahata | register_ioport_write(PCI_BASE, 8, 4, pcihotplug_write, pci0_status); |
588 | ac404095 | Isaku Yamahata | register_ioport_read(PCI_BASE, 8, 4, pcihotplug_read, pci0_status); |
589 | 93d89f63 | Isaku Yamahata | |
590 | 93d89f63 | Isaku Yamahata | register_ioport_write(PCI_EJ_BASE, 4, 4, pciej_write, bus); |
591 | 93d89f63 | Isaku Yamahata | register_ioport_read(PCI_EJ_BASE, 4, 4, pciej_read, bus); |
592 | 93d89f63 | Isaku Yamahata | |
593 | ac404095 | Isaku Yamahata | pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev); |
594 | 93d89f63 | Isaku Yamahata | } |
595 | 93d89f63 | Isaku Yamahata | |
596 | ac404095 | Isaku Yamahata | static void enable_device(PIIX4PMState *s, int slot) |
597 | 93d89f63 | Isaku Yamahata | { |
598 | 4441a287 | Gleb Natapov | s->gpe.sts |= PIIX4_PCI_HOTPLUG_STATUS; |
599 | ac404095 | Isaku Yamahata | s->pci0_status.up |= (1 << slot);
|
600 | 93d89f63 | Isaku Yamahata | } |
601 | 93d89f63 | Isaku Yamahata | |
602 | ac404095 | Isaku Yamahata | static void disable_device(PIIX4PMState *s, int slot) |
603 | 93d89f63 | Isaku Yamahata | { |
604 | 4441a287 | Gleb Natapov | s->gpe.sts |= PIIX4_PCI_HOTPLUG_STATUS; |
605 | ac404095 | Isaku Yamahata | s->pci0_status.down |= (1 << slot);
|
606 | 93d89f63 | Isaku Yamahata | } |
607 | 93d89f63 | Isaku Yamahata | |
608 | 4cff0a59 | Michael S. Tsirkin | static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, |
609 | 4cff0a59 | Michael S. Tsirkin | PCIHotplugState state) |
610 | 93d89f63 | Isaku Yamahata | { |
611 | 93d89f63 | Isaku Yamahata | int slot = PCI_SLOT(dev->devfn);
|
612 | ac404095 | Isaku Yamahata | PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, |
613 | ac404095 | Isaku Yamahata | DO_UPCAST(PCIDevice, qdev, qdev)); |
614 | 93d89f63 | Isaku Yamahata | |
615 | 4cff0a59 | Michael S. Tsirkin | /* Don't send event when device is enabled during qemu machine creation:
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616 | 4cff0a59 | Michael S. Tsirkin | * it is present on boot, no hotplug event is necessary. We do send an
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617 | 4cff0a59 | Michael S. Tsirkin | * event when the device is disabled later. */
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618 | 4cff0a59 | Michael S. Tsirkin | if (state == PCI_COLDPLUG_ENABLED) {
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619 | 5beb8ad5 | Isaku Yamahata | return 0; |
620 | 4cff0a59 | Michael S. Tsirkin | } |
621 | 5beb8ad5 | Isaku Yamahata | |
622 | ac404095 | Isaku Yamahata | s->pci0_status.up = 0;
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623 | ac404095 | Isaku Yamahata | s->pci0_status.down = 0;
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624 | 4cff0a59 | Michael S. Tsirkin | if (state == PCI_HOTPLUG_ENABLED) {
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625 | ac404095 | Isaku Yamahata | enable_device(s, slot); |
626 | ac404095 | Isaku Yamahata | } else {
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627 | ac404095 | Isaku Yamahata | disable_device(s, slot); |
628 | ac404095 | Isaku Yamahata | } |
629 | 633aa0ac | Gleb Natapov | |
630 | 633aa0ac | Gleb Natapov | pm_update_sci(s); |
631 | 633aa0ac | Gleb Natapov | |
632 | 93d89f63 | Isaku Yamahata | return 0; |
633 | 93d89f63 | Isaku Yamahata | } |