root / hw / apic.h @ c2162a8b
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| 1 | aa28b9bf | Blue Swirl | #ifndef APIC_H
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| 2 | aa28b9bf | Blue Swirl | #define APIC_H
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| 3 | aa28b9bf | Blue Swirl | |
| 4 | 92a16d7a | Blue Swirl | #include "qemu-common.h" |
| 5 | 92a16d7a | Blue Swirl | |
| 6 | cf6d64bf | Blue Swirl | /* apic.c */
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| 7 | 1f6f408c | Jan Kiszka | void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode,
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| 8 | 1f6f408c | Jan Kiszka | uint8_t vector_num, uint8_t trigger_mode); |
| 9 | 92a16d7a | Blue Swirl | int apic_accept_pic_intr(DeviceState *s);
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| 10 | 92a16d7a | Blue Swirl | void apic_deliver_pic_intr(DeviceState *s, int level); |
| 11 | 92a16d7a | Blue Swirl | int apic_get_interrupt(DeviceState *s);
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| 12 | aa28b9bf | Blue Swirl | void apic_reset_irq_delivered(void); |
| 13 | aa28b9bf | Blue Swirl | int apic_get_irq_delivered(void); |
| 14 | 92a16d7a | Blue Swirl | void cpu_set_apic_base(DeviceState *s, uint64_t val);
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| 15 | 92a16d7a | Blue Swirl | uint64_t cpu_get_apic_base(DeviceState *s); |
| 16 | 92a16d7a | Blue Swirl | void cpu_set_apic_tpr(DeviceState *s, uint8_t val);
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| 17 | 92a16d7a | Blue Swirl | uint8_t cpu_get_apic_tpr(DeviceState *s); |
| 18 | 92a16d7a | Blue Swirl | void apic_init_reset(DeviceState *s);
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| 19 | 92a16d7a | Blue Swirl | void apic_sipi(DeviceState *s);
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| 20 | aa28b9bf | Blue Swirl | |
| 21 | 0e26b7b8 | Blue Swirl | /* pc.c */
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| 22 | aa28b9bf | Blue Swirl | int cpu_is_bsp(CPUState *env);
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| 23 | 92a16d7a | Blue Swirl | DeviceState *cpu_get_current_apic(void);
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| 24 | aa28b9bf | Blue Swirl | |
| 25 | aa28b9bf | Blue Swirl | #endif |