root / target-cris / machine.c @ c2162a8b
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| 1 | 8dd3dca3 | aurel32 | #include "hw/hw.h" |
|---|---|---|---|
| 2 | 8dd3dca3 | aurel32 | #include "hw/boards.h" |
| 3 | 8dd3dca3 | aurel32 | |
| 4 | 877d8ad7 | edgar_igl | void cpu_save(QEMUFile *f, void *opaque) |
| 5 | 877d8ad7 | edgar_igl | {
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| 6 | 877d8ad7 | edgar_igl | CPUCRISState *env = opaque; |
| 7 | 877d8ad7 | edgar_igl | int i;
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| 8 | 877d8ad7 | edgar_igl | int s;
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| 9 | 877d8ad7 | edgar_igl | int mmu;
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| 10 | 877d8ad7 | edgar_igl | |
| 11 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
| 12 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->regs[i]); |
| 13 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
| 14 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->pregs[i]); |
| 15 | 877d8ad7 | edgar_igl | |
| 16 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->pc); |
| 17 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->ksp); |
| 18 | 877d8ad7 | edgar_igl | |
| 19 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->dslot); |
| 20 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->btaken); |
| 21 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->btarget); |
| 22 | 877d8ad7 | edgar_igl | |
| 23 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_op); |
| 24 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_mask); |
| 25 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_dest); |
| 26 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_src); |
| 27 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_result); |
| 28 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_size); |
| 29 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->cc_x); |
| 30 | 877d8ad7 | edgar_igl | |
| 31 | d488ddd8 | edgar_igl | for (s = 0; s < 4; s++) { |
| 32 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
| 33 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->sregs[s][i]); |
| 34 | 877d8ad7 | edgar_igl | } |
| 35 | 877d8ad7 | edgar_igl | |
| 36 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->mmu_rand_lfsr); |
| 37 | 877d8ad7 | edgar_igl | for (mmu = 0; mmu < 2; mmu++) { |
| 38 | d488ddd8 | edgar_igl | for (s = 0; s < 4; s++) { |
| 39 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) { |
| 40 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->tlbsets[mmu][s][i].lo); |
| 41 | 877d8ad7 | edgar_igl | qemu_put_be32(f, env->tlbsets[mmu][s][i].hi); |
| 42 | 877d8ad7 | edgar_igl | } |
| 43 | 877d8ad7 | edgar_igl | } |
| 44 | 877d8ad7 | edgar_igl | } |
| 45 | 877d8ad7 | edgar_igl | } |
| 46 | 877d8ad7 | edgar_igl | |
| 47 | 877d8ad7 | edgar_igl | int cpu_load(QEMUFile *f, void *opaque, int version_id) |
| 48 | 877d8ad7 | edgar_igl | {
|
| 49 | 877d8ad7 | edgar_igl | CPUCRISState *env = opaque; |
| 50 | 877d8ad7 | edgar_igl | int i;
|
| 51 | 877d8ad7 | edgar_igl | int s;
|
| 52 | 877d8ad7 | edgar_igl | int mmu;
|
| 53 | 877d8ad7 | edgar_igl | |
| 54 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
| 55 | 877d8ad7 | edgar_igl | env->regs[i] = qemu_get_be32(f); |
| 56 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
| 57 | 877d8ad7 | edgar_igl | env->pregs[i] = qemu_get_be32(f); |
| 58 | 877d8ad7 | edgar_igl | |
| 59 | 877d8ad7 | edgar_igl | env->pc = qemu_get_be32(f); |
| 60 | 877d8ad7 | edgar_igl | env->ksp = qemu_get_be32(f); |
| 61 | 877d8ad7 | edgar_igl | |
| 62 | 877d8ad7 | edgar_igl | env->dslot = qemu_get_be32(f); |
| 63 | 877d8ad7 | edgar_igl | env->btaken = qemu_get_be32(f); |
| 64 | 877d8ad7 | edgar_igl | env->btarget = qemu_get_be32(f); |
| 65 | 877d8ad7 | edgar_igl | |
| 66 | 877d8ad7 | edgar_igl | env->cc_op = qemu_get_be32(f); |
| 67 | 877d8ad7 | edgar_igl | env->cc_mask = qemu_get_be32(f); |
| 68 | 877d8ad7 | edgar_igl | env->cc_dest = qemu_get_be32(f); |
| 69 | 877d8ad7 | edgar_igl | env->cc_src = qemu_get_be32(f); |
| 70 | 877d8ad7 | edgar_igl | env->cc_result = qemu_get_be32(f); |
| 71 | 877d8ad7 | edgar_igl | env->cc_size = qemu_get_be32(f); |
| 72 | 877d8ad7 | edgar_igl | env->cc_x = qemu_get_be32(f); |
| 73 | 877d8ad7 | edgar_igl | |
| 74 | d488ddd8 | edgar_igl | for (s = 0; s < 4; s++) { |
| 75 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) |
| 76 | 877d8ad7 | edgar_igl | env->sregs[s][i] = qemu_get_be32(f); |
| 77 | 877d8ad7 | edgar_igl | } |
| 78 | 877d8ad7 | edgar_igl | |
| 79 | 877d8ad7 | edgar_igl | env->mmu_rand_lfsr = qemu_get_be32(f); |
| 80 | 877d8ad7 | edgar_igl | for (mmu = 0; mmu < 2; mmu++) { |
| 81 | d488ddd8 | edgar_igl | for (s = 0; s < 4; s++) { |
| 82 | 877d8ad7 | edgar_igl | for (i = 0; i < 16; i++) { |
| 83 | 877d8ad7 | edgar_igl | env->tlbsets[mmu][s][i].lo = qemu_get_be32(f); |
| 84 | 877d8ad7 | edgar_igl | env->tlbsets[mmu][s][i].hi = qemu_get_be32(f); |
| 85 | 877d8ad7 | edgar_igl | } |
| 86 | 877d8ad7 | edgar_igl | } |
| 87 | 877d8ad7 | edgar_igl | } |
| 88 | 877d8ad7 | edgar_igl | |
| 89 | 877d8ad7 | edgar_igl | return 0; |
| 90 | 877d8ad7 | edgar_igl | } |