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1 | b4608c04 | bellard | /*
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2 | b4608c04 | bellard | * gdb server stub
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3 | 5fafdf24 | ths | *
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4 | 3475187d | bellard | * Copyright (c) 2003-2005 Fabrice Bellard
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5 | b4608c04 | bellard | *
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6 | b4608c04 | bellard | * This library is free software; you can redistribute it and/or
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7 | b4608c04 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | b4608c04 | bellard | * License as published by the Free Software Foundation; either
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9 | b4608c04 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | b4608c04 | bellard | *
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11 | b4608c04 | bellard | * This library is distributed in the hope that it will be useful,
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12 | b4608c04 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | b4608c04 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | b4608c04 | bellard | * Lesser General Public License for more details.
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15 | b4608c04 | bellard | *
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16 | b4608c04 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 | b4608c04 | bellard | */
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19 | 978efd6a | pbrook | #include "config.h" |
20 | 56aebc89 | pbrook | #include "qemu-common.h" |
21 | 1fddef4b | bellard | #ifdef CONFIG_USER_ONLY
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22 | 1fddef4b | bellard | #include <stdlib.h> |
23 | 1fddef4b | bellard | #include <stdio.h> |
24 | 1fddef4b | bellard | #include <stdarg.h> |
25 | 1fddef4b | bellard | #include <string.h> |
26 | 1fddef4b | bellard | #include <errno.h> |
27 | 1fddef4b | bellard | #include <unistd.h> |
28 | 978efd6a | pbrook | #include <fcntl.h> |
29 | 1fddef4b | bellard | |
30 | 1fddef4b | bellard | #include "qemu.h" |
31 | 1fddef4b | bellard | #else
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32 | 8a34a0fb | aliguori | #include "monitor.h" |
33 | 87ecb68b | pbrook | #include "qemu-char.h" |
34 | 87ecb68b | pbrook | #include "sysemu.h" |
35 | 87ecb68b | pbrook | #include "gdbstub.h" |
36 | 1fddef4b | bellard | #endif
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37 | 67b915a5 | bellard | |
38 | 56aebc89 | pbrook | #define MAX_PACKET_LENGTH 4096 |
39 | 56aebc89 | pbrook | |
40 | 2b41f10e | Blue Swirl | #include "cpu.h" |
41 | 8f447cc7 | bellard | #include "qemu_socket.h" |
42 | e22a25c9 | aliguori | #include "kvm.h" |
43 | ca587a8e | aurel32 | |
44 | 44520db1 | Fabien Chouteau | #ifndef TARGET_CPU_MEMORY_RW_DEBUG
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45 | 9349b4f9 | Andreas Färber | static inline int target_memory_rw_debug(CPUArchState *env, target_ulong addr, |
46 | 44520db1 | Fabien Chouteau | uint8_t *buf, int len, int is_write) |
47 | 44520db1 | Fabien Chouteau | { |
48 | 44520db1 | Fabien Chouteau | return cpu_memory_rw_debug(env, addr, buf, len, is_write);
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49 | 44520db1 | Fabien Chouteau | } |
50 | 44520db1 | Fabien Chouteau | #else
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51 | 44520db1 | Fabien Chouteau | /* target_memory_rw_debug() defined in cpu.h */
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52 | 44520db1 | Fabien Chouteau | #endif
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53 | ca587a8e | aurel32 | |
54 | ca587a8e | aurel32 | enum {
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55 | ca587a8e | aurel32 | GDB_SIGNAL_0 = 0,
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56 | ca587a8e | aurel32 | GDB_SIGNAL_INT = 2,
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57 | 425189a8 | Jan Kiszka | GDB_SIGNAL_QUIT = 3,
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58 | ca587a8e | aurel32 | GDB_SIGNAL_TRAP = 5,
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59 | 425189a8 | Jan Kiszka | GDB_SIGNAL_ABRT = 6,
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60 | 425189a8 | Jan Kiszka | GDB_SIGNAL_ALRM = 14,
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61 | 425189a8 | Jan Kiszka | GDB_SIGNAL_IO = 23,
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62 | 425189a8 | Jan Kiszka | GDB_SIGNAL_XCPU = 24,
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63 | ca587a8e | aurel32 | GDB_SIGNAL_UNKNOWN = 143
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64 | ca587a8e | aurel32 | }; |
65 | ca587a8e | aurel32 | |
66 | ca587a8e | aurel32 | #ifdef CONFIG_USER_ONLY
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67 | ca587a8e | aurel32 | |
68 | ca587a8e | aurel32 | /* Map target signal numbers to GDB protocol signal numbers and vice
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69 | ca587a8e | aurel32 | * versa. For user emulation's currently supported systems, we can
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70 | ca587a8e | aurel32 | * assume most signals are defined.
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71 | ca587a8e | aurel32 | */
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72 | ca587a8e | aurel32 | |
73 | ca587a8e | aurel32 | static int gdb_signal_table[] = { |
74 | ca587a8e | aurel32 | 0,
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75 | ca587a8e | aurel32 | TARGET_SIGHUP, |
76 | ca587a8e | aurel32 | TARGET_SIGINT, |
77 | ca587a8e | aurel32 | TARGET_SIGQUIT, |
78 | ca587a8e | aurel32 | TARGET_SIGILL, |
79 | ca587a8e | aurel32 | TARGET_SIGTRAP, |
80 | ca587a8e | aurel32 | TARGET_SIGABRT, |
81 | ca587a8e | aurel32 | -1, /* SIGEMT */ |
82 | ca587a8e | aurel32 | TARGET_SIGFPE, |
83 | ca587a8e | aurel32 | TARGET_SIGKILL, |
84 | ca587a8e | aurel32 | TARGET_SIGBUS, |
85 | ca587a8e | aurel32 | TARGET_SIGSEGV, |
86 | ca587a8e | aurel32 | TARGET_SIGSYS, |
87 | ca587a8e | aurel32 | TARGET_SIGPIPE, |
88 | ca587a8e | aurel32 | TARGET_SIGALRM, |
89 | ca587a8e | aurel32 | TARGET_SIGTERM, |
90 | ca587a8e | aurel32 | TARGET_SIGURG, |
91 | ca587a8e | aurel32 | TARGET_SIGSTOP, |
92 | ca587a8e | aurel32 | TARGET_SIGTSTP, |
93 | ca587a8e | aurel32 | TARGET_SIGCONT, |
94 | ca587a8e | aurel32 | TARGET_SIGCHLD, |
95 | ca587a8e | aurel32 | TARGET_SIGTTIN, |
96 | ca587a8e | aurel32 | TARGET_SIGTTOU, |
97 | ca587a8e | aurel32 | TARGET_SIGIO, |
98 | ca587a8e | aurel32 | TARGET_SIGXCPU, |
99 | ca587a8e | aurel32 | TARGET_SIGXFSZ, |
100 | ca587a8e | aurel32 | TARGET_SIGVTALRM, |
101 | ca587a8e | aurel32 | TARGET_SIGPROF, |
102 | ca587a8e | aurel32 | TARGET_SIGWINCH, |
103 | ca587a8e | aurel32 | -1, /* SIGLOST */ |
104 | ca587a8e | aurel32 | TARGET_SIGUSR1, |
105 | ca587a8e | aurel32 | TARGET_SIGUSR2, |
106 | c72d5bf8 | blueswir1 | #ifdef TARGET_SIGPWR
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107 | ca587a8e | aurel32 | TARGET_SIGPWR, |
108 | c72d5bf8 | blueswir1 | #else
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109 | c72d5bf8 | blueswir1 | -1,
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110 | c72d5bf8 | blueswir1 | #endif
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111 | ca587a8e | aurel32 | -1, /* SIGPOLL */ |
112 | ca587a8e | aurel32 | -1,
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113 | ca587a8e | aurel32 | -1,
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114 | ca587a8e | aurel32 | -1,
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115 | ca587a8e | aurel32 | -1,
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116 | ca587a8e | aurel32 | -1,
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117 | ca587a8e | aurel32 | -1,
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118 | ca587a8e | aurel32 | -1,
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119 | ca587a8e | aurel32 | -1,
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120 | ca587a8e | aurel32 | -1,
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121 | ca587a8e | aurel32 | -1,
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122 | ca587a8e | aurel32 | -1,
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123 | c72d5bf8 | blueswir1 | #ifdef __SIGRTMIN
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124 | ca587a8e | aurel32 | __SIGRTMIN + 1,
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125 | ca587a8e | aurel32 | __SIGRTMIN + 2,
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126 | ca587a8e | aurel32 | __SIGRTMIN + 3,
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127 | ca587a8e | aurel32 | __SIGRTMIN + 4,
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128 | ca587a8e | aurel32 | __SIGRTMIN + 5,
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129 | ca587a8e | aurel32 | __SIGRTMIN + 6,
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130 | ca587a8e | aurel32 | __SIGRTMIN + 7,
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131 | ca587a8e | aurel32 | __SIGRTMIN + 8,
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132 | ca587a8e | aurel32 | __SIGRTMIN + 9,
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133 | ca587a8e | aurel32 | __SIGRTMIN + 10,
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134 | ca587a8e | aurel32 | __SIGRTMIN + 11,
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135 | ca587a8e | aurel32 | __SIGRTMIN + 12,
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136 | ca587a8e | aurel32 | __SIGRTMIN + 13,
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137 | ca587a8e | aurel32 | __SIGRTMIN + 14,
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138 | ca587a8e | aurel32 | __SIGRTMIN + 15,
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139 | ca587a8e | aurel32 | __SIGRTMIN + 16,
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140 | ca587a8e | aurel32 | __SIGRTMIN + 17,
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141 | ca587a8e | aurel32 | __SIGRTMIN + 18,
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142 | ca587a8e | aurel32 | __SIGRTMIN + 19,
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143 | ca587a8e | aurel32 | __SIGRTMIN + 20,
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144 | ca587a8e | aurel32 | __SIGRTMIN + 21,
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145 | ca587a8e | aurel32 | __SIGRTMIN + 22,
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146 | ca587a8e | aurel32 | __SIGRTMIN + 23,
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147 | ca587a8e | aurel32 | __SIGRTMIN + 24,
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148 | ca587a8e | aurel32 | __SIGRTMIN + 25,
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149 | ca587a8e | aurel32 | __SIGRTMIN + 26,
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150 | ca587a8e | aurel32 | __SIGRTMIN + 27,
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151 | ca587a8e | aurel32 | __SIGRTMIN + 28,
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152 | ca587a8e | aurel32 | __SIGRTMIN + 29,
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153 | ca587a8e | aurel32 | __SIGRTMIN + 30,
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154 | ca587a8e | aurel32 | __SIGRTMIN + 31,
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155 | ca587a8e | aurel32 | -1, /* SIGCANCEL */ |
156 | ca587a8e | aurel32 | __SIGRTMIN, |
157 | ca587a8e | aurel32 | __SIGRTMIN + 32,
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158 | ca587a8e | aurel32 | __SIGRTMIN + 33,
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159 | ca587a8e | aurel32 | __SIGRTMIN + 34,
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160 | ca587a8e | aurel32 | __SIGRTMIN + 35,
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161 | ca587a8e | aurel32 | __SIGRTMIN + 36,
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162 | ca587a8e | aurel32 | __SIGRTMIN + 37,
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163 | ca587a8e | aurel32 | __SIGRTMIN + 38,
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164 | ca587a8e | aurel32 | __SIGRTMIN + 39,
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165 | ca587a8e | aurel32 | __SIGRTMIN + 40,
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166 | ca587a8e | aurel32 | __SIGRTMIN + 41,
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167 | ca587a8e | aurel32 | __SIGRTMIN + 42,
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168 | ca587a8e | aurel32 | __SIGRTMIN + 43,
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169 | ca587a8e | aurel32 | __SIGRTMIN + 44,
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170 | ca587a8e | aurel32 | __SIGRTMIN + 45,
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171 | ca587a8e | aurel32 | __SIGRTMIN + 46,
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172 | ca587a8e | aurel32 | __SIGRTMIN + 47,
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173 | ca587a8e | aurel32 | __SIGRTMIN + 48,
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174 | ca587a8e | aurel32 | __SIGRTMIN + 49,
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175 | ca587a8e | aurel32 | __SIGRTMIN + 50,
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176 | ca587a8e | aurel32 | __SIGRTMIN + 51,
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177 | ca587a8e | aurel32 | __SIGRTMIN + 52,
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178 | ca587a8e | aurel32 | __SIGRTMIN + 53,
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179 | ca587a8e | aurel32 | __SIGRTMIN + 54,
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180 | ca587a8e | aurel32 | __SIGRTMIN + 55,
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181 | ca587a8e | aurel32 | __SIGRTMIN + 56,
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182 | ca587a8e | aurel32 | __SIGRTMIN + 57,
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183 | ca587a8e | aurel32 | __SIGRTMIN + 58,
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184 | ca587a8e | aurel32 | __SIGRTMIN + 59,
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185 | ca587a8e | aurel32 | __SIGRTMIN + 60,
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186 | ca587a8e | aurel32 | __SIGRTMIN + 61,
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187 | ca587a8e | aurel32 | __SIGRTMIN + 62,
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188 | ca587a8e | aurel32 | __SIGRTMIN + 63,
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189 | ca587a8e | aurel32 | __SIGRTMIN + 64,
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190 | ca587a8e | aurel32 | __SIGRTMIN + 65,
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191 | ca587a8e | aurel32 | __SIGRTMIN + 66,
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192 | ca587a8e | aurel32 | __SIGRTMIN + 67,
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193 | ca587a8e | aurel32 | __SIGRTMIN + 68,
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194 | ca587a8e | aurel32 | __SIGRTMIN + 69,
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195 | ca587a8e | aurel32 | __SIGRTMIN + 70,
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196 | ca587a8e | aurel32 | __SIGRTMIN + 71,
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197 | ca587a8e | aurel32 | __SIGRTMIN + 72,
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198 | ca587a8e | aurel32 | __SIGRTMIN + 73,
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199 | ca587a8e | aurel32 | __SIGRTMIN + 74,
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200 | ca587a8e | aurel32 | __SIGRTMIN + 75,
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201 | ca587a8e | aurel32 | __SIGRTMIN + 76,
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202 | ca587a8e | aurel32 | __SIGRTMIN + 77,
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203 | ca587a8e | aurel32 | __SIGRTMIN + 78,
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204 | ca587a8e | aurel32 | __SIGRTMIN + 79,
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205 | ca587a8e | aurel32 | __SIGRTMIN + 80,
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206 | ca587a8e | aurel32 | __SIGRTMIN + 81,
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207 | ca587a8e | aurel32 | __SIGRTMIN + 82,
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208 | ca587a8e | aurel32 | __SIGRTMIN + 83,
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209 | ca587a8e | aurel32 | __SIGRTMIN + 84,
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210 | ca587a8e | aurel32 | __SIGRTMIN + 85,
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211 | ca587a8e | aurel32 | __SIGRTMIN + 86,
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212 | ca587a8e | aurel32 | __SIGRTMIN + 87,
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213 | ca587a8e | aurel32 | __SIGRTMIN + 88,
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214 | ca587a8e | aurel32 | __SIGRTMIN + 89,
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215 | ca587a8e | aurel32 | __SIGRTMIN + 90,
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216 | ca587a8e | aurel32 | __SIGRTMIN + 91,
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217 | ca587a8e | aurel32 | __SIGRTMIN + 92,
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218 | ca587a8e | aurel32 | __SIGRTMIN + 93,
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219 | ca587a8e | aurel32 | __SIGRTMIN + 94,
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220 | ca587a8e | aurel32 | __SIGRTMIN + 95,
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221 | ca587a8e | aurel32 | -1, /* SIGINFO */ |
222 | ca587a8e | aurel32 | -1, /* UNKNOWN */ |
223 | ca587a8e | aurel32 | -1, /* DEFAULT */ |
224 | ca587a8e | aurel32 | -1,
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225 | ca587a8e | aurel32 | -1,
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226 | ca587a8e | aurel32 | -1,
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227 | ca587a8e | aurel32 | -1,
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228 | ca587a8e | aurel32 | -1,
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229 | ca587a8e | aurel32 | -1
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230 | c72d5bf8 | blueswir1 | #endif
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231 | ca587a8e | aurel32 | }; |
232 | 8f447cc7 | bellard | #else
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233 | ca587a8e | aurel32 | /* In system mode we only need SIGINT and SIGTRAP; other signals
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234 | ca587a8e | aurel32 | are not yet supported. */
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235 | ca587a8e | aurel32 | |
236 | ca587a8e | aurel32 | enum {
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237 | ca587a8e | aurel32 | TARGET_SIGINT = 2,
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238 | ca587a8e | aurel32 | TARGET_SIGTRAP = 5
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239 | ca587a8e | aurel32 | }; |
240 | ca587a8e | aurel32 | |
241 | ca587a8e | aurel32 | static int gdb_signal_table[] = { |
242 | ca587a8e | aurel32 | -1,
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243 | ca587a8e | aurel32 | -1,
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244 | ca587a8e | aurel32 | TARGET_SIGINT, |
245 | ca587a8e | aurel32 | -1,
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246 | ca587a8e | aurel32 | -1,
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247 | ca587a8e | aurel32 | TARGET_SIGTRAP |
248 | ca587a8e | aurel32 | }; |
249 | ca587a8e | aurel32 | #endif
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250 | ca587a8e | aurel32 | |
251 | ca587a8e | aurel32 | #ifdef CONFIG_USER_ONLY
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252 | ca587a8e | aurel32 | static int target_signal_to_gdb (int sig) |
253 | ca587a8e | aurel32 | { |
254 | ca587a8e | aurel32 | int i;
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255 | ca587a8e | aurel32 | for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++) |
256 | ca587a8e | aurel32 | if (gdb_signal_table[i] == sig)
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257 | ca587a8e | aurel32 | return i;
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258 | ca587a8e | aurel32 | return GDB_SIGNAL_UNKNOWN;
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259 | ca587a8e | aurel32 | } |
260 | 8f447cc7 | bellard | #endif
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261 | b4608c04 | bellard | |
262 | ca587a8e | aurel32 | static int gdb_signal_to_target (int sig) |
263 | ca587a8e | aurel32 | { |
264 | ca587a8e | aurel32 | if (sig < ARRAY_SIZE (gdb_signal_table))
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265 | ca587a8e | aurel32 | return gdb_signal_table[sig];
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266 | ca587a8e | aurel32 | else
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267 | ca587a8e | aurel32 | return -1; |
268 | ca587a8e | aurel32 | } |
269 | ca587a8e | aurel32 | |
270 | 4abe615b | bellard | //#define DEBUG_GDB
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271 | b4608c04 | bellard | |
272 | 56aebc89 | pbrook | typedef struct GDBRegisterState { |
273 | 56aebc89 | pbrook | int base_reg;
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274 | 56aebc89 | pbrook | int num_regs;
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275 | 56aebc89 | pbrook | gdb_reg_cb get_reg; |
276 | 56aebc89 | pbrook | gdb_reg_cb set_reg; |
277 | 56aebc89 | pbrook | const char *xml; |
278 | 56aebc89 | pbrook | struct GDBRegisterState *next;
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279 | 56aebc89 | pbrook | } GDBRegisterState; |
280 | 56aebc89 | pbrook | |
281 | 858693c6 | bellard | enum RSState {
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282 | 36556b20 | aliguori | RS_INACTIVE, |
283 | 858693c6 | bellard | RS_IDLE, |
284 | 858693c6 | bellard | RS_GETLINE, |
285 | 858693c6 | bellard | RS_CHKSUM1, |
286 | 858693c6 | bellard | RS_CHKSUM2, |
287 | 858693c6 | bellard | }; |
288 | 858693c6 | bellard | typedef struct GDBState { |
289 | 9349b4f9 | Andreas Färber | CPUArchState *c_cpu; /* current CPU for step/continue ops */
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290 | 9349b4f9 | Andreas Färber | CPUArchState *g_cpu; /* current CPU for other ops */
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291 | 9349b4f9 | Andreas Färber | CPUArchState *query_cpu; /* for q{f|s}ThreadInfo */
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292 | 41625033 | bellard | enum RSState state; /* parsing state */ |
293 | 56aebc89 | pbrook | char line_buf[MAX_PACKET_LENGTH];
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294 | 858693c6 | bellard | int line_buf_index;
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295 | 858693c6 | bellard | int line_csum;
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296 | 56aebc89 | pbrook | uint8_t last_packet[MAX_PACKET_LENGTH + 4];
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297 | 4046d913 | pbrook | int last_packet_len;
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298 | 1f487ee9 | edgar_igl | int signal;
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299 | 41625033 | bellard | #ifdef CONFIG_USER_ONLY
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300 | 4046d913 | pbrook | int fd;
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301 | 41625033 | bellard | int running_state;
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302 | 4046d913 | pbrook | #else
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303 | 4046d913 | pbrook | CharDriverState *chr; |
304 | 8a34a0fb | aliguori | CharDriverState *mon_chr; |
305 | 41625033 | bellard | #endif
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306 | cdb432b2 | Meador Inge | char syscall_buf[256]; |
307 | cdb432b2 | Meador Inge | gdb_syscall_complete_cb current_syscall_cb; |
308 | 858693c6 | bellard | } GDBState; |
309 | b4608c04 | bellard | |
310 | 60897d36 | edgar_igl | /* By default use no IRQs and no timers while single stepping so as to
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311 | 60897d36 | edgar_igl | * make single stepping like an ICE HW step.
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312 | 60897d36 | edgar_igl | */
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313 | 60897d36 | edgar_igl | static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER; |
314 | 60897d36 | edgar_igl | |
315 | 880a7578 | aliguori | static GDBState *gdbserver_state;
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316 | 880a7578 | aliguori | |
317 | 56aebc89 | pbrook | /* This is an ugly hack to cope with both new and old gdb.
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318 | 56aebc89 | pbrook | If gdb sends qXfer:features:read then assume we're talking to a newish
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319 | 56aebc89 | pbrook | gdb that understands target descriptions. */
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320 | 56aebc89 | pbrook | static int gdb_has_xml; |
321 | 56aebc89 | pbrook | |
322 | 1fddef4b | bellard | #ifdef CONFIG_USER_ONLY
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323 | 4046d913 | pbrook | /* XXX: This is not thread safe. Do we care? */
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324 | 4046d913 | pbrook | static int gdbserver_fd = -1; |
325 | 4046d913 | pbrook | |
326 | 858693c6 | bellard | static int get_char(GDBState *s) |
327 | b4608c04 | bellard | { |
328 | b4608c04 | bellard | uint8_t ch; |
329 | b4608c04 | bellard | int ret;
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330 | b4608c04 | bellard | |
331 | b4608c04 | bellard | for(;;) {
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332 | 00aa0040 | Blue Swirl | ret = qemu_recv(s->fd, &ch, 1, 0); |
333 | b4608c04 | bellard | if (ret < 0) { |
334 | 1f487ee9 | edgar_igl | if (errno == ECONNRESET)
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335 | 1f487ee9 | edgar_igl | s->fd = -1;
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336 | b4608c04 | bellard | if (errno != EINTR && errno != EAGAIN)
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337 | b4608c04 | bellard | return -1; |
338 | b4608c04 | bellard | } else if (ret == 0) { |
339 | 1f487ee9 | edgar_igl | close(s->fd); |
340 | 1f487ee9 | edgar_igl | s->fd = -1;
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341 | b4608c04 | bellard | return -1; |
342 | b4608c04 | bellard | } else {
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343 | b4608c04 | bellard | break;
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344 | b4608c04 | bellard | } |
345 | b4608c04 | bellard | } |
346 | b4608c04 | bellard | return ch;
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347 | b4608c04 | bellard | } |
348 | 4046d913 | pbrook | #endif
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349 | b4608c04 | bellard | |
350 | 654efcf3 | blueswir1 | static enum { |
351 | a2d1ebaf | pbrook | GDB_SYS_UNKNOWN, |
352 | a2d1ebaf | pbrook | GDB_SYS_ENABLED, |
353 | a2d1ebaf | pbrook | GDB_SYS_DISABLED, |
354 | a2d1ebaf | pbrook | } gdb_syscall_mode; |
355 | a2d1ebaf | pbrook | |
356 | a2d1ebaf | pbrook | /* If gdb is connected when the first semihosting syscall occurs then use
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357 | a2d1ebaf | pbrook | remote gdb syscalls. Otherwise use native file IO. */
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358 | a2d1ebaf | pbrook | int use_gdb_syscalls(void) |
359 | a2d1ebaf | pbrook | { |
360 | a2d1ebaf | pbrook | if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
|
361 | 880a7578 | aliguori | gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED |
362 | 880a7578 | aliguori | : GDB_SYS_DISABLED); |
363 | a2d1ebaf | pbrook | } |
364 | a2d1ebaf | pbrook | return gdb_syscall_mode == GDB_SYS_ENABLED;
|
365 | a2d1ebaf | pbrook | } |
366 | a2d1ebaf | pbrook | |
367 | ba70a624 | edgar_igl | /* Resume execution. */
|
368 | ba70a624 | edgar_igl | static inline void gdb_continue(GDBState *s) |
369 | ba70a624 | edgar_igl | { |
370 | ba70a624 | edgar_igl | #ifdef CONFIG_USER_ONLY
|
371 | ba70a624 | edgar_igl | s->running_state = 1;
|
372 | ba70a624 | edgar_igl | #else
|
373 | ba70a624 | edgar_igl | vm_start(); |
374 | ba70a624 | edgar_igl | #endif
|
375 | ba70a624 | edgar_igl | } |
376 | ba70a624 | edgar_igl | |
377 | 858693c6 | bellard | static void put_buffer(GDBState *s, const uint8_t *buf, int len) |
378 | b4608c04 | bellard | { |
379 | 4046d913 | pbrook | #ifdef CONFIG_USER_ONLY
|
380 | b4608c04 | bellard | int ret;
|
381 | b4608c04 | bellard | |
382 | b4608c04 | bellard | while (len > 0) { |
383 | 8f447cc7 | bellard | ret = send(s->fd, buf, len, 0);
|
384 | b4608c04 | bellard | if (ret < 0) { |
385 | b4608c04 | bellard | if (errno != EINTR && errno != EAGAIN)
|
386 | b4608c04 | bellard | return;
|
387 | b4608c04 | bellard | } else {
|
388 | b4608c04 | bellard | buf += ret; |
389 | b4608c04 | bellard | len -= ret; |
390 | b4608c04 | bellard | } |
391 | b4608c04 | bellard | } |
392 | 4046d913 | pbrook | #else
|
393 | 2cc6e0a1 | Anthony Liguori | qemu_chr_fe_write(s->chr, buf, len); |
394 | 4046d913 | pbrook | #endif
|
395 | b4608c04 | bellard | } |
396 | b4608c04 | bellard | |
397 | b4608c04 | bellard | static inline int fromhex(int v) |
398 | b4608c04 | bellard | { |
399 | b4608c04 | bellard | if (v >= '0' && v <= '9') |
400 | b4608c04 | bellard | return v - '0'; |
401 | b4608c04 | bellard | else if (v >= 'A' && v <= 'F') |
402 | b4608c04 | bellard | return v - 'A' + 10; |
403 | b4608c04 | bellard | else if (v >= 'a' && v <= 'f') |
404 | b4608c04 | bellard | return v - 'a' + 10; |
405 | b4608c04 | bellard | else
|
406 | b4608c04 | bellard | return 0; |
407 | b4608c04 | bellard | } |
408 | b4608c04 | bellard | |
409 | b4608c04 | bellard | static inline int tohex(int v) |
410 | b4608c04 | bellard | { |
411 | b4608c04 | bellard | if (v < 10) |
412 | b4608c04 | bellard | return v + '0'; |
413 | b4608c04 | bellard | else
|
414 | b4608c04 | bellard | return v - 10 + 'a'; |
415 | b4608c04 | bellard | } |
416 | b4608c04 | bellard | |
417 | b4608c04 | bellard | static void memtohex(char *buf, const uint8_t *mem, int len) |
418 | b4608c04 | bellard | { |
419 | b4608c04 | bellard | int i, c;
|
420 | b4608c04 | bellard | char *q;
|
421 | b4608c04 | bellard | q = buf; |
422 | b4608c04 | bellard | for(i = 0; i < len; i++) { |
423 | b4608c04 | bellard | c = mem[i]; |
424 | b4608c04 | bellard | *q++ = tohex(c >> 4);
|
425 | b4608c04 | bellard | *q++ = tohex(c & 0xf);
|
426 | b4608c04 | bellard | } |
427 | b4608c04 | bellard | *q = '\0';
|
428 | b4608c04 | bellard | } |
429 | b4608c04 | bellard | |
430 | b4608c04 | bellard | static void hextomem(uint8_t *mem, const char *buf, int len) |
431 | b4608c04 | bellard | { |
432 | b4608c04 | bellard | int i;
|
433 | b4608c04 | bellard | |
434 | b4608c04 | bellard | for(i = 0; i < len; i++) { |
435 | b4608c04 | bellard | mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]); |
436 | b4608c04 | bellard | buf += 2;
|
437 | b4608c04 | bellard | } |
438 | b4608c04 | bellard | } |
439 | b4608c04 | bellard | |
440 | b4608c04 | bellard | /* return -1 if error, 0 if OK */
|
441 | 56aebc89 | pbrook | static int put_packet_binary(GDBState *s, const char *buf, int len) |
442 | b4608c04 | bellard | { |
443 | 56aebc89 | pbrook | int csum, i;
|
444 | 60fe76f3 | ths | uint8_t *p; |
445 | b4608c04 | bellard | |
446 | b4608c04 | bellard | for(;;) {
|
447 | 4046d913 | pbrook | p = s->last_packet; |
448 | 4046d913 | pbrook | *(p++) = '$';
|
449 | 4046d913 | pbrook | memcpy(p, buf, len); |
450 | 4046d913 | pbrook | p += len; |
451 | b4608c04 | bellard | csum = 0;
|
452 | b4608c04 | bellard | for(i = 0; i < len; i++) { |
453 | b4608c04 | bellard | csum += buf[i]; |
454 | b4608c04 | bellard | } |
455 | 4046d913 | pbrook | *(p++) = '#';
|
456 | 4046d913 | pbrook | *(p++) = tohex((csum >> 4) & 0xf); |
457 | 4046d913 | pbrook | *(p++) = tohex((csum) & 0xf);
|
458 | b4608c04 | bellard | |
459 | 4046d913 | pbrook | s->last_packet_len = p - s->last_packet; |
460 | ffe8ab83 | ths | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
461 | b4608c04 | bellard | |
462 | 4046d913 | pbrook | #ifdef CONFIG_USER_ONLY
|
463 | 4046d913 | pbrook | i = get_char(s); |
464 | 4046d913 | pbrook | if (i < 0) |
465 | b4608c04 | bellard | return -1; |
466 | 4046d913 | pbrook | if (i == '+') |
467 | b4608c04 | bellard | break;
|
468 | 4046d913 | pbrook | #else
|
469 | 4046d913 | pbrook | break;
|
470 | 4046d913 | pbrook | #endif
|
471 | b4608c04 | bellard | } |
472 | b4608c04 | bellard | return 0; |
473 | b4608c04 | bellard | } |
474 | b4608c04 | bellard | |
475 | 56aebc89 | pbrook | /* return -1 if error, 0 if OK */
|
476 | 56aebc89 | pbrook | static int put_packet(GDBState *s, const char *buf) |
477 | 56aebc89 | pbrook | { |
478 | 56aebc89 | pbrook | #ifdef DEBUG_GDB
|
479 | 56aebc89 | pbrook | printf("reply='%s'\n", buf);
|
480 | 56aebc89 | pbrook | #endif
|
481 | 79808573 | bellard | |
482 | 56aebc89 | pbrook | return put_packet_binary(s, buf, strlen(buf));
|
483 | 56aebc89 | pbrook | } |
484 | 56aebc89 | pbrook | |
485 | 56aebc89 | pbrook | /* The GDB remote protocol transfers values in target byte order. This means
|
486 | 56aebc89 | pbrook | we can use the raw memory access routines to access the value buffer.
|
487 | 56aebc89 | pbrook | Conveniently, these also handle the case where the buffer is mis-aligned.
|
488 | 56aebc89 | pbrook | */
|
489 | 56aebc89 | pbrook | #define GET_REG8(val) do { \ |
490 | 56aebc89 | pbrook | stb_p(mem_buf, val); \ |
491 | 56aebc89 | pbrook | return 1; \ |
492 | 56aebc89 | pbrook | } while(0) |
493 | 56aebc89 | pbrook | #define GET_REG16(val) do { \ |
494 | 56aebc89 | pbrook | stw_p(mem_buf, val); \ |
495 | 56aebc89 | pbrook | return 2; \ |
496 | 56aebc89 | pbrook | } while(0) |
497 | 56aebc89 | pbrook | #define GET_REG32(val) do { \ |
498 | 56aebc89 | pbrook | stl_p(mem_buf, val); \ |
499 | 56aebc89 | pbrook | return 4; \ |
500 | 56aebc89 | pbrook | } while(0) |
501 | 56aebc89 | pbrook | #define GET_REG64(val) do { \ |
502 | 56aebc89 | pbrook | stq_p(mem_buf, val); \ |
503 | 56aebc89 | pbrook | return 8; \ |
504 | 56aebc89 | pbrook | } while(0) |
505 | 56aebc89 | pbrook | |
506 | 56aebc89 | pbrook | #if TARGET_LONG_BITS == 64 |
507 | 56aebc89 | pbrook | #define GET_REGL(val) GET_REG64(val)
|
508 | 56aebc89 | pbrook | #define ldtul_p(addr) ldq_p(addr)
|
509 | 56aebc89 | pbrook | #else
|
510 | 56aebc89 | pbrook | #define GET_REGL(val) GET_REG32(val)
|
511 | 56aebc89 | pbrook | #define ldtul_p(addr) ldl_p(addr)
|
512 | 79808573 | bellard | #endif
|
513 | 79808573 | bellard | |
514 | 56aebc89 | pbrook | #if defined(TARGET_I386)
|
515 | 5ad265ee | balrog | |
516 | 5ad265ee | balrog | #ifdef TARGET_X86_64
|
517 | 56aebc89 | pbrook | static const int gpr_map[16] = { |
518 | 56aebc89 | pbrook | R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP, |
519 | 56aebc89 | pbrook | 8, 9, 10, 11, 12, 13, 14, 15 |
520 | 56aebc89 | pbrook | }; |
521 | 79808573 | bellard | #else
|
522 | 5f30fa18 | Jan Kiszka | #define gpr_map gpr_map32
|
523 | 79808573 | bellard | #endif
|
524 | 5f30fa18 | Jan Kiszka | static const int gpr_map32[8] = { 0, 1, 2, 3, 4, 5, 6, 7 }; |
525 | 79808573 | bellard | |
526 | 56aebc89 | pbrook | #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25) |
527 | 56aebc89 | pbrook | |
528 | b1631e7a | Jan Kiszka | #define IDX_IP_REG CPU_NB_REGS
|
529 | b1631e7a | Jan Kiszka | #define IDX_FLAGS_REG (IDX_IP_REG + 1) |
530 | b1631e7a | Jan Kiszka | #define IDX_SEG_REGS (IDX_FLAGS_REG + 1) |
531 | b1631e7a | Jan Kiszka | #define IDX_FP_REGS (IDX_SEG_REGS + 6) |
532 | b1631e7a | Jan Kiszka | #define IDX_XMM_REGS (IDX_FP_REGS + 16) |
533 | b1631e7a | Jan Kiszka | #define IDX_MXCSR_REG (IDX_XMM_REGS + CPU_NB_REGS)
|
534 | b1631e7a | Jan Kiszka | |
535 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUX86State *env, uint8_t *mem_buf, int n) |
536 | 79808573 | bellard | { |
537 | 56aebc89 | pbrook | if (n < CPU_NB_REGS) {
|
538 | 5f30fa18 | Jan Kiszka | if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { |
539 | 5f30fa18 | Jan Kiszka | GET_REG64(env->regs[gpr_map[n]]); |
540 | 5f30fa18 | Jan Kiszka | } else if (n < CPU_NB_REGS32) { |
541 | 5f30fa18 | Jan Kiszka | GET_REG32(env->regs[gpr_map32[n]]); |
542 | 5f30fa18 | Jan Kiszka | } |
543 | b1631e7a | Jan Kiszka | } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { |
544 | 56aebc89 | pbrook | #ifdef USE_X86LDOUBLE
|
545 | b1631e7a | Jan Kiszka | /* FIXME: byteswap float values - after fixing fpregs layout. */
|
546 | b1631e7a | Jan Kiszka | memcpy(mem_buf, &env->fpregs[n - IDX_FP_REGS], 10);
|
547 | 79808573 | bellard | #else
|
548 | 56aebc89 | pbrook | memset(mem_buf, 0, 10); |
549 | 79808573 | bellard | #endif
|
550 | 56aebc89 | pbrook | return 10; |
551 | b1631e7a | Jan Kiszka | } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { |
552 | b1631e7a | Jan Kiszka | n -= IDX_XMM_REGS; |
553 | 5f30fa18 | Jan Kiszka | if (n < CPU_NB_REGS32 ||
|
554 | 5f30fa18 | Jan Kiszka | (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
|
555 | 5f30fa18 | Jan Kiszka | stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
|
556 | 5f30fa18 | Jan Kiszka | stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1)); |
557 | 5f30fa18 | Jan Kiszka | return 16; |
558 | 5f30fa18 | Jan Kiszka | } |
559 | 56aebc89 | pbrook | } else {
|
560 | 56aebc89 | pbrook | switch (n) {
|
561 | 5f30fa18 | Jan Kiszka | case IDX_IP_REG:
|
562 | 5f30fa18 | Jan Kiszka | if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { |
563 | 5f30fa18 | Jan Kiszka | GET_REG64(env->eip); |
564 | 5f30fa18 | Jan Kiszka | } else {
|
565 | 5f30fa18 | Jan Kiszka | GET_REG32(env->eip); |
566 | 5f30fa18 | Jan Kiszka | } |
567 | b1631e7a | Jan Kiszka | case IDX_FLAGS_REG: GET_REG32(env->eflags);
|
568 | b1631e7a | Jan Kiszka | |
569 | b1631e7a | Jan Kiszka | case IDX_SEG_REGS: GET_REG32(env->segs[R_CS].selector);
|
570 | b1631e7a | Jan Kiszka | case IDX_SEG_REGS + 1: GET_REG32(env->segs[R_SS].selector); |
571 | b1631e7a | Jan Kiszka | case IDX_SEG_REGS + 2: GET_REG32(env->segs[R_DS].selector); |
572 | b1631e7a | Jan Kiszka | case IDX_SEG_REGS + 3: GET_REG32(env->segs[R_ES].selector); |
573 | b1631e7a | Jan Kiszka | case IDX_SEG_REGS + 4: GET_REG32(env->segs[R_FS].selector); |
574 | b1631e7a | Jan Kiszka | case IDX_SEG_REGS + 5: GET_REG32(env->segs[R_GS].selector); |
575 | b1631e7a | Jan Kiszka | |
576 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 8: GET_REG32(env->fpuc); |
577 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 9: GET_REG32((env->fpus & ~0x3800) | |
578 | b1631e7a | Jan Kiszka | (env->fpstt & 0x7) << 11); |
579 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 10: GET_REG32(0); /* ftag */ |
580 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 11: GET_REG32(0); /* fiseg */ |
581 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 12: GET_REG32(0); /* fioff */ |
582 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 13: GET_REG32(0); /* foseg */ |
583 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 14: GET_REG32(0); /* fooff */ |
584 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 15: GET_REG32(0); /* fop */ |
585 | b1631e7a | Jan Kiszka | |
586 | b1631e7a | Jan Kiszka | case IDX_MXCSR_REG: GET_REG32(env->mxcsr);
|
587 | 56aebc89 | pbrook | } |
588 | 79808573 | bellard | } |
589 | 56aebc89 | pbrook | return 0; |
590 | 6da41eaf | bellard | } |
591 | 6da41eaf | bellard | |
592 | f3840919 | Andreas Färber | static int cpu_x86_gdb_load_seg(CPUX86State *env, int sreg, uint8_t *mem_buf) |
593 | 84273177 | Jan Kiszka | { |
594 | 84273177 | Jan Kiszka | uint16_t selector = ldl_p(mem_buf); |
595 | 84273177 | Jan Kiszka | |
596 | 84273177 | Jan Kiszka | if (selector != env->segs[sreg].selector) {
|
597 | 84273177 | Jan Kiszka | #if defined(CONFIG_USER_ONLY)
|
598 | 84273177 | Jan Kiszka | cpu_x86_load_seg(env, sreg, selector); |
599 | 84273177 | Jan Kiszka | #else
|
600 | 84273177 | Jan Kiszka | unsigned int limit, flags; |
601 | 84273177 | Jan Kiszka | target_ulong base; |
602 | 84273177 | Jan Kiszka | |
603 | 84273177 | Jan Kiszka | if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK)) { |
604 | 84273177 | Jan Kiszka | base = selector << 4;
|
605 | 84273177 | Jan Kiszka | limit = 0xffff;
|
606 | 84273177 | Jan Kiszka | flags = 0;
|
607 | 84273177 | Jan Kiszka | } else {
|
608 | 84273177 | Jan Kiszka | if (!cpu_x86_get_descr_debug(env, selector, &base, &limit, &flags))
|
609 | 84273177 | Jan Kiszka | return 4; |
610 | 84273177 | Jan Kiszka | } |
611 | 84273177 | Jan Kiszka | cpu_x86_load_seg_cache(env, sreg, selector, base, limit, flags); |
612 | 84273177 | Jan Kiszka | #endif
|
613 | 84273177 | Jan Kiszka | } |
614 | 84273177 | Jan Kiszka | return 4; |
615 | 84273177 | Jan Kiszka | } |
616 | 84273177 | Jan Kiszka | |
617 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUX86State *env, uint8_t *mem_buf, int n) |
618 | 6da41eaf | bellard | { |
619 | 56aebc89 | pbrook | uint32_t tmp; |
620 | 6da41eaf | bellard | |
621 | b1631e7a | Jan Kiszka | if (n < CPU_NB_REGS) {
|
622 | 5f30fa18 | Jan Kiszka | if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { |
623 | 5f30fa18 | Jan Kiszka | env->regs[gpr_map[n]] = ldtul_p(mem_buf); |
624 | 5f30fa18 | Jan Kiszka | return sizeof(target_ulong); |
625 | 5f30fa18 | Jan Kiszka | } else if (n < CPU_NB_REGS32) { |
626 | 5f30fa18 | Jan Kiszka | n = gpr_map32[n]; |
627 | 5f30fa18 | Jan Kiszka | env->regs[n] &= ~0xffffffffUL;
|
628 | 5f30fa18 | Jan Kiszka | env->regs[n] |= (uint32_t)ldl_p(mem_buf); |
629 | 5f30fa18 | Jan Kiszka | return 4; |
630 | 5f30fa18 | Jan Kiszka | } |
631 | b1631e7a | Jan Kiszka | } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) { |
632 | 56aebc89 | pbrook | #ifdef USE_X86LDOUBLE
|
633 | b1631e7a | Jan Kiszka | /* FIXME: byteswap float values - after fixing fpregs layout. */
|
634 | b1631e7a | Jan Kiszka | memcpy(&env->fpregs[n - IDX_FP_REGS], mem_buf, 10);
|
635 | 79808573 | bellard | #endif
|
636 | 56aebc89 | pbrook | return 10; |
637 | b1631e7a | Jan Kiszka | } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) { |
638 | b1631e7a | Jan Kiszka | n -= IDX_XMM_REGS; |
639 | 5f30fa18 | Jan Kiszka | if (n < CPU_NB_REGS32 ||
|
640 | 5f30fa18 | Jan Kiszka | (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK)) {
|
641 | 5f30fa18 | Jan Kiszka | env->xmm_regs[n].XMM_Q(0) = ldq_p(mem_buf);
|
642 | 5f30fa18 | Jan Kiszka | env->xmm_regs[n].XMM_Q(1) = ldq_p(mem_buf + 8); |
643 | 5f30fa18 | Jan Kiszka | return 16; |
644 | 5f30fa18 | Jan Kiszka | } |
645 | 56aebc89 | pbrook | } else {
|
646 | b1631e7a | Jan Kiszka | switch (n) {
|
647 | b1631e7a | Jan Kiszka | case IDX_IP_REG:
|
648 | 5f30fa18 | Jan Kiszka | if (TARGET_LONG_BITS == 64 && env->hflags & HF_CS64_MASK) { |
649 | 5f30fa18 | Jan Kiszka | env->eip = ldq_p(mem_buf); |
650 | 5f30fa18 | Jan Kiszka | return 8; |
651 | 5f30fa18 | Jan Kiszka | } else {
|
652 | 5f30fa18 | Jan Kiszka | env->eip &= ~0xffffffffUL;
|
653 | 5f30fa18 | Jan Kiszka | env->eip |= (uint32_t)ldl_p(mem_buf); |
654 | 5f30fa18 | Jan Kiszka | return 4; |
655 | 5f30fa18 | Jan Kiszka | } |
656 | b1631e7a | Jan Kiszka | case IDX_FLAGS_REG:
|
657 | b1631e7a | Jan Kiszka | env->eflags = ldl_p(mem_buf); |
658 | b1631e7a | Jan Kiszka | return 4; |
659 | b1631e7a | Jan Kiszka | |
660 | 84273177 | Jan Kiszka | case IDX_SEG_REGS: return cpu_x86_gdb_load_seg(env, R_CS, mem_buf); |
661 | 84273177 | Jan Kiszka | case IDX_SEG_REGS + 1: return cpu_x86_gdb_load_seg(env, R_SS, mem_buf); |
662 | 84273177 | Jan Kiszka | case IDX_SEG_REGS + 2: return cpu_x86_gdb_load_seg(env, R_DS, mem_buf); |
663 | 84273177 | Jan Kiszka | case IDX_SEG_REGS + 3: return cpu_x86_gdb_load_seg(env, R_ES, mem_buf); |
664 | 84273177 | Jan Kiszka | case IDX_SEG_REGS + 4: return cpu_x86_gdb_load_seg(env, R_FS, mem_buf); |
665 | 84273177 | Jan Kiszka | case IDX_SEG_REGS + 5: return cpu_x86_gdb_load_seg(env, R_GS, mem_buf); |
666 | b1631e7a | Jan Kiszka | |
667 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 8: |
668 | b1631e7a | Jan Kiszka | env->fpuc = ldl_p(mem_buf); |
669 | b1631e7a | Jan Kiszka | return 4; |
670 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 9: |
671 | b1631e7a | Jan Kiszka | tmp = ldl_p(mem_buf); |
672 | b1631e7a | Jan Kiszka | env->fpstt = (tmp >> 11) & 7; |
673 | b1631e7a | Jan Kiszka | env->fpus = tmp & ~0x3800;
|
674 | b1631e7a | Jan Kiszka | return 4; |
675 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 10: /* ftag */ return 4; |
676 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 11: /* fiseg */ return 4; |
677 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 12: /* fioff */ return 4; |
678 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 13: /* foseg */ return 4; |
679 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 14: /* fooff */ return 4; |
680 | b1631e7a | Jan Kiszka | case IDX_FP_REGS + 15: /* fop */ return 4; |
681 | b1631e7a | Jan Kiszka | |
682 | b1631e7a | Jan Kiszka | case IDX_MXCSR_REG:
|
683 | b1631e7a | Jan Kiszka | env->mxcsr = ldl_p(mem_buf); |
684 | b1631e7a | Jan Kiszka | return 4; |
685 | 79808573 | bellard | } |
686 | 79808573 | bellard | } |
687 | 56aebc89 | pbrook | /* Unrecognised register. */
|
688 | 56aebc89 | pbrook | return 0; |
689 | 6da41eaf | bellard | } |
690 | 6da41eaf | bellard | |
691 | 9e62fd7f | bellard | #elif defined (TARGET_PPC)
|
692 | 9e62fd7f | bellard | |
693 | e571cb47 | aurel32 | /* Old gdb always expects FP registers. Newer (xml-aware) gdb only
|
694 | e571cb47 | aurel32 | expects whatever the target description contains. Due to a
|
695 | e571cb47 | aurel32 | historical mishap the FP registers appear in between core integer
|
696 | e571cb47 | aurel32 | regs and PC, MSR, CR, and so forth. We hack round this by giving the
|
697 | e571cb47 | aurel32 | FP regs zero size when talking to a newer gdb. */
|
698 | 56aebc89 | pbrook | #define NUM_CORE_REGS 71 |
699 | e571cb47 | aurel32 | #if defined (TARGET_PPC64)
|
700 | e571cb47 | aurel32 | #define GDB_CORE_XML "power64-core.xml" |
701 | e571cb47 | aurel32 | #else
|
702 | e571cb47 | aurel32 | #define GDB_CORE_XML "power-core.xml" |
703 | e571cb47 | aurel32 | #endif
|
704 | 9e62fd7f | bellard | |
705 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUPPCState *env, uint8_t *mem_buf, int n) |
706 | 9e62fd7f | bellard | { |
707 | 56aebc89 | pbrook | if (n < 32) { |
708 | 56aebc89 | pbrook | /* gprs */
|
709 | 56aebc89 | pbrook | GET_REGL(env->gpr[n]); |
710 | 56aebc89 | pbrook | } else if (n < 64) { |
711 | 56aebc89 | pbrook | /* fprs */
|
712 | e571cb47 | aurel32 | if (gdb_has_xml)
|
713 | e571cb47 | aurel32 | return 0; |
714 | 8d4acf9b | aurel32 | stfq_p(mem_buf, env->fpr[n-32]);
|
715 | 56aebc89 | pbrook | return 8; |
716 | 56aebc89 | pbrook | } else {
|
717 | 56aebc89 | pbrook | switch (n) {
|
718 | 56aebc89 | pbrook | case 64: GET_REGL(env->nip); |
719 | 56aebc89 | pbrook | case 65: GET_REGL(env->msr); |
720 | 56aebc89 | pbrook | case 66: |
721 | 56aebc89 | pbrook | { |
722 | 56aebc89 | pbrook | uint32_t cr = 0;
|
723 | 56aebc89 | pbrook | int i;
|
724 | 56aebc89 | pbrook | for (i = 0; i < 8; i++) |
725 | 56aebc89 | pbrook | cr |= env->crf[i] << (32 - ((i + 1) * 4)); |
726 | 56aebc89 | pbrook | GET_REG32(cr); |
727 | 56aebc89 | pbrook | } |
728 | 56aebc89 | pbrook | case 67: GET_REGL(env->lr); |
729 | 56aebc89 | pbrook | case 68: GET_REGL(env->ctr); |
730 | 3d7b417e | aurel32 | case 69: GET_REGL(env->xer); |
731 | e571cb47 | aurel32 | case 70: |
732 | e571cb47 | aurel32 | { |
733 | e571cb47 | aurel32 | if (gdb_has_xml)
|
734 | e571cb47 | aurel32 | return 0; |
735 | 5a576fb3 | Fabien Chouteau | GET_REG32(env->fpscr); |
736 | e571cb47 | aurel32 | } |
737 | 56aebc89 | pbrook | } |
738 | 56aebc89 | pbrook | } |
739 | 56aebc89 | pbrook | return 0; |
740 | 56aebc89 | pbrook | } |
741 | 9e62fd7f | bellard | |
742 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUPPCState *env, uint8_t *mem_buf, int n) |
743 | 56aebc89 | pbrook | { |
744 | 56aebc89 | pbrook | if (n < 32) { |
745 | 56aebc89 | pbrook | /* gprs */
|
746 | 56aebc89 | pbrook | env->gpr[n] = ldtul_p(mem_buf); |
747 | 56aebc89 | pbrook | return sizeof(target_ulong); |
748 | 56aebc89 | pbrook | } else if (n < 64) { |
749 | 56aebc89 | pbrook | /* fprs */
|
750 | e571cb47 | aurel32 | if (gdb_has_xml)
|
751 | e571cb47 | aurel32 | return 0; |
752 | 8d4acf9b | aurel32 | env->fpr[n-32] = ldfq_p(mem_buf);
|
753 | 56aebc89 | pbrook | return 8; |
754 | 56aebc89 | pbrook | } else {
|
755 | 56aebc89 | pbrook | switch (n) {
|
756 | 56aebc89 | pbrook | case 64: |
757 | 56aebc89 | pbrook | env->nip = ldtul_p(mem_buf); |
758 | 56aebc89 | pbrook | return sizeof(target_ulong); |
759 | 56aebc89 | pbrook | case 65: |
760 | 56aebc89 | pbrook | ppc_store_msr(env, ldtul_p(mem_buf)); |
761 | 56aebc89 | pbrook | return sizeof(target_ulong); |
762 | 56aebc89 | pbrook | case 66: |
763 | 56aebc89 | pbrook | { |
764 | 56aebc89 | pbrook | uint32_t cr = ldl_p(mem_buf); |
765 | 56aebc89 | pbrook | int i;
|
766 | 56aebc89 | pbrook | for (i = 0; i < 8; i++) |
767 | 56aebc89 | pbrook | env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF; |
768 | 56aebc89 | pbrook | return 4; |
769 | 56aebc89 | pbrook | } |
770 | 56aebc89 | pbrook | case 67: |
771 | 56aebc89 | pbrook | env->lr = ldtul_p(mem_buf); |
772 | 56aebc89 | pbrook | return sizeof(target_ulong); |
773 | 56aebc89 | pbrook | case 68: |
774 | 56aebc89 | pbrook | env->ctr = ldtul_p(mem_buf); |
775 | 56aebc89 | pbrook | return sizeof(target_ulong); |
776 | 56aebc89 | pbrook | case 69: |
777 | 3d7b417e | aurel32 | env->xer = ldtul_p(mem_buf); |
778 | 3d7b417e | aurel32 | return sizeof(target_ulong); |
779 | 56aebc89 | pbrook | case 70: |
780 | 56aebc89 | pbrook | /* fpscr */
|
781 | e571cb47 | aurel32 | if (gdb_has_xml)
|
782 | e571cb47 | aurel32 | return 0; |
783 | 56aebc89 | pbrook | return 4; |
784 | 56aebc89 | pbrook | } |
785 | 56aebc89 | pbrook | } |
786 | 56aebc89 | pbrook | return 0; |
787 | e95c8d51 | bellard | } |
788 | 56aebc89 | pbrook | |
789 | e95c8d51 | bellard | #elif defined (TARGET_SPARC)
|
790 | 56aebc89 | pbrook | |
791 | 56aebc89 | pbrook | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
792 | 56aebc89 | pbrook | #define NUM_CORE_REGS 86 |
793 | 96d19126 | blueswir1 | #else
|
794 | 5a377912 | blueswir1 | #define NUM_CORE_REGS 72 |
795 | 96d19126 | blueswir1 | #endif
|
796 | 56aebc89 | pbrook | |
797 | 96d19126 | blueswir1 | #ifdef TARGET_ABI32
|
798 | 56aebc89 | pbrook | #define GET_REGA(val) GET_REG32(val)
|
799 | 96d19126 | blueswir1 | #else
|
800 | 56aebc89 | pbrook | #define GET_REGA(val) GET_REGL(val)
|
801 | 96d19126 | blueswir1 | #endif
|
802 | e95c8d51 | bellard | |
803 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUSPARCState *env, uint8_t *mem_buf, int n) |
804 | 56aebc89 | pbrook | { |
805 | 56aebc89 | pbrook | if (n < 8) { |
806 | 56aebc89 | pbrook | /* g0..g7 */
|
807 | 56aebc89 | pbrook | GET_REGA(env->gregs[n]); |
808 | e95c8d51 | bellard | } |
809 | 56aebc89 | pbrook | if (n < 32) { |
810 | 56aebc89 | pbrook | /* register window */
|
811 | 56aebc89 | pbrook | GET_REGA(env->regwptr[n - 8]);
|
812 | e95c8d51 | bellard | } |
813 | 56aebc89 | pbrook | #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
|
814 | 56aebc89 | pbrook | if (n < 64) { |
815 | 56aebc89 | pbrook | /* fprs */
|
816 | 30038fd8 | Richard Henderson | if (n & 1) { |
817 | 30038fd8 | Richard Henderson | GET_REG32(env->fpr[(n - 32) / 2].l.lower); |
818 | 30038fd8 | Richard Henderson | } else {
|
819 | 30038fd8 | Richard Henderson | GET_REG32(env->fpr[(n - 32) / 2].l.upper); |
820 | 30038fd8 | Richard Henderson | } |
821 | e95c8d51 | bellard | } |
822 | e95c8d51 | bellard | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
823 | 56aebc89 | pbrook | switch (n) {
|
824 | 56aebc89 | pbrook | case 64: GET_REGA(env->y); |
825 | 5a834bb4 | Blue Swirl | case 65: GET_REGA(cpu_get_psr(env)); |
826 | 56aebc89 | pbrook | case 66: GET_REGA(env->wim); |
827 | 56aebc89 | pbrook | case 67: GET_REGA(env->tbr); |
828 | 56aebc89 | pbrook | case 68: GET_REGA(env->pc); |
829 | 56aebc89 | pbrook | case 69: GET_REGA(env->npc); |
830 | 56aebc89 | pbrook | case 70: GET_REGA(env->fsr); |
831 | 56aebc89 | pbrook | case 71: GET_REGA(0); /* csr */ |
832 | 5a377912 | blueswir1 | default: GET_REGA(0); |
833 | 56aebc89 | pbrook | } |
834 | 3475187d | bellard | #else
|
835 | 56aebc89 | pbrook | if (n < 64) { |
836 | 56aebc89 | pbrook | /* f0-f31 */
|
837 | 30038fd8 | Richard Henderson | if (n & 1) { |
838 | 30038fd8 | Richard Henderson | GET_REG32(env->fpr[(n - 32) / 2].l.lower); |
839 | 30038fd8 | Richard Henderson | } else {
|
840 | 30038fd8 | Richard Henderson | GET_REG32(env->fpr[(n - 32) / 2].l.upper); |
841 | 30038fd8 | Richard Henderson | } |
842 | 56aebc89 | pbrook | } |
843 | 56aebc89 | pbrook | if (n < 80) { |
844 | 56aebc89 | pbrook | /* f32-f62 (double width, even numbers only) */
|
845 | 30038fd8 | Richard Henderson | GET_REG64(env->fpr[(n - 32) / 2].ll); |
846 | 3475187d | bellard | } |
847 | 56aebc89 | pbrook | switch (n) {
|
848 | 56aebc89 | pbrook | case 80: GET_REGL(env->pc); |
849 | 56aebc89 | pbrook | case 81: GET_REGL(env->npc); |
850 | 5a834bb4 | Blue Swirl | case 82: GET_REGL((cpu_get_ccr(env) << 32) | |
851 | 5a834bb4 | Blue Swirl | ((env->asi & 0xff) << 24) | |
852 | 5a834bb4 | Blue Swirl | ((env->pstate & 0xfff) << 8) | |
853 | 5a834bb4 | Blue Swirl | cpu_get_cwp64(env)); |
854 | 56aebc89 | pbrook | case 83: GET_REGL(env->fsr); |
855 | 56aebc89 | pbrook | case 84: GET_REGL(env->fprs); |
856 | 56aebc89 | pbrook | case 85: GET_REGL(env->y); |
857 | 56aebc89 | pbrook | } |
858 | 3475187d | bellard | #endif
|
859 | 56aebc89 | pbrook | return 0; |
860 | e95c8d51 | bellard | } |
861 | e95c8d51 | bellard | |
862 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUSPARCState *env, uint8_t *mem_buf, int n) |
863 | e95c8d51 | bellard | { |
864 | 56aebc89 | pbrook | #if defined(TARGET_ABI32)
|
865 | 56aebc89 | pbrook | abi_ulong tmp; |
866 | 56aebc89 | pbrook | |
867 | 56aebc89 | pbrook | tmp = ldl_p(mem_buf); |
868 | 96d19126 | blueswir1 | #else
|
869 | 56aebc89 | pbrook | target_ulong tmp; |
870 | 56aebc89 | pbrook | |
871 | 56aebc89 | pbrook | tmp = ldtul_p(mem_buf); |
872 | 96d19126 | blueswir1 | #endif
|
873 | e95c8d51 | bellard | |
874 | 56aebc89 | pbrook | if (n < 8) { |
875 | 56aebc89 | pbrook | /* g0..g7 */
|
876 | 56aebc89 | pbrook | env->gregs[n] = tmp; |
877 | 56aebc89 | pbrook | } else if (n < 32) { |
878 | 56aebc89 | pbrook | /* register window */
|
879 | 56aebc89 | pbrook | env->regwptr[n - 8] = tmp;
|
880 | e95c8d51 | bellard | } |
881 | 56aebc89 | pbrook | #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
|
882 | 56aebc89 | pbrook | else if (n < 64) { |
883 | 56aebc89 | pbrook | /* fprs */
|
884 | 30038fd8 | Richard Henderson | /* f0-f31 */
|
885 | 30038fd8 | Richard Henderson | if (n & 1) { |
886 | 30038fd8 | Richard Henderson | env->fpr[(n - 32) / 2].l.lower = tmp; |
887 | 30038fd8 | Richard Henderson | } else {
|
888 | 30038fd8 | Richard Henderson | env->fpr[(n - 32) / 2].l.upper = tmp; |
889 | 30038fd8 | Richard Henderson | } |
890 | 56aebc89 | pbrook | } else {
|
891 | 56aebc89 | pbrook | /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
|
892 | 56aebc89 | pbrook | switch (n) {
|
893 | 56aebc89 | pbrook | case 64: env->y = tmp; break; |
894 | 5a834bb4 | Blue Swirl | case 65: cpu_put_psr(env, tmp); break; |
895 | 56aebc89 | pbrook | case 66: env->wim = tmp; break; |
896 | 56aebc89 | pbrook | case 67: env->tbr = tmp; break; |
897 | 56aebc89 | pbrook | case 68: env->pc = tmp; break; |
898 | 56aebc89 | pbrook | case 69: env->npc = tmp; break; |
899 | 56aebc89 | pbrook | case 70: env->fsr = tmp; break; |
900 | 56aebc89 | pbrook | default: return 0; |
901 | 56aebc89 | pbrook | } |
902 | e95c8d51 | bellard | } |
903 | 56aebc89 | pbrook | return 4; |
904 | 3475187d | bellard | #else
|
905 | 56aebc89 | pbrook | else if (n < 64) { |
906 | 56aebc89 | pbrook | /* f0-f31 */
|
907 | 30038fd8 | Richard Henderson | tmp = ldl_p(mem_buf); |
908 | 30038fd8 | Richard Henderson | if (n & 1) { |
909 | 30038fd8 | Richard Henderson | env->fpr[(n - 32) / 2].l.lower = tmp; |
910 | 30038fd8 | Richard Henderson | } else {
|
911 | 30038fd8 | Richard Henderson | env->fpr[(n - 32) / 2].l.upper = tmp; |
912 | 30038fd8 | Richard Henderson | } |
913 | 56aebc89 | pbrook | return 4; |
914 | 56aebc89 | pbrook | } else if (n < 80) { |
915 | 56aebc89 | pbrook | /* f32-f62 (double width, even numbers only) */
|
916 | 30038fd8 | Richard Henderson | env->fpr[(n - 32) / 2].ll = tmp; |
917 | 56aebc89 | pbrook | } else {
|
918 | 56aebc89 | pbrook | switch (n) {
|
919 | 56aebc89 | pbrook | case 80: env->pc = tmp; break; |
920 | 56aebc89 | pbrook | case 81: env->npc = tmp; break; |
921 | 56aebc89 | pbrook | case 82: |
922 | 5a834bb4 | Blue Swirl | cpu_put_ccr(env, tmp >> 32);
|
923 | 56aebc89 | pbrook | env->asi = (tmp >> 24) & 0xff; |
924 | 56aebc89 | pbrook | env->pstate = (tmp >> 8) & 0xfff; |
925 | 5a834bb4 | Blue Swirl | cpu_put_cwp64(env, tmp & 0xff);
|
926 | 56aebc89 | pbrook | break;
|
927 | 56aebc89 | pbrook | case 83: env->fsr = tmp; break; |
928 | 56aebc89 | pbrook | case 84: env->fprs = tmp; break; |
929 | 56aebc89 | pbrook | case 85: env->y = tmp; break; |
930 | 56aebc89 | pbrook | default: return 0; |
931 | 56aebc89 | pbrook | } |
932 | 17d996e1 | blueswir1 | } |
933 | 56aebc89 | pbrook | return 8; |
934 | 3475187d | bellard | #endif
|
935 | 9e62fd7f | bellard | } |
936 | 1fddef4b | bellard | #elif defined (TARGET_ARM)
|
937 | 6da41eaf | bellard | |
938 | 56aebc89 | pbrook | /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect
|
939 | 56aebc89 | pbrook | whatever the target description contains. Due to a historical mishap
|
940 | 56aebc89 | pbrook | the FPA registers appear in between core integer regs and the CPSR.
|
941 | 56aebc89 | pbrook | We hack round this by giving the FPA regs zero size when talking to a
|
942 | 56aebc89 | pbrook | newer gdb. */
|
943 | 56aebc89 | pbrook | #define NUM_CORE_REGS 26 |
944 | 56aebc89 | pbrook | #define GDB_CORE_XML "arm-core.xml" |
945 | e6e5906b | pbrook | |
946 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUARMState *env, uint8_t *mem_buf, int n) |
947 | e6e5906b | pbrook | { |
948 | 56aebc89 | pbrook | if (n < 16) { |
949 | 56aebc89 | pbrook | /* Core integer register. */
|
950 | 56aebc89 | pbrook | GET_REG32(env->regs[n]); |
951 | 56aebc89 | pbrook | } |
952 | 56aebc89 | pbrook | if (n < 24) { |
953 | 56aebc89 | pbrook | /* FPA registers. */
|
954 | 56aebc89 | pbrook | if (gdb_has_xml)
|
955 | 56aebc89 | pbrook | return 0; |
956 | 56aebc89 | pbrook | memset(mem_buf, 0, 12); |
957 | 56aebc89 | pbrook | return 12; |
958 | 56aebc89 | pbrook | } |
959 | 56aebc89 | pbrook | switch (n) {
|
960 | 56aebc89 | pbrook | case 24: |
961 | 56aebc89 | pbrook | /* FPA status register. */
|
962 | 56aebc89 | pbrook | if (gdb_has_xml)
|
963 | 56aebc89 | pbrook | return 0; |
964 | 56aebc89 | pbrook | GET_REG32(0);
|
965 | 56aebc89 | pbrook | case 25: |
966 | 56aebc89 | pbrook | /* CPSR */
|
967 | 56aebc89 | pbrook | GET_REG32(cpsr_read(env)); |
968 | 56aebc89 | pbrook | } |
969 | 56aebc89 | pbrook | /* Unknown register. */
|
970 | 56aebc89 | pbrook | return 0; |
971 | e6e5906b | pbrook | } |
972 | 6f970bd9 | bellard | |
973 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUARMState *env, uint8_t *mem_buf, int n) |
974 | 56aebc89 | pbrook | { |
975 | 56aebc89 | pbrook | uint32_t tmp; |
976 | 6f970bd9 | bellard | |
977 | 56aebc89 | pbrook | tmp = ldl_p(mem_buf); |
978 | 6f970bd9 | bellard | |
979 | 56aebc89 | pbrook | /* Mask out low bit of PC to workaround gdb bugs. This will probably
|
980 | 56aebc89 | pbrook | cause problems if we ever implement the Jazelle DBX extensions. */
|
981 | 56aebc89 | pbrook | if (n == 15) |
982 | 56aebc89 | pbrook | tmp &= ~1;
|
983 | 6f970bd9 | bellard | |
984 | 56aebc89 | pbrook | if (n < 16) { |
985 | 56aebc89 | pbrook | /* Core integer register. */
|
986 | 56aebc89 | pbrook | env->regs[n] = tmp; |
987 | 56aebc89 | pbrook | return 4; |
988 | 56aebc89 | pbrook | } |
989 | 56aebc89 | pbrook | if (n < 24) { /* 16-23 */ |
990 | 56aebc89 | pbrook | /* FPA registers (ignored). */
|
991 | 56aebc89 | pbrook | if (gdb_has_xml)
|
992 | 56aebc89 | pbrook | return 0; |
993 | 56aebc89 | pbrook | return 12; |
994 | 56aebc89 | pbrook | } |
995 | 56aebc89 | pbrook | switch (n) {
|
996 | 56aebc89 | pbrook | case 24: |
997 | 56aebc89 | pbrook | /* FPA status register (ignored). */
|
998 | 56aebc89 | pbrook | if (gdb_has_xml)
|
999 | 56aebc89 | pbrook | return 0; |
1000 | 56aebc89 | pbrook | return 4; |
1001 | 56aebc89 | pbrook | case 25: |
1002 | 56aebc89 | pbrook | /* CPSR */
|
1003 | 56aebc89 | pbrook | cpsr_write (env, tmp, 0xffffffff);
|
1004 | 56aebc89 | pbrook | return 4; |
1005 | 56aebc89 | pbrook | } |
1006 | 56aebc89 | pbrook | /* Unknown register. */
|
1007 | 56aebc89 | pbrook | return 0; |
1008 | 56aebc89 | pbrook | } |
1009 | 6f970bd9 | bellard | |
1010 | 56aebc89 | pbrook | #elif defined (TARGET_M68K)
|
1011 | 6f970bd9 | bellard | |
1012 | 56aebc89 | pbrook | #define NUM_CORE_REGS 18 |
1013 | 6f970bd9 | bellard | |
1014 | 56aebc89 | pbrook | #define GDB_CORE_XML "cf-core.xml" |
1015 | 6f970bd9 | bellard | |
1016 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUM68KState *env, uint8_t *mem_buf, int n) |
1017 | 56aebc89 | pbrook | { |
1018 | 56aebc89 | pbrook | if (n < 8) { |
1019 | 56aebc89 | pbrook | /* D0-D7 */
|
1020 | 56aebc89 | pbrook | GET_REG32(env->dregs[n]); |
1021 | 56aebc89 | pbrook | } else if (n < 16) { |
1022 | 56aebc89 | pbrook | /* A0-A7 */
|
1023 | 56aebc89 | pbrook | GET_REG32(env->aregs[n - 8]);
|
1024 | 56aebc89 | pbrook | } else {
|
1025 | 56aebc89 | pbrook | switch (n) {
|
1026 | 56aebc89 | pbrook | case 16: GET_REG32(env->sr); |
1027 | 56aebc89 | pbrook | case 17: GET_REG32(env->pc); |
1028 | 56aebc89 | pbrook | } |
1029 | 56aebc89 | pbrook | } |
1030 | 56aebc89 | pbrook | /* FP registers not included here because they vary between
|
1031 | 56aebc89 | pbrook | ColdFire and m68k. Use XML bits for these. */
|
1032 | 56aebc89 | pbrook | return 0; |
1033 | 56aebc89 | pbrook | } |
1034 | 8e33c08c | ths | |
1035 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUM68KState *env, uint8_t *mem_buf, int n) |
1036 | 56aebc89 | pbrook | { |
1037 | 56aebc89 | pbrook | uint32_t tmp; |
1038 | 8e33c08c | ths | |
1039 | 56aebc89 | pbrook | tmp = ldl_p(mem_buf); |
1040 | 8e33c08c | ths | |
1041 | 56aebc89 | pbrook | if (n < 8) { |
1042 | 56aebc89 | pbrook | /* D0-D7 */
|
1043 | 56aebc89 | pbrook | env->dregs[n] = tmp; |
1044 | b3d6b959 | Kazu Hirata | } else if (n < 16) { |
1045 | 56aebc89 | pbrook | /* A0-A7 */
|
1046 | 56aebc89 | pbrook | env->aregs[n - 8] = tmp;
|
1047 | 56aebc89 | pbrook | } else {
|
1048 | 56aebc89 | pbrook | switch (n) {
|
1049 | 56aebc89 | pbrook | case 16: env->sr = tmp; break; |
1050 | 56aebc89 | pbrook | case 17: env->pc = tmp; break; |
1051 | 56aebc89 | pbrook | default: return 0; |
1052 | 56aebc89 | pbrook | } |
1053 | 56aebc89 | pbrook | } |
1054 | 56aebc89 | pbrook | return 4; |
1055 | 56aebc89 | pbrook | } |
1056 | 56aebc89 | pbrook | #elif defined (TARGET_MIPS)
|
1057 | 7ac256b8 | ths | |
1058 | 56aebc89 | pbrook | #define NUM_CORE_REGS 73 |
1059 | 7ac256b8 | ths | |
1060 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUMIPSState *env, uint8_t *mem_buf, int n) |
1061 | 56aebc89 | pbrook | { |
1062 | 56aebc89 | pbrook | if (n < 32) { |
1063 | 56aebc89 | pbrook | GET_REGL(env->active_tc.gpr[n]); |
1064 | 56aebc89 | pbrook | } |
1065 | 56aebc89 | pbrook | if (env->CP0_Config1 & (1 << CP0C1_FP)) { |
1066 | 56aebc89 | pbrook | if (n >= 38 && n < 70) { |
1067 | 56aebc89 | pbrook | if (env->CP0_Status & (1 << CP0St_FR)) |
1068 | 56aebc89 | pbrook | GET_REGL(env->active_fpu.fpr[n - 38].d);
|
1069 | 56aebc89 | pbrook | else
|
1070 | 56aebc89 | pbrook | GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
|
1071 | 56aebc89 | pbrook | } |
1072 | 56aebc89 | pbrook | switch (n) {
|
1073 | 56aebc89 | pbrook | case 70: GET_REGL((int32_t)env->active_fpu.fcr31); |
1074 | 56aebc89 | pbrook | case 71: GET_REGL((int32_t)env->active_fpu.fcr0); |
1075 | 56aebc89 | pbrook | } |
1076 | 56aebc89 | pbrook | } |
1077 | 56aebc89 | pbrook | switch (n) {
|
1078 | 56aebc89 | pbrook | case 32: GET_REGL((int32_t)env->CP0_Status); |
1079 | 56aebc89 | pbrook | case 33: GET_REGL(env->active_tc.LO[0]); |
1080 | 56aebc89 | pbrook | case 34: GET_REGL(env->active_tc.HI[0]); |
1081 | 56aebc89 | pbrook | case 35: GET_REGL(env->CP0_BadVAddr); |
1082 | 56aebc89 | pbrook | case 36: GET_REGL((int32_t)env->CP0_Cause); |
1083 | ff1d1977 | Nathan Froyd | case 37: GET_REGL(env->active_tc.PC | !!(env->hflags & MIPS_HFLAG_M16)); |
1084 | 56aebc89 | pbrook | case 72: GET_REGL(0); /* fp */ |
1085 | 56aebc89 | pbrook | case 89: GET_REGL((int32_t)env->CP0_PRid); |
1086 | 56aebc89 | pbrook | } |
1087 | 56aebc89 | pbrook | if (n >= 73 && n <= 88) { |
1088 | 56aebc89 | pbrook | /* 16 embedded regs. */
|
1089 | 56aebc89 | pbrook | GET_REGL(0);
|
1090 | 56aebc89 | pbrook | } |
1091 | 6f970bd9 | bellard | |
1092 | 56aebc89 | pbrook | return 0; |
1093 | 6f970bd9 | bellard | } |
1094 | 6f970bd9 | bellard | |
1095 | 8e33c08c | ths | /* convert MIPS rounding mode in FCR31 to IEEE library */
|
1096 | 8e33c08c | ths | static unsigned int ieee_rm[] = |
1097 | 8e33c08c | ths | { |
1098 | 8e33c08c | ths | float_round_nearest_even, |
1099 | 8e33c08c | ths | float_round_to_zero, |
1100 | 8e33c08c | ths | float_round_up, |
1101 | 8e33c08c | ths | float_round_down |
1102 | 8e33c08c | ths | }; |
1103 | 8e33c08c | ths | #define RESTORE_ROUNDING_MODE \
|
1104 | f01be154 | ths | set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
|
1105 | 8e33c08c | ths | |
1106 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n) |
1107 | 6f970bd9 | bellard | { |
1108 | 56aebc89 | pbrook | target_ulong tmp; |
1109 | 6f970bd9 | bellard | |
1110 | 56aebc89 | pbrook | tmp = ldtul_p(mem_buf); |
1111 | 6f970bd9 | bellard | |
1112 | 56aebc89 | pbrook | if (n < 32) { |
1113 | 56aebc89 | pbrook | env->active_tc.gpr[n] = tmp; |
1114 | 56aebc89 | pbrook | return sizeof(target_ulong); |
1115 | 56aebc89 | pbrook | } |
1116 | 56aebc89 | pbrook | if (env->CP0_Config1 & (1 << CP0C1_FP) |
1117 | 56aebc89 | pbrook | && n >= 38 && n < 73) { |
1118 | 56aebc89 | pbrook | if (n < 70) { |
1119 | 7ac256b8 | ths | if (env->CP0_Status & (1 << CP0St_FR)) |
1120 | 56aebc89 | pbrook | env->active_fpu.fpr[n - 38].d = tmp;
|
1121 | 7ac256b8 | ths | else
|
1122 | 56aebc89 | pbrook | env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
|
1123 | 56aebc89 | pbrook | } |
1124 | 56aebc89 | pbrook | switch (n) {
|
1125 | 56aebc89 | pbrook | case 70: |
1126 | 56aebc89 | pbrook | env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
|
1127 | 56aebc89 | pbrook | /* set rounding mode */
|
1128 | 56aebc89 | pbrook | RESTORE_ROUNDING_MODE; |
1129 | 56aebc89 | pbrook | break;
|
1130 | 56aebc89 | pbrook | case 71: env->active_fpu.fcr0 = tmp; break; |
1131 | 56aebc89 | pbrook | } |
1132 | 56aebc89 | pbrook | return sizeof(target_ulong); |
1133 | 56aebc89 | pbrook | } |
1134 | 56aebc89 | pbrook | switch (n) {
|
1135 | 56aebc89 | pbrook | case 32: env->CP0_Status = tmp; break; |
1136 | 56aebc89 | pbrook | case 33: env->active_tc.LO[0] = tmp; break; |
1137 | 56aebc89 | pbrook | case 34: env->active_tc.HI[0] = tmp; break; |
1138 | 56aebc89 | pbrook | case 35: env->CP0_BadVAddr = tmp; break; |
1139 | 56aebc89 | pbrook | case 36: env->CP0_Cause = tmp; break; |
1140 | ff1d1977 | Nathan Froyd | case 37: |
1141 | ff1d1977 | Nathan Froyd | env->active_tc.PC = tmp & ~(target_ulong)1;
|
1142 | ff1d1977 | Nathan Froyd | if (tmp & 1) { |
1143 | ff1d1977 | Nathan Froyd | env->hflags |= MIPS_HFLAG_M16; |
1144 | ff1d1977 | Nathan Froyd | } else {
|
1145 | ff1d1977 | Nathan Froyd | env->hflags &= ~(MIPS_HFLAG_M16); |
1146 | ff1d1977 | Nathan Froyd | } |
1147 | ff1d1977 | Nathan Froyd | break;
|
1148 | 56aebc89 | pbrook | case 72: /* fp, ignored */ break; |
1149 | 56aebc89 | pbrook | default:
|
1150 | 56aebc89 | pbrook | if (n > 89) |
1151 | 56aebc89 | pbrook | return 0; |
1152 | 56aebc89 | pbrook | /* Other registers are readonly. Ignore writes. */
|
1153 | 56aebc89 | pbrook | break;
|
1154 | 56aebc89 | pbrook | } |
1155 | 56aebc89 | pbrook | |
1156 | 56aebc89 | pbrook | return sizeof(target_ulong); |
1157 | 6f970bd9 | bellard | } |
1158 | fc04355b | Jia Liu | #elif defined(TARGET_OPENRISC)
|
1159 | fc04355b | Jia Liu | |
1160 | fc04355b | Jia Liu | #define NUM_CORE_REGS (32 + 3) |
1161 | fc04355b | Jia Liu | |
1162 | fc04355b | Jia Liu | static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n) |
1163 | fc04355b | Jia Liu | { |
1164 | fc04355b | Jia Liu | if (n < 32) { |
1165 | fc04355b | Jia Liu | GET_REG32(env->gpr[n]); |
1166 | fc04355b | Jia Liu | } else {
|
1167 | fc04355b | Jia Liu | switch (n) {
|
1168 | fc04355b | Jia Liu | case 32: /* PPC */ |
1169 | fc04355b | Jia Liu | GET_REG32(env->ppc); |
1170 | fc04355b | Jia Liu | break;
|
1171 | fc04355b | Jia Liu | |
1172 | fc04355b | Jia Liu | case 33: /* NPC */ |
1173 | fc04355b | Jia Liu | GET_REG32(env->npc); |
1174 | fc04355b | Jia Liu | break;
|
1175 | fc04355b | Jia Liu | |
1176 | fc04355b | Jia Liu | case 34: /* SR */ |
1177 | fc04355b | Jia Liu | GET_REG32(env->sr); |
1178 | fc04355b | Jia Liu | break;
|
1179 | fc04355b | Jia Liu | |
1180 | fc04355b | Jia Liu | default:
|
1181 | fc04355b | Jia Liu | break;
|
1182 | fc04355b | Jia Liu | } |
1183 | fc04355b | Jia Liu | } |
1184 | fc04355b | Jia Liu | return 0; |
1185 | fc04355b | Jia Liu | } |
1186 | fc04355b | Jia Liu | |
1187 | fc04355b | Jia Liu | static int cpu_gdb_write_register(CPUOpenRISCState *env, |
1188 | fc04355b | Jia Liu | uint8_t *mem_buf, int n)
|
1189 | fc04355b | Jia Liu | { |
1190 | fc04355b | Jia Liu | uint32_t tmp; |
1191 | fc04355b | Jia Liu | |
1192 | fc04355b | Jia Liu | if (n > NUM_CORE_REGS) {
|
1193 | fc04355b | Jia Liu | return 0; |
1194 | fc04355b | Jia Liu | } |
1195 | fc04355b | Jia Liu | |
1196 | fc04355b | Jia Liu | tmp = ldl_p(mem_buf); |
1197 | fc04355b | Jia Liu | |
1198 | fc04355b | Jia Liu | if (n < 32) { |
1199 | fc04355b | Jia Liu | env->gpr[n] = tmp; |
1200 | fc04355b | Jia Liu | } else {
|
1201 | fc04355b | Jia Liu | switch (n) {
|
1202 | fc04355b | Jia Liu | case 32: /* PPC */ |
1203 | fc04355b | Jia Liu | env->ppc = tmp; |
1204 | fc04355b | Jia Liu | break;
|
1205 | fc04355b | Jia Liu | |
1206 | fc04355b | Jia Liu | case 33: /* NPC */ |
1207 | fc04355b | Jia Liu | env->npc = tmp; |
1208 | fc04355b | Jia Liu | break;
|
1209 | fc04355b | Jia Liu | |
1210 | fc04355b | Jia Liu | case 34: /* SR */ |
1211 | fc04355b | Jia Liu | env->sr = tmp; |
1212 | fc04355b | Jia Liu | break;
|
1213 | fc04355b | Jia Liu | |
1214 | fc04355b | Jia Liu | default:
|
1215 | fc04355b | Jia Liu | break;
|
1216 | fc04355b | Jia Liu | } |
1217 | fc04355b | Jia Liu | } |
1218 | fc04355b | Jia Liu | return 4; |
1219 | fc04355b | Jia Liu | } |
1220 | fdf9b3e8 | bellard | #elif defined (TARGET_SH4)
|
1221 | 6ef99fc5 | ths | |
1222 | 6ef99fc5 | ths | /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
|
1223 | 56aebc89 | pbrook | /* FIXME: We should use XML for this. */
|
1224 | 56aebc89 | pbrook | |
1225 | 56aebc89 | pbrook | #define NUM_CORE_REGS 59 |
1226 | 6ef99fc5 | ths | |
1227 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUSH4State *env, uint8_t *mem_buf, int n) |
1228 | fdf9b3e8 | bellard | { |
1229 | eca5c303 | Aurelien Jarno | switch (n) {
|
1230 | eca5c303 | Aurelien Jarno | case 0 ... 7: |
1231 | 56aebc89 | pbrook | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
1232 | 56aebc89 | pbrook | GET_REGL(env->gregs[n + 16]);
|
1233 | 56aebc89 | pbrook | } else {
|
1234 | 56aebc89 | pbrook | GET_REGL(env->gregs[n]); |
1235 | 56aebc89 | pbrook | } |
1236 | eca5c303 | Aurelien Jarno | case 8 ... 15: |
1237 | e192a45c | takasi-y@ops.dti.ne.jp | GET_REGL(env->gregs[n]); |
1238 | eca5c303 | Aurelien Jarno | case 16: |
1239 | eca5c303 | Aurelien Jarno | GET_REGL(env->pc); |
1240 | eca5c303 | Aurelien Jarno | case 17: |
1241 | eca5c303 | Aurelien Jarno | GET_REGL(env->pr); |
1242 | eca5c303 | Aurelien Jarno | case 18: |
1243 | eca5c303 | Aurelien Jarno | GET_REGL(env->gbr); |
1244 | eca5c303 | Aurelien Jarno | case 19: |
1245 | eca5c303 | Aurelien Jarno | GET_REGL(env->vbr); |
1246 | eca5c303 | Aurelien Jarno | case 20: |
1247 | eca5c303 | Aurelien Jarno | GET_REGL(env->mach); |
1248 | eca5c303 | Aurelien Jarno | case 21: |
1249 | eca5c303 | Aurelien Jarno | GET_REGL(env->macl); |
1250 | eca5c303 | Aurelien Jarno | case 22: |
1251 | eca5c303 | Aurelien Jarno | GET_REGL(env->sr); |
1252 | eca5c303 | Aurelien Jarno | case 23: |
1253 | eca5c303 | Aurelien Jarno | GET_REGL(env->fpul); |
1254 | eca5c303 | Aurelien Jarno | case 24: |
1255 | eca5c303 | Aurelien Jarno | GET_REGL(env->fpscr); |
1256 | eca5c303 | Aurelien Jarno | case 25 ... 40: |
1257 | eca5c303 | Aurelien Jarno | if (env->fpscr & FPSCR_FR) {
|
1258 | eca5c303 | Aurelien Jarno | stfl_p(mem_buf, env->fregs[n - 9]);
|
1259 | eca5c303 | Aurelien Jarno | } else {
|
1260 | eca5c303 | Aurelien Jarno | stfl_p(mem_buf, env->fregs[n - 25]);
|
1261 | eca5c303 | Aurelien Jarno | } |
1262 | eca5c303 | Aurelien Jarno | return 4; |
1263 | eca5c303 | Aurelien Jarno | case 41: |
1264 | eca5c303 | Aurelien Jarno | GET_REGL(env->ssr); |
1265 | eca5c303 | Aurelien Jarno | case 42: |
1266 | eca5c303 | Aurelien Jarno | GET_REGL(env->spc); |
1267 | eca5c303 | Aurelien Jarno | case 43 ... 50: |
1268 | eca5c303 | Aurelien Jarno | GET_REGL(env->gregs[n - 43]);
|
1269 | eca5c303 | Aurelien Jarno | case 51 ... 58: |
1270 | eca5c303 | Aurelien Jarno | GET_REGL(env->gregs[n - (51 - 16)]); |
1271 | 56aebc89 | pbrook | } |
1272 | 56aebc89 | pbrook | |
1273 | 56aebc89 | pbrook | return 0; |
1274 | fdf9b3e8 | bellard | } |
1275 | fdf9b3e8 | bellard | |
1276 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUSH4State *env, uint8_t *mem_buf, int n) |
1277 | fdf9b3e8 | bellard | { |
1278 | eca5c303 | Aurelien Jarno | switch (n) {
|
1279 | eca5c303 | Aurelien Jarno | case 0 ... 7: |
1280 | 56aebc89 | pbrook | if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
|
1281 | eca5c303 | Aurelien Jarno | env->gregs[n + 16] = ldl_p(mem_buf);
|
1282 | 56aebc89 | pbrook | } else {
|
1283 | eca5c303 | Aurelien Jarno | env->gregs[n] = ldl_p(mem_buf); |
1284 | 56aebc89 | pbrook | } |
1285 | eca5c303 | Aurelien Jarno | break;
|
1286 | eca5c303 | Aurelien Jarno | case 8 ... 15: |
1287 | eca5c303 | Aurelien Jarno | env->gregs[n] = ldl_p(mem_buf); |
1288 | eca5c303 | Aurelien Jarno | break;
|
1289 | eca5c303 | Aurelien Jarno | case 16: |
1290 | eca5c303 | Aurelien Jarno | env->pc = ldl_p(mem_buf); |
1291 | eca5c303 | Aurelien Jarno | break;
|
1292 | eca5c303 | Aurelien Jarno | case 17: |
1293 | eca5c303 | Aurelien Jarno | env->pr = ldl_p(mem_buf); |
1294 | eca5c303 | Aurelien Jarno | break;
|
1295 | eca5c303 | Aurelien Jarno | case 18: |
1296 | eca5c303 | Aurelien Jarno | env->gbr = ldl_p(mem_buf); |
1297 | eca5c303 | Aurelien Jarno | break;
|
1298 | eca5c303 | Aurelien Jarno | case 19: |
1299 | eca5c303 | Aurelien Jarno | env->vbr = ldl_p(mem_buf); |
1300 | eca5c303 | Aurelien Jarno | break;
|
1301 | eca5c303 | Aurelien Jarno | case 20: |
1302 | eca5c303 | Aurelien Jarno | env->mach = ldl_p(mem_buf); |
1303 | eca5c303 | Aurelien Jarno | break;
|
1304 | eca5c303 | Aurelien Jarno | case 21: |
1305 | eca5c303 | Aurelien Jarno | env->macl = ldl_p(mem_buf); |
1306 | eca5c303 | Aurelien Jarno | break;
|
1307 | eca5c303 | Aurelien Jarno | case 22: |
1308 | eca5c303 | Aurelien Jarno | env->sr = ldl_p(mem_buf); |
1309 | eca5c303 | Aurelien Jarno | break;
|
1310 | eca5c303 | Aurelien Jarno | case 23: |
1311 | eca5c303 | Aurelien Jarno | env->fpul = ldl_p(mem_buf); |
1312 | eca5c303 | Aurelien Jarno | break;
|
1313 | eca5c303 | Aurelien Jarno | case 24: |
1314 | eca5c303 | Aurelien Jarno | env->fpscr = ldl_p(mem_buf); |
1315 | eca5c303 | Aurelien Jarno | break;
|
1316 | eca5c303 | Aurelien Jarno | case 25 ... 40: |
1317 | eca5c303 | Aurelien Jarno | if (env->fpscr & FPSCR_FR) {
|
1318 | eca5c303 | Aurelien Jarno | env->fregs[n - 9] = ldfl_p(mem_buf);
|
1319 | eca5c303 | Aurelien Jarno | } else {
|
1320 | eca5c303 | Aurelien Jarno | env->fregs[n - 25] = ldfl_p(mem_buf);
|
1321 | eca5c303 | Aurelien Jarno | } |
1322 | eca5c303 | Aurelien Jarno | break;
|
1323 | eca5c303 | Aurelien Jarno | case 41: |
1324 | eca5c303 | Aurelien Jarno | env->ssr = ldl_p(mem_buf); |
1325 | eca5c303 | Aurelien Jarno | break;
|
1326 | eca5c303 | Aurelien Jarno | case 42: |
1327 | eca5c303 | Aurelien Jarno | env->spc = ldl_p(mem_buf); |
1328 | eca5c303 | Aurelien Jarno | break;
|
1329 | eca5c303 | Aurelien Jarno | case 43 ... 50: |
1330 | eca5c303 | Aurelien Jarno | env->gregs[n - 43] = ldl_p(mem_buf);
|
1331 | eca5c303 | Aurelien Jarno | break;
|
1332 | eca5c303 | Aurelien Jarno | case 51 ... 58: |
1333 | eca5c303 | Aurelien Jarno | env->gregs[n - (51 - 16)] = ldl_p(mem_buf); |
1334 | eca5c303 | Aurelien Jarno | break;
|
1335 | 56aebc89 | pbrook | default: return 0; |
1336 | 56aebc89 | pbrook | } |
1337 | 56aebc89 | pbrook | |
1338 | 56aebc89 | pbrook | return 4; |
1339 | fdf9b3e8 | bellard | } |
1340 | d74d6a99 | Edgar E. Iglesias | #elif defined (TARGET_MICROBLAZE)
|
1341 | d74d6a99 | Edgar E. Iglesias | |
1342 | d74d6a99 | Edgar E. Iglesias | #define NUM_CORE_REGS (32 + 5) |
1343 | d74d6a99 | Edgar E. Iglesias | |
1344 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUMBState *env, uint8_t *mem_buf, int n) |
1345 | d74d6a99 | Edgar E. Iglesias | { |
1346 | d74d6a99 | Edgar E. Iglesias | if (n < 32) { |
1347 | d74d6a99 | Edgar E. Iglesias | GET_REG32(env->regs[n]); |
1348 | d74d6a99 | Edgar E. Iglesias | } else {
|
1349 | d74d6a99 | Edgar E. Iglesias | GET_REG32(env->sregs[n - 32]);
|
1350 | d74d6a99 | Edgar E. Iglesias | } |
1351 | d74d6a99 | Edgar E. Iglesias | return 0; |
1352 | d74d6a99 | Edgar E. Iglesias | } |
1353 | d74d6a99 | Edgar E. Iglesias | |
1354 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUMBState *env, uint8_t *mem_buf, int n) |
1355 | d74d6a99 | Edgar E. Iglesias | { |
1356 | d74d6a99 | Edgar E. Iglesias | uint32_t tmp; |
1357 | d74d6a99 | Edgar E. Iglesias | |
1358 | d74d6a99 | Edgar E. Iglesias | if (n > NUM_CORE_REGS)
|
1359 | d74d6a99 | Edgar E. Iglesias | return 0; |
1360 | d74d6a99 | Edgar E. Iglesias | |
1361 | d74d6a99 | Edgar E. Iglesias | tmp = ldl_p(mem_buf); |
1362 | d74d6a99 | Edgar E. Iglesias | |
1363 | d74d6a99 | Edgar E. Iglesias | if (n < 32) { |
1364 | d74d6a99 | Edgar E. Iglesias | env->regs[n] = tmp; |
1365 | d74d6a99 | Edgar E. Iglesias | } else {
|
1366 | d74d6a99 | Edgar E. Iglesias | env->sregs[n - 32] = tmp;
|
1367 | d74d6a99 | Edgar E. Iglesias | } |
1368 | d74d6a99 | Edgar E. Iglesias | return 4; |
1369 | d74d6a99 | Edgar E. Iglesias | } |
1370 | f1ccf904 | ths | #elif defined (TARGET_CRIS)
|
1371 | f1ccf904 | ths | |
1372 | 56aebc89 | pbrook | #define NUM_CORE_REGS 49 |
1373 | 56aebc89 | pbrook | |
1374 | 4a0b59fe | Edgar E. Iglesias | static int |
1375 | f3840919 | Andreas Färber | read_register_crisv10(CPUCRISState *env, uint8_t *mem_buf, int n)
|
1376 | 4a0b59fe | Edgar E. Iglesias | { |
1377 | 4a0b59fe | Edgar E. Iglesias | if (n < 15) { |
1378 | 4a0b59fe | Edgar E. Iglesias | GET_REG32(env->regs[n]); |
1379 | 4a0b59fe | Edgar E. Iglesias | } |
1380 | 4a0b59fe | Edgar E. Iglesias | |
1381 | 4a0b59fe | Edgar E. Iglesias | if (n == 15) { |
1382 | 4a0b59fe | Edgar E. Iglesias | GET_REG32(env->pc); |
1383 | 4a0b59fe | Edgar E. Iglesias | } |
1384 | 4a0b59fe | Edgar E. Iglesias | |
1385 | 4a0b59fe | Edgar E. Iglesias | if (n < 32) { |
1386 | 4a0b59fe | Edgar E. Iglesias | switch (n) {
|
1387 | 4a0b59fe | Edgar E. Iglesias | case 16: |
1388 | 4a0b59fe | Edgar E. Iglesias | GET_REG8(env->pregs[n - 16]);
|
1389 | 4a0b59fe | Edgar E. Iglesias | break;
|
1390 | 4a0b59fe | Edgar E. Iglesias | case 17: |
1391 | 4a0b59fe | Edgar E. Iglesias | GET_REG8(env->pregs[n - 16]);
|
1392 | 4a0b59fe | Edgar E. Iglesias | break;
|
1393 | 4a0b59fe | Edgar E. Iglesias | case 20: |
1394 | 4a0b59fe | Edgar E. Iglesias | case 21: |
1395 | 4a0b59fe | Edgar E. Iglesias | GET_REG16(env->pregs[n - 16]);
|
1396 | 4a0b59fe | Edgar E. Iglesias | break;
|
1397 | 4a0b59fe | Edgar E. Iglesias | default:
|
1398 | 4a0b59fe | Edgar E. Iglesias | if (n >= 23) { |
1399 | 4a0b59fe | Edgar E. Iglesias | GET_REG32(env->pregs[n - 16]);
|
1400 | 4a0b59fe | Edgar E. Iglesias | } |
1401 | 4a0b59fe | Edgar E. Iglesias | break;
|
1402 | 4a0b59fe | Edgar E. Iglesias | } |
1403 | 4a0b59fe | Edgar E. Iglesias | } |
1404 | 4a0b59fe | Edgar E. Iglesias | return 0; |
1405 | 4a0b59fe | Edgar E. Iglesias | } |
1406 | 4a0b59fe | Edgar E. Iglesias | |
1407 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUCRISState *env, uint8_t *mem_buf, int n) |
1408 | f1ccf904 | ths | { |
1409 | 56aebc89 | pbrook | uint8_t srs; |
1410 | 56aebc89 | pbrook | |
1411 | 4a0b59fe | Edgar E. Iglesias | if (env->pregs[PR_VR] < 32) |
1412 | 4a0b59fe | Edgar E. Iglesias | return read_register_crisv10(env, mem_buf, n);
|
1413 | 4a0b59fe | Edgar E. Iglesias | |
1414 | 56aebc89 | pbrook | srs = env->pregs[PR_SRS]; |
1415 | 56aebc89 | pbrook | if (n < 16) { |
1416 | 56aebc89 | pbrook | GET_REG32(env->regs[n]); |
1417 | 56aebc89 | pbrook | } |
1418 | 56aebc89 | pbrook | |
1419 | 56aebc89 | pbrook | if (n >= 21 && n < 32) { |
1420 | 56aebc89 | pbrook | GET_REG32(env->pregs[n - 16]);
|
1421 | 56aebc89 | pbrook | } |
1422 | 56aebc89 | pbrook | if (n >= 33 && n < 49) { |
1423 | 56aebc89 | pbrook | GET_REG32(env->sregs[srs][n - 33]);
|
1424 | 56aebc89 | pbrook | } |
1425 | 56aebc89 | pbrook | switch (n) {
|
1426 | 56aebc89 | pbrook | case 16: GET_REG8(env->pregs[0]); |
1427 | 56aebc89 | pbrook | case 17: GET_REG8(env->pregs[1]); |
1428 | 56aebc89 | pbrook | case 18: GET_REG32(env->pregs[2]); |
1429 | 56aebc89 | pbrook | case 19: GET_REG8(srs); |
1430 | 56aebc89 | pbrook | case 20: GET_REG16(env->pregs[4]); |
1431 | 56aebc89 | pbrook | case 32: GET_REG32(env->pc); |
1432 | 56aebc89 | pbrook | } |
1433 | 56aebc89 | pbrook | |
1434 | 56aebc89 | pbrook | return 0; |
1435 | f1ccf904 | ths | } |
1436 | 56aebc89 | pbrook | |
1437 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUCRISState *env, uint8_t *mem_buf, int n) |
1438 | f1ccf904 | ths | { |
1439 | 56aebc89 | pbrook | uint32_t tmp; |
1440 | 56aebc89 | pbrook | |
1441 | 56aebc89 | pbrook | if (n > 49) |
1442 | 56aebc89 | pbrook | return 0; |
1443 | 56aebc89 | pbrook | |
1444 | 56aebc89 | pbrook | tmp = ldl_p(mem_buf); |
1445 | 56aebc89 | pbrook | |
1446 | 56aebc89 | pbrook | if (n < 16) { |
1447 | 56aebc89 | pbrook | env->regs[n] = tmp; |
1448 | 56aebc89 | pbrook | } |
1449 | 56aebc89 | pbrook | |
1450 | d7b6967a | edgar_igl | if (n >= 21 && n < 32) { |
1451 | d7b6967a | edgar_igl | env->pregs[n - 16] = tmp;
|
1452 | d7b6967a | edgar_igl | } |
1453 | d7b6967a | edgar_igl | |
1454 | d7b6967a | edgar_igl | /* FIXME: Should support function regs be writable? */
|
1455 | 56aebc89 | pbrook | switch (n) {
|
1456 | 56aebc89 | pbrook | case 16: return 1; |
1457 | 56aebc89 | pbrook | case 17: return 1; |
1458 | d7b6967a | edgar_igl | case 18: env->pregs[PR_PID] = tmp; break; |
1459 | 56aebc89 | pbrook | case 19: return 1; |
1460 | 56aebc89 | pbrook | case 20: return 2; |
1461 | 56aebc89 | pbrook | case 32: env->pc = tmp; break; |
1462 | 56aebc89 | pbrook | } |
1463 | 56aebc89 | pbrook | |
1464 | 56aebc89 | pbrook | return 4; |
1465 | f1ccf904 | ths | } |
1466 | 19bf517b | aurel32 | #elif defined (TARGET_ALPHA)
|
1467 | 19bf517b | aurel32 | |
1468 | 7c5a90dd | Richard Henderson | #define NUM_CORE_REGS 67 |
1469 | 19bf517b | aurel32 | |
1470 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUAlphaState *env, uint8_t *mem_buf, int n) |
1471 | 19bf517b | aurel32 | { |
1472 | 7c5a90dd | Richard Henderson | uint64_t val; |
1473 | 7c5a90dd | Richard Henderson | CPU_DoubleU d; |
1474 | 19bf517b | aurel32 | |
1475 | 7c5a90dd | Richard Henderson | switch (n) {
|
1476 | 7c5a90dd | Richard Henderson | case 0 ... 30: |
1477 | 7c5a90dd | Richard Henderson | val = env->ir[n]; |
1478 | 7c5a90dd | Richard Henderson | break;
|
1479 | 7c5a90dd | Richard Henderson | case 32 ... 62: |
1480 | 7c5a90dd | Richard Henderson | d.d = env->fir[n - 32];
|
1481 | 7c5a90dd | Richard Henderson | val = d.ll; |
1482 | 7c5a90dd | Richard Henderson | break;
|
1483 | 7c5a90dd | Richard Henderson | case 63: |
1484 | 7c5a90dd | Richard Henderson | val = cpu_alpha_load_fpcr(env); |
1485 | 7c5a90dd | Richard Henderson | break;
|
1486 | 7c5a90dd | Richard Henderson | case 64: |
1487 | 7c5a90dd | Richard Henderson | val = env->pc; |
1488 | 7c5a90dd | Richard Henderson | break;
|
1489 | 7c5a90dd | Richard Henderson | case 66: |
1490 | 7c5a90dd | Richard Henderson | val = env->unique; |
1491 | 7c5a90dd | Richard Henderson | break;
|
1492 | 7c5a90dd | Richard Henderson | case 31: |
1493 | 7c5a90dd | Richard Henderson | case 65: |
1494 | 7c5a90dd | Richard Henderson | /* 31 really is the zero register; 65 is unassigned in the
|
1495 | 7c5a90dd | Richard Henderson | gdb protocol, but is still required to occupy 8 bytes. */
|
1496 | 7c5a90dd | Richard Henderson | val = 0;
|
1497 | 7c5a90dd | Richard Henderson | break;
|
1498 | 7c5a90dd | Richard Henderson | default:
|
1499 | 7c5a90dd | Richard Henderson | return 0; |
1500 | 19bf517b | aurel32 | } |
1501 | 7c5a90dd | Richard Henderson | GET_REGL(val); |
1502 | 19bf517b | aurel32 | } |
1503 | 19bf517b | aurel32 | |
1504 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUAlphaState *env, uint8_t *mem_buf, int n) |
1505 | 19bf517b | aurel32 | { |
1506 | 7c5a90dd | Richard Henderson | target_ulong tmp = ldtul_p(mem_buf); |
1507 | 7c5a90dd | Richard Henderson | CPU_DoubleU d; |
1508 | 19bf517b | aurel32 | |
1509 | 7c5a90dd | Richard Henderson | switch (n) {
|
1510 | 7c5a90dd | Richard Henderson | case 0 ... 30: |
1511 | 19bf517b | aurel32 | env->ir[n] = tmp; |
1512 | 7c5a90dd | Richard Henderson | break;
|
1513 | 7c5a90dd | Richard Henderson | case 32 ... 62: |
1514 | 7c5a90dd | Richard Henderson | d.ll = tmp; |
1515 | 7c5a90dd | Richard Henderson | env->fir[n - 32] = d.d;
|
1516 | 7c5a90dd | Richard Henderson | break;
|
1517 | 7c5a90dd | Richard Henderson | case 63: |
1518 | 7c5a90dd | Richard Henderson | cpu_alpha_store_fpcr(env, tmp); |
1519 | 7c5a90dd | Richard Henderson | break;
|
1520 | 7c5a90dd | Richard Henderson | case 64: |
1521 | 7c5a90dd | Richard Henderson | env->pc = tmp; |
1522 | 7c5a90dd | Richard Henderson | break;
|
1523 | 7c5a90dd | Richard Henderson | case 66: |
1524 | 7c5a90dd | Richard Henderson | env->unique = tmp; |
1525 | 7c5a90dd | Richard Henderson | break;
|
1526 | 7c5a90dd | Richard Henderson | case 31: |
1527 | 7c5a90dd | Richard Henderson | case 65: |
1528 | 7c5a90dd | Richard Henderson | /* 31 really is the zero register; 65 is unassigned in the
|
1529 | 7c5a90dd | Richard Henderson | gdb protocol, but is still required to occupy 8 bytes. */
|
1530 | 7c5a90dd | Richard Henderson | break;
|
1531 | 7c5a90dd | Richard Henderson | default:
|
1532 | 7c5a90dd | Richard Henderson | return 0; |
1533 | 19bf517b | aurel32 | } |
1534 | 19bf517b | aurel32 | return 8; |
1535 | 19bf517b | aurel32 | } |
1536 | afcb0e45 | Alexander Graf | #elif defined (TARGET_S390X)
|
1537 | afcb0e45 | Alexander Graf | |
1538 | afcb0e45 | Alexander Graf | #define NUM_CORE_REGS S390_NUM_TOTAL_REGS
|
1539 | afcb0e45 | Alexander Graf | |
1540 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUS390XState *env, uint8_t *mem_buf, int n) |
1541 | afcb0e45 | Alexander Graf | { |
1542 | afcb0e45 | Alexander Graf | switch (n) {
|
1543 | afcb0e45 | Alexander Graf | case S390_PSWM_REGNUM: GET_REGL(env->psw.mask); break; |
1544 | afcb0e45 | Alexander Graf | case S390_PSWA_REGNUM: GET_REGL(env->psw.addr); break; |
1545 | afcb0e45 | Alexander Graf | case S390_R0_REGNUM ... S390_R15_REGNUM:
|
1546 | afcb0e45 | Alexander Graf | GET_REGL(env->regs[n-S390_R0_REGNUM]); break;
|
1547 | afcb0e45 | Alexander Graf | case S390_A0_REGNUM ... S390_A15_REGNUM:
|
1548 | afcb0e45 | Alexander Graf | GET_REG32(env->aregs[n-S390_A0_REGNUM]); break;
|
1549 | afcb0e45 | Alexander Graf | case S390_FPC_REGNUM: GET_REG32(env->fpc); break; |
1550 | afcb0e45 | Alexander Graf | case S390_F0_REGNUM ... S390_F15_REGNUM:
|
1551 | afcb0e45 | Alexander Graf | /* XXX */
|
1552 | afcb0e45 | Alexander Graf | break;
|
1553 | afcb0e45 | Alexander Graf | case S390_PC_REGNUM: GET_REGL(env->psw.addr); break; |
1554 | 59467bac | Alexander Graf | case S390_CC_REGNUM:
|
1555 | 59467bac | Alexander Graf | env->cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, |
1556 | 59467bac | Alexander Graf | env->cc_vr); |
1557 | 59467bac | Alexander Graf | GET_REG32(env->cc_op); |
1558 | 59467bac | Alexander Graf | break;
|
1559 | afcb0e45 | Alexander Graf | } |
1560 | afcb0e45 | Alexander Graf | |
1561 | afcb0e45 | Alexander Graf | return 0; |
1562 | afcb0e45 | Alexander Graf | } |
1563 | afcb0e45 | Alexander Graf | |
1564 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUS390XState *env, uint8_t *mem_buf, int n) |
1565 | afcb0e45 | Alexander Graf | { |
1566 | afcb0e45 | Alexander Graf | target_ulong tmpl; |
1567 | afcb0e45 | Alexander Graf | uint32_t tmp32; |
1568 | afcb0e45 | Alexander Graf | int r = 8; |
1569 | afcb0e45 | Alexander Graf | tmpl = ldtul_p(mem_buf); |
1570 | afcb0e45 | Alexander Graf | tmp32 = ldl_p(mem_buf); |
1571 | afcb0e45 | Alexander Graf | |
1572 | afcb0e45 | Alexander Graf | switch (n) {
|
1573 | afcb0e45 | Alexander Graf | case S390_PSWM_REGNUM: env->psw.mask = tmpl; break; |
1574 | afcb0e45 | Alexander Graf | case S390_PSWA_REGNUM: env->psw.addr = tmpl; break; |
1575 | afcb0e45 | Alexander Graf | case S390_R0_REGNUM ... S390_R15_REGNUM:
|
1576 | afcb0e45 | Alexander Graf | env->regs[n-S390_R0_REGNUM] = tmpl; break;
|
1577 | afcb0e45 | Alexander Graf | case S390_A0_REGNUM ... S390_A15_REGNUM:
|
1578 | afcb0e45 | Alexander Graf | env->aregs[n-S390_A0_REGNUM] = tmp32; r=4; break; |
1579 | afcb0e45 | Alexander Graf | case S390_FPC_REGNUM: env->fpc = tmp32; r=4; break; |
1580 | afcb0e45 | Alexander Graf | case S390_F0_REGNUM ... S390_F15_REGNUM:
|
1581 | afcb0e45 | Alexander Graf | /* XXX */
|
1582 | afcb0e45 | Alexander Graf | break;
|
1583 | afcb0e45 | Alexander Graf | case S390_PC_REGNUM: env->psw.addr = tmpl; break; |
1584 | 59467bac | Alexander Graf | case S390_CC_REGNUM: env->cc_op = tmp32; r=4; break; |
1585 | afcb0e45 | Alexander Graf | } |
1586 | afcb0e45 | Alexander Graf | |
1587 | afcb0e45 | Alexander Graf | return r;
|
1588 | afcb0e45 | Alexander Graf | } |
1589 | 0c45d3d4 | Michael Walle | #elif defined (TARGET_LM32)
|
1590 | 0c45d3d4 | Michael Walle | |
1591 | 0c45d3d4 | Michael Walle | #include "hw/lm32_pic.h" |
1592 | 0c45d3d4 | Michael Walle | #define NUM_CORE_REGS (32 + 7) |
1593 | 0c45d3d4 | Michael Walle | |
1594 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPULM32State *env, uint8_t *mem_buf, int n) |
1595 | 0c45d3d4 | Michael Walle | { |
1596 | 0c45d3d4 | Michael Walle | if (n < 32) { |
1597 | 0c45d3d4 | Michael Walle | GET_REG32(env->regs[n]); |
1598 | 0c45d3d4 | Michael Walle | } else {
|
1599 | 0c45d3d4 | Michael Walle | switch (n) {
|
1600 | 0c45d3d4 | Michael Walle | case 32: |
1601 | 0c45d3d4 | Michael Walle | GET_REG32(env->pc); |
1602 | 0c45d3d4 | Michael Walle | break;
|
1603 | 0c45d3d4 | Michael Walle | /* FIXME: put in right exception ID */
|
1604 | 0c45d3d4 | Michael Walle | case 33: |
1605 | 0c45d3d4 | Michael Walle | GET_REG32(0);
|
1606 | 0c45d3d4 | Michael Walle | break;
|
1607 | 0c45d3d4 | Michael Walle | case 34: |
1608 | 0c45d3d4 | Michael Walle | GET_REG32(env->eba); |
1609 | 0c45d3d4 | Michael Walle | break;
|
1610 | 0c45d3d4 | Michael Walle | case 35: |
1611 | 0c45d3d4 | Michael Walle | GET_REG32(env->deba); |
1612 | 0c45d3d4 | Michael Walle | break;
|
1613 | 0c45d3d4 | Michael Walle | case 36: |
1614 | 0c45d3d4 | Michael Walle | GET_REG32(env->ie); |
1615 | 0c45d3d4 | Michael Walle | break;
|
1616 | 0c45d3d4 | Michael Walle | case 37: |
1617 | 0c45d3d4 | Michael Walle | GET_REG32(lm32_pic_get_im(env->pic_state)); |
1618 | 0c45d3d4 | Michael Walle | break;
|
1619 | 0c45d3d4 | Michael Walle | case 38: |
1620 | 0c45d3d4 | Michael Walle | GET_REG32(lm32_pic_get_ip(env->pic_state)); |
1621 | 0c45d3d4 | Michael Walle | break;
|
1622 | 0c45d3d4 | Michael Walle | } |
1623 | 0c45d3d4 | Michael Walle | } |
1624 | 0c45d3d4 | Michael Walle | return 0; |
1625 | 0c45d3d4 | Michael Walle | } |
1626 | 0c45d3d4 | Michael Walle | |
1627 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPULM32State *env, uint8_t *mem_buf, int n) |
1628 | 0c45d3d4 | Michael Walle | { |
1629 | 0c45d3d4 | Michael Walle | uint32_t tmp; |
1630 | 0c45d3d4 | Michael Walle | |
1631 | 0c45d3d4 | Michael Walle | if (n > NUM_CORE_REGS) {
|
1632 | 0c45d3d4 | Michael Walle | return 0; |
1633 | 0c45d3d4 | Michael Walle | } |
1634 | 0c45d3d4 | Michael Walle | |
1635 | 0c45d3d4 | Michael Walle | tmp = ldl_p(mem_buf); |
1636 | 0c45d3d4 | Michael Walle | |
1637 | 0c45d3d4 | Michael Walle | if (n < 32) { |
1638 | 0c45d3d4 | Michael Walle | env->regs[n] = tmp; |
1639 | 0c45d3d4 | Michael Walle | } else {
|
1640 | 0c45d3d4 | Michael Walle | switch (n) {
|
1641 | 0c45d3d4 | Michael Walle | case 32: |
1642 | 0c45d3d4 | Michael Walle | env->pc = tmp; |
1643 | 0c45d3d4 | Michael Walle | break;
|
1644 | 0c45d3d4 | Michael Walle | case 34: |
1645 | 0c45d3d4 | Michael Walle | env->eba = tmp; |
1646 | 0c45d3d4 | Michael Walle | break;
|
1647 | 0c45d3d4 | Michael Walle | case 35: |
1648 | 0c45d3d4 | Michael Walle | env->deba = tmp; |
1649 | 0c45d3d4 | Michael Walle | break;
|
1650 | 0c45d3d4 | Michael Walle | case 36: |
1651 | 0c45d3d4 | Michael Walle | env->ie = tmp; |
1652 | 0c45d3d4 | Michael Walle | break;
|
1653 | 0c45d3d4 | Michael Walle | case 37: |
1654 | 0c45d3d4 | Michael Walle | lm32_pic_set_im(env->pic_state, tmp); |
1655 | 0c45d3d4 | Michael Walle | break;
|
1656 | 0c45d3d4 | Michael Walle | case 38: |
1657 | 0c45d3d4 | Michael Walle | lm32_pic_set_ip(env->pic_state, tmp); |
1658 | 0c45d3d4 | Michael Walle | break;
|
1659 | 0c45d3d4 | Michael Walle | } |
1660 | 0c45d3d4 | Michael Walle | } |
1661 | 0c45d3d4 | Michael Walle | return 4; |
1662 | 0c45d3d4 | Michael Walle | } |
1663 | ccfcaba6 | Max Filippov | #elif defined(TARGET_XTENSA)
|
1664 | ccfcaba6 | Max Filippov | |
1665 | ccfcaba6 | Max Filippov | /* Use num_core_regs to see only non-privileged registers in an unmodified gdb.
|
1666 | ccfcaba6 | Max Filippov | * Use num_regs to see all registers. gdb modification is required for that:
|
1667 | ccfcaba6 | Max Filippov | * reset bit 0 in the 'flags' field of the registers definitions in the
|
1668 | ccfcaba6 | Max Filippov | * gdb/xtensa-config.c inside gdb source tree or inside gdb overlay.
|
1669 | ccfcaba6 | Max Filippov | */
|
1670 | ccfcaba6 | Max Filippov | #define NUM_CORE_REGS (env->config->gdb_regmap.num_regs)
|
1671 | ccfcaba6 | Max Filippov | #define num_g_regs NUM_CORE_REGS
|
1672 | ccfcaba6 | Max Filippov | |
1673 | f3840919 | Andreas Färber | static int cpu_gdb_read_register(CPUXtensaState *env, uint8_t *mem_buf, int n) |
1674 | ccfcaba6 | Max Filippov | { |
1675 | ccfcaba6 | Max Filippov | const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
|
1676 | ccfcaba6 | Max Filippov | |
1677 | ccfcaba6 | Max Filippov | if (n < 0 || n >= env->config->gdb_regmap.num_regs) { |
1678 | ccfcaba6 | Max Filippov | return 0; |
1679 | ccfcaba6 | Max Filippov | } |
1680 | ccfcaba6 | Max Filippov | |
1681 | ccfcaba6 | Max Filippov | switch (reg->type) {
|
1682 | ccfcaba6 | Max Filippov | case 9: /*pc*/ |
1683 | ccfcaba6 | Max Filippov | GET_REG32(env->pc); |
1684 | ccfcaba6 | Max Filippov | break;
|
1685 | ccfcaba6 | Max Filippov | |
1686 | ccfcaba6 | Max Filippov | case 1: /*ar*/ |
1687 | ccfcaba6 | Max Filippov | xtensa_sync_phys_from_window(env); |
1688 | ccfcaba6 | Max Filippov | GET_REG32(env->phys_regs[(reg->targno & 0xff) % env->config->nareg]);
|
1689 | ccfcaba6 | Max Filippov | break;
|
1690 | ccfcaba6 | Max Filippov | |
1691 | ccfcaba6 | Max Filippov | case 2: /*SR*/ |
1692 | ccfcaba6 | Max Filippov | GET_REG32(env->sregs[reg->targno & 0xff]);
|
1693 | ccfcaba6 | Max Filippov | break;
|
1694 | ccfcaba6 | Max Filippov | |
1695 | ccfcaba6 | Max Filippov | case 3: /*UR*/ |
1696 | ccfcaba6 | Max Filippov | GET_REG32(env->uregs[reg->targno & 0xff]);
|
1697 | ccfcaba6 | Max Filippov | break;
|
1698 | ccfcaba6 | Max Filippov | |
1699 | dd519cbe | Max Filippov | case 4: /*f*/ |
1700 | dd519cbe | Max Filippov | GET_REG32(float32_val(env->fregs[reg->targno & 0x0f]));
|
1701 | dd519cbe | Max Filippov | break;
|
1702 | dd519cbe | Max Filippov | |
1703 | ccfcaba6 | Max Filippov | case 8: /*a*/ |
1704 | ccfcaba6 | Max Filippov | GET_REG32(env->regs[reg->targno & 0x0f]);
|
1705 | ccfcaba6 | Max Filippov | break;
|
1706 | ccfcaba6 | Max Filippov | |
1707 | ccfcaba6 | Max Filippov | default:
|
1708 | ccfcaba6 | Max Filippov | qemu_log("%s from reg %d of unsupported type %d\n",
|
1709 | ccfcaba6 | Max Filippov | __func__, n, reg->type); |
1710 | ccfcaba6 | Max Filippov | return 0; |
1711 | ccfcaba6 | Max Filippov | } |
1712 | ccfcaba6 | Max Filippov | } |
1713 | ccfcaba6 | Max Filippov | |
1714 | f3840919 | Andreas Färber | static int cpu_gdb_write_register(CPUXtensaState *env, uint8_t *mem_buf, int n) |
1715 | ccfcaba6 | Max Filippov | { |
1716 | ccfcaba6 | Max Filippov | uint32_t tmp; |
1717 | ccfcaba6 | Max Filippov | const XtensaGdbReg *reg = env->config->gdb_regmap.reg + n;
|
1718 | ccfcaba6 | Max Filippov | |
1719 | ccfcaba6 | Max Filippov | if (n < 0 || n >= env->config->gdb_regmap.num_regs) { |
1720 | ccfcaba6 | Max Filippov | return 0; |
1721 | ccfcaba6 | Max Filippov | } |
1722 | ccfcaba6 | Max Filippov | |
1723 | ccfcaba6 | Max Filippov | tmp = ldl_p(mem_buf); |
1724 | ccfcaba6 | Max Filippov | |
1725 | ccfcaba6 | Max Filippov | switch (reg->type) {
|
1726 | ccfcaba6 | Max Filippov | case 9: /*pc*/ |
1727 | ccfcaba6 | Max Filippov | env->pc = tmp; |
1728 | ccfcaba6 | Max Filippov | break;
|
1729 | ccfcaba6 | Max Filippov | |
1730 | ccfcaba6 | Max Filippov | case 1: /*ar*/ |
1731 | ccfcaba6 | Max Filippov | env->phys_regs[(reg->targno & 0xff) % env->config->nareg] = tmp;
|
1732 | ccfcaba6 | Max Filippov | xtensa_sync_window_from_phys(env); |
1733 | ccfcaba6 | Max Filippov | break;
|
1734 | ccfcaba6 | Max Filippov | |
1735 | ccfcaba6 | Max Filippov | case 2: /*SR*/ |
1736 | ccfcaba6 | Max Filippov | env->sregs[reg->targno & 0xff] = tmp;
|
1737 | ccfcaba6 | Max Filippov | break;
|
1738 | ccfcaba6 | Max Filippov | |
1739 | ccfcaba6 | Max Filippov | case 3: /*UR*/ |
1740 | ccfcaba6 | Max Filippov | env->uregs[reg->targno & 0xff] = tmp;
|
1741 | ccfcaba6 | Max Filippov | break;
|
1742 | ccfcaba6 | Max Filippov | |
1743 | dd519cbe | Max Filippov | case 4: /*f*/ |
1744 | dd519cbe | Max Filippov | env->fregs[reg->targno & 0x0f] = make_float32(tmp);
|
1745 | dd519cbe | Max Filippov | break;
|
1746 | dd519cbe | Max Filippov | |
1747 | ccfcaba6 | Max Filippov | case 8: /*a*/ |
1748 | ccfcaba6 | Max Filippov | env->regs[reg->targno & 0x0f] = tmp;
|
1749 | ccfcaba6 | Max Filippov | break;
|
1750 | ccfcaba6 | Max Filippov | |
1751 | ccfcaba6 | Max Filippov | default:
|
1752 | ccfcaba6 | Max Filippov | qemu_log("%s to reg %d of unsupported type %d\n",
|
1753 | ccfcaba6 | Max Filippov | __func__, n, reg->type); |
1754 | ccfcaba6 | Max Filippov | return 0; |
1755 | ccfcaba6 | Max Filippov | } |
1756 | ccfcaba6 | Max Filippov | |
1757 | ccfcaba6 | Max Filippov | return 4; |
1758 | ccfcaba6 | Max Filippov | } |
1759 | 56aebc89 | pbrook | #else
|
1760 | 56aebc89 | pbrook | |
1761 | 56aebc89 | pbrook | #define NUM_CORE_REGS 0 |
1762 | 56aebc89 | pbrook | |
1763 | 9349b4f9 | Andreas Färber | static int cpu_gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int n) |
1764 | f1ccf904 | ths | { |
1765 | 56aebc89 | pbrook | return 0; |
1766 | f1ccf904 | ths | } |
1767 | f1ccf904 | ths | |
1768 | 9349b4f9 | Andreas Färber | static int cpu_gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int n) |
1769 | f1ccf904 | ths | { |
1770 | 56aebc89 | pbrook | return 0; |
1771 | 56aebc89 | pbrook | } |
1772 | f1ccf904 | ths | |
1773 | 56aebc89 | pbrook | #endif
|
1774 | f1ccf904 | ths | |
1775 | ccfcaba6 | Max Filippov | #if !defined(TARGET_XTENSA)
|
1776 | 56aebc89 | pbrook | static int num_g_regs = NUM_CORE_REGS; |
1777 | ccfcaba6 | Max Filippov | #endif
|
1778 | f1ccf904 | ths | |
1779 | 56aebc89 | pbrook | #ifdef GDB_CORE_XML
|
1780 | 56aebc89 | pbrook | /* Encode data using the encoding for 'x' packets. */
|
1781 | 56aebc89 | pbrook | static int memtox(char *buf, const char *mem, int len) |
1782 | 56aebc89 | pbrook | { |
1783 | 56aebc89 | pbrook | char *p = buf;
|
1784 | 56aebc89 | pbrook | char c;
|
1785 | 56aebc89 | pbrook | |
1786 | 56aebc89 | pbrook | while (len--) {
|
1787 | 56aebc89 | pbrook | c = *(mem++); |
1788 | 56aebc89 | pbrook | switch (c) {
|
1789 | 56aebc89 | pbrook | case '#': case '$': case '*': case '}': |
1790 | 56aebc89 | pbrook | *(p++) = '}';
|
1791 | 56aebc89 | pbrook | *(p++) = c ^ 0x20;
|
1792 | 56aebc89 | pbrook | break;
|
1793 | 56aebc89 | pbrook | default:
|
1794 | 56aebc89 | pbrook | *(p++) = c; |
1795 | 56aebc89 | pbrook | break;
|
1796 | 56aebc89 | pbrook | } |
1797 | 56aebc89 | pbrook | } |
1798 | 56aebc89 | pbrook | return p - buf;
|
1799 | 56aebc89 | pbrook | } |
1800 | f1ccf904 | ths | |
1801 | 3faf778e | aurel32 | static const char *get_feature_xml(const char *p, const char **newp) |
1802 | 56aebc89 | pbrook | { |
1803 | 56aebc89 | pbrook | size_t len; |
1804 | 56aebc89 | pbrook | int i;
|
1805 | 56aebc89 | pbrook | const char *name; |
1806 | 56aebc89 | pbrook | static char target_xml[1024]; |
1807 | 56aebc89 | pbrook | |
1808 | 56aebc89 | pbrook | len = 0;
|
1809 | 56aebc89 | pbrook | while (p[len] && p[len] != ':') |
1810 | 56aebc89 | pbrook | len++; |
1811 | 56aebc89 | pbrook | *newp = p + len; |
1812 | 56aebc89 | pbrook | |
1813 | 56aebc89 | pbrook | name = NULL;
|
1814 | 56aebc89 | pbrook | if (strncmp(p, "target.xml", len) == 0) { |
1815 | 56aebc89 | pbrook | /* Generate the XML description for this CPU. */
|
1816 | 56aebc89 | pbrook | if (!target_xml[0]) { |
1817 | 56aebc89 | pbrook | GDBRegisterState *r; |
1818 | 56aebc89 | pbrook | |
1819 | 5b3715bf | blueswir1 | snprintf(target_xml, sizeof(target_xml),
|
1820 | 5b3715bf | blueswir1 | "<?xml version=\"1.0\"?>"
|
1821 | 5b3715bf | blueswir1 | "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
|
1822 | 5b3715bf | blueswir1 | "<target>"
|
1823 | 5b3715bf | blueswir1 | "<xi:include href=\"%s\"/>",
|
1824 | 5b3715bf | blueswir1 | GDB_CORE_XML); |
1825 | 56aebc89 | pbrook | |
1826 | 880a7578 | aliguori | for (r = first_cpu->gdb_regs; r; r = r->next) {
|
1827 | 2dc766da | blueswir1 | pstrcat(target_xml, sizeof(target_xml), "<xi:include href=\""); |
1828 | 2dc766da | blueswir1 | pstrcat(target_xml, sizeof(target_xml), r->xml);
|
1829 | 2dc766da | blueswir1 | pstrcat(target_xml, sizeof(target_xml), "\"/>"); |
1830 | 56aebc89 | pbrook | } |
1831 | 2dc766da | blueswir1 | pstrcat(target_xml, sizeof(target_xml), "</target>"); |
1832 | 56aebc89 | pbrook | } |
1833 | 56aebc89 | pbrook | return target_xml;
|
1834 | 56aebc89 | pbrook | } |
1835 | 56aebc89 | pbrook | for (i = 0; ; i++) { |
1836 | 56aebc89 | pbrook | name = xml_builtin[i][0];
|
1837 | 56aebc89 | pbrook | if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len)) |
1838 | 56aebc89 | pbrook | break;
|
1839 | 56aebc89 | pbrook | } |
1840 | 56aebc89 | pbrook | return name ? xml_builtin[i][1] : NULL; |
1841 | 56aebc89 | pbrook | } |
1842 | 56aebc89 | pbrook | #endif
|
1843 | f1ccf904 | ths | |
1844 | 9349b4f9 | Andreas Färber | static int gdb_read_register(CPUArchState *env, uint8_t *mem_buf, int reg) |
1845 | 56aebc89 | pbrook | { |
1846 | 56aebc89 | pbrook | GDBRegisterState *r; |
1847 | f1ccf904 | ths | |
1848 | 56aebc89 | pbrook | if (reg < NUM_CORE_REGS)
|
1849 | 56aebc89 | pbrook | return cpu_gdb_read_register(env, mem_buf, reg);
|
1850 | f1ccf904 | ths | |
1851 | 56aebc89 | pbrook | for (r = env->gdb_regs; r; r = r->next) {
|
1852 | 56aebc89 | pbrook | if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
|
1853 | 56aebc89 | pbrook | return r->get_reg(env, mem_buf, reg - r->base_reg);
|
1854 | 56aebc89 | pbrook | } |
1855 | 56aebc89 | pbrook | } |
1856 | 56aebc89 | pbrook | return 0; |
1857 | f1ccf904 | ths | } |
1858 | f1ccf904 | ths | |
1859 | 9349b4f9 | Andreas Färber | static int gdb_write_register(CPUArchState *env, uint8_t *mem_buf, int reg) |
1860 | f1ccf904 | ths | { |
1861 | 56aebc89 | pbrook | GDBRegisterState *r; |
1862 | f1ccf904 | ths | |
1863 | 56aebc89 | pbrook | if (reg < NUM_CORE_REGS)
|
1864 | 56aebc89 | pbrook | return cpu_gdb_write_register(env, mem_buf, reg);
|
1865 | 56aebc89 | pbrook | |
1866 | 56aebc89 | pbrook | for (r = env->gdb_regs; r; r = r->next) {
|
1867 | 56aebc89 | pbrook | if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
|
1868 | 56aebc89 | pbrook | return r->set_reg(env, mem_buf, reg - r->base_reg);
|
1869 | 56aebc89 | pbrook | } |
1870 | 56aebc89 | pbrook | } |
1871 | 6da41eaf | bellard | return 0; |
1872 | 6da41eaf | bellard | } |
1873 | 6da41eaf | bellard | |
1874 | ccfcaba6 | Max Filippov | #if !defined(TARGET_XTENSA)
|
1875 | 56aebc89 | pbrook | /* Register a supplemental set of CPU registers. If g_pos is nonzero it
|
1876 | 56aebc89 | pbrook | specifies the first register number and these registers are included in
|
1877 | 56aebc89 | pbrook | a standard "g" packet. Direction is relative to gdb, i.e. get_reg is
|
1878 | 56aebc89 | pbrook | gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
|
1879 | 56aebc89 | pbrook | */
|
1880 | 56aebc89 | pbrook | |
1881 | 9349b4f9 | Andreas Färber | void gdb_register_coprocessor(CPUArchState * env,
|
1882 | 56aebc89 | pbrook | gdb_reg_cb get_reg, gdb_reg_cb set_reg, |
1883 | 56aebc89 | pbrook | int num_regs, const char *xml, int g_pos) |
1884 | 6da41eaf | bellard | { |
1885 | 56aebc89 | pbrook | GDBRegisterState *s; |
1886 | 56aebc89 | pbrook | GDBRegisterState **p; |
1887 | 56aebc89 | pbrook | static int last_reg = NUM_CORE_REGS; |
1888 | 56aebc89 | pbrook | |
1889 | 56aebc89 | pbrook | p = &env->gdb_regs; |
1890 | 56aebc89 | pbrook | while (*p) {
|
1891 | 56aebc89 | pbrook | /* Check for duplicates. */
|
1892 | 56aebc89 | pbrook | if (strcmp((*p)->xml, xml) == 0) |
1893 | 56aebc89 | pbrook | return;
|
1894 | 56aebc89 | pbrook | p = &(*p)->next; |
1895 | 56aebc89 | pbrook | } |
1896 | 9643c25f | Stefan Weil | |
1897 | 9643c25f | Stefan Weil | s = g_new0(GDBRegisterState, 1);
|
1898 | 9643c25f | Stefan Weil | s->base_reg = last_reg; |
1899 | 9643c25f | Stefan Weil | s->num_regs = num_regs; |
1900 | 9643c25f | Stefan Weil | s->get_reg = get_reg; |
1901 | 9643c25f | Stefan Weil | s->set_reg = set_reg; |
1902 | 9643c25f | Stefan Weil | s->xml = xml; |
1903 | 9643c25f | Stefan Weil | |
1904 | 56aebc89 | pbrook | /* Add to end of list. */
|
1905 | 56aebc89 | pbrook | last_reg += num_regs; |
1906 | 56aebc89 | pbrook | *p = s; |
1907 | 56aebc89 | pbrook | if (g_pos) {
|
1908 | 56aebc89 | pbrook | if (g_pos != s->base_reg) {
|
1909 | 56aebc89 | pbrook | fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
|
1910 | 56aebc89 | pbrook | "Expected %d got %d\n", xml, g_pos, s->base_reg);
|
1911 | 56aebc89 | pbrook | } else {
|
1912 | 56aebc89 | pbrook | num_g_regs = last_reg; |
1913 | 56aebc89 | pbrook | } |
1914 | 56aebc89 | pbrook | } |
1915 | 6da41eaf | bellard | } |
1916 | ccfcaba6 | Max Filippov | #endif
|
1917 | 6da41eaf | bellard | |
1918 | a1d1bb31 | aliguori | #ifndef CONFIG_USER_ONLY
|
1919 | a1d1bb31 | aliguori | static const int xlat_gdb_type[] = { |
1920 | a1d1bb31 | aliguori | [GDB_WATCHPOINT_WRITE] = BP_GDB | BP_MEM_WRITE, |
1921 | a1d1bb31 | aliguori | [GDB_WATCHPOINT_READ] = BP_GDB | BP_MEM_READ, |
1922 | a1d1bb31 | aliguori | [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS, |
1923 | a1d1bb31 | aliguori | }; |
1924 | a1d1bb31 | aliguori | #endif
|
1925 | a1d1bb31 | aliguori | |
1926 | 880a7578 | aliguori | static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type) |
1927 | a1d1bb31 | aliguori | { |
1928 | 9349b4f9 | Andreas Färber | CPUArchState *env; |
1929 | 880a7578 | aliguori | int err = 0; |
1930 | 880a7578 | aliguori | |
1931 | e22a25c9 | aliguori | if (kvm_enabled())
|
1932 | e22a25c9 | aliguori | return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
|
1933 | e22a25c9 | aliguori | |
1934 | a1d1bb31 | aliguori | switch (type) {
|
1935 | a1d1bb31 | aliguori | case GDB_BREAKPOINT_SW:
|
1936 | a1d1bb31 | aliguori | case GDB_BREAKPOINT_HW:
|
1937 | 880a7578 | aliguori | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
1938 | 880a7578 | aliguori | err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
|
1939 | 880a7578 | aliguori | if (err)
|
1940 | 880a7578 | aliguori | break;
|
1941 | 880a7578 | aliguori | } |
1942 | 880a7578 | aliguori | return err;
|
1943 | a1d1bb31 | aliguori | #ifndef CONFIG_USER_ONLY
|
1944 | a1d1bb31 | aliguori | case GDB_WATCHPOINT_WRITE:
|
1945 | a1d1bb31 | aliguori | case GDB_WATCHPOINT_READ:
|
1946 | a1d1bb31 | aliguori | case GDB_WATCHPOINT_ACCESS:
|
1947 | 880a7578 | aliguori | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
1948 | 880a7578 | aliguori | err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type], |
1949 | 880a7578 | aliguori | NULL);
|
1950 | 880a7578 | aliguori | if (err)
|
1951 | 880a7578 | aliguori | break;
|
1952 | 880a7578 | aliguori | } |
1953 | 880a7578 | aliguori | return err;
|
1954 | a1d1bb31 | aliguori | #endif
|
1955 | a1d1bb31 | aliguori | default:
|
1956 | a1d1bb31 | aliguori | return -ENOSYS;
|
1957 | a1d1bb31 | aliguori | } |
1958 | a1d1bb31 | aliguori | } |
1959 | a1d1bb31 | aliguori | |
1960 | 880a7578 | aliguori | static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type) |
1961 | a1d1bb31 | aliguori | { |
1962 | 9349b4f9 | Andreas Färber | CPUArchState *env; |
1963 | 880a7578 | aliguori | int err = 0; |
1964 | 880a7578 | aliguori | |
1965 | e22a25c9 | aliguori | if (kvm_enabled())
|
1966 | e22a25c9 | aliguori | return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
|
1967 | e22a25c9 | aliguori | |
1968 | a1d1bb31 | aliguori | switch (type) {
|
1969 | a1d1bb31 | aliguori | case GDB_BREAKPOINT_SW:
|
1970 | a1d1bb31 | aliguori | case GDB_BREAKPOINT_HW:
|
1971 | 880a7578 | aliguori | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
1972 | 880a7578 | aliguori | err = cpu_breakpoint_remove(env, addr, BP_GDB); |
1973 | 880a7578 | aliguori | if (err)
|
1974 | 880a7578 | aliguori | break;
|
1975 | 880a7578 | aliguori | } |
1976 | 880a7578 | aliguori | return err;
|
1977 | a1d1bb31 | aliguori | #ifndef CONFIG_USER_ONLY
|
1978 | a1d1bb31 | aliguori | case GDB_WATCHPOINT_WRITE:
|
1979 | a1d1bb31 | aliguori | case GDB_WATCHPOINT_READ:
|
1980 | a1d1bb31 | aliguori | case GDB_WATCHPOINT_ACCESS:
|
1981 | 880a7578 | aliguori | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
1982 | 880a7578 | aliguori | err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]); |
1983 | 880a7578 | aliguori | if (err)
|
1984 | 880a7578 | aliguori | break;
|
1985 | 880a7578 | aliguori | } |
1986 | 880a7578 | aliguori | return err;
|
1987 | a1d1bb31 | aliguori | #endif
|
1988 | a1d1bb31 | aliguori | default:
|
1989 | a1d1bb31 | aliguori | return -ENOSYS;
|
1990 | a1d1bb31 | aliguori | } |
1991 | a1d1bb31 | aliguori | } |
1992 | a1d1bb31 | aliguori | |
1993 | 880a7578 | aliguori | static void gdb_breakpoint_remove_all(void) |
1994 | a1d1bb31 | aliguori | { |
1995 | 9349b4f9 | Andreas Färber | CPUArchState *env; |
1996 | 880a7578 | aliguori | |
1997 | e22a25c9 | aliguori | if (kvm_enabled()) {
|
1998 | e22a25c9 | aliguori | kvm_remove_all_breakpoints(gdbserver_state->c_cpu); |
1999 | e22a25c9 | aliguori | return;
|
2000 | e22a25c9 | aliguori | } |
2001 | e22a25c9 | aliguori | |
2002 | 880a7578 | aliguori | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
2003 | 880a7578 | aliguori | cpu_breakpoint_remove_all(env, BP_GDB); |
2004 | a1d1bb31 | aliguori | #ifndef CONFIG_USER_ONLY
|
2005 | 880a7578 | aliguori | cpu_watchpoint_remove_all(env, BP_GDB); |
2006 | a1d1bb31 | aliguori | #endif
|
2007 | 880a7578 | aliguori | } |
2008 | a1d1bb31 | aliguori | } |
2009 | a1d1bb31 | aliguori | |
2010 | fab9d284 | aurel32 | static void gdb_set_cpu_pc(GDBState *s, target_ulong pc) |
2011 | fab9d284 | aurel32 | { |
2012 | 4c0960c0 | Avi Kivity | cpu_synchronize_state(s->c_cpu); |
2013 | a896d03b | Peter Maydell | #if defined(TARGET_I386)
|
2014 | fab9d284 | aurel32 | s->c_cpu->eip = pc; |
2015 | fab9d284 | aurel32 | #elif defined (TARGET_PPC)
|
2016 | fab9d284 | aurel32 | s->c_cpu->nip = pc; |
2017 | fab9d284 | aurel32 | #elif defined (TARGET_SPARC)
|
2018 | fab9d284 | aurel32 | s->c_cpu->pc = pc; |
2019 | fab9d284 | aurel32 | s->c_cpu->npc = pc + 4;
|
2020 | fab9d284 | aurel32 | #elif defined (TARGET_ARM)
|
2021 | fab9d284 | aurel32 | s->c_cpu->regs[15] = pc;
|
2022 | fab9d284 | aurel32 | #elif defined (TARGET_SH4)
|
2023 | fab9d284 | aurel32 | s->c_cpu->pc = pc; |
2024 | fab9d284 | aurel32 | #elif defined (TARGET_MIPS)
|
2025 | ff1d1977 | Nathan Froyd | s->c_cpu->active_tc.PC = pc & ~(target_ulong)1;
|
2026 | ff1d1977 | Nathan Froyd | if (pc & 1) { |
2027 | ff1d1977 | Nathan Froyd | s->c_cpu->hflags |= MIPS_HFLAG_M16; |
2028 | ff1d1977 | Nathan Froyd | } else {
|
2029 | ff1d1977 | Nathan Froyd | s->c_cpu->hflags &= ~(MIPS_HFLAG_M16); |
2030 | ff1d1977 | Nathan Froyd | } |
2031 | d74d6a99 | Edgar E. Iglesias | #elif defined (TARGET_MICROBLAZE)
|
2032 | d74d6a99 | Edgar E. Iglesias | s->c_cpu->sregs[SR_PC] = pc; |
2033 | fc04355b | Jia Liu | #elif defined(TARGET_OPENRISC)
|
2034 | fc04355b | Jia Liu | s->c_cpu->pc = pc; |
2035 | fab9d284 | aurel32 | #elif defined (TARGET_CRIS)
|
2036 | fab9d284 | aurel32 | s->c_cpu->pc = pc; |
2037 | fab9d284 | aurel32 | #elif defined (TARGET_ALPHA)
|
2038 | fab9d284 | aurel32 | s->c_cpu->pc = pc; |
2039 | afcb0e45 | Alexander Graf | #elif defined (TARGET_S390X)
|
2040 | afcb0e45 | Alexander Graf | s->c_cpu->psw.addr = pc; |
2041 | 0c45d3d4 | Michael Walle | #elif defined (TARGET_LM32)
|
2042 | 0c45d3d4 | Michael Walle | s->c_cpu->pc = pc; |
2043 | ccfcaba6 | Max Filippov | #elif defined(TARGET_XTENSA)
|
2044 | ccfcaba6 | Max Filippov | s->c_cpu->pc = pc; |
2045 | fab9d284 | aurel32 | #endif
|
2046 | fab9d284 | aurel32 | } |
2047 | fab9d284 | aurel32 | |
2048 | 9349b4f9 | Andreas Färber | static CPUArchState *find_cpu(uint32_t thread_id)
|
2049 | 1e9fa730 | Nathan Froyd | { |
2050 | 9349b4f9 | Andreas Färber | CPUArchState *env; |
2051 | 1e9fa730 | Nathan Froyd | |
2052 | 1e9fa730 | Nathan Froyd | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
2053 | 68f4730c | Wen Congyang | if (cpu_index(env) == thread_id) {
|
2054 | 1e9fa730 | Nathan Froyd | return env;
|
2055 | 1e9fa730 | Nathan Froyd | } |
2056 | 1e9fa730 | Nathan Froyd | } |
2057 | 1e9fa730 | Nathan Froyd | |
2058 | 1e9fa730 | Nathan Froyd | return NULL; |
2059 | 1e9fa730 | Nathan Froyd | } |
2060 | 1e9fa730 | Nathan Froyd | |
2061 | 880a7578 | aliguori | static int gdb_handle_packet(GDBState *s, const char *line_buf) |
2062 | b4608c04 | bellard | { |
2063 | 9349b4f9 | Andreas Färber | CPUArchState *env; |
2064 | b4608c04 | bellard | const char *p; |
2065 | 1e9fa730 | Nathan Froyd | uint32_t thread; |
2066 | 1e9fa730 | Nathan Froyd | int ch, reg_size, type, res;
|
2067 | 56aebc89 | pbrook | char buf[MAX_PACKET_LENGTH];
|
2068 | 56aebc89 | pbrook | uint8_t mem_buf[MAX_PACKET_LENGTH]; |
2069 | 56aebc89 | pbrook | uint8_t *registers; |
2070 | 9d9754a3 | bellard | target_ulong addr, len; |
2071 | 3b46e624 | ths | |
2072 | 858693c6 | bellard | #ifdef DEBUG_GDB
|
2073 | 858693c6 | bellard | printf("command='%s'\n", line_buf);
|
2074 | 858693c6 | bellard | #endif
|
2075 | 858693c6 | bellard | p = line_buf; |
2076 | 858693c6 | bellard | ch = *p++; |
2077 | 858693c6 | bellard | switch(ch) {
|
2078 | 858693c6 | bellard | case '?': |
2079 | 1fddef4b | bellard | /* TODO: Make this return the correct value for user-mode. */
|
2080 | ca587a8e | aurel32 | snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP, |
2081 | 68f4730c | Wen Congyang | cpu_index(s->c_cpu)); |
2082 | 858693c6 | bellard | put_packet(s, buf); |
2083 | 7d03f82f | edgar_igl | /* Remove all the breakpoints when this query is issued,
|
2084 | 7d03f82f | edgar_igl | * because gdb is doing and initial connect and the state
|
2085 | 7d03f82f | edgar_igl | * should be cleaned up.
|
2086 | 7d03f82f | edgar_igl | */
|
2087 | 880a7578 | aliguori | gdb_breakpoint_remove_all(); |
2088 | 858693c6 | bellard | break;
|
2089 | 858693c6 | bellard | case 'c': |
2090 | 858693c6 | bellard | if (*p != '\0') { |
2091 | 9d9754a3 | bellard | addr = strtoull(p, (char **)&p, 16); |
2092 | fab9d284 | aurel32 | gdb_set_cpu_pc(s, addr); |
2093 | 858693c6 | bellard | } |
2094 | ca587a8e | aurel32 | s->signal = 0;
|
2095 | ba70a624 | edgar_igl | gdb_continue(s); |
2096 | 41625033 | bellard | return RS_IDLE;
|
2097 | 1f487ee9 | edgar_igl | case 'C': |
2098 | ca587a8e | aurel32 | s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16)); |
2099 | ca587a8e | aurel32 | if (s->signal == -1) |
2100 | ca587a8e | aurel32 | s->signal = 0;
|
2101 | 1f487ee9 | edgar_igl | gdb_continue(s); |
2102 | 1f487ee9 | edgar_igl | return RS_IDLE;
|
2103 | dd32aa10 | Jan Kiszka | case 'v': |
2104 | dd32aa10 | Jan Kiszka | if (strncmp(p, "Cont", 4) == 0) { |
2105 | dd32aa10 | Jan Kiszka | int res_signal, res_thread;
|
2106 | dd32aa10 | Jan Kiszka | |
2107 | dd32aa10 | Jan Kiszka | p += 4;
|
2108 | dd32aa10 | Jan Kiszka | if (*p == '?') { |
2109 | dd32aa10 | Jan Kiszka | put_packet(s, "vCont;c;C;s;S");
|
2110 | dd32aa10 | Jan Kiszka | break;
|
2111 | dd32aa10 | Jan Kiszka | } |
2112 | dd32aa10 | Jan Kiszka | res = 0;
|
2113 | dd32aa10 | Jan Kiszka | res_signal = 0;
|
2114 | dd32aa10 | Jan Kiszka | res_thread = 0;
|
2115 | dd32aa10 | Jan Kiszka | while (*p) {
|
2116 | dd32aa10 | Jan Kiszka | int action, signal;
|
2117 | dd32aa10 | Jan Kiszka | |
2118 | dd32aa10 | Jan Kiszka | if (*p++ != ';') { |
2119 | dd32aa10 | Jan Kiszka | res = 0;
|
2120 | dd32aa10 | Jan Kiszka | break;
|
2121 | dd32aa10 | Jan Kiszka | } |
2122 | dd32aa10 | Jan Kiszka | action = *p++; |
2123 | dd32aa10 | Jan Kiszka | signal = 0;
|
2124 | dd32aa10 | Jan Kiszka | if (action == 'C' || action == 'S') { |
2125 | dd32aa10 | Jan Kiszka | signal = strtoul(p, (char **)&p, 16); |
2126 | dd32aa10 | Jan Kiszka | } else if (action != 'c' && action != 's') { |
2127 | dd32aa10 | Jan Kiszka | res = 0;
|
2128 | dd32aa10 | Jan Kiszka | break;
|
2129 | dd32aa10 | Jan Kiszka | } |
2130 | dd32aa10 | Jan Kiszka | thread = 0;
|
2131 | dd32aa10 | Jan Kiszka | if (*p == ':') { |
2132 | dd32aa10 | Jan Kiszka | thread = strtoull(p+1, (char **)&p, 16); |
2133 | dd32aa10 | Jan Kiszka | } |
2134 | dd32aa10 | Jan Kiszka | action = tolower(action); |
2135 | dd32aa10 | Jan Kiszka | if (res == 0 || (res == 'c' && action == 's')) { |
2136 | dd32aa10 | Jan Kiszka | res = action; |
2137 | dd32aa10 | Jan Kiszka | res_signal = signal; |
2138 | dd32aa10 | Jan Kiszka | res_thread = thread; |
2139 | dd32aa10 | Jan Kiszka | } |
2140 | dd32aa10 | Jan Kiszka | } |
2141 | dd32aa10 | Jan Kiszka | if (res) {
|
2142 | dd32aa10 | Jan Kiszka | if (res_thread != -1 && res_thread != 0) { |
2143 | dd32aa10 | Jan Kiszka | env = find_cpu(res_thread); |
2144 | dd32aa10 | Jan Kiszka | if (env == NULL) { |
2145 | dd32aa10 | Jan Kiszka | put_packet(s, "E22");
|
2146 | dd32aa10 | Jan Kiszka | break;
|
2147 | dd32aa10 | Jan Kiszka | } |
2148 | dd32aa10 | Jan Kiszka | s->c_cpu = env; |
2149 | dd32aa10 | Jan Kiszka | } |
2150 | dd32aa10 | Jan Kiszka | if (res == 's') { |
2151 | dd32aa10 | Jan Kiszka | cpu_single_step(s->c_cpu, sstep_flags); |
2152 | dd32aa10 | Jan Kiszka | } |
2153 | dd32aa10 | Jan Kiszka | s->signal = res_signal; |
2154 | dd32aa10 | Jan Kiszka | gdb_continue(s); |
2155 | dd32aa10 | Jan Kiszka | return RS_IDLE;
|
2156 | dd32aa10 | Jan Kiszka | } |
2157 | dd32aa10 | Jan Kiszka | break;
|
2158 | dd32aa10 | Jan Kiszka | } else {
|
2159 | dd32aa10 | Jan Kiszka | goto unknown_command;
|
2160 | dd32aa10 | Jan Kiszka | } |
2161 | 7d03f82f | edgar_igl | case 'k': |
2162 | 00e94dbc | Jan Kiszka | #ifdef CONFIG_USER_ONLY
|
2163 | 7d03f82f | edgar_igl | /* Kill the target */
|
2164 | 7d03f82f | edgar_igl | fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
|
2165 | 7d03f82f | edgar_igl | exit(0);
|
2166 | 00e94dbc | Jan Kiszka | #endif
|
2167 | 7d03f82f | edgar_igl | case 'D': |
2168 | 7d03f82f | edgar_igl | /* Detach packet */
|
2169 | 880a7578 | aliguori | gdb_breakpoint_remove_all(); |
2170 | 7ea06da3 | Daniel Gutson | gdb_syscall_mode = GDB_SYS_DISABLED; |
2171 | 7d03f82f | edgar_igl | gdb_continue(s); |
2172 | 7d03f82f | edgar_igl | put_packet(s, "OK");
|
2173 | 7d03f82f | edgar_igl | break;
|
2174 | 858693c6 | bellard | case 's': |
2175 | 858693c6 | bellard | if (*p != '\0') { |
2176 | 8fac5803 | ths | addr = strtoull(p, (char **)&p, 16); |
2177 | fab9d284 | aurel32 | gdb_set_cpu_pc(s, addr); |
2178 | 858693c6 | bellard | } |
2179 | 880a7578 | aliguori | cpu_single_step(s->c_cpu, sstep_flags); |
2180 | ba70a624 | edgar_igl | gdb_continue(s); |
2181 | 41625033 | bellard | return RS_IDLE;
|
2182 | a2d1ebaf | pbrook | case 'F': |
2183 | a2d1ebaf | pbrook | { |
2184 | a2d1ebaf | pbrook | target_ulong ret; |
2185 | a2d1ebaf | pbrook | target_ulong err; |
2186 | a2d1ebaf | pbrook | |
2187 | a2d1ebaf | pbrook | ret = strtoull(p, (char **)&p, 16); |
2188 | a2d1ebaf | pbrook | if (*p == ',') { |
2189 | a2d1ebaf | pbrook | p++; |
2190 | a2d1ebaf | pbrook | err = strtoull(p, (char **)&p, 16); |
2191 | a2d1ebaf | pbrook | } else {
|
2192 | a2d1ebaf | pbrook | err = 0;
|
2193 | a2d1ebaf | pbrook | } |
2194 | a2d1ebaf | pbrook | if (*p == ',') |
2195 | a2d1ebaf | pbrook | p++; |
2196 | a2d1ebaf | pbrook | type = *p; |
2197 | cdb432b2 | Meador Inge | if (s->current_syscall_cb) {
|
2198 | cdb432b2 | Meador Inge | s->current_syscall_cb(s->c_cpu, ret, err); |
2199 | cdb432b2 | Meador Inge | s->current_syscall_cb = NULL;
|
2200 | cdb432b2 | Meador Inge | } |
2201 | a2d1ebaf | pbrook | if (type == 'C') { |
2202 | a2d1ebaf | pbrook | put_packet(s, "T02");
|
2203 | a2d1ebaf | pbrook | } else {
|
2204 | ba70a624 | edgar_igl | gdb_continue(s); |
2205 | a2d1ebaf | pbrook | } |
2206 | a2d1ebaf | pbrook | } |
2207 | a2d1ebaf | pbrook | break;
|
2208 | 858693c6 | bellard | case 'g': |
2209 | 4c0960c0 | Avi Kivity | cpu_synchronize_state(s->g_cpu); |
2210 | ccfcaba6 | Max Filippov | env = s->g_cpu; |
2211 | 56aebc89 | pbrook | len = 0;
|
2212 | 56aebc89 | pbrook | for (addr = 0; addr < num_g_regs; addr++) { |
2213 | 880a7578 | aliguori | reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr); |
2214 | 56aebc89 | pbrook | len += reg_size; |
2215 | 56aebc89 | pbrook | } |
2216 | 56aebc89 | pbrook | memtohex(buf, mem_buf, len); |
2217 | 858693c6 | bellard | put_packet(s, buf); |
2218 | 858693c6 | bellard | break;
|
2219 | 858693c6 | bellard | case 'G': |
2220 | 4c0960c0 | Avi Kivity | cpu_synchronize_state(s->g_cpu); |
2221 | ccfcaba6 | Max Filippov | env = s->g_cpu; |
2222 | 56aebc89 | pbrook | registers = mem_buf; |
2223 | 858693c6 | bellard | len = strlen(p) / 2;
|
2224 | 858693c6 | bellard | hextomem((uint8_t *)registers, p, len); |
2225 | 56aebc89 | pbrook | for (addr = 0; addr < num_g_regs && len > 0; addr++) { |
2226 | 880a7578 | aliguori | reg_size = gdb_write_register(s->g_cpu, registers, addr); |
2227 | 56aebc89 | pbrook | len -= reg_size; |
2228 | 56aebc89 | pbrook | registers += reg_size; |
2229 | 56aebc89 | pbrook | } |
2230 | 858693c6 | bellard | put_packet(s, "OK");
|
2231 | 858693c6 | bellard | break;
|
2232 | 858693c6 | bellard | case 'm': |
2233 | 9d9754a3 | bellard | addr = strtoull(p, (char **)&p, 16); |
2234 | 858693c6 | bellard | if (*p == ',') |
2235 | 858693c6 | bellard | p++; |
2236 | 9d9754a3 | bellard | len = strtoull(p, NULL, 16); |
2237 | 44520db1 | Fabien Chouteau | if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) { |
2238 | 6f970bd9 | bellard | put_packet (s, "E14");
|
2239 | 6f970bd9 | bellard | } else {
|
2240 | 6f970bd9 | bellard | memtohex(buf, mem_buf, len); |
2241 | 6f970bd9 | bellard | put_packet(s, buf); |
2242 | 6f970bd9 | bellard | } |
2243 | 858693c6 | bellard | break;
|
2244 | 858693c6 | bellard | case 'M': |
2245 | 9d9754a3 | bellard | addr = strtoull(p, (char **)&p, 16); |
2246 | 858693c6 | bellard | if (*p == ',') |
2247 | 858693c6 | bellard | p++; |
2248 | 9d9754a3 | bellard | len = strtoull(p, (char **)&p, 16); |
2249 | b328f873 | bellard | if (*p == ':') |
2250 | 858693c6 | bellard | p++; |
2251 | 858693c6 | bellard | hextomem(mem_buf, p, len); |
2252 | 44520db1 | Fabien Chouteau | if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0) { |
2253 | 905f20b1 | bellard | put_packet(s, "E14");
|
2254 | 44520db1 | Fabien Chouteau | } else {
|
2255 | 858693c6 | bellard | put_packet(s, "OK");
|
2256 | 44520db1 | Fabien Chouteau | } |
2257 | 858693c6 | bellard | break;
|
2258 | 56aebc89 | pbrook | case 'p': |
2259 | 56aebc89 | pbrook | /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
|
2260 | 56aebc89 | pbrook | This works, but can be very slow. Anything new enough to
|
2261 | 56aebc89 | pbrook | understand XML also knows how to use this properly. */
|
2262 | 56aebc89 | pbrook | if (!gdb_has_xml)
|
2263 | 56aebc89 | pbrook | goto unknown_command;
|
2264 | 56aebc89 | pbrook | addr = strtoull(p, (char **)&p, 16); |
2265 | 880a7578 | aliguori | reg_size = gdb_read_register(s->g_cpu, mem_buf, addr); |
2266 | 56aebc89 | pbrook | if (reg_size) {
|
2267 | 56aebc89 | pbrook | memtohex(buf, mem_buf, reg_size); |
2268 | 56aebc89 | pbrook | put_packet(s, buf); |
2269 | 56aebc89 | pbrook | } else {
|
2270 | 56aebc89 | pbrook | put_packet(s, "E14");
|
2271 | 56aebc89 | pbrook | } |
2272 | 56aebc89 | pbrook | break;
|
2273 | 56aebc89 | pbrook | case 'P': |
2274 | 56aebc89 | pbrook | if (!gdb_has_xml)
|
2275 | 56aebc89 | pbrook | goto unknown_command;
|
2276 | 56aebc89 | pbrook | addr = strtoull(p, (char **)&p, 16); |
2277 | 56aebc89 | pbrook | if (*p == '=') |
2278 | 56aebc89 | pbrook | p++; |
2279 | 56aebc89 | pbrook | reg_size = strlen(p) / 2;
|
2280 | 56aebc89 | pbrook | hextomem(mem_buf, p, reg_size); |
2281 | 880a7578 | aliguori | gdb_write_register(s->g_cpu, mem_buf, addr); |
2282 | 56aebc89 | pbrook | put_packet(s, "OK");
|
2283 | 56aebc89 | pbrook | break;
|
2284 | 858693c6 | bellard | case 'Z': |
2285 | 858693c6 | bellard | case 'z': |
2286 | 858693c6 | bellard | type = strtoul(p, (char **)&p, 16); |
2287 | 858693c6 | bellard | if (*p == ',') |
2288 | 858693c6 | bellard | p++; |
2289 | 9d9754a3 | bellard | addr = strtoull(p, (char **)&p, 16); |
2290 | 858693c6 | bellard | if (*p == ',') |
2291 | 858693c6 | bellard | p++; |
2292 | 9d9754a3 | bellard | len = strtoull(p, (char **)&p, 16); |
2293 | a1d1bb31 | aliguori | if (ch == 'Z') |
2294 | 880a7578 | aliguori | res = gdb_breakpoint_insert(addr, len, type); |
2295 | a1d1bb31 | aliguori | else
|
2296 | 880a7578 | aliguori | res = gdb_breakpoint_remove(addr, len, type); |
2297 | a1d1bb31 | aliguori | if (res >= 0) |
2298 | a1d1bb31 | aliguori | put_packet(s, "OK");
|
2299 | a1d1bb31 | aliguori | else if (res == -ENOSYS) |
2300 | 0f459d16 | pbrook | put_packet(s, "");
|
2301 | a1d1bb31 | aliguori | else
|
2302 | a1d1bb31 | aliguori | put_packet(s, "E22");
|
2303 | 858693c6 | bellard | break;
|
2304 | 880a7578 | aliguori | case 'H': |
2305 | 880a7578 | aliguori | type = *p++; |
2306 | 880a7578 | aliguori | thread = strtoull(p, (char **)&p, 16); |
2307 | 880a7578 | aliguori | if (thread == -1 || thread == 0) { |
2308 | 880a7578 | aliguori | put_packet(s, "OK");
|
2309 | 880a7578 | aliguori | break;
|
2310 | 880a7578 | aliguori | } |
2311 | 1e9fa730 | Nathan Froyd | env = find_cpu(thread); |
2312 | 880a7578 | aliguori | if (env == NULL) { |
2313 | 880a7578 | aliguori | put_packet(s, "E22");
|
2314 | 880a7578 | aliguori | break;
|
2315 | 880a7578 | aliguori | } |
2316 | 880a7578 | aliguori | switch (type) {
|
2317 | 880a7578 | aliguori | case 'c': |
2318 | 880a7578 | aliguori | s->c_cpu = env; |
2319 | 880a7578 | aliguori | put_packet(s, "OK");
|
2320 | 880a7578 | aliguori | break;
|
2321 | 880a7578 | aliguori | case 'g': |
2322 | 880a7578 | aliguori | s->g_cpu = env; |
2323 | 880a7578 | aliguori | put_packet(s, "OK");
|
2324 | 880a7578 | aliguori | break;
|
2325 | 880a7578 | aliguori | default:
|
2326 | 880a7578 | aliguori | put_packet(s, "E22");
|
2327 | 880a7578 | aliguori | break;
|
2328 | 880a7578 | aliguori | } |
2329 | 880a7578 | aliguori | break;
|
2330 | 880a7578 | aliguori | case 'T': |
2331 | 880a7578 | aliguori | thread = strtoull(p, (char **)&p, 16); |
2332 | 1e9fa730 | Nathan Froyd | env = find_cpu(thread); |
2333 | 1e9fa730 | Nathan Froyd | |
2334 | 1e9fa730 | Nathan Froyd | if (env != NULL) { |
2335 | 1e9fa730 | Nathan Froyd | put_packet(s, "OK");
|
2336 | 1e9fa730 | Nathan Froyd | } else {
|
2337 | 880a7578 | aliguori | put_packet(s, "E22");
|
2338 | 1e9fa730 | Nathan Froyd | } |
2339 | 880a7578 | aliguori | break;
|
2340 | 978efd6a | pbrook | case 'q': |
2341 | 60897d36 | edgar_igl | case 'Q': |
2342 | 60897d36 | edgar_igl | /* parse any 'q' packets here */
|
2343 | 60897d36 | edgar_igl | if (!strcmp(p,"qemu.sstepbits")) { |
2344 | 60897d36 | edgar_igl | /* Query Breakpoint bit definitions */
|
2345 | 363a37d5 | blueswir1 | snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x", |
2346 | 363a37d5 | blueswir1 | SSTEP_ENABLE, |
2347 | 363a37d5 | blueswir1 | SSTEP_NOIRQ, |
2348 | 363a37d5 | blueswir1 | SSTEP_NOTIMER); |
2349 | 60897d36 | edgar_igl | put_packet(s, buf); |
2350 | 60897d36 | edgar_igl | break;
|
2351 | 60897d36 | edgar_igl | } else if (strncmp(p,"qemu.sstep",10) == 0) { |
2352 | 60897d36 | edgar_igl | /* Display or change the sstep_flags */
|
2353 | 60897d36 | edgar_igl | p += 10;
|
2354 | 60897d36 | edgar_igl | if (*p != '=') { |
2355 | 60897d36 | edgar_igl | /* Display current setting */
|
2356 | 363a37d5 | blueswir1 | snprintf(buf, sizeof(buf), "0x%x", sstep_flags); |
2357 | 60897d36 | edgar_igl | put_packet(s, buf); |
2358 | 60897d36 | edgar_igl | break;
|
2359 | 60897d36 | edgar_igl | } |
2360 | 60897d36 | edgar_igl | p++; |
2361 | 60897d36 | edgar_igl | type = strtoul(p, (char **)&p, 16); |
2362 | 60897d36 | edgar_igl | sstep_flags = type; |
2363 | 60897d36 | edgar_igl | put_packet(s, "OK");
|
2364 | 60897d36 | edgar_igl | break;
|
2365 | 880a7578 | aliguori | } else if (strcmp(p,"C") == 0) { |
2366 | 880a7578 | aliguori | /* "Current thread" remains vague in the spec, so always return
|
2367 | 880a7578 | aliguori | * the first CPU (gdb returns the first thread). */
|
2368 | 880a7578 | aliguori | put_packet(s, "QC1");
|
2369 | 880a7578 | aliguori | break;
|
2370 | 880a7578 | aliguori | } else if (strcmp(p,"fThreadInfo") == 0) { |
2371 | 880a7578 | aliguori | s->query_cpu = first_cpu; |
2372 | 880a7578 | aliguori | goto report_cpuinfo;
|
2373 | 880a7578 | aliguori | } else if (strcmp(p,"sThreadInfo") == 0) { |
2374 | 880a7578 | aliguori | report_cpuinfo:
|
2375 | 880a7578 | aliguori | if (s->query_cpu) {
|
2376 | 68f4730c | Wen Congyang | snprintf(buf, sizeof(buf), "m%x", cpu_index(s->query_cpu)); |
2377 | 880a7578 | aliguori | put_packet(s, buf); |
2378 | 880a7578 | aliguori | s->query_cpu = s->query_cpu->next_cpu; |
2379 | 880a7578 | aliguori | } else
|
2380 | 880a7578 | aliguori | put_packet(s, "l");
|
2381 | 880a7578 | aliguori | break;
|
2382 | 880a7578 | aliguori | } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) { |
2383 | 880a7578 | aliguori | thread = strtoull(p+16, (char **)&p, 16); |
2384 | 1e9fa730 | Nathan Froyd | env = find_cpu(thread); |
2385 | 1e9fa730 | Nathan Froyd | if (env != NULL) { |
2386 | 4c0960c0 | Avi Kivity | cpu_synchronize_state(env); |
2387 | 1e9fa730 | Nathan Froyd | len = snprintf((char *)mem_buf, sizeof(mem_buf), |
2388 | 1e9fa730 | Nathan Froyd | "CPU#%d [%s]", env->cpu_index,
|
2389 | 1e9fa730 | Nathan Froyd | env->halted ? "halted " : "running"); |
2390 | 1e9fa730 | Nathan Froyd | memtohex(buf, mem_buf, len); |
2391 | 1e9fa730 | Nathan Froyd | put_packet(s, buf); |
2392 | 1e9fa730 | Nathan Froyd | } |
2393 | 880a7578 | aliguori | break;
|
2394 | 60897d36 | edgar_igl | } |
2395 | 0b8a988c | blueswir1 | #ifdef CONFIG_USER_ONLY
|
2396 | 60897d36 | edgar_igl | else if (strncmp(p, "Offsets", 7) == 0) { |
2397 | 880a7578 | aliguori | TaskState *ts = s->c_cpu->opaque; |
2398 | 978efd6a | pbrook | |
2399 | 363a37d5 | blueswir1 | snprintf(buf, sizeof(buf),
|
2400 | 363a37d5 | blueswir1 | "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx |
2401 | 363a37d5 | blueswir1 | ";Bss=" TARGET_ABI_FMT_lx,
|
2402 | 363a37d5 | blueswir1 | ts->info->code_offset, |
2403 | 363a37d5 | blueswir1 | ts->info->data_offset, |
2404 | 363a37d5 | blueswir1 | ts->info->data_offset); |
2405 | 978efd6a | pbrook | put_packet(s, buf); |
2406 | 978efd6a | pbrook | break;
|
2407 | 978efd6a | pbrook | } |
2408 | 0b8a988c | blueswir1 | #else /* !CONFIG_USER_ONLY */ |
2409 | 8a34a0fb | aliguori | else if (strncmp(p, "Rcmd,", 5) == 0) { |
2410 | 8a34a0fb | aliguori | int len = strlen(p + 5); |
2411 | 8a34a0fb | aliguori | |
2412 | 8a34a0fb | aliguori | if ((len % 2) != 0) { |
2413 | 8a34a0fb | aliguori | put_packet(s, "E01");
|
2414 | 8a34a0fb | aliguori | break;
|
2415 | 8a34a0fb | aliguori | } |
2416 | 8a34a0fb | aliguori | hextomem(mem_buf, p + 5, len);
|
2417 | 8a34a0fb | aliguori | len = len / 2;
|
2418 | 8a34a0fb | aliguori | mem_buf[len++] = 0;
|
2419 | fa5efccb | Anthony Liguori | qemu_chr_be_write(s->mon_chr, mem_buf, len); |
2420 | 8a34a0fb | aliguori | put_packet(s, "OK");
|
2421 | 8a34a0fb | aliguori | break;
|
2422 | 8a34a0fb | aliguori | } |
2423 | 0b8a988c | blueswir1 | #endif /* !CONFIG_USER_ONLY */ |
2424 | 56aebc89 | pbrook | if (strncmp(p, "Supported", 9) == 0) { |
2425 | 5b3715bf | blueswir1 | snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH); |
2426 | 56aebc89 | pbrook | #ifdef GDB_CORE_XML
|
2427 | 2dc766da | blueswir1 | pstrcat(buf, sizeof(buf), ";qXfer:features:read+"); |
2428 | 56aebc89 | pbrook | #endif
|
2429 | 56aebc89 | pbrook | put_packet(s, buf); |
2430 | 56aebc89 | pbrook | break;
|
2431 | 56aebc89 | pbrook | } |
2432 | 56aebc89 | pbrook | #ifdef GDB_CORE_XML
|
2433 | 56aebc89 | pbrook | if (strncmp(p, "Xfer:features:read:", 19) == 0) { |
2434 | 56aebc89 | pbrook | const char *xml; |
2435 | 56aebc89 | pbrook | target_ulong total_len; |
2436 | 56aebc89 | pbrook | |
2437 | 56aebc89 | pbrook | gdb_has_xml = 1;
|
2438 | 56aebc89 | pbrook | p += 19;
|
2439 | 880a7578 | aliguori | xml = get_feature_xml(p, &p); |
2440 | 56aebc89 | pbrook | if (!xml) {
|
2441 | 5b3715bf | blueswir1 | snprintf(buf, sizeof(buf), "E00"); |
2442 | 56aebc89 | pbrook | put_packet(s, buf); |
2443 | 56aebc89 | pbrook | break;
|
2444 | 56aebc89 | pbrook | } |
2445 | 56aebc89 | pbrook | |
2446 | 56aebc89 | pbrook | if (*p == ':') |
2447 | 56aebc89 | pbrook | p++; |
2448 | 56aebc89 | pbrook | addr = strtoul(p, (char **)&p, 16); |
2449 | 56aebc89 | pbrook | if (*p == ',') |
2450 | 56aebc89 | pbrook | p++; |
2451 | 56aebc89 | pbrook | len = strtoul(p, (char **)&p, 16); |
2452 | 56aebc89 | pbrook | |
2453 | 56aebc89 | pbrook | total_len = strlen(xml); |
2454 | 56aebc89 | pbrook | if (addr > total_len) {
|
2455 | 5b3715bf | blueswir1 | snprintf(buf, sizeof(buf), "E00"); |
2456 | 56aebc89 | pbrook | put_packet(s, buf); |
2457 | 56aebc89 | pbrook | break;
|
2458 | 56aebc89 | pbrook | } |
2459 | 56aebc89 | pbrook | if (len > (MAX_PACKET_LENGTH - 5) / 2) |
2460 | 56aebc89 | pbrook | len = (MAX_PACKET_LENGTH - 5) / 2; |
2461 | 56aebc89 | pbrook | if (len < total_len - addr) {
|
2462 | 56aebc89 | pbrook | buf[0] = 'm'; |
2463 | 56aebc89 | pbrook | len = memtox(buf + 1, xml + addr, len);
|
2464 | 56aebc89 | pbrook | } else {
|
2465 | 56aebc89 | pbrook | buf[0] = 'l'; |
2466 | 56aebc89 | pbrook | len = memtox(buf + 1, xml + addr, total_len - addr);
|
2467 | 56aebc89 | pbrook | } |
2468 | 56aebc89 | pbrook | put_packet_binary(s, buf, len + 1);
|
2469 | 56aebc89 | pbrook | break;
|
2470 | 56aebc89 | pbrook | } |
2471 | 56aebc89 | pbrook | #endif
|
2472 | 56aebc89 | pbrook | /* Unrecognised 'q' command. */
|
2473 | 56aebc89 | pbrook | goto unknown_command;
|
2474 | 56aebc89 | pbrook | |
2475 | 858693c6 | bellard | default:
|
2476 | 56aebc89 | pbrook | unknown_command:
|
2477 | 858693c6 | bellard | /* put empty packet */
|
2478 | 858693c6 | bellard | buf[0] = '\0'; |
2479 | 858693c6 | bellard | put_packet(s, buf); |
2480 | 858693c6 | bellard | break;
|
2481 | 858693c6 | bellard | } |
2482 | 858693c6 | bellard | return RS_IDLE;
|
2483 | 858693c6 | bellard | } |
2484 | 858693c6 | bellard | |
2485 | 9349b4f9 | Andreas Färber | void gdb_set_stop_cpu(CPUArchState *env)
|
2486 | 880a7578 | aliguori | { |
2487 | 880a7578 | aliguori | gdbserver_state->c_cpu = env; |
2488 | 880a7578 | aliguori | gdbserver_state->g_cpu = env; |
2489 | 880a7578 | aliguori | } |
2490 | 880a7578 | aliguori | |
2491 | 1fddef4b | bellard | #ifndef CONFIG_USER_ONLY
|
2492 | 1dfb4dd9 | Luiz Capitulino | static void gdb_vm_state_change(void *opaque, int running, RunState state) |
2493 | 858693c6 | bellard | { |
2494 | 880a7578 | aliguori | GDBState *s = gdbserver_state; |
2495 | 9349b4f9 | Andreas Färber | CPUArchState *env = s->c_cpu; |
2496 | 858693c6 | bellard | char buf[256]; |
2497 | d6fc1b39 | aliguori | const char *type; |
2498 | 858693c6 | bellard | int ret;
|
2499 | 858693c6 | bellard | |
2500 | cdb432b2 | Meador Inge | if (running || s->state == RS_INACTIVE) {
|
2501 | cdb432b2 | Meador Inge | return;
|
2502 | cdb432b2 | Meador Inge | } |
2503 | cdb432b2 | Meador Inge | /* Is there a GDB syscall waiting to be sent? */
|
2504 | cdb432b2 | Meador Inge | if (s->current_syscall_cb) {
|
2505 | cdb432b2 | Meador Inge | put_packet(s, s->syscall_buf); |
2506 | a2d1ebaf | pbrook | return;
|
2507 | e07bbac5 | Jan Kiszka | } |
2508 | 1dfb4dd9 | Luiz Capitulino | switch (state) {
|
2509 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_DEBUG:
|
2510 | 880a7578 | aliguori | if (env->watchpoint_hit) {
|
2511 | 880a7578 | aliguori | switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
|
2512 | a1d1bb31 | aliguori | case BP_MEM_READ:
|
2513 | d6fc1b39 | aliguori | type = "r";
|
2514 | d6fc1b39 | aliguori | break;
|
2515 | a1d1bb31 | aliguori | case BP_MEM_ACCESS:
|
2516 | d6fc1b39 | aliguori | type = "a";
|
2517 | d6fc1b39 | aliguori | break;
|
2518 | d6fc1b39 | aliguori | default:
|
2519 | d6fc1b39 | aliguori | type = "";
|
2520 | d6fc1b39 | aliguori | break;
|
2521 | d6fc1b39 | aliguori | } |
2522 | 880a7578 | aliguori | snprintf(buf, sizeof(buf),
|
2523 | 880a7578 | aliguori | "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";", |
2524 | 68f4730c | Wen Congyang | GDB_SIGNAL_TRAP, cpu_index(env), type, |
2525 | 880a7578 | aliguori | env->watchpoint_hit->vaddr); |
2526 | 880a7578 | aliguori | env->watchpoint_hit = NULL;
|
2527 | 425189a8 | Jan Kiszka | goto send_packet;
|
2528 | 6658ffb8 | pbrook | } |
2529 | 425189a8 | Jan Kiszka | tb_flush(env); |
2530 | ca587a8e | aurel32 | ret = GDB_SIGNAL_TRAP; |
2531 | 425189a8 | Jan Kiszka | break;
|
2532 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_PAUSED:
|
2533 | 9781e040 | aliguori | ret = GDB_SIGNAL_INT; |
2534 | 425189a8 | Jan Kiszka | break;
|
2535 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_SHUTDOWN:
|
2536 | 425189a8 | Jan Kiszka | ret = GDB_SIGNAL_QUIT; |
2537 | 425189a8 | Jan Kiszka | break;
|
2538 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_IO_ERROR:
|
2539 | 425189a8 | Jan Kiszka | ret = GDB_SIGNAL_IO; |
2540 | 425189a8 | Jan Kiszka | break;
|
2541 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_WATCHDOG:
|
2542 | 425189a8 | Jan Kiszka | ret = GDB_SIGNAL_ALRM; |
2543 | 425189a8 | Jan Kiszka | break;
|
2544 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_INTERNAL_ERROR:
|
2545 | 425189a8 | Jan Kiszka | ret = GDB_SIGNAL_ABRT; |
2546 | 425189a8 | Jan Kiszka | break;
|
2547 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_SAVE_VM:
|
2548 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_RESTORE_VM:
|
2549 | 425189a8 | Jan Kiszka | return;
|
2550 | 0461d5a6 | Luiz Capitulino | case RUN_STATE_FINISH_MIGRATE:
|
2551 | 425189a8 | Jan Kiszka | ret = GDB_SIGNAL_XCPU; |
2552 | 425189a8 | Jan Kiszka | break;
|
2553 | 425189a8 | Jan Kiszka | default:
|
2554 | 425189a8 | Jan Kiszka | ret = GDB_SIGNAL_UNKNOWN; |
2555 | 425189a8 | Jan Kiszka | break;
|
2556 | bbeb7b5c | bellard | } |
2557 | 68f4730c | Wen Congyang | snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, cpu_index(env)); |
2558 | 425189a8 | Jan Kiszka | |
2559 | 425189a8 | Jan Kiszka | send_packet:
|
2560 | 858693c6 | bellard | put_packet(s, buf); |
2561 | 425189a8 | Jan Kiszka | |
2562 | 425189a8 | Jan Kiszka | /* disable single step if it was enabled */
|
2563 | 425189a8 | Jan Kiszka | cpu_single_step(env, 0);
|
2564 | 858693c6 | bellard | } |
2565 | 1fddef4b | bellard | #endif
|
2566 | 858693c6 | bellard | |
2567 | a2d1ebaf | pbrook | /* Send a gdb syscall request.
|
2568 | a2d1ebaf | pbrook | This accepts limited printf-style format specifiers, specifically:
|
2569 | a87295e8 | pbrook | %x - target_ulong argument printed in hex.
|
2570 | a87295e8 | pbrook | %lx - 64-bit argument printed in hex.
|
2571 | a87295e8 | pbrook | %s - string pointer (target_ulong) and length (int) pair. */
|
2572 | 7ccfb2eb | blueswir1 | void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...) |
2573 | a2d1ebaf | pbrook | { |
2574 | a2d1ebaf | pbrook | va_list va; |
2575 | a2d1ebaf | pbrook | char *p;
|
2576 | cdb432b2 | Meador Inge | char *p_end;
|
2577 | a2d1ebaf | pbrook | target_ulong addr; |
2578 | a87295e8 | pbrook | uint64_t i64; |
2579 | a2d1ebaf | pbrook | GDBState *s; |
2580 | a2d1ebaf | pbrook | |
2581 | 880a7578 | aliguori | s = gdbserver_state; |
2582 | a2d1ebaf | pbrook | if (!s)
|
2583 | a2d1ebaf | pbrook | return;
|
2584 | cdb432b2 | Meador Inge | s->current_syscall_cb = cb; |
2585 | a2d1ebaf | pbrook | #ifndef CONFIG_USER_ONLY
|
2586 | 0461d5a6 | Luiz Capitulino | vm_stop(RUN_STATE_DEBUG); |
2587 | a2d1ebaf | pbrook | #endif
|
2588 | a2d1ebaf | pbrook | va_start(va, fmt); |
2589 | cdb432b2 | Meador Inge | p = s->syscall_buf; |
2590 | cdb432b2 | Meador Inge | p_end = &s->syscall_buf[sizeof(s->syscall_buf)];
|
2591 | a2d1ebaf | pbrook | *(p++) = 'F';
|
2592 | a2d1ebaf | pbrook | while (*fmt) {
|
2593 | a2d1ebaf | pbrook | if (*fmt == '%') { |
2594 | a2d1ebaf | pbrook | fmt++; |
2595 | a2d1ebaf | pbrook | switch (*fmt++) {
|
2596 | a2d1ebaf | pbrook | case 'x': |
2597 | a2d1ebaf | pbrook | addr = va_arg(va, target_ulong); |
2598 | cdb432b2 | Meador Inge | p += snprintf(p, p_end - p, TARGET_FMT_lx, addr); |
2599 | a2d1ebaf | pbrook | break;
|
2600 | a87295e8 | pbrook | case 'l': |
2601 | a87295e8 | pbrook | if (*(fmt++) != 'x') |
2602 | a87295e8 | pbrook | goto bad_format;
|
2603 | a87295e8 | pbrook | i64 = va_arg(va, uint64_t); |
2604 | cdb432b2 | Meador Inge | p += snprintf(p, p_end - p, "%" PRIx64, i64);
|
2605 | a87295e8 | pbrook | break;
|
2606 | a2d1ebaf | pbrook | case 's': |
2607 | a2d1ebaf | pbrook | addr = va_arg(va, target_ulong); |
2608 | cdb432b2 | Meador Inge | p += snprintf(p, p_end - p, TARGET_FMT_lx "/%x",
|
2609 | 363a37d5 | blueswir1 | addr, va_arg(va, int));
|
2610 | a2d1ebaf | pbrook | break;
|
2611 | a2d1ebaf | pbrook | default:
|
2612 | a87295e8 | pbrook | bad_format:
|
2613 | a2d1ebaf | pbrook | fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
|
2614 | a2d1ebaf | pbrook | fmt - 1);
|
2615 | a2d1ebaf | pbrook | break;
|
2616 | a2d1ebaf | pbrook | } |
2617 | a2d1ebaf | pbrook | } else {
|
2618 | a2d1ebaf | pbrook | *(p++) = *(fmt++); |
2619 | a2d1ebaf | pbrook | } |
2620 | a2d1ebaf | pbrook | } |
2621 | 8a93e02a | pbrook | *p = 0;
|
2622 | a2d1ebaf | pbrook | va_end(va); |
2623 | a2d1ebaf | pbrook | #ifdef CONFIG_USER_ONLY
|
2624 | cdb432b2 | Meador Inge | put_packet(s, s->syscall_buf); |
2625 | 880a7578 | aliguori | gdb_handlesig(s->c_cpu, 0);
|
2626 | a2d1ebaf | pbrook | #else
|
2627 | cdb432b2 | Meador Inge | /* In this case wait to send the syscall packet until notification that
|
2628 | cdb432b2 | Meador Inge | the CPU has stopped. This must be done because if the packet is sent
|
2629 | cdb432b2 | Meador Inge | now the reply from the syscall request could be received while the CPU
|
2630 | cdb432b2 | Meador Inge | is still in the running state, which can cause packets to be dropped
|
2631 | cdb432b2 | Meador Inge | and state transition 'T' packets to be sent while the syscall is still
|
2632 | cdb432b2 | Meador Inge | being processed. */
|
2633 | 3098dba0 | aurel32 | cpu_exit(s->c_cpu); |
2634 | a2d1ebaf | pbrook | #endif
|
2635 | a2d1ebaf | pbrook | } |
2636 | a2d1ebaf | pbrook | |
2637 | 6a00d601 | bellard | static void gdb_read_byte(GDBState *s, int ch) |
2638 | 858693c6 | bellard | { |
2639 | 858693c6 | bellard | int i, csum;
|
2640 | 60fe76f3 | ths | uint8_t reply; |
2641 | 858693c6 | bellard | |
2642 | 1fddef4b | bellard | #ifndef CONFIG_USER_ONLY
|
2643 | 4046d913 | pbrook | if (s->last_packet_len) {
|
2644 | 4046d913 | pbrook | /* Waiting for a response to the last packet. If we see the start
|
2645 | 4046d913 | pbrook | of a new command then abandon the previous response. */
|
2646 | 4046d913 | pbrook | if (ch == '-') { |
2647 | 4046d913 | pbrook | #ifdef DEBUG_GDB
|
2648 | 4046d913 | pbrook | printf("Got NACK, retransmitting\n");
|
2649 | 4046d913 | pbrook | #endif
|
2650 | ffe8ab83 | ths | put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len); |
2651 | 4046d913 | pbrook | } |
2652 | 4046d913 | pbrook | #ifdef DEBUG_GDB
|
2653 | 4046d913 | pbrook | else if (ch == '+') |
2654 | 4046d913 | pbrook | printf("Got ACK\n");
|
2655 | 4046d913 | pbrook | else
|
2656 | 4046d913 | pbrook | printf("Got '%c' when expecting ACK/NACK\n", ch);
|
2657 | 4046d913 | pbrook | #endif
|
2658 | 4046d913 | pbrook | if (ch == '+' || ch == '$') |
2659 | 4046d913 | pbrook | s->last_packet_len = 0;
|
2660 | 4046d913 | pbrook | if (ch != '$') |
2661 | 4046d913 | pbrook | return;
|
2662 | 4046d913 | pbrook | } |
2663 | 1354869c | Luiz Capitulino | if (runstate_is_running()) {
|
2664 | 858693c6 | bellard | /* when the CPU is running, we cannot do anything except stop
|
2665 | 858693c6 | bellard | it when receiving a char */
|
2666 | 0461d5a6 | Luiz Capitulino | vm_stop(RUN_STATE_PAUSED); |
2667 | 5fafdf24 | ths | } else
|
2668 | 1fddef4b | bellard | #endif
|
2669 | 41625033 | bellard | { |
2670 | 858693c6 | bellard | switch(s->state) {
|
2671 | 858693c6 | bellard | case RS_IDLE:
|
2672 | 858693c6 | bellard | if (ch == '$') { |
2673 | 858693c6 | bellard | s->line_buf_index = 0;
|
2674 | 858693c6 | bellard | s->state = RS_GETLINE; |
2675 | c33a346e | bellard | } |
2676 | b4608c04 | bellard | break;
|
2677 | 858693c6 | bellard | case RS_GETLINE:
|
2678 | 858693c6 | bellard | if (ch == '#') { |
2679 | 858693c6 | bellard | s->state = RS_CHKSUM1; |
2680 | 858693c6 | bellard | } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) { |
2681 | 858693c6 | bellard | s->state = RS_IDLE; |
2682 | 4c3a88a2 | bellard | } else {
|
2683 | 858693c6 | bellard | s->line_buf[s->line_buf_index++] = ch; |
2684 | 4c3a88a2 | bellard | } |
2685 | 4c3a88a2 | bellard | break;
|
2686 | 858693c6 | bellard | case RS_CHKSUM1:
|
2687 | 858693c6 | bellard | s->line_buf[s->line_buf_index] = '\0';
|
2688 | 858693c6 | bellard | s->line_csum = fromhex(ch) << 4;
|
2689 | 858693c6 | bellard | s->state = RS_CHKSUM2; |
2690 | 858693c6 | bellard | break;
|
2691 | 858693c6 | bellard | case RS_CHKSUM2:
|
2692 | 858693c6 | bellard | s->line_csum |= fromhex(ch); |
2693 | 858693c6 | bellard | csum = 0;
|
2694 | 858693c6 | bellard | for(i = 0; i < s->line_buf_index; i++) { |
2695 | 858693c6 | bellard | csum += s->line_buf[i]; |
2696 | 858693c6 | bellard | } |
2697 | 858693c6 | bellard | if (s->line_csum != (csum & 0xff)) { |
2698 | 60fe76f3 | ths | reply = '-';
|
2699 | 60fe76f3 | ths | put_buffer(s, &reply, 1);
|
2700 | 858693c6 | bellard | s->state = RS_IDLE; |
2701 | 4c3a88a2 | bellard | } else {
|
2702 | 60fe76f3 | ths | reply = '+';
|
2703 | 60fe76f3 | ths | put_buffer(s, &reply, 1);
|
2704 | 880a7578 | aliguori | s->state = gdb_handle_packet(s, s->line_buf); |
2705 | 4c3a88a2 | bellard | } |
2706 | 4c3a88a2 | bellard | break;
|
2707 | a2d1ebaf | pbrook | default:
|
2708 | a2d1ebaf | pbrook | abort(); |
2709 | 858693c6 | bellard | } |
2710 | 858693c6 | bellard | } |
2711 | 858693c6 | bellard | } |
2712 | 858693c6 | bellard | |
2713 | 0e1c9c54 | Paul Brook | /* Tell the remote gdb that the process has exited. */
|
2714 | 9349b4f9 | Andreas Färber | void gdb_exit(CPUArchState *env, int code) |
2715 | 0e1c9c54 | Paul Brook | { |
2716 | 0e1c9c54 | Paul Brook | GDBState *s; |
2717 | 0e1c9c54 | Paul Brook | char buf[4]; |
2718 | 0e1c9c54 | Paul Brook | |
2719 | 0e1c9c54 | Paul Brook | s = gdbserver_state; |
2720 | 0e1c9c54 | Paul Brook | if (!s) {
|
2721 | 0e1c9c54 | Paul Brook | return;
|
2722 | 0e1c9c54 | Paul Brook | } |
2723 | 0e1c9c54 | Paul Brook | #ifdef CONFIG_USER_ONLY
|
2724 | 0e1c9c54 | Paul Brook | if (gdbserver_fd < 0 || s->fd < 0) { |
2725 | 0e1c9c54 | Paul Brook | return;
|
2726 | 0e1c9c54 | Paul Brook | } |
2727 | 0e1c9c54 | Paul Brook | #endif
|
2728 | 0e1c9c54 | Paul Brook | |
2729 | 0e1c9c54 | Paul Brook | snprintf(buf, sizeof(buf), "W%02x", (uint8_t)code); |
2730 | 0e1c9c54 | Paul Brook | put_packet(s, buf); |
2731 | e2af15b2 | Fabien Chouteau | |
2732 | e2af15b2 | Fabien Chouteau | #ifndef CONFIG_USER_ONLY
|
2733 | e2af15b2 | Fabien Chouteau | if (s->chr) {
|
2734 | 70f24fb6 | Anthony Liguori | qemu_chr_delete(s->chr); |
2735 | e2af15b2 | Fabien Chouteau | } |
2736 | e2af15b2 | Fabien Chouteau | #endif
|
2737 | 0e1c9c54 | Paul Brook | } |
2738 | 0e1c9c54 | Paul Brook | |
2739 | 1fddef4b | bellard | #ifdef CONFIG_USER_ONLY
|
2740 | 1fddef4b | bellard | int
|
2741 | ca587a8e | aurel32 | gdb_queuesig (void)
|
2742 | ca587a8e | aurel32 | { |
2743 | ca587a8e | aurel32 | GDBState *s; |
2744 | ca587a8e | aurel32 | |
2745 | ca587a8e | aurel32 | s = gdbserver_state; |
2746 | ca587a8e | aurel32 | |
2747 | ca587a8e | aurel32 | if (gdbserver_fd < 0 || s->fd < 0) |
2748 | ca587a8e | aurel32 | return 0; |
2749 | ca587a8e | aurel32 | else
|
2750 | ca587a8e | aurel32 | return 1; |
2751 | ca587a8e | aurel32 | } |
2752 | ca587a8e | aurel32 | |
2753 | ca587a8e | aurel32 | int
|
2754 | 9349b4f9 | Andreas Färber | gdb_handlesig (CPUArchState *env, int sig)
|
2755 | 1fddef4b | bellard | { |
2756 | 1fddef4b | bellard | GDBState *s; |
2757 | 1fddef4b | bellard | char buf[256]; |
2758 | 1fddef4b | bellard | int n;
|
2759 | 1fddef4b | bellard | |
2760 | 880a7578 | aliguori | s = gdbserver_state; |
2761 | 1f487ee9 | edgar_igl | if (gdbserver_fd < 0 || s->fd < 0) |
2762 | 1f487ee9 | edgar_igl | return sig;
|
2763 | 1fddef4b | bellard | |
2764 | 1fddef4b | bellard | /* disable single step if it was enabled */
|
2765 | 1fddef4b | bellard | cpu_single_step(env, 0);
|
2766 | 1fddef4b | bellard | tb_flush(env); |
2767 | 1fddef4b | bellard | |
2768 | 1fddef4b | bellard | if (sig != 0) |
2769 | 1fddef4b | bellard | { |
2770 | ca587a8e | aurel32 | snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig)); |
2771 | 1fddef4b | bellard | put_packet(s, buf); |
2772 | 1fddef4b | bellard | } |
2773 | 1f487ee9 | edgar_igl | /* put_packet() might have detected that the peer terminated the
|
2774 | 1f487ee9 | edgar_igl | connection. */
|
2775 | 1f487ee9 | edgar_igl | if (s->fd < 0) |
2776 | 1f487ee9 | edgar_igl | return sig;
|
2777 | 1fddef4b | bellard | |
2778 | 1fddef4b | bellard | sig = 0;
|
2779 | 1fddef4b | bellard | s->state = RS_IDLE; |
2780 | 41625033 | bellard | s->running_state = 0;
|
2781 | 41625033 | bellard | while (s->running_state == 0) { |
2782 | 1fddef4b | bellard | n = read (s->fd, buf, 256);
|
2783 | 1fddef4b | bellard | if (n > 0) |
2784 | 1fddef4b | bellard | { |
2785 | 1fddef4b | bellard | int i;
|
2786 | 1fddef4b | bellard | |
2787 | 1fddef4b | bellard | for (i = 0; i < n; i++) |
2788 | 6a00d601 | bellard | gdb_read_byte (s, buf[i]); |
2789 | 1fddef4b | bellard | } |
2790 | 1fddef4b | bellard | else if (n == 0 || errno != EAGAIN) |
2791 | 1fddef4b | bellard | { |
2792 | e7d81004 | Stefan Weil | /* XXX: Connection closed. Should probably wait for another
|
2793 | 1fddef4b | bellard | connection before continuing. */
|
2794 | 1fddef4b | bellard | return sig;
|
2795 | 1fddef4b | bellard | } |
2796 | 41625033 | bellard | } |
2797 | 1f487ee9 | edgar_igl | sig = s->signal; |
2798 | 1f487ee9 | edgar_igl | s->signal = 0;
|
2799 | 1fddef4b | bellard | return sig;
|
2800 | 1fddef4b | bellard | } |
2801 | e9009676 | bellard | |
2802 | ca587a8e | aurel32 | /* Tell the remote gdb that the process has exited due to SIG. */
|
2803 | 9349b4f9 | Andreas Färber | void gdb_signalled(CPUArchState *env, int sig) |
2804 | ca587a8e | aurel32 | { |
2805 | ca587a8e | aurel32 | GDBState *s; |
2806 | ca587a8e | aurel32 | char buf[4]; |
2807 | ca587a8e | aurel32 | |
2808 | ca587a8e | aurel32 | s = gdbserver_state; |
2809 | ca587a8e | aurel32 | if (gdbserver_fd < 0 || s->fd < 0) |
2810 | ca587a8e | aurel32 | return;
|
2811 | ca587a8e | aurel32 | |
2812 | ca587a8e | aurel32 | snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig)); |
2813 | ca587a8e | aurel32 | put_packet(s, buf); |
2814 | ca587a8e | aurel32 | } |
2815 | 1fddef4b | bellard | |
2816 | 880a7578 | aliguori | static void gdb_accept(void) |
2817 | 858693c6 | bellard | { |
2818 | 858693c6 | bellard | GDBState *s; |
2819 | 858693c6 | bellard | struct sockaddr_in sockaddr;
|
2820 | 858693c6 | bellard | socklen_t len; |
2821 | 858693c6 | bellard | int val, fd;
|
2822 | 858693c6 | bellard | |
2823 | 858693c6 | bellard | for(;;) {
|
2824 | 858693c6 | bellard | len = sizeof(sockaddr);
|
2825 | 858693c6 | bellard | fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
|
2826 | 858693c6 | bellard | if (fd < 0 && errno != EINTR) { |
2827 | 858693c6 | bellard | perror("accept");
|
2828 | 858693c6 | bellard | return;
|
2829 | 858693c6 | bellard | } else if (fd >= 0) { |
2830 | 40ff6d7e | Kevin Wolf | #ifndef _WIN32
|
2831 | 40ff6d7e | Kevin Wolf | fcntl(fd, F_SETFD, FD_CLOEXEC); |
2832 | 40ff6d7e | Kevin Wolf | #endif
|
2833 | b4608c04 | bellard | break;
|
2834 | b4608c04 | bellard | } |
2835 | b4608c04 | bellard | } |
2836 | 858693c6 | bellard | |
2837 | 858693c6 | bellard | /* set short latency */
|
2838 | 858693c6 | bellard | val = 1;
|
2839 | 8f447cc7 | bellard | setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val)); |
2840 | 3b46e624 | ths | |
2841 | 7267c094 | Anthony Liguori | s = g_malloc0(sizeof(GDBState));
|
2842 | 880a7578 | aliguori | s->c_cpu = first_cpu; |
2843 | 880a7578 | aliguori | s->g_cpu = first_cpu; |
2844 | 858693c6 | bellard | s->fd = fd; |
2845 | 56aebc89 | pbrook | gdb_has_xml = 0;
|
2846 | 858693c6 | bellard | |
2847 | 880a7578 | aliguori | gdbserver_state = s; |
2848 | a2d1ebaf | pbrook | |
2849 | 858693c6 | bellard | fcntl(fd, F_SETFL, O_NONBLOCK); |
2850 | 858693c6 | bellard | } |
2851 | 858693c6 | bellard | |
2852 | 858693c6 | bellard | static int gdbserver_open(int port) |
2853 | 858693c6 | bellard | { |
2854 | 858693c6 | bellard | struct sockaddr_in sockaddr;
|
2855 | 858693c6 | bellard | int fd, val, ret;
|
2856 | 858693c6 | bellard | |
2857 | 858693c6 | bellard | fd = socket(PF_INET, SOCK_STREAM, 0);
|
2858 | 858693c6 | bellard | if (fd < 0) { |
2859 | 858693c6 | bellard | perror("socket");
|
2860 | 858693c6 | bellard | return -1; |
2861 | 858693c6 | bellard | } |
2862 | 40ff6d7e | Kevin Wolf | #ifndef _WIN32
|
2863 | 40ff6d7e | Kevin Wolf | fcntl(fd, F_SETFD, FD_CLOEXEC); |
2864 | 40ff6d7e | Kevin Wolf | #endif
|
2865 | 858693c6 | bellard | |
2866 | 858693c6 | bellard | /* allow fast reuse */
|
2867 | 858693c6 | bellard | val = 1;
|
2868 | 8f447cc7 | bellard | setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val)); |
2869 | 858693c6 | bellard | |
2870 | 858693c6 | bellard | sockaddr.sin_family = AF_INET; |
2871 | 858693c6 | bellard | sockaddr.sin_port = htons(port); |
2872 | 858693c6 | bellard | sockaddr.sin_addr.s_addr = 0;
|
2873 | 858693c6 | bellard | ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr)); |
2874 | 858693c6 | bellard | if (ret < 0) { |
2875 | 858693c6 | bellard | perror("bind");
|
2876 | bb16172c | Peter Maydell | close(fd); |
2877 | 858693c6 | bellard | return -1; |
2878 | 858693c6 | bellard | } |
2879 | 858693c6 | bellard | ret = listen(fd, 0);
|
2880 | 858693c6 | bellard | if (ret < 0) { |
2881 | 858693c6 | bellard | perror("listen");
|
2882 | bb16172c | Peter Maydell | close(fd); |
2883 | 858693c6 | bellard | return -1; |
2884 | 858693c6 | bellard | } |
2885 | 858693c6 | bellard | return fd;
|
2886 | 858693c6 | bellard | } |
2887 | 858693c6 | bellard | |
2888 | 858693c6 | bellard | int gdbserver_start(int port) |
2889 | 858693c6 | bellard | { |
2890 | 858693c6 | bellard | gdbserver_fd = gdbserver_open(port); |
2891 | 858693c6 | bellard | if (gdbserver_fd < 0) |
2892 | 858693c6 | bellard | return -1; |
2893 | 858693c6 | bellard | /* accept connections */
|
2894 | 880a7578 | aliguori | gdb_accept(); |
2895 | 4046d913 | pbrook | return 0; |
2896 | 4046d913 | pbrook | } |
2897 | 2b1319c8 | aurel32 | |
2898 | 2b1319c8 | aurel32 | /* Disable gdb stub for child processes. */
|
2899 | 9349b4f9 | Andreas Färber | void gdbserver_fork(CPUArchState *env)
|
2900 | 2b1319c8 | aurel32 | { |
2901 | 2b1319c8 | aurel32 | GDBState *s = gdbserver_state; |
2902 | 9f6164d6 | edgar_igl | if (gdbserver_fd < 0 || s->fd < 0) |
2903 | 2b1319c8 | aurel32 | return;
|
2904 | 2b1319c8 | aurel32 | close(s->fd); |
2905 | 2b1319c8 | aurel32 | s->fd = -1;
|
2906 | 2b1319c8 | aurel32 | cpu_breakpoint_remove_all(env, BP_GDB); |
2907 | 2b1319c8 | aurel32 | cpu_watchpoint_remove_all(env, BP_GDB); |
2908 | 2b1319c8 | aurel32 | } |
2909 | 1fddef4b | bellard | #else
|
2910 | aa1f17c1 | ths | static int gdb_chr_can_receive(void *opaque) |
2911 | 4046d913 | pbrook | { |
2912 | 56aebc89 | pbrook | /* We can handle an arbitrarily large amount of data.
|
2913 | 56aebc89 | pbrook | Pick the maximum packet size, which is as good as anything. */
|
2914 | 56aebc89 | pbrook | return MAX_PACKET_LENGTH;
|
2915 | 4046d913 | pbrook | } |
2916 | 4046d913 | pbrook | |
2917 | aa1f17c1 | ths | static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size) |
2918 | 4046d913 | pbrook | { |
2919 | 4046d913 | pbrook | int i;
|
2920 | 4046d913 | pbrook | |
2921 | 4046d913 | pbrook | for (i = 0; i < size; i++) { |
2922 | 880a7578 | aliguori | gdb_read_byte(gdbserver_state, buf[i]); |
2923 | 4046d913 | pbrook | } |
2924 | 4046d913 | pbrook | } |
2925 | 4046d913 | pbrook | |
2926 | 4046d913 | pbrook | static void gdb_chr_event(void *opaque, int event) |
2927 | 4046d913 | pbrook | { |
2928 | 4046d913 | pbrook | switch (event) {
|
2929 | b6b8df56 | Amit Shah | case CHR_EVENT_OPENED:
|
2930 | 0461d5a6 | Luiz Capitulino | vm_stop(RUN_STATE_PAUSED); |
2931 | 56aebc89 | pbrook | gdb_has_xml = 0;
|
2932 | 4046d913 | pbrook | break;
|
2933 | 4046d913 | pbrook | default:
|
2934 | 4046d913 | pbrook | break;
|
2935 | 4046d913 | pbrook | } |
2936 | 4046d913 | pbrook | } |
2937 | 4046d913 | pbrook | |
2938 | 8a34a0fb | aliguori | static void gdb_monitor_output(GDBState *s, const char *msg, int len) |
2939 | 8a34a0fb | aliguori | { |
2940 | 8a34a0fb | aliguori | char buf[MAX_PACKET_LENGTH];
|
2941 | 8a34a0fb | aliguori | |
2942 | 8a34a0fb | aliguori | buf[0] = 'O'; |
2943 | 8a34a0fb | aliguori | if (len > (MAX_PACKET_LENGTH/2) - 1) |
2944 | 8a34a0fb | aliguori | len = (MAX_PACKET_LENGTH/2) - 1; |
2945 | 8a34a0fb | aliguori | memtohex(buf + 1, (uint8_t *)msg, len);
|
2946 | 8a34a0fb | aliguori | put_packet(s, buf); |
2947 | 8a34a0fb | aliguori | } |
2948 | 8a34a0fb | aliguori | |
2949 | 8a34a0fb | aliguori | static int gdb_monitor_write(CharDriverState *chr, const uint8_t *buf, int len) |
2950 | 8a34a0fb | aliguori | { |
2951 | 8a34a0fb | aliguori | const char *p = (const char *)buf; |
2952 | 8a34a0fb | aliguori | int max_sz;
|
2953 | 8a34a0fb | aliguori | |
2954 | 8a34a0fb | aliguori | max_sz = (sizeof(gdbserver_state->last_packet) - 2) / 2; |
2955 | 8a34a0fb | aliguori | for (;;) {
|
2956 | 8a34a0fb | aliguori | if (len <= max_sz) {
|
2957 | 8a34a0fb | aliguori | gdb_monitor_output(gdbserver_state, p, len); |
2958 | 8a34a0fb | aliguori | break;
|
2959 | 8a34a0fb | aliguori | } |
2960 | 8a34a0fb | aliguori | gdb_monitor_output(gdbserver_state, p, max_sz); |
2961 | 8a34a0fb | aliguori | p += max_sz; |
2962 | 8a34a0fb | aliguori | len -= max_sz; |
2963 | 8a34a0fb | aliguori | } |
2964 | 8a34a0fb | aliguori | return len;
|
2965 | 8a34a0fb | aliguori | } |
2966 | 8a34a0fb | aliguori | |
2967 | 59030a8c | aliguori | #ifndef _WIN32
|
2968 | 59030a8c | aliguori | static void gdb_sigterm_handler(int signal) |
2969 | 59030a8c | aliguori | { |
2970 | 1354869c | Luiz Capitulino | if (runstate_is_running()) {
|
2971 | 0461d5a6 | Luiz Capitulino | vm_stop(RUN_STATE_PAUSED); |
2972 | e07bbac5 | Jan Kiszka | } |
2973 | 59030a8c | aliguori | } |
2974 | 59030a8c | aliguori | #endif
|
2975 | 59030a8c | aliguori | |
2976 | 59030a8c | aliguori | int gdbserver_start(const char *device) |
2977 | 4046d913 | pbrook | { |
2978 | 4046d913 | pbrook | GDBState *s; |
2979 | 59030a8c | aliguori | char gdbstub_device_name[128]; |
2980 | 36556b20 | aliguori | CharDriverState *chr = NULL;
|
2981 | 36556b20 | aliguori | CharDriverState *mon_chr; |
2982 | cfc3475a | pbrook | |
2983 | 59030a8c | aliguori | if (!device)
|
2984 | 59030a8c | aliguori | return -1; |
2985 | 59030a8c | aliguori | if (strcmp(device, "none") != 0) { |
2986 | 59030a8c | aliguori | if (strstart(device, "tcp:", NULL)) { |
2987 | 59030a8c | aliguori | /* enforce required TCP attributes */
|
2988 | 59030a8c | aliguori | snprintf(gdbstub_device_name, sizeof(gdbstub_device_name),
|
2989 | 59030a8c | aliguori | "%s,nowait,nodelay,server", device);
|
2990 | 59030a8c | aliguori | device = gdbstub_device_name; |
2991 | 36556b20 | aliguori | } |
2992 | 59030a8c | aliguori | #ifndef _WIN32
|
2993 | 59030a8c | aliguori | else if (strcmp(device, "stdio") == 0) { |
2994 | 59030a8c | aliguori | struct sigaction act;
|
2995 | 4046d913 | pbrook | |
2996 | 59030a8c | aliguori | memset(&act, 0, sizeof(act)); |
2997 | 59030a8c | aliguori | act.sa_handler = gdb_sigterm_handler; |
2998 | 59030a8c | aliguori | sigaction(SIGINT, &act, NULL);
|
2999 | 59030a8c | aliguori | } |
3000 | 59030a8c | aliguori | #endif
|
3001 | 27143a44 | Anthony Liguori | chr = qemu_chr_new("gdb", device, NULL); |
3002 | 36556b20 | aliguori | if (!chr)
|
3003 | 36556b20 | aliguori | return -1; |
3004 | 36556b20 | aliguori | |
3005 | 36556b20 | aliguori | qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive, |
3006 | 36556b20 | aliguori | gdb_chr_event, NULL);
|
3007 | cfc3475a | pbrook | } |
3008 | cfc3475a | pbrook | |
3009 | 36556b20 | aliguori | s = gdbserver_state; |
3010 | 36556b20 | aliguori | if (!s) {
|
3011 | 7267c094 | Anthony Liguori | s = g_malloc0(sizeof(GDBState));
|
3012 | 36556b20 | aliguori | gdbserver_state = s; |
3013 | 4046d913 | pbrook | |
3014 | 36556b20 | aliguori | qemu_add_vm_change_state_handler(gdb_vm_state_change, NULL);
|
3015 | 36556b20 | aliguori | |
3016 | 36556b20 | aliguori | /* Initialize a monitor terminal for gdb */
|
3017 | 7267c094 | Anthony Liguori | mon_chr = g_malloc0(sizeof(*mon_chr));
|
3018 | 36556b20 | aliguori | mon_chr->chr_write = gdb_monitor_write; |
3019 | 36556b20 | aliguori | monitor_init(mon_chr, 0);
|
3020 | 36556b20 | aliguori | } else {
|
3021 | 36556b20 | aliguori | if (s->chr)
|
3022 | 70f24fb6 | Anthony Liguori | qemu_chr_delete(s->chr); |
3023 | 36556b20 | aliguori | mon_chr = s->mon_chr; |
3024 | 36556b20 | aliguori | memset(s, 0, sizeof(GDBState)); |
3025 | 36556b20 | aliguori | } |
3026 | 880a7578 | aliguori | s->c_cpu = first_cpu; |
3027 | 880a7578 | aliguori | s->g_cpu = first_cpu; |
3028 | 4046d913 | pbrook | s->chr = chr; |
3029 | 36556b20 | aliguori | s->state = chr ? RS_IDLE : RS_INACTIVE; |
3030 | 36556b20 | aliguori | s->mon_chr = mon_chr; |
3031 | cdb432b2 | Meador Inge | s->current_syscall_cb = NULL;
|
3032 | 8a34a0fb | aliguori | |
3033 | b4608c04 | bellard | return 0; |
3034 | b4608c04 | bellard | } |
3035 | 4046d913 | pbrook | #endif |