Revision c2c73b42
| b/i386-dis.c | ||
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/* Print i386 instructions for GDB, the GNU debugger. |
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Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
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2001 |
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Free Software Foundation, Inc. |
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2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. |
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This file is part of GDB. |
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 2 of the License, or |
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(at your option) any later version. |
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License |
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along with this program; if not, write to the Free Software |
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ |
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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/* |
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* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) |
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* July 1988 |
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* modified by John Hassey (hassey@dg-rtp.dg.com) |
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* x86-64 support added by Jan Hubicka (jh@suse.cz) |
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*/ |
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/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) |
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July 1988 |
|
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modified by John Hassey (hassey@dg-rtp.dg.com) |
|
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x86-64 support added by Jan Hubicka (jh@suse.cz) |
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VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */ |
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/* |
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* The main tables describing the instructions is essentially a copy |
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* of the "Opcode Map" chapter (Appendix A) of the Intel 80386 |
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* Programmers Manual. Usually, there is a capital letter, followed |
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* by a small letter. The capital letter tell the addressing mode, |
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* and the small letter tells about the operand size. Refer to |
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* the Intel manual for details. |
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*/ |
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/* The main tables describing the instructions is essentially a copy |
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of the "Opcode Map" chapter (Appendix A) of the Intel 80386 |
|
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Programmers Manual. Usually, there is a capital letter, followed |
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by a small letter. The capital letter tell the addressing mode, |
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and the small letter tells about the operand size. Refer to |
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the Intel manual for details. */ |
|
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|
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#include <stdlib.h> |
| 39 | 35 |
#include "dis-asm.h" |
| 40 | 36 |
#include "qemu-common.h" |
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#define MAXLEN 20
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#define MAXLEN 15
|
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|
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#include <setjmp.h> |
| 45 | 41 |
|
| ... | ... | |
| 49 | 45 |
#define UNIXWARE_COMPAT 1 |
| 50 | 46 |
#endif |
| 51 | 47 |
|
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static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *)); |
|
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static void ckprefix PARAMS ((void)); |
|
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static const char *prefix_name PARAMS ((int, int)); |
|
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static int print_insn PARAMS ((bfd_vma, disassemble_info *)); |
|
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static void dofloat PARAMS ((int)); |
|
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static void OP_ST PARAMS ((int, int)); |
|
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static void OP_STi PARAMS ((int, int)); |
|
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static int putop PARAMS ((const char *, int)); |
|
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static void oappend PARAMS ((const char *)); |
|
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static void append_seg PARAMS ((void)); |
|
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static void OP_indirE PARAMS ((int, int)); |
|
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static void print_operand_value (char *buf, size_t bufsize, int hex, |
|
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bfd_vma disp); |
|
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static void OP_E PARAMS ((int, int)); |
|
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static void OP_G PARAMS ((int, int)); |
|
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static bfd_vma get64 PARAMS ((void)); |
|
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static bfd_signed_vma get32 PARAMS ((void)); |
|
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static bfd_signed_vma get32s PARAMS ((void)); |
|
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static int get16 PARAMS ((void)); |
|
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static void set_op PARAMS ((bfd_vma, int)); |
|
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static void OP_REG PARAMS ((int, int)); |
|
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static void OP_IMREG PARAMS ((int, int)); |
|
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static void OP_I PARAMS ((int, int)); |
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static void OP_I64 PARAMS ((int, int)); |
|
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static void OP_sI PARAMS ((int, int)); |
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static void OP_J PARAMS ((int, int)); |
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static void OP_SEG PARAMS ((int, int)); |
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static void OP_DIR PARAMS ((int, int)); |
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static void OP_OFF PARAMS ((int, int)); |
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static void OP_OFF64 PARAMS ((int, int)); |
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static void ptr_reg PARAMS ((int, int)); |
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static void OP_ESreg PARAMS ((int, int)); |
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static void OP_DSreg PARAMS ((int, int)); |
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static void OP_C PARAMS ((int, int)); |
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static void OP_D PARAMS ((int, int)); |
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static void OP_T PARAMS ((int, int)); |
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static void OP_Rd PARAMS ((int, int)); |
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static void OP_MMX PARAMS ((int, int)); |
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static void OP_XMM PARAMS ((int, int)); |
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static void OP_EM PARAMS ((int, int)); |
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static void OP_EX PARAMS ((int, int)); |
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static void OP_MS PARAMS ((int, int)); |
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static void OP_XS PARAMS ((int, int)); |
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static void OP_3DNowSuffix PARAMS ((int, int)); |
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static void OP_SIMD_Suffix PARAMS ((int, int)); |
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static void SIMD_Fixup PARAMS ((int, int)); |
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static void BadOp PARAMS ((void)); |
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static int fetch_data (struct disassemble_info *, bfd_byte *); |
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static void ckprefix (void); |
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static const char *prefix_name (int, int); |
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static int print_insn (bfd_vma, disassemble_info *); |
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static void dofloat (int); |
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static void OP_ST (int, int); |
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static void OP_STi (int, int); |
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static int putop (const char *, int); |
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static void oappend (const char *); |
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static void append_seg (void); |
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static void OP_indirE (int, int); |
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static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp); |
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static void OP_E (int, int); |
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static void OP_G (int, int); |
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static bfd_vma get64 (void); |
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static bfd_signed_vma get32 (void); |
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static bfd_signed_vma get32s (void); |
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static int get16 (void); |
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static void set_op (bfd_vma, int); |
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static void OP_REG (int, int); |
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static void OP_IMREG (int, int); |
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static void OP_I (int, int); |
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static void OP_I64 (int, int); |
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static void OP_sI (int, int); |
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static void OP_J (int, int); |
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static void OP_SEG (int, int); |
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static void OP_DIR (int, int); |
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static void OP_OFF (int, int); |
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static void OP_OFF64 (int, int); |
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static void ptr_reg (int, int); |
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static void OP_ESreg (int, int); |
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static void OP_DSreg (int, int); |
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static void OP_C (int, int); |
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static void OP_D (int, int); |
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static void OP_T (int, int); |
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static void OP_Rd (int, int); |
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static void OP_MMX (int, int); |
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static void OP_XMM (int, int); |
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static void OP_EM (int, int); |
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static void OP_EX (int, int); |
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static void OP_MS (int, int); |
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static void OP_XS (int, int); |
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static void OP_M (int, int); |
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static void OP_VMX (int, int); |
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static void OP_0fae (int, int); |
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static void OP_0f07 (int, int); |
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static void NOP_Fixup (int, int); |
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static void OP_3DNowSuffix (int, int); |
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static void OP_SIMD_Suffix (int, int); |
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static void SIMD_Fixup (int, int); |
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static void PNI_Fixup (int, int); |
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static void SVME_Fixup (int, int); |
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static void INVLPG_Fixup (int, int); |
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static void BadOp (void); |
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static void SEG_Fixup (int, int); |
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static void VMX_Fixup (int, int); |
|
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static void REP_Fixup (int, int); |
|
| 99 | 105 |
|
| 100 | 106 |
struct dis_private {
|
| 101 | 107 |
/* Points to first byte not fetched. */ |
| ... | ... | |
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when we can. */ |
| 111 | 117 |
#define FWAIT_OPCODE (0x9b) |
| 112 | 118 |
|
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/* Set to 1 for 64bit mode disassembly. */ |
|
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static int mode_64bit; |
|
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enum address_mode |
|
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{
|
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mode_16bit, |
|
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mode_32bit, |
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mode_64bit |
|
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}; |
|
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|
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static enum address_mode address_mode; |
|
| 115 | 127 |
|
| 116 | 128 |
/* Flags for the prefixes for the current instruction. See below. */ |
| 117 | 129 |
static int prefixes; |
| ... | ... | |
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? 1 : fetch_data ((info), (addr))) |
| 163 | 175 |
|
| 164 | 176 |
static int |
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fetch_data (info, addr) |
|
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struct disassemble_info *info; |
|
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bfd_byte *addr; |
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fetch_data (struct disassemble_info *info, bfd_byte *addr) |
|
| 168 | 178 |
{
|
| 169 | 179 |
int status; |
| 170 | 180 |
struct dis_private *priv = (struct dis_private *) info->private_data; |
| 171 | 181 |
bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); |
| 172 | 182 |
|
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status = (*info->read_memory_func) (start, |
|
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priv->max_fetched, |
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addr - priv->max_fetched, |
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info); |
|
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if (addr <= priv->the_buffer + MAXLEN) |
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status = (*info->read_memory_func) (start, |
|
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priv->max_fetched, |
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addr - priv->max_fetched, |
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info); |
|
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else |
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status = -1; |
|
| 177 | 190 |
if (status != 0) |
| 178 | 191 |
{
|
| 179 | 192 |
/* If we did manage to read at least one byte, then |
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print_insn_i386 will do something sensible. Otherwise, print
|
|
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an error. We do that here because this is where we know
|
|
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STATUS. */
|
|
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print_insn_i386 will do something sensible. Otherwise, print
|
|
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an error. We do that here because this is where we know
|
|
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STATUS. */
|
|
| 183 | 196 |
if (priv->max_fetched == priv->the_buffer) |
| 184 | 197 |
(*info->memory_error_func) (status, start, info); |
| 185 | 198 |
longjmp (priv->bailout, 1); |
| ... | ... | |
| 194 | 207 |
#define Eb OP_E, b_mode |
| 195 | 208 |
#define Ev OP_E, v_mode |
| 196 | 209 |
#define Ed OP_E, d_mode |
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#define indirEb OP_indirE, b_mode |
|
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#define indirEv OP_indirE, v_mode |
|
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#define Eq OP_E, q_mode |
|
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#define Edq OP_E, dq_mode |
|
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#define Edqw OP_E, dqw_mode |
|
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#define indirEv OP_indirE, stack_v_mode |
|
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#define indirEp OP_indirE, f_mode |
|
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#define stackEv OP_E, stack_v_mode |
|
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#define Em OP_E, m_mode |
|
| 199 | 217 |
#define Ew OP_E, w_mode |
| 200 | 218 |
#define Ma OP_E, v_mode |
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#define M OP_E, 0 /* lea, lgdt, etc. */
|
|
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#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
|
|
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#define M OP_M, 0 /* lea, lgdt, etc. */
|
|
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#define Mp OP_M, f_mode /* 32 or 48 bit memory operand for LDS, LES etc */
|
|
| 203 | 221 |
#define Gb OP_G, b_mode |
| 204 | 222 |
#define Gv OP_G, v_mode |
| 205 | 223 |
#define Gd OP_G, d_mode |
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#define Gdq OP_G, dq_mode |
|
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#define Gm OP_G, m_mode |
|
| 206 | 226 |
#define Gw OP_G, w_mode |
| 207 | 227 |
#define Rd OP_Rd, d_mode |
| 208 | 228 |
#define Rm OP_Rd, m_mode |
| ... | ... | |
| 212 | 232 |
#define Iq OP_I, q_mode |
| 213 | 233 |
#define Iv64 OP_I64, v_mode |
| 214 | 234 |
#define Iw OP_I, w_mode |
| 235 |
#define I1 OP_I, const_1_mode |
|
| 215 | 236 |
#define Jb OP_J, b_mode |
| 216 | 237 |
#define Jv OP_J, v_mode |
| 217 | 238 |
#define Cm OP_C, m_mode |
| 218 | 239 |
#define Dm OP_D, m_mode |
| 219 | 240 |
#define Td OP_T, d_mode |
| 241 |
#define Sv SEG_Fixup, v_mode |
|
| 220 | 242 |
|
| 221 | 243 |
#define RMeAX OP_REG, eAX_reg |
| 222 | 244 |
#define RMeBX OP_REG, eBX_reg |
| ... | ... | |
| 255 | 277 |
#define eSI OP_IMREG, eSI_reg |
| 256 | 278 |
#define eDI OP_IMREG, eDI_reg |
| 257 | 279 |
#define AL OP_IMREG, al_reg |
| 258 |
#define AL OP_IMREG, al_reg |
|
| 259 | 280 |
#define CL OP_IMREG, cl_reg |
| 260 | 281 |
#define DL OP_IMREG, dl_reg |
| 261 | 282 |
#define BL OP_IMREG, bl_reg |
| ... | ... | |
| 269 | 290 |
|
| 270 | 291 |
#define Sw OP_SEG, w_mode |
| 271 | 292 |
#define Ap OP_DIR, 0 |
| 272 |
#define Ob OP_OFF, b_mode |
|
| 273 |
#define Ob64 OP_OFF64, b_mode |
|
| 274 |
#define Ov OP_OFF, v_mode |
|
| 275 |
#define Ov64 OP_OFF64, v_mode |
|
| 293 |
#define Ob OP_OFF64, b_mode |
|
| 294 |
#define Ov OP_OFF64, v_mode |
|
| 276 | 295 |
#define Xb OP_DSreg, eSI_reg |
| 277 | 296 |
#define Xv OP_DSreg, eSI_reg |
| 278 | 297 |
#define Yb OP_ESreg, eDI_reg |
| ... | ... | |
| 292 | 311 |
#define EX OP_EX, v_mode |
| 293 | 312 |
#define MS OP_MS, v_mode |
| 294 | 313 |
#define XS OP_XS, v_mode |
| 295 |
#define None OP_E, 0
|
|
| 314 |
#define VM OP_VMX, q_mode
|
|
| 296 | 315 |
#define OPSUF OP_3DNowSuffix, 0 |
| 297 | 316 |
#define OPSIMD OP_SIMD_Suffix, 0 |
| 298 | 317 |
|
| 318 |
/* Used handle "rep" prefix for string instructions. */ |
|
| 319 |
#define Xbr REP_Fixup, eSI_reg |
|
| 320 |
#define Xvr REP_Fixup, eSI_reg |
|
| 321 |
#define Ybr REP_Fixup, eDI_reg |
|
| 322 |
#define Yvr REP_Fixup, eDI_reg |
|
| 323 |
#define indirDXr REP_Fixup, indir_dx_reg |
|
| 324 |
#define ALr REP_Fixup, al_reg |
|
| 325 |
#define eAXr REP_Fixup, eAX_reg |
|
| 326 |
|
|
| 299 | 327 |
#define cond_jump_flag NULL, cond_jump_mode |
| 300 | 328 |
#define loop_jcxz_flag NULL, loop_jcxz_mode |
| 301 | 329 |
|
| ... | ... | |
| 309 | 337 |
#define w_mode 3 /* word operand */ |
| 310 | 338 |
#define d_mode 4 /* double word operand */ |
| 311 | 339 |
#define q_mode 5 /* quad word operand */ |
| 312 |
#define x_mode 6 |
|
| 313 |
#define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */ |
|
| 314 |
#define cond_jump_mode 8 |
|
| 315 |
#define loop_jcxz_mode 9 |
|
| 340 |
#define t_mode 6 /* ten-byte operand */ |
|
| 341 |
#define x_mode 7 /* 16-byte XMM operand */ |
|
| 342 |
#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */ |
|
| 343 |
#define cond_jump_mode 9 |
|
| 344 |
#define loop_jcxz_mode 10 |
|
| 345 |
#define dq_mode 11 /* operand size depends on REX prefixes. */ |
|
| 346 |
#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */ |
|
| 347 |
#define f_mode 13 /* 4- or 6-byte pointer operand */ |
|
| 348 |
#define const_1_mode 14 |
|
| 349 |
#define stack_v_mode 15 /* v_mode for stack-related opcodes. */ |
|
| 316 | 350 |
|
| 317 | 351 |
#define es_reg 100 |
| 318 | 352 |
#define cs_reg 101 |
| ... | ... | |
| 363 | 397 |
#define USE_GROUPS 2 |
| 364 | 398 |
#define USE_PREFIX_USER_TABLE 3 |
| 365 | 399 |
#define X86_64_SPECIAL 4 |
| 400 |
#define IS_3BYTE_OPCODE 5 |
|
| 366 | 401 |
|
| 367 | 402 |
#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 |
| 368 | 403 |
|
| ... | ... | |
| 389 | 424 |
#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0 |
| 390 | 425 |
#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0 |
| 391 | 426 |
#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0 |
| 427 |
#define GRPPADLCK1 NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0 |
|
| 428 |
#define GRPPADLCK2 NULL, NULL, USE_GROUPS, NULL, 24, NULL, 0 |
|
| 392 | 429 |
|
| 393 | 430 |
#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0 |
| 394 | 431 |
#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0 |
| ... | ... | |
| 417 | 454 |
#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0 |
| 418 | 455 |
#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0 |
| 419 | 456 |
#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0 |
| 457 |
#define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0 |
|
| 458 |
#define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0 |
|
| 459 |
#define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0 |
|
| 460 |
#define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0 |
|
| 461 |
#define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0 |
|
| 462 |
#define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0 |
|
| 420 | 463 |
|
| 421 | 464 |
#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0 |
| 422 | 465 |
|
| 423 |
typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag)); |
|
| 466 |
#define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0 |
|
| 467 |
#define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0 |
|
| 468 |
|
|
| 469 |
typedef void (*op_rtn) (int bytemode, int sizeflag); |
|
| 424 | 470 |
|
| 425 | 471 |
struct dis386 {
|
| 426 | 472 |
const char *name; |
| ... | ... | |
| 435 | 481 |
/* Upper case letters in the instruction names here are macros. |
| 436 | 482 |
'A' => print 'b' if no register operands or suffix_always is true |
| 437 | 483 |
'B' => print 'b' if suffix_always is true |
| 484 |
'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
|
|
| 485 |
. size prefix |
|
| 438 | 486 |
'E' => print 'e' if 32-bit form of jcxz |
| 439 | 487 |
'F' => print 'w' or 'l' depending on address size prefix (loop insns) |
| 440 | 488 |
'H' => print ",pt" or ",pn" branch hint |
| 489 |
'I' => honor following macro letter even in Intel mode (implemented only |
|
| 490 |
. for some of the macro letters) |
|
| 491 |
'J' => print 'l' |
|
| 441 | 492 |
'L' => print 'l' if suffix_always is true |
| 442 | 493 |
'N' => print 'n' if instruction has no wait "prefix" |
| 443 | 494 |
'O' => print 'd', or 'o' |
| ... | ... | |
| 449 | 500 |
'S' => print 'w', 'l' or 'q' if suffix_always is true |
| 450 | 501 |
'T' => print 'q' in 64bit mode and behave as 'P' otherwise |
| 451 | 502 |
'U' => print 'q' in 64bit mode and behave as 'Q' otherwise |
| 452 |
'X' => print 's', 'd' depending on data16 prefix (for XMM)
|
|
| 503 |
'V' => print 'q' in 64bit mode and behave as 'S' otherwise
|
|
| 453 | 504 |
'W' => print 'b' or 'w' ("w" or "de" in intel mode)
|
| 505 |
'X' => print 's', 'd' depending on data16 prefix (for XMM) |
|
| 454 | 506 |
'Y' => 'q' if instruction has an REX 64bit overwrite prefix |
| 507 |
'Z' => print 'q' in 64bit mode and behave as 'L' otherwise |
|
| 455 | 508 |
|
| 456 | 509 |
Many of the above letters print nothing in Intel mode. See "putop" |
| 457 | 510 |
for the details. |
| ... | ... | |
| 489 | 542 |
{ "adcB", AL, Ib, XX },
|
| 490 | 543 |
{ "adcS", eAX, Iv, XX },
|
| 491 | 544 |
{ "push{T|}", ss, XX, XX },
|
| 492 |
{ "popT|}", ss, XX, XX },
|
|
| 545 |
{ "pop{T|}", ss, XX, XX },
|
|
| 493 | 546 |
/* 18 */ |
| 494 | 547 |
{ "sbbB", Eb, Gb, XX },
|
| 495 | 548 |
{ "sbbS", Ev, Gv, XX },
|
| ... | ... | |
| 554 | 607 |
{ "dec{S|}", RMeSI, XX, XX },
|
| 555 | 608 |
{ "dec{S|}", RMeDI, XX, XX },
|
| 556 | 609 |
/* 50 */ |
| 557 |
{ "pushS", RMrAX, XX, XX },
|
|
| 558 |
{ "pushS", RMrCX, XX, XX },
|
|
| 559 |
{ "pushS", RMrDX, XX, XX },
|
|
| 560 |
{ "pushS", RMrBX, XX, XX },
|
|
| 561 |
{ "pushS", RMrSP, XX, XX },
|
|
| 562 |
{ "pushS", RMrBP, XX, XX },
|
|
| 563 |
{ "pushS", RMrSI, XX, XX },
|
|
| 564 |
{ "pushS", RMrDI, XX, XX },
|
|
| 610 |
{ "pushV", RMrAX, XX, XX },
|
|
| 611 |
{ "pushV", RMrCX, XX, XX },
|
|
| 612 |
{ "pushV", RMrDX, XX, XX },
|
|
| 613 |
{ "pushV", RMrBX, XX, XX },
|
|
| 614 |
{ "pushV", RMrSP, XX, XX },
|
|
| 615 |
{ "pushV", RMrBP, XX, XX },
|
|
| 616 |
{ "pushV", RMrSI, XX, XX },
|
|
| 617 |
{ "pushV", RMrDI, XX, XX },
|
|
| 565 | 618 |
/* 58 */ |
| 566 |
{ "popS", RMrAX, XX, XX },
|
|
| 567 |
{ "popS", RMrCX, XX, XX },
|
|
| 568 |
{ "popS", RMrDX, XX, XX },
|
|
| 569 |
{ "popS", RMrBX, XX, XX },
|
|
| 570 |
{ "popS", RMrSP, XX, XX },
|
|
| 571 |
{ "popS", RMrBP, XX, XX },
|
|
| 572 |
{ "popS", RMrSI, XX, XX },
|
|
| 573 |
{ "popS", RMrDI, XX, XX },
|
|
| 619 |
{ "popV", RMrAX, XX, XX },
|
|
| 620 |
{ "popV", RMrCX, XX, XX },
|
|
| 621 |
{ "popV", RMrDX, XX, XX },
|
|
| 622 |
{ "popV", RMrBX, XX, XX },
|
|
| 623 |
{ "popV", RMrSP, XX, XX },
|
|
| 624 |
{ "popV", RMrBP, XX, XX },
|
|
| 625 |
{ "popV", RMrSI, XX, XX },
|
|
| 626 |
{ "popV", RMrDI, XX, XX },
|
|
| 574 | 627 |
/* 60 */ |
| 575 | 628 |
{ "pusha{P|}", XX, XX, XX },
|
| 576 | 629 |
{ "popa{P|}", XX, XX, XX },
|
| ... | ... | |
| 585 | 638 |
{ "imulS", Gv, Ev, Iv },
|
| 586 | 639 |
{ "pushT", sIb, XX, XX },
|
| 587 | 640 |
{ "imulS", Gv, Ev, sIb },
|
| 588 |
{ "ins{b||b|}", Yb, indirDX, XX },
|
|
| 589 |
{ "ins{R||R|}", Yv, indirDX, XX },
|
|
| 590 |
{ "outs{b||b|}", indirDX, Xb, XX },
|
|
| 591 |
{ "outs{R||R|}", indirDX, Xv, XX },
|
|
| 641 |
{ "ins{b||b|}", Ybr, indirDX, XX },
|
|
| 642 |
{ "ins{R||R|}", Yvr, indirDX, XX },
|
|
| 643 |
{ "outs{b||b|}", indirDXr, Xb, XX },
|
|
| 644 |
{ "outs{R||R|}", indirDXr, Xv, XX },
|
|
| 592 | 645 |
/* 70 */ |
| 593 | 646 |
{ "joH", Jb, XX, cond_jump_flag },
|
| 594 | 647 |
{ "jnoH", Jb, XX, cond_jump_flag },
|
| ... | ... | |
| 621 | 674 |
{ "movS", Ev, Gv, XX },
|
| 622 | 675 |
{ "movB", Gb, Eb, XX },
|
| 623 | 676 |
{ "movS", Gv, Ev, XX },
|
| 624 |
{ "movQ", Ev, Sw, XX },
|
|
| 677 |
{ "movQ", Sv, Sw, XX },
|
|
| 625 | 678 |
{ "leaS", Gv, M, XX },
|
| 626 |
{ "movQ", Sw, Ev, XX },
|
|
| 627 |
{ "popU", Ev, XX, XX },
|
|
| 679 |
{ "movQ", Sw, Sv, XX },
|
|
| 680 |
{ "popU", stackEv, XX, XX },
|
|
| 628 | 681 |
/* 90 */ |
| 629 |
{ "nop", XX, XX, XX },
|
|
| 630 |
/* FIXME: NOP with REPz prefix is called PAUSE. */ |
|
| 682 |
{ "nop", NOP_Fixup, 0, XX, XX },
|
|
| 631 | 683 |
{ "xchgS", RMeCX, eAX, XX },
|
| 632 | 684 |
{ "xchgS", RMeDX, eAX, XX },
|
| 633 | 685 |
{ "xchgS", RMeBX, eAX, XX },
|
| ... | ... | |
| 638 | 690 |
/* 98 */ |
| 639 | 691 |
{ "cW{tR||tR|}", XX, XX, XX },
|
| 640 | 692 |
{ "cR{tO||tO|}", XX, XX, XX },
|
| 641 |
{ "lcall{T|}", Ap, XX, XX },
|
|
| 693 |
{ "Jcall{T|}", Ap, XX, XX },
|
|
| 642 | 694 |
{ "(bad)", XX, XX, XX }, /* fwait */
|
| 643 | 695 |
{ "pushfT", XX, XX, XX },
|
| 644 | 696 |
{ "popfT", XX, XX, XX },
|
| 645 | 697 |
{ "sahf{|}", XX, XX, XX },
|
| 646 | 698 |
{ "lahf{|}", XX, XX, XX },
|
| 647 | 699 |
/* a0 */ |
| 648 |
{ "movB", AL, Ob64, XX },
|
|
| 649 |
{ "movS", eAX, Ov64, XX },
|
|
| 650 |
{ "movB", Ob64, AL, XX },
|
|
| 651 |
{ "movS", Ov64, eAX, XX },
|
|
| 652 |
{ "movs{b||b|}", Yb, Xb, XX },
|
|
| 653 |
{ "movs{R||R|}", Yv, Xv, XX },
|
|
| 700 |
{ "movB", AL, Ob, XX },
|
|
| 701 |
{ "movS", eAX, Ov, XX },
|
|
| 702 |
{ "movB", Ob, AL, XX },
|
|
| 703 |
{ "movS", Ov, eAX, XX },
|
|
| 704 |
{ "movs{b||b|}", Ybr, Xb, XX },
|
|
| 705 |
{ "movs{R||R|}", Yvr, Xv, XX },
|
|
| 654 | 706 |
{ "cmps{b||b|}", Xb, Yb, XX },
|
| 655 | 707 |
{ "cmps{R||R|}", Xv, Yv, XX },
|
| 656 | 708 |
/* a8 */ |
| 657 | 709 |
{ "testB", AL, Ib, XX },
|
| 658 | 710 |
{ "testS", eAX, Iv, XX },
|
| 659 |
{ "stosB", Yb, AL, XX },
|
|
| 660 |
{ "stosS", Yv, eAX, XX },
|
|
| 661 |
{ "lodsB", AL, Xb, XX },
|
|
| 662 |
{ "lodsS", eAX, Xv, XX },
|
|
| 711 |
{ "stosB", Ybr, AL, XX },
|
|
| 712 |
{ "stosS", Yvr, eAX, XX },
|
|
| 713 |
{ "lodsB", ALr, Xb, XX },
|
|
| 714 |
{ "lodsS", eAXr, Xv, XX },
|
|
| 663 | 715 |
{ "scasB", AL, Yb, XX },
|
| 664 | 716 |
{ "scasS", eAX, Yv, XX },
|
| 665 | 717 |
/* b0 */ |
| ... | ... | |
| 728 | 780 |
/* e8 */ |
| 729 | 781 |
{ "callT", Jv, XX, XX },
|
| 730 | 782 |
{ "jmpT", Jv, XX, XX },
|
| 731 |
{ "ljmp{T|}", Ap, XX, XX },
|
|
| 783 |
{ "Jjmp{T|}", Ap, XX, XX },
|
|
| 732 | 784 |
{ "jmp", Jb, XX, XX },
|
| 733 | 785 |
{ "inB", AL, indirDX, XX },
|
| 734 | 786 |
{ "inS", eAX, indirDX, XX },
|
| ... | ... | |
| 736 | 788 |
{ "outS", indirDX, eAX, XX },
|
| 737 | 789 |
/* f0 */ |
| 738 | 790 |
{ "(bad)", XX, XX, XX }, /* lock prefix */
|
| 739 |
{ "(bad)", XX, XX, XX },
|
|
| 791 |
{ "icebp", XX, XX, XX },
|
|
| 740 | 792 |
{ "(bad)", XX, XX, XX }, /* repne */
|
| 741 | 793 |
{ "(bad)", XX, XX, XX }, /* repz */
|
| 742 | 794 |
{ "hlt", XX, XX, XX },
|
| ... | ... | |
| 776 | 828 |
/* 10 */ |
| 777 | 829 |
{ PREGRP8 },
|
| 778 | 830 |
{ PREGRP9 },
|
| 779 |
{ "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
|
|
| 831 |
{ PREGRP30 },
|
|
| 780 | 832 |
{ "movlpX", EX, XM, SIMD_Fixup, 'h' },
|
| 781 | 833 |
{ "unpcklpX", XM, EX, XX },
|
| 782 | 834 |
{ "unpckhpX", XM, EX, XX },
|
| 783 |
{ "movhpX", XM, EX, SIMD_Fixup, 'l' },
|
|
| 835 |
{ PREGRP31 },
|
|
| 784 | 836 |
{ "movhpX", EX, XM, SIMD_Fixup, 'l' },
|
| 785 | 837 |
/* 18 */ |
| 786 | 838 |
{ GRP14 },
|
| ... | ... | |
| 792 | 844 |
{ "(bad)", XX, XX, XX },
|
| 793 | 845 |
{ "(bad)", XX, XX, XX },
|
| 794 | 846 |
/* 20 */ |
| 795 |
{ "movL", Rm, Cm, XX },
|
|
| 796 |
{ "movL", Rm, Dm, XX },
|
|
| 797 |
{ "movL", Cm, Rm, XX },
|
|
| 798 |
{ "movL", Dm, Rm, XX },
|
|
| 847 |
{ "movZ", Rm, Cm, XX },
|
|
| 848 |
{ "movZ", Rm, Dm, XX },
|
|
| 849 |
{ "movZ", Cm, Rm, XX },
|
|
| 850 |
{ "movZ", Dm, Rm, XX },
|
|
| 799 | 851 |
{ "movL", Rd, Td, XX },
|
| 800 | 852 |
{ "(bad)", XX, XX, XX },
|
| 801 | 853 |
{ "movL", Td, Rd, XX },
|
| ... | ... | |
| 819 | 871 |
{ "(bad)", XX, XX, XX },
|
| 820 | 872 |
{ "(bad)", XX, XX, XX },
|
| 821 | 873 |
/* 38 */ |
| 874 |
{ THREE_BYTE_0 },
|
|
| 822 | 875 |
{ "(bad)", XX, XX, XX },
|
| 823 |
{ "(bad)", XX, XX, XX },
|
|
| 824 |
{ "(bad)", XX, XX, XX },
|
|
| 876 |
{ THREE_BYTE_1 },
|
|
| 825 | 877 |
{ "(bad)", XX, XX, XX },
|
| 826 | 878 |
{ "(bad)", XX, XX, XX },
|
| 827 | 879 |
{ "(bad)", XX, XX, XX },
|
| ... | ... | |
| 846 | 898 |
{ "cmovle", Gv, Ev, XX },
|
| 847 | 899 |
{ "cmovg", Gv, Ev, XX },
|
| 848 | 900 |
/* 50 */ |
| 849 |
{ "movmskpX", Gd, XS, XX },
|
|
| 901 |
{ "movmskpX", Gdq, XS, XX },
|
|
| 850 | 902 |
{ PREGRP13 },
|
| 851 | 903 |
{ PREGRP12 },
|
| 852 | 904 |
{ PREGRP11 },
|
| ... | ... | |
| 879 | 931 |
{ "packssdw", MX, EM, XX },
|
| 880 | 932 |
{ PREGRP26 },
|
| 881 | 933 |
{ PREGRP24 },
|
| 882 |
{ "movd", MX, Ed, XX },
|
|
| 934 |
{ "movd", MX, Edq, XX },
|
|
| 883 | 935 |
{ PREGRP19 },
|
| 884 | 936 |
/* 70 */ |
| 885 | 937 |
{ PREGRP22 },
|
| ... | ... | |
| 891 | 943 |
{ "pcmpeqd", MX, EM, XX },
|
| 892 | 944 |
{ "emms", XX, XX, XX },
|
| 893 | 945 |
/* 78 */ |
| 946 |
{ "vmread", Em, Gm, XX },
|
|
| 947 |
{ "vmwrite", Gm, Em, XX },
|
|
| 894 | 948 |
{ "(bad)", XX, XX, XX },
|
| 895 | 949 |
{ "(bad)", XX, XX, XX },
|
| 896 |
{ "(bad)", XX, XX, XX },
|
|
| 897 |
{ "(bad)", XX, XX, XX },
|
|
| 898 |
{ "(bad)", XX, XX, XX },
|
|
| 899 |
{ "(bad)", XX, XX, XX },
|
|
| 950 |
{ PREGRP28 },
|
|
| 951 |
{ PREGRP29 },
|
|
| 900 | 952 |
{ PREGRP23 },
|
| 901 | 953 |
{ PREGRP20 },
|
| 902 | 954 |
/* 80 */ |
| ... | ... | |
| 942 | 994 |
{ "btS", Ev, Gv, XX },
|
| 943 | 995 |
{ "shldS", Ev, Gv, Ib },
|
| 944 | 996 |
{ "shldS", Ev, Gv, CL },
|
| 945 |
{ "(bad)", XX, XX, XX },
|
|
| 946 |
{ "(bad)", XX, XX, XX },
|
|
| 997 |
{ GRPPADLCK2 },
|
|
| 998 |
{ GRPPADLCK1 },
|
|
| 947 | 999 |
/* a8 */ |
| 948 | 1000 |
{ "pushT", gs, XX, XX },
|
| 949 | 1001 |
{ "popT", gs, XX, XX },
|
| ... | ... | |
| 976 | 1028 |
{ "xaddS", Ev, Gv, XX },
|
| 977 | 1029 |
{ PREGRP1 },
|
| 978 | 1030 |
{ "movntiS", Ev, Gv, XX },
|
| 979 |
{ "pinsrw", MX, Ed, Ib },
|
|
| 980 |
{ "pextrw", Gd, MS, Ib },
|
|
| 1031 |
{ "pinsrw", MX, Edqw, Ib },
|
|
| 1032 |
{ "pextrw", Gdq, MS, Ib },
|
|
| 981 | 1033 |
{ "shufpX", XM, EX, Ib },
|
| 982 | 1034 |
{ GRP9 },
|
| 983 | 1035 |
/* c8 */ |
| ... | ... | |
| 990 | 1042 |
{ "bswap", RMeSI, XX, XX },
|
| 991 | 1043 |
{ "bswap", RMeDI, XX, XX },
|
| 992 | 1044 |
/* d0 */ |
| 993 |
{ "(bad)", XX, XX, XX },
|
|
| 1045 |
{ PREGRP27 },
|
|
| 994 | 1046 |
{ "psrlw", MX, EM, XX },
|
| 995 | 1047 |
{ "psrld", MX, EM, XX },
|
| 996 | 1048 |
{ "psrlq", MX, EM, XX },
|
| 997 | 1049 |
{ "paddq", MX, EM, XX },
|
| 998 | 1050 |
{ "pmullw", MX, EM, XX },
|
| 999 | 1051 |
{ PREGRP21 },
|
| 1000 |
{ "pmovmskb", Gd, MS, XX },
|
|
| 1052 |
{ "pmovmskb", Gdq, MS, XX },
|
|
| 1001 | 1053 |
/* d8 */ |
| 1002 | 1054 |
{ "psubusb", MX, EM, XX },
|
| 1003 | 1055 |
{ "psubusw", MX, EM, XX },
|
| ... | ... | |
| 1026 | 1078 |
{ "pmaxsw", MX, EM, XX },
|
| 1027 | 1079 |
{ "pxor", MX, EM, XX },
|
| 1028 | 1080 |
/* f0 */ |
| 1029 |
{ "(bad)", XX, XX, XX },
|
|
| 1081 |
{ PREGRP32 },
|
|
| 1030 | 1082 |
{ "psllw", MX, EM, XX },
|
| 1031 | 1083 |
{ "pslld", MX, EM, XX },
|
| 1032 | 1084 |
{ "psllq", MX, EM, XX },
|
| ... | ... | |
| 1074 | 1126 |
/* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ |
| 1075 | 1127 |
/* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */ |
| 1076 | 1128 |
/* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ |
| 1077 |
/* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
|
|
| 1129 |
/* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
|
|
| 1078 | 1130 |
/* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ |
| 1079 | 1131 |
/* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ |
| 1080 | 1132 |
/* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ |
| 1081 |
/* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
|
|
| 1133 |
/* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
|
|
| 1082 | 1134 |
/* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
| 1083 | 1135 |
/* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ |
| 1084 |
/* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
|
|
| 1136 |
/* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
|
|
| 1085 | 1137 |
/* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */ |
| 1086 | 1138 |
/* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ |
| 1087 |
/* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
|
|
| 1139 |
/* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
|
|
| 1088 | 1140 |
/* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ |
| 1089 |
/* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
|
|
| 1141 |
/* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
|
|
| 1090 | 1142 |
/* ------------------------------- */ |
| 1091 | 1143 |
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ |
| 1092 | 1144 |
}; |
| ... | ... | |
| 1095 | 1147 |
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ |
| 1096 | 1148 |
/* ------------------------------- */ |
| 1097 | 1149 |
/* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
| 1098 |
/* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
|
|
| 1150 |
/* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
|
|
| 1099 | 1151 |
/* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */ |
| 1100 |
/* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
|
|
| 1152 |
/* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
|
|
| 1101 | 1153 |
/* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
| 1102 | 1154 |
/* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ |
| 1103 | 1155 |
/* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ |
| 1104 |
/* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
|
|
| 1156 |
/* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
|
|
| 1105 | 1157 |
/* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
| 1106 | 1158 |
/* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
| 1107 | 1159 |
/* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
| 1108 | 1160 |
/* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
| 1109 | 1161 |
/* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
| 1110 |
/* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
|
|
| 1162 |
/* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
|
|
| 1111 | 1163 |
/* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ |
| 1112 |
/* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
|
|
| 1164 |
/* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
|
|
| 1113 | 1165 |
/* ------------------------------- */ |
| 1114 | 1166 |
/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ |
| 1115 | 1167 |
}; |
| ... | ... | |
| 1249 | 1301 |
}, |
| 1250 | 1302 |
/* GRP2b_one */ |
| 1251 | 1303 |
{
|
| 1252 |
{ "rolA", Eb, XX, XX },
|
|
| 1253 |
{ "rorA", Eb, XX, XX },
|
|
| 1254 |
{ "rclA", Eb, XX, XX },
|
|
| 1255 |
{ "rcrA", Eb, XX, XX },
|
|
| 1256 |
{ "shlA", Eb, XX, XX },
|
|
| 1257 |
{ "shrA", Eb, XX, XX },
|
|
| 1304 |
{ "rolA", Eb, I1, XX },
|
|
| 1305 |
{ "rorA", Eb, I1, XX },
|
|
| 1306 |
{ "rclA", Eb, I1, XX },
|
|
| 1307 |
{ "rcrA", Eb, I1, XX },
|
|
| 1308 |
{ "shlA", Eb, I1, XX },
|
|
| 1309 |
{ "shrA", Eb, I1, XX },
|
|
| 1258 | 1310 |
{ "(bad)", XX, XX, XX },
|
| 1259 |
{ "sarA", Eb, XX, XX },
|
|
| 1311 |
{ "sarA", Eb, I1, XX },
|
|
| 1260 | 1312 |
}, |
| 1261 | 1313 |
/* GRP2S_one */ |
| 1262 | 1314 |
{
|
| 1263 |
{ "rolQ", Ev, XX, XX },
|
|
| 1264 |
{ "rorQ", Ev, XX, XX },
|
|
| 1265 |
{ "rclQ", Ev, XX, XX },
|
|
| 1266 |
{ "rcrQ", Ev, XX, XX },
|
|
| 1267 |
{ "shlQ", Ev, XX, XX },
|
|
| 1268 |
{ "shrQ", Ev, XX, XX },
|
|
| 1315 |
{ "rolQ", Ev, I1, XX },
|
|
| 1316 |
{ "rorQ", Ev, I1, XX },
|
|
| 1317 |
{ "rclQ", Ev, I1, XX },
|
|
| 1318 |
{ "rcrQ", Ev, I1, XX },
|
|
| 1319 |
{ "shlQ", Ev, I1, XX },
|
|
| 1320 |
{ "shrQ", Ev, I1, XX },
|
|
| 1269 | 1321 |
{ "(bad)", XX, XX, XX},
|
| 1270 |
{ "sarQ", Ev, XX, XX },
|
|
| 1322 |
{ "sarQ", Ev, I1, XX },
|
|
| 1271 | 1323 |
}, |
| 1272 | 1324 |
/* GRP2b_cl */ |
| 1273 | 1325 |
{
|
| ... | ... | |
| 1329 | 1381 |
{ "incQ", Ev, XX, XX },
|
| 1330 | 1382 |
{ "decQ", Ev, XX, XX },
|
| 1331 | 1383 |
{ "callT", indirEv, XX, XX },
|
| 1332 |
{ "lcallT", indirEv, XX, XX },
|
|
| 1384 |
{ "JcallT", indirEp, XX, XX },
|
|
| 1333 | 1385 |
{ "jmpT", indirEv, XX, XX },
|
| 1334 |
{ "ljmpT", indirEv, XX, XX },
|
|
| 1335 |
{ "pushU", Ev, XX, XX },
|
|
| 1386 |
{ "JjmpT", indirEp, XX, XX },
|
|
| 1387 |
{ "pushU", stackEv, XX, XX },
|
|
| 1336 | 1388 |
{ "(bad)", XX, XX, XX },
|
| 1337 | 1389 |
}, |
| 1338 | 1390 |
/* GRP6 */ |
| ... | ... | |
| 1348 | 1400 |
}, |
| 1349 | 1401 |
/* GRP7 */ |
| 1350 | 1402 |
{
|
| 1351 |
{ "sgdtQ", M, XX, XX },
|
|
| 1352 |
{ "sidtQ", M, XX, XX },
|
|
| 1353 |
{ "lgdtQ", M, XX, XX },
|
|
| 1354 |
{ "lidtQ", M, XX, XX },
|
|
| 1403 |
{ "sgdtIQ", VMX_Fixup, 0, XX, XX },
|
|
| 1404 |
{ "sidtIQ", PNI_Fixup, 0, XX, XX },
|
|
| 1405 |
{ "lgdt{Q|Q||}", M, XX, XX },
|
|
| 1406 |
{ "lidt{Q|Q||}", SVME_Fixup, 0, XX, XX },
|
|
| 1355 | 1407 |
{ "smswQ", Ev, XX, XX },
|
| 1356 | 1408 |
{ "(bad)", XX, XX, XX },
|
| 1357 | 1409 |
{ "lmsw", Ew, XX, XX },
|
| 1358 |
{ "invlpg", Ew, XX, XX },
|
|
| 1410 |
{ "invlpg", INVLPG_Fixup, w_mode, XX, XX },
|
|
| 1359 | 1411 |
}, |
| 1360 | 1412 |
/* GRP8 */ |
| 1361 | 1413 |
{
|
| ... | ... | |
| 1371 | 1423 |
/* GRP9 */ |
| 1372 | 1424 |
{
|
| 1373 | 1425 |
{ "(bad)", XX, XX, XX },
|
| 1374 |
{ "cmpxchg8b", Ev, XX, XX },
|
|
| 1375 |
{ "(bad)", XX, XX, XX },
|
|
| 1376 |
{ "(bad)", XX, XX, XX },
|
|
| 1426 |
{ "cmpxchg8b", Eq, XX, XX },
|
|
| 1377 | 1427 |
{ "(bad)", XX, XX, XX },
|
| 1378 | 1428 |
{ "(bad)", XX, XX, XX },
|
| 1379 | 1429 |
{ "(bad)", XX, XX, XX },
|
| 1380 | 1430 |
{ "(bad)", XX, XX, XX },
|
| 1431 |
{ "", VM, XX, XX }, /* See OP_VMX. */
|
|
| 1432 |
{ "vmptrst", Eq, XX, XX },
|
|
| 1381 | 1433 |
}, |
| 1382 | 1434 |
/* GRP10 */ |
| 1383 | 1435 |
{
|
| ... | ... | |
| 1419 | 1471 |
{ "ldmxcsr", Ev, XX, XX },
|
| 1420 | 1472 |
{ "stmxcsr", Ev, XX, XX },
|
| 1421 | 1473 |
{ "(bad)", XX, XX, XX },
|
| 1422 |
{ "lfence", None, XX, XX },
|
|
| 1423 |
{ "mfence", None, XX, XX },
|
|
| 1424 |
{ "sfence", None, XX, XX },
|
|
| 1425 |
/* FIXME: the sfence with memory operand is clflush! */ |
|
| 1474 |
{ "lfence", OP_0fae, 0, XX, XX },
|
|
| 1475 |
{ "mfence", OP_0fae, 0, XX, XX },
|
|
| 1476 |
{ "clflush", OP_0fae, 0, XX, XX },
|
|
| 1426 | 1477 |
}, |
| 1427 | 1478 |
/* GRP14 */ |
| 1428 | 1479 |
{
|
| ... | ... | |
| 1445 | 1496 |
{ "(bad)", XX, XX, XX },
|
| 1446 | 1497 |
{ "(bad)", XX, XX, XX },
|
| 1447 | 1498 |
{ "(bad)", XX, XX, XX },
|
| 1499 |
}, |
|
| 1500 |
/* GRPPADLCK1 */ |
|
| 1501 |
{
|
|
| 1502 |
{ "xstore-rng", OP_0f07, 0, XX, XX },
|
|
| 1503 |
{ "xcrypt-ecb", OP_0f07, 0, XX, XX },
|
|
| 1504 |
{ "xcrypt-cbc", OP_0f07, 0, XX, XX },
|
|
| 1505 |
{ "xcrypt-ctr", OP_0f07, 0, XX, XX },
|
|
| 1506 |
{ "xcrypt-cfb", OP_0f07, 0, XX, XX },
|
|
| 1507 |
{ "xcrypt-ofb", OP_0f07, 0, XX, XX },
|
|
| 1508 |
{ "(bad)", OP_0f07, 0, XX, XX },
|
|
| 1509 |
{ "(bad)", OP_0f07, 0, XX, XX },
|
|
| 1510 |
}, |
|
| 1511 |
/* GRPPADLCK2 */ |
|
| 1512 |
{
|
|
| 1513 |
{ "montmul", OP_0f07, 0, XX, XX },
|
|
| 1514 |
{ "xsha1", OP_0f07, 0, XX, XX },
|
|
| 1515 |
{ "xsha256", OP_0f07, 0, XX, XX },
|
|
| 1516 |
{ "(bad)", OP_0f07, 0, XX, XX },
|
|
| 1517 |
{ "(bad)", OP_0f07, 0, XX, XX },
|
|
| 1518 |
{ "(bad)", OP_0f07, 0, XX, XX },
|
|
| 1519 |
{ "(bad)", OP_0f07, 0, XX, XX },
|
|
| 1520 |
{ "(bad)", OP_0f07, 0, XX, XX },
|
|
| 1448 | 1521 |
} |
| 1449 | 1522 |
}; |
| 1450 | 1523 |
|
| ... | ... | |
| 1612 | 1685 |
}, |
| 1613 | 1686 |
/* PREGRP23 */ |
| 1614 | 1687 |
{
|
| 1615 |
{ "movd", Ed, MX, XX },
|
|
| 1688 |
{ "movd", Edq, MX, XX },
|
|
| 1616 | 1689 |
{ "movq", XM, EX, XX },
|
| 1617 |
{ "movd", Ed, XM, XX },
|
|
| 1690 |
{ "movd", Edq, XM, XX },
|
|
| 1618 | 1691 |
{ "(bad)", Ed, XM, XX },
|
| 1619 | 1692 |
}, |
| 1620 | 1693 |
/* PREGRP24 */ |
| ... | ... | |
| 1626 | 1699 |
}, |
| 1627 | 1700 |
/* PREGRP25 */ |
| 1628 | 1701 |
{
|
| 1629 |
{ "movntq", Ev, MX, XX },
|
|
| 1630 |
{ "(bad)", Ev, XM, XX },
|
|
| 1631 |
{ "movntdq", Ev, XM, XX },
|
|
| 1632 |
{ "(bad)", Ev, XM, XX },
|
|
| 1702 |
{ "movntq", EM, MX, XX },
|
|
| 1703 |
{ "(bad)", EM, XM, XX },
|
|
| 1704 |
{ "movntdq", EM, XM, XX },
|
|
| 1705 |
{ "(bad)", EM, XM, XX },
|
|
| 1633 | 1706 |
}, |
| 1634 | 1707 |
/* PREGRP26 */ |
| 1635 | 1708 |
{
|
| ... | ... | |
| 1638 | 1711 |
{ "punpcklqdq", XM, EX, XX },
|
| 1639 | 1712 |
{ "(bad)", XM, EX, XX },
|
| 1640 | 1713 |
}, |
| 1714 |
/* PREGRP27 */ |
|
| 1715 |
{
|
|
| 1716 |
{ "(bad)", MX, EX, XX },
|
|
| 1717 |
{ "(bad)", XM, EX, XX },
|
|
| 1718 |
{ "addsubpd", XM, EX, XX },
|
|
| 1719 |
{ "addsubps", XM, EX, XX },
|
|
| 1720 |
}, |
|
| 1721 |
/* PREGRP28 */ |
|
| 1722 |
{
|
|
| 1723 |
{ "(bad)", MX, EX, XX },
|
|
| 1724 |
{ "(bad)", XM, EX, XX },
|
|
| 1725 |
{ "haddpd", XM, EX, XX },
|
|
| 1726 |
{ "haddps", XM, EX, XX },
|
|
| 1727 |
}, |
|
| 1728 |
/* PREGRP29 */ |
|
| 1729 |
{
|
|
| 1730 |
{ "(bad)", MX, EX, XX },
|
|
| 1731 |
{ "(bad)", XM, EX, XX },
|
|
| 1732 |
{ "hsubpd", XM, EX, XX },
|
|
| 1733 |
{ "hsubps", XM, EX, XX },
|
|
| 1734 |
}, |
|
| 1735 |
/* PREGRP30 */ |
|
| 1736 |
{
|
|
| 1737 |
{ "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
|
|
| 1738 |
{ "movsldup", XM, EX, XX },
|
|
| 1739 |
{ "movlpd", XM, EX, XX },
|
|
| 1740 |
{ "movddup", XM, EX, XX },
|
|
| 1741 |
}, |
|
| 1742 |
/* PREGRP31 */ |
|
| 1743 |
{
|
|
| 1744 |
{ "movhpX", XM, EX, SIMD_Fixup, 'l' },
|
|
| 1745 |
{ "movshdup", XM, EX, XX },
|
|
| 1746 |
{ "movhpd", XM, EX, XX },
|
|
| 1747 |
{ "(bad)", XM, EX, XX },
|
|
| 1748 |
}, |
|
| 1749 |
/* PREGRP32 */ |
|
| 1750 |
{
|
|
| 1751 |
{ "(bad)", XM, EX, XX },
|
|
| 1752 |
{ "(bad)", XM, EX, XX },
|
|
| 1753 |
{ "(bad)", XM, EX, XX },
|
|
| 1754 |
{ "lddqu", XM, M, XX },
|
|
| 1755 |
}, |
|
| 1641 | 1756 |
}; |
| 1642 | 1757 |
|
| 1643 | 1758 |
static const struct dis386 x86_64_table[][2] = {
|
| ... | ... | |
| 1647 | 1762 |
}, |
| 1648 | 1763 |
}; |
| 1649 | 1764 |
|
| 1765 |
static const struct dis386 three_byte_table[][32] = {
|
|
| 1766 |
/* THREE_BYTE_0 */ |
|
| 1767 |
{
|
|
| 1768 |
{ "pshufb", MX, EM, XX },
|
|
| 1769 |
{ "phaddw", MX, EM, XX },
|
|
| 1770 |
{ "phaddd", MX, EM, XX },
|
|
| 1771 |
{ "phaddsw", MX, EM, XX },
|
|
| 1772 |
{ "pmaddubsw", MX, EM, XX },
|
|
| 1773 |
{ "phsubw", MX, EM, XX },
|
|
| 1774 |
{ "phsubd", MX, EM, XX },
|
|
| 1775 |
{ "phsubsw", MX, EM, XX },
|
|
| 1776 |
{ "psignb", MX, EM, XX },
|
|
| 1777 |
{ "psignw", MX, EM, XX },
|
|
| 1778 |
{ "psignd", MX, EM, XX },
|
|
| 1779 |
{ "pmulhrsw", MX, EM, XX },
|
|
| 1780 |
{ "(bad)", XX, XX, XX },
|
|
| 1781 |
{ "(bad)", XX, XX, XX },
|
|
| 1782 |
{ "(bad)", XX, XX, XX },
|
|
| 1783 |
{ "(bad)", XX, XX, XX },
|
|
| 1784 |
{ "(bad)", XX, XX, XX },
|
|
| 1785 |
{ "(bad)", XX, XX, XX },
|
|
| 1786 |
{ "(bad)", XX, XX, XX },
|
|
| 1787 |
{ "(bad)", XX, XX, XX },
|
|
| 1788 |
{ "(bad)", XX, XX, XX },
|
|
| 1789 |
{ "(bad)", XX, XX, XX },
|
|
| 1790 |
{ "(bad)", XX, XX, XX },
|
|
| 1791 |
{ "(bad)", XX, XX, XX },
|
|
| 1792 |
{ "(bad)", XX, XX, XX },
|
|
| 1793 |
{ "(bad)", XX, XX, XX },
|
|
| 1794 |
{ "(bad)", XX, XX, XX },
|
|
| 1795 |
{ "(bad)", XX, XX, XX },
|
|
| 1796 |
{ "pabsb", MX, EM, XX },
|
|
| 1797 |
{ "pabsw", MX, EM, XX },
|
|
| 1798 |
{ "pabsd", MX, EM, XX },
|
|
| 1799 |
{ "(bad)", XX, XX, XX }
|
|
| 1800 |
}, |
|
| 1801 |
/* THREE_BYTE_1 */ |
|
| 1802 |
{
|
|
| 1803 |
{ "(bad)", XX, XX, XX },
|
|
| 1804 |
{ "(bad)", XX, XX, XX },
|
|
| 1805 |
{ "(bad)", XX, XX, XX },
|
|
| 1806 |
{ "(bad)", XX, XX, XX },
|
|
| 1807 |
{ "(bad)", XX, XX, XX },
|
|
| 1808 |
{ "(bad)", XX, XX, XX },
|
|
| 1809 |
{ "(bad)", XX, XX, XX },
|
|
| 1810 |
{ "(bad)", XX, XX, XX },
|
|
| 1811 |
{ "(bad)", XX, XX, XX },
|
|
| 1812 |
{ "(bad)", XX, XX, XX },
|
|
| 1813 |
{ "(bad)", XX, XX, XX },
|
|
| 1814 |
{ "(bad)", XX, XX, XX },
|
|
| 1815 |
{ "(bad)", XX, XX, XX },
|
|
| 1816 |
{ "(bad)", XX, XX, XX },
|
|
| 1817 |
{ "(bad)", XX, XX, XX },
|
|
| 1818 |
{ "palignr", MX, EM, Ib },
|
|
| 1819 |
{ "(bad)", XX, XX, XX },
|
|
| 1820 |
{ "(bad)", XX, XX, XX },
|
|
| 1821 |
{ "(bad)", XX, XX, XX },
|
|
| 1822 |
{ "(bad)", XX, XX, XX },
|
|
| 1823 |
{ "(bad)", XX, XX, XX },
|
|
| 1824 |
{ "(bad)", XX, XX, XX },
|
|
| 1825 |
{ "(bad)", XX, XX, XX },
|
|
| 1826 |
{ "(bad)", XX, XX, XX },
|
|
| 1827 |
{ "(bad)", XX, XX, XX },
|
|
| 1828 |
{ "(bad)", XX, XX, XX },
|
|
| 1829 |
{ "(bad)", XX, XX, XX },
|
|
| 1830 |
{ "(bad)", XX, XX, XX },
|
|
| 1831 |
{ "(bad)", XX, XX, XX },
|
|
| 1832 |
{ "(bad)", XX, XX, XX },
|
|
| 1833 |
{ "(bad)", XX, XX, XX },
|
|
| 1834 |
{ "(bad)", XX, XX, XX }
|
|
| 1835 |
}, |
|
| 1836 |
}; |
|
| 1837 |
|
|
| 1650 | 1838 |
#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
|
| 1651 | 1839 |
|
| 1652 | 1840 |
static void |
| 1653 |
ckprefix () |
|
| 1841 |
ckprefix (void)
|
|
| 1654 | 1842 |
{
|
| 1655 | 1843 |
int newrex; |
| 1656 | 1844 |
rex = 0; |
| ... | ... | |
| 1680 | 1868 |
case 0x4d: |
| 1681 | 1869 |
case 0x4e: |
| 1682 | 1870 |
case 0x4f: |
| 1683 |
if (mode_64bit) |
|
| 1871 |
if (address_mode == mode_64bit)
|
|
| 1684 | 1872 |
newrex = *codep; |
| 1685 | 1873 |
else |
| 1686 | 1874 |
return; |
| ... | ... | |
| 1722 | 1910 |
/* fwait is really an instruction. If there are prefixes |
| 1723 | 1911 |
before the fwait, they belong to the fwait, *not* to the |
| 1724 | 1912 |
following instruction. */ |
| 1725 |
if (prefixes) |
|
| 1913 |
if (prefixes || rex)
|
|
| 1726 | 1914 |
{
|
| 1727 | 1915 |
prefixes |= PREFIX_FWAIT; |
| 1728 | 1916 |
codep++; |
| ... | ... | |
| 1736 | 1924 |
/* Rex is ignored when followed by another prefix. */ |
| 1737 | 1925 |
if (rex) |
| 1738 | 1926 |
{
|
| 1739 |
oappend (prefix_name (rex, 0));
|
|
| 1740 |
oappend (" ");
|
|
| 1927 |
rex_used = rex;
|
|
| 1928 |
return;
|
|
| 1741 | 1929 |
} |
| 1742 | 1930 |
rex = newrex; |
| 1743 | 1931 |
codep++; |
| ... | ... | |
| 1748 | 1936 |
prefix byte. */ |
| 1749 | 1937 |
|
| 1750 | 1938 |
static const char * |
| 1751 |
prefix_name (pref, sizeflag) |
|
| 1752 |
int pref; |
|
| 1753 |
int sizeflag; |
|
| 1939 |
prefix_name (int pref, int sizeflag) |
|
| 1754 | 1940 |
{
|
| 1755 | 1941 |
switch (pref) |
| 1756 | 1942 |
{
|
| ... | ... | |
| 1808 | 1994 |
case 0x66: |
| 1809 | 1995 |
return (sizeflag & DFLAG) ? "data16" : "data32"; |
| 1810 | 1996 |
case 0x67: |
| 1811 |
if (mode_64bit) |
|
| 1812 |
return (sizeflag & AFLAG) ? "addr32" : "addr64";
|
|
| 1997 |
if (address_mode == mode_64bit)
|
|
| 1998 |
return (sizeflag & AFLAG) ? "addr32" : "addr64";
|
|
| 1813 | 1999 |
else |
| 1814 |
return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
|
|
| 2000 |
return (sizeflag & AFLAG) ? "addr16" : "addr32";
|
|
| 1815 | 2001 |
case FWAIT_OPCODE: |
| 1816 | 2002 |
return "fwait"; |
| 1817 | 2003 |
default: |
| ... | ... | |
| 1821 | 2007 |
|
| 1822 | 2008 |
static char op1out[100], op2out[100], op3out[100]; |
| 1823 | 2009 |
static int op_ad, op_index[3]; |
| 2010 |
static int two_source_ops; |
|
| 1824 | 2011 |
static bfd_vma op_address[3]; |
| 1825 | 2012 |
static bfd_vma op_riprel[3]; |
| 1826 | 2013 |
static bfd_vma start_pc; |
| ... | ... | |
| 1834 | 2021 |
* The function returns the length of this instruction in bytes. |
| 1835 | 2022 |
*/ |
| 1836 | 2023 |
|
| 1837 |
static int8_t intel_syntax;
|
|
| 2024 |
static char intel_syntax;
|
|
| 1838 | 2025 |
static char open_char; |
| 1839 | 2026 |
static char close_char; |
| 1840 | 2027 |
static char separator_char; |
| 1841 | 2028 |
static char scale_char; |
| 1842 | 2029 |
|
| 1843 | 2030 |
int |
| 1844 |
print_insn_i386 (pc, info) |
|
| 1845 |
bfd_vma pc; |
|
| 1846 |
disassemble_info *info; |
|
| 2031 |
print_insn_i386 (bfd_vma pc, disassemble_info *info) |
|
| 1847 | 2032 |
{
|
| 1848 | 2033 |
intel_syntax = -1; |
| 1849 | 2034 |
|
| ... | ... | |
| 1851 | 2036 |
} |
| 1852 | 2037 |
|
| 1853 | 2038 |
static int |
| 1854 |
print_insn (pc, info) |
|
| 1855 |
bfd_vma pc; |
|
| 1856 |
disassemble_info *info; |
|
| 2039 |
print_insn (bfd_vma pc, disassemble_info *info) |
|
| 1857 | 2040 |
{
|
| 1858 | 2041 |
const struct dis386 *dp; |
| 1859 | 2042 |
int i; |
| 1860 |
int two_source_ops; |
|
| 1861 | 2043 |
char *first, *second, *third; |
| 1862 | 2044 |
int needcomma; |
| 1863 |
unsigned char uses_SSE_prefix; |
|
| 2045 |
unsigned char uses_SSE_prefix, uses_LOCK_prefix;
|
|
| 1864 | 2046 |
int sizeflag; |
| 1865 | 2047 |
const char *p; |
| 1866 | 2048 |
struct dis_private priv; |
| 1867 | 2049 |
|
| 1868 |
mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax |
|
| 1869 |
|| info->mach == bfd_mach_x86_64); |
|
| 2050 |
if (info->mach == bfd_mach_x86_64_intel_syntax |
|
| 2051 |
|| info->mach == bfd_mach_x86_64) |
|
| 2052 |
address_mode = mode_64bit; |
|
| 2053 |
else |
|
| 2054 |
address_mode = mode_32bit; |
|
| 1870 | 2055 |
|
| 1871 |
if (intel_syntax == -1) |
|
| 2056 |
if (intel_syntax == (char) -1)
|
|
| 1872 | 2057 |
intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax |
| 1873 | 2058 |
|| info->mach == bfd_mach_x86_64_intel_syntax); |
| 1874 | 2059 |
|
| ... | ... | |
| 1886 | 2071 |
{
|
| 1887 | 2072 |
if (strncmp (p, "x86-64", 6) == 0) |
| 1888 | 2073 |
{
|
| 1889 |
mode_64bit = 1;
|
|
| 2074 |
address_mode = mode_64bit;
|
|
| 1890 | 2075 |
priv.orig_sizeflag = AFLAG | DFLAG; |
| 1891 | 2076 |
} |
| 1892 | 2077 |
else if (strncmp (p, "i386", 4) == 0) |
| 1893 | 2078 |
{
|
| 1894 |
mode_64bit = 0;
|
|
| 2079 |
address_mode = mode_32bit;
|
|
| 1895 | 2080 |
priv.orig_sizeflag = AFLAG | DFLAG; |
| 1896 | 2081 |
} |
| 1897 | 2082 |
else if (strncmp (p, "i8086", 5) == 0) |
| 1898 | 2083 |
{
|
| 1899 |
mode_64bit = 0;
|
|
| 2084 |
address_mode = mode_16bit;
|
|
| 1900 | 2085 |
priv.orig_sizeflag = 0; |
| 1901 | 2086 |
} |
| 1902 | 2087 |
else if (strncmp (p, "intel", 5) == 0) |
| ... | ... | |
| 1962 | 2147 |
puts most long word instructions on a single line. */ |
| 1963 | 2148 |
info->bytes_per_line = 7; |
| 1964 | 2149 |
|
| 1965 |
info->private_data = (PTR) &priv;
|
|
| 2150 |
info->private_data = &priv; |
|
| 1966 | 2151 |
priv.max_fetched = priv.the_buffer; |
| 1967 | 2152 |
priv.insn_start = pc; |
| 1968 | 2153 |
|
| ... | ... | |
| 2012 | 2197 |
FETCH_DATA (info, codep + 1); |
| 2013 | 2198 |
two_source_ops = (*codep == 0x62) || (*codep == 0xc8); |
| 2014 | 2199 |
|
| 2015 |
if ((prefixes & PREFIX_FWAIT) |
|
| 2016 |
&& ((*codep < 0xd8) || (*codep > 0xdf))) |
|
| 2200 |
if (((prefixes & PREFIX_FWAIT) |
|
| 2201 |
&& ((*codep < 0xd8) || (*codep > 0xdf))) |
|
| 2202 |
|| (rex && rex_used)) |
|
| 2017 | 2203 |
{
|
| 2018 | 2204 |
const char *name; |
| 2019 | 2205 |
|
| 2020 |
/* fwait not followed by floating point instruction. Print the
|
|
| 2021 |
first prefix, which is probably fwait itself. */
|
|
| 2206 |
/* fwait not followed by floating point instruction, or rex followed
|
|
| 2207 |
by other prefixes. Print the first prefix. */
|
|
| 2022 | 2208 |
name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); |
| 2023 | 2209 |
if (name == NULL) |
| 2024 | 2210 |
name = INTERNAL_DISASSEMBLER_ERROR; |
| ... | ... | |
| 2032 | 2218 |
dp = &dis386_twobyte[*++codep]; |
| 2033 | 2219 |
need_modrm = twobyte_has_modrm[*codep]; |
| 2034 | 2220 |
uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep]; |
| 2221 |
uses_LOCK_prefix = (*codep & ~0x02) == 0x20; |
|
| 2035 | 2222 |
} |
| 2036 | 2223 |
else |
| 2037 | 2224 |
{
|
| 2038 | 2225 |
dp = &dis386[*codep]; |
| 2039 | 2226 |
need_modrm = onebyte_has_modrm[*codep]; |
| 2040 | 2227 |
uses_SSE_prefix = 0; |
| 2228 |
uses_LOCK_prefix = 0; |
|
| 2041 | 2229 |
} |
| 2042 | 2230 |
codep++; |
| 2043 | 2231 |
|
| ... | ... | |
| 2051 | 2239 |
oappend ("repnz ");
|
| 2052 | 2240 |
used_prefixes |= PREFIX_REPNZ; |
| 2053 | 2241 |
} |
| 2054 |
if (prefixes & PREFIX_LOCK)
|
|
| 2242 |
if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
|
|
| 2055 | 2243 |
{
|
| 2056 | 2244 |
oappend ("lock ");
|
| 2057 | 2245 |
used_prefixes |= PREFIX_LOCK; |
| ... | ... | |
| 2062 | 2250 |
sizeflag ^= AFLAG; |
| 2063 | 2251 |
if (dp->bytemode3 != loop_jcxz_mode || intel_syntax) |
| 2064 | 2252 |
{
|
| 2065 |
if ((sizeflag & AFLAG) || mode_64bit) |
|
| 2253 |
if ((sizeflag & AFLAG) || address_mode == mode_64bit)
|
|
| 2066 | 2254 |
oappend ("addr32 ");
|
| 2067 | 2255 |
else |
| 2068 | 2256 |
oappend ("addr16 ");
|
| ... | ... | |
| 2085 | 2273 |
} |
| 2086 | 2274 |
} |
| 2087 | 2275 |
|
| 2088 |
if (need_modrm) |
|
| 2276 |
if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE) |
|
| 2277 |
{
|
|
| 2278 |
FETCH_DATA (info, codep + 2); |
|
| 2279 |
dp = &three_byte_table[dp->bytemode2][*codep++]; |
|
| 2280 |
mod = (*codep >> 6) & 3; |
|
| 2281 |
reg = (*codep >> 3) & 7; |
|
| 2282 |
rm = *codep & 7; |
|
| 2283 |
} |
|
| 2284 |
else if (need_modrm) |
|
| 2089 | 2285 |
{
|
| 2090 | 2286 |
FETCH_DATA (info, codep + 1); |
| 2091 | 2287 |
mod = (*codep >> 6) & 3; |
| ... | ... | |
| 2129 | 2325 |
break; |
| 2130 | 2326 |
|
| 2131 | 2327 |
case X86_64_SPECIAL: |
| 2132 |
dp = &x86_64_table[dp->bytemode2][mode_64bit]; |
|
| 2328 |
index = address_mode == mode_64bit ? 1 : 0; |
|
| 2329 |
dp = &x86_64_table[dp->bytemode2][index]; |
|
| 2133 | 2330 |
break; |
| 2134 | 2331 |
|
| 2135 | 2332 |
default: |
| ... | ... | |
| 2251 | 2448 |
"fsubr{s||s|}",
|
| 2252 | 2449 |
"fdiv{s||s|}",
|
| 2253 | 2450 |
"fdivr{s||s|}",
|
| 2254 |
/* d9 */
|
|
| 2451 |
/* d9 */ |
|
| 2255 | 2452 |
"fld{s||s|}",
|
| 2256 | 2453 |
"(bad)", |
| 2257 | 2454 |
"fst{s||s|}",
|
| 2258 | 2455 |
"fstp{s||s|}",
|
| 2259 |
"fldenv", |
|
| 2456 |
"fldenvIC",
|
|
| 2260 | 2457 |
"fldcw", |
| 2261 |
"fNstenv", |
|
| 2458 |
"fNstenvIC",
|
|
| 2262 | 2459 |
"fNstcw", |
| 2263 | 2460 |
/* da */ |
| 2264 | 2461 |
"fiadd{l||l|}",
|
| ... | ... | |
| 2271 | 2468 |
"fidivr{l||l|}",
|
| 2272 | 2469 |
/* db */ |
| 2273 | 2470 |
"fild{l||l|}",
|
| 2274 |
"(bad)",
|
|
| 2471 |
"fisttp{l||l|}",
|
|
| 2275 | 2472 |
"fist{l||l|}",
|
| 2276 | 2473 |
"fistp{l||l|}",
|
| 2277 | 2474 |
"(bad)", |
| ... | ... | |
| 2289 | 2486 |
"fdivr{l||l|}",
|
| 2290 | 2487 |
/* dd */ |
| 2291 | 2488 |
"fld{l||l|}",
|
| 2292 |
"(bad)",
|
|
| 2489 |
"fisttp{ll||ll|}",
|
|
| 2293 | 2490 |
"fst{l||l|}",
|
| 2294 | 2491 |
"fstp{l||l|}",
|
| 2295 |
"frstor", |
|
| 2492 |
"frstorIC",
|
|
| 2296 | 2493 |
"(bad)", |
| 2297 |
"fNsave", |
|
| 2494 |
"fNsaveIC",
|
|
| 2298 | 2495 |
"fNstsw", |
| 2299 | 2496 |
/* de */ |
| 2300 | 2497 |
"fiadd", |
| ... | ... | |
| 2307 | 2504 |
"fidivr", |
| 2308 | 2505 |
/* df */ |
| 2309 | 2506 |
"fild", |
| 2310 |
"(bad)",
|
|
| 2507 |
"fisttp",
|
|
| 2311 | 2508 |
"fist", |
| 2312 | 2509 |
"fistp", |
| 2313 | 2510 |
"fbld", |
| 2314 | 2511 |
"fild{ll||ll|}",
|
| 2315 | 2512 |
"fbstp", |
| 2316 |
"fistpll", |
|
| 2513 |
"fistp{ll||ll|}",
|
|
| 2514 |
}; |
|
| 2515 |
|
|
| 2516 |
static const unsigned char float_mem_mode[] = {
|
|
| 2517 |
/* d8 */ |
|
| 2518 |
d_mode, |
|
| 2519 |
d_mode, |
|
| 2520 |
d_mode, |
|
| 2521 |
d_mode, |
|
| 2522 |
d_mode, |
|
| 2523 |
d_mode, |
|
| 2524 |
d_mode, |
|
| 2525 |
d_mode, |
|
| 2526 |
/* d9 */ |
|
| 2527 |
d_mode, |
|
| 2528 |
0, |
|
| 2529 |
d_mode, |
|
| 2530 |
d_mode, |
|
| 2531 |
0, |
|
| 2532 |
w_mode, |
|
| 2533 |
0, |
|
| 2534 |
w_mode, |
|
| 2535 |
/* da */ |
|
| 2536 |
d_mode, |
|
| 2537 |
d_mode, |
|
| 2538 |
d_mode, |
|
| 2539 |
d_mode, |
|
| 2540 |
d_mode, |
|
| 2541 |
d_mode, |
|
| 2542 |
d_mode, |
|
| 2543 |
d_mode, |
|
| 2544 |
/* db */ |
|
| 2545 |
d_mode, |
|
| 2546 |
d_mode, |
|
| 2547 |
d_mode, |
|
| 2548 |
d_mode, |
|
| 2549 |
0, |
|
| 2550 |
t_mode, |
|
| 2551 |
0, |
|
| 2552 |
t_mode, |
|
| 2553 |
/* dc */ |
|
| 2554 |
q_mode, |
|
| 2555 |
q_mode, |
|
| 2556 |
q_mode, |
|
| 2557 |
q_mode, |
|
| 2558 |
q_mode, |
|
| 2559 |
q_mode, |
|
| 2560 |
q_mode, |
|
| 2561 |
q_mode, |
|
| 2562 |
/* dd */ |
|
| 2563 |
q_mode, |
|
| 2564 |
q_mode, |
|
| 2565 |
q_mode, |
|
| 2566 |
q_mode, |
|
| 2567 |
0, |
|
| 2568 |
0, |
|
| 2569 |
0, |
|
| 2570 |
w_mode, |
|
| 2571 |
/* de */ |
|
| 2572 |
w_mode, |
|
| 2573 |
w_mode, |
|
| 2574 |
w_mode, |
|
| 2575 |
w_mode, |
|
| 2576 |
w_mode, |
|
| 2577 |
w_mode, |
|
| 2578 |
w_mode, |
|
| 2579 |
w_mode, |
|
| 2580 |
/* df */ |
|
| 2581 |
w_mode, |
|
| 2582 |
w_mode, |
|
| 2583 |
w_mode, |
|
| 2584 |
w_mode, |
|
| 2585 |
t_mode, |
|
| 2586 |
q_mode, |
|
| 2587 |
t_mode, |
|
| 2588 |
q_mode |
|
| 2317 | 2589 |
}; |
| 2318 | 2590 |
|
| 2319 | 2591 |
#define ST OP_ST, 0 |
| ... | ... | |
| 2483 | 2755 |
}; |
| 2484 | 2756 |
|
| 2485 | 2757 |
static void |
| 2486 |
dofloat (sizeflag) |
|
| 2487 |
int sizeflag; |
|
| 2758 |
dofloat (int sizeflag) |
|
| 2488 | 2759 |
{
|
| 2489 | 2760 |
const struct dis386 *dp; |
| 2490 | 2761 |
unsigned char floatop; |
| ... | ... | |
| 2493 | 2764 |
|
| 2494 | 2765 |
if (mod != 3) |
| 2495 | 2766 |
{
|
| 2496 |
putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag); |
|
| 2767 |
int fp_indx = (floatop - 0xd8) * 8 + reg; |
|
| 2768 |
|
|
| 2769 |
putop (float_mem[fp_indx], sizeflag); |
|
| 2497 | 2770 |
obufp = op1out; |
| 2498 |
if (floatop == 0xdb) |
|
| 2499 |
OP_E (x_mode, sizeflag); |
|
| 2500 |
else if (floatop == 0xdd) |
|
| 2501 |
OP_E (d_mode, sizeflag); |
|
| 2502 |
else |
|
| 2503 |
OP_E (v_mode, sizeflag); |
|
| 2771 |
op_ad = 2; |
|
| 2772 |
OP_E (float_mem_mode[fp_indx], sizeflag); |
|
| 2504 | 2773 |
return; |
| 2505 | 2774 |
} |
| 2506 | 2775 |
/* Skip mod/rm byte. */ |
| ... | ... | |
| 2521 | 2790 |
putop (dp->name, sizeflag); |
| 2522 | 2791 |
|
| 2523 | 2792 |
obufp = op1out; |
| 2793 |
op_ad = 2; |
|
| 2524 | 2794 |
if (dp->op1) |
| 2525 | 2795 |
(*dp->op1) (dp->bytemode1, sizeflag); |
| 2796 |
|
|
| 2526 | 2797 |
obufp = op2out; |
| 2798 |
op_ad = 1; |
|
| 2527 | 2799 |
if (dp->op2) |
| 2528 | 2800 |
(*dp->op2) (dp->bytemode2, sizeflag); |
| 2529 | 2801 |
} |
| 2530 | 2802 |
} |
| 2531 | 2803 |
|
| 2532 | 2804 |
static void |
| 2533 |
OP_ST (bytemode, sizeflag) |
|
| 2534 |
int bytemode; |
|
| 2535 |
int sizeflag; |
|
| 2805 |
OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
|
| 2536 | 2806 |
{
|
| 2537 |
oappend ("%st");
|
|
| 2807 |
oappend ("%st" + intel_syntax);
|
|
| 2538 | 2808 |
} |
| 2539 | 2809 |
|
| 2540 | 2810 |
static void |
| 2541 |
OP_STi (bytemode, sizeflag) |
|
| 2542 |
int bytemode; |
|
| 2543 |
int sizeflag; |
|
| 2811 |
OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
|
| 2544 | 2812 |
{
|
| 2545 | 2813 |
snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", rm); |
| 2546 | 2814 |
oappend (scratchbuf + intel_syntax); |
| ... | ... | |
| 2548 | 2816 |
|
| 2549 | 2817 |
/* Capital letters in template are macros. */ |
| 2550 | 2818 |
static int |
| 2551 |
putop (template, sizeflag) |
|
| 2552 |
const char *template; |
|
| 2553 |
int sizeflag; |
|
| 2819 |
putop (const char *template, int sizeflag) |
|
| 2554 | 2820 |
{
|
| 2555 | 2821 |
const char *p; |
| 2556 |
int alt; |
|
| 2822 |
int alt = 0;
|
|
| 2557 | 2823 |
|
| 2558 | 2824 |
for (p = template; *p; p++) |
| 2559 | 2825 |
{
|
| ... | ... | |
| 2566 | 2832 |
alt = 0; |
| 2567 | 2833 |
if (intel_syntax) |
| 2568 | 2834 |
alt += 1; |
| 2569 |
if (mode_64bit) |
|
| 2835 |
if (address_mode == mode_64bit)
|
|
| 2570 | 2836 |
alt += 2; |
| 2571 | 2837 |
while (alt != 0) |
| 2572 | 2838 |
{
|
| ... | ... | |
| 2584 | 2850 |
} |
| 2585 | 2851 |
alt--; |
| 2586 | 2852 |
} |
| 2587 |
break; |
|
| 2853 |
/* Fall through. */ |
|
| 2854 |
case 'I': |
|
| 2855 |
alt = 1; |
|
| 2856 |
continue; |
|
| 2588 | 2857 |
case '|': |
| 2589 | 2858 |
while (*++p != '}') |
| 2590 | 2859 |
{
|
| ... | ... | |
| 2595 | 2864 |
case '}': |
| 2596 | 2865 |
break; |
| 2597 | 2866 |
case 'A': |
| 2598 |
if (intel_syntax)
|
|
| 2599 |
break;
|
|
| 2867 |
if (intel_syntax)
|
|
| 2868 |
break;
|
|
| 2600 | 2869 |
if (mod != 3 || (sizeflag & SUFFIX_ALWAYS)) |
| 2601 | 2870 |
*obufp++ = 'b'; |
| 2602 | 2871 |
break; |
| 2603 | 2872 |
case 'B': |
| 2604 |
if (intel_syntax)
|
|
| 2605 |
break;
|
|
| 2873 |
if (intel_syntax)
|
|
| 2874 |
break;
|
|
| 2606 | 2875 |
if (sizeflag & SUFFIX_ALWAYS) |
Also available in: Unified diff