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1 | 79638566 | bellard | /*
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2 | 79638566 | bellard | * dyngen defines for micro operation code
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3 | 79638566 | bellard | *
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4 | 79638566 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 79638566 | bellard | *
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6 | 79638566 | bellard | * This library is free software; you can redistribute it and/or
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7 | 79638566 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 79638566 | bellard | * License as published by the Free Software Foundation; either
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9 | 79638566 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 79638566 | bellard | *
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11 | 79638566 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 79638566 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 79638566 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 79638566 | bellard | * Lesser General Public License for more details.
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15 | 79638566 | bellard | *
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16 | 79638566 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 79638566 | bellard | * License along with this library; if not, write to the Free Software
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18 | 79638566 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 79638566 | bellard | */
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20 | 79638566 | bellard | typedef unsigned char uint8_t; |
21 | 79638566 | bellard | typedef unsigned short uint16_t; |
22 | 79638566 | bellard | typedef unsigned int uint32_t; |
23 | 79638566 | bellard | typedef unsigned long long uint64_t; |
24 | 79638566 | bellard | |
25 | 79638566 | bellard | typedef signed char int8_t; |
26 | 79638566 | bellard | typedef signed short int16_t; |
27 | 79638566 | bellard | typedef signed int int32_t; |
28 | 79638566 | bellard | typedef signed long long int64_t; |
29 | 79638566 | bellard | |
30 | 79638566 | bellard | #define bswap32(x) \
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31 | 79638566 | bellard | ({ \ |
32 | 79638566 | bellard | uint32_t __x = (x); \ |
33 | 79638566 | bellard | ((uint32_t)( \ |
34 | 79638566 | bellard | (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \ |
35 | 79638566 | bellard | (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \ |
36 | 79638566 | bellard | (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \ |
37 | 79638566 | bellard | (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) )); \ |
38 | 79638566 | bellard | }) |
39 | 79638566 | bellard | |
40 | 79638566 | bellard | typedef struct FILE FILE; |
41 | 79638566 | bellard | extern int fprintf(FILE *, const char *, ...); |
42 | 79638566 | bellard | extern int printf(const char *, ...); |
43 | 79638566 | bellard | #define NULL 0 |
44 | 79638566 | bellard | #include <fenv.h> |
45 | 79638566 | bellard | |
46 | 79638566 | bellard | #ifdef __i386__
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47 | 79638566 | bellard | #define AREG0 "ebp" |
48 | 79638566 | bellard | #define AREG1 "ebx" |
49 | 79638566 | bellard | #define AREG2 "esi" |
50 | 79638566 | bellard | #define AREG3 "edi" |
51 | 79638566 | bellard | #endif
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52 | 79638566 | bellard | #ifdef __powerpc__
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53 | 79638566 | bellard | #define AREG0 "r27" |
54 | 79638566 | bellard | #define AREG1 "r24" |
55 | 79638566 | bellard | #define AREG2 "r25" |
56 | 79638566 | bellard | #define AREG3 "r26" |
57 | 79638566 | bellard | #define AREG4 "r16" |
58 | 79638566 | bellard | #define AREG5 "r17" |
59 | 79638566 | bellard | #define AREG6 "r18" |
60 | 79638566 | bellard | #define AREG7 "r19" |
61 | 79638566 | bellard | #define AREG8 "r20" |
62 | 79638566 | bellard | #define AREG9 "r21" |
63 | 79638566 | bellard | #define AREG10 "r22" |
64 | 79638566 | bellard | #define AREG11 "r23" |
65 | 79638566 | bellard | #define USE_INT_TO_FLOAT_HELPERS
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66 | 79638566 | bellard | #define BUGGY_GCC_DIV64
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67 | 79638566 | bellard | #endif
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68 | 79638566 | bellard | #ifdef __arm__
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69 | 79638566 | bellard | #define AREG0 "r7" |
70 | 79638566 | bellard | #define AREG1 "r4" |
71 | 79638566 | bellard | #define AREG2 "r5" |
72 | 79638566 | bellard | #define AREG3 "r6" |
73 | 79638566 | bellard | #endif
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74 | 79638566 | bellard | #ifdef __mips__
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75 | 79638566 | bellard | #define AREG0 "s3" |
76 | 79638566 | bellard | #define AREG1 "s0" |
77 | 79638566 | bellard | #define AREG2 "s1" |
78 | 79638566 | bellard | #define AREG3 "s2" |
79 | 79638566 | bellard | #endif
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80 | 79638566 | bellard | #ifdef __sparc__
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81 | 79638566 | bellard | #define AREG0 "g6" |
82 | 79638566 | bellard | #define AREG1 "g1" |
83 | 79638566 | bellard | #define AREG2 "g2" |
84 | 79638566 | bellard | #define AREG3 "g3" |
85 | 79638566 | bellard | #define AREG4 "l0" |
86 | 79638566 | bellard | #define AREG5 "l1" |
87 | 79638566 | bellard | #define AREG6 "l2" |
88 | 79638566 | bellard | #define AREG7 "l3" |
89 | 79638566 | bellard | #define AREG8 "l4" |
90 | 79638566 | bellard | #define AREG9 "l5" |
91 | 79638566 | bellard | #define AREG10 "l6" |
92 | 79638566 | bellard | #define AREG11 "l7" |
93 | 79638566 | bellard | #define USE_FP_CONVERT
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94 | 79638566 | bellard | #endif
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95 | 79638566 | bellard | #ifdef __s390__
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96 | 79638566 | bellard | #define AREG0 "r10" |
97 | 79638566 | bellard | #define AREG1 "r7" |
98 | 79638566 | bellard | #define AREG2 "r8" |
99 | 79638566 | bellard | #define AREG3 "r9" |
100 | 79638566 | bellard | #endif
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101 | 79638566 | bellard | #ifdef __alpha__
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102 | 79638566 | bellard | /* Note $15 is the frame pointer, so anything in op-i386.c that would
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103 | 79638566 | bellard | require a frame pointer, like alloca, would probably loose. */
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104 | 79638566 | bellard | #define AREG0 "$15" |
105 | 79638566 | bellard | #define AREG1 "$9" |
106 | 79638566 | bellard | #define AREG2 "$10" |
107 | 79638566 | bellard | #define AREG3 "$11" |
108 | 79638566 | bellard | #define AREG4 "$12" |
109 | 79638566 | bellard | #define AREG5 "$13" |
110 | 79638566 | bellard | #define AREG6 "$14" |
111 | 79638566 | bellard | #endif
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112 | 38e584a0 | bellard | #ifdef __mc68000
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113 | 38e584a0 | bellard | #define AREG0 "%a5" |
114 | 38e584a0 | bellard | #define AREG1 "%a4" |
115 | 38e584a0 | bellard | #define AREG2 "%d7" |
116 | 38e584a0 | bellard | #define AREG3 "%d6" |
117 | 38e584a0 | bellard | #define AREG4 "%d5" |
118 | 38e584a0 | bellard | #endif
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119 | 79638566 | bellard | #ifdef __ia64__
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120 | 79638566 | bellard | #define AREG0 "r27" |
121 | 79638566 | bellard | #define AREG1 "r24" |
122 | 79638566 | bellard | #define AREG2 "r25" |
123 | 79638566 | bellard | #define AREG3 "r26" |
124 | 79638566 | bellard | #endif
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125 | 79638566 | bellard | |
126 | 79638566 | bellard | /* force GCC to generate only one epilog at the end of the function */
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127 | 79638566 | bellard | #define FORCE_RET() asm volatile (""); |
128 | 79638566 | bellard | |
129 | 79638566 | bellard | #ifndef OPPROTO
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130 | 79638566 | bellard | #define OPPROTO
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131 | 79638566 | bellard | #endif
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132 | 79638566 | bellard | |
133 | 79638566 | bellard | #define xglue(x, y) x ## y |
134 | 79638566 | bellard | #define glue(x, y) xglue(x, y)
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135 | 9621339d | bellard | #define stringify(s) tostring(s)
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136 | 9621339d | bellard | #define tostring(s) #s |
137 | 79638566 | bellard | |
138 | 79638566 | bellard | #ifdef __alpha__
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139 | 79638566 | bellard | /* the symbols are considered non exported so a br immediate is generated */
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140 | 79638566 | bellard | #define __hidden __attribute__((visibility("hidden"))) |
141 | 79638566 | bellard | #else
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142 | 79638566 | bellard | #define __hidden
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143 | 79638566 | bellard | #endif
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144 | 79638566 | bellard | |
145 | 79638566 | bellard | #ifdef __alpha__
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146 | 79638566 | bellard | /* Suggested by Richard Henderson. This will result in code like
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147 | 79638566 | bellard | ldah $0,__op_param1($29) !gprelhigh
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148 | 79638566 | bellard | lda $0,__op_param1($0) !gprellow
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149 | 79638566 | bellard | We can then conveniently change $29 to $31 and adapt the offsets to
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150 | 79638566 | bellard | emit the appropriate constant. */
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151 | 79638566 | bellard | extern int __op_param1 __hidden; |
152 | 79638566 | bellard | extern int __op_param2 __hidden; |
153 | 79638566 | bellard | extern int __op_param3 __hidden; |
154 | 79638566 | bellard | #define PARAM1 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param1)); _r; }) |
155 | 79638566 | bellard | #define PARAM2 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param2)); _r; }) |
156 | 79638566 | bellard | #define PARAM3 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param3)); _r; }) |
157 | 79638566 | bellard | #else
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158 | 79638566 | bellard | extern int __op_param1, __op_param2, __op_param3; |
159 | 79638566 | bellard | #define PARAM1 ((long)(&__op_param1)) |
160 | 79638566 | bellard | #define PARAM2 ((long)(&__op_param2)) |
161 | 79638566 | bellard | #define PARAM3 ((long)(&__op_param3)) |
162 | 79638566 | bellard | #endif
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163 | 79638566 | bellard | |
164 | c106152d | bellard | extern int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3; |
165 | 9621339d | bellard | |
166 | 9621339d | bellard | #ifdef __i386__
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167 | 9621339d | bellard | #define EXIT_TB() asm volatile ("ret") |
168 | 9621339d | bellard | #endif
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169 | 9621339d | bellard | #ifdef __powerpc__
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170 | 9621339d | bellard | #define EXIT_TB() asm volatile ("blr") |
171 | 9621339d | bellard | #endif
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172 | 9621339d | bellard | #ifdef __s390__
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173 | 9621339d | bellard | #define EXIT_TB() asm volatile ("br %r14") |
174 | 9621339d | bellard | #endif
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175 | 9621339d | bellard | #ifdef __alpha__
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176 | 9621339d | bellard | #define EXIT_TB() asm volatile ("ret") |
177 | 9621339d | bellard | #endif
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178 | 9621339d | bellard | #ifdef __ia64__
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179 | 9621339d | bellard | #define EXIT_TB() asm volatile ("br.ret.sptk.many b0;;") |
180 | 9621339d | bellard | #endif
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181 | 9621339d | bellard | #ifdef __sparc__
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182 | a96fc003 | bellard | #define EXIT_TB() asm volatile ("jmpl %i0 + 8, %g0\n" \ |
183 | 9621339d | bellard | "nop")
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184 | 9621339d | bellard | #endif
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185 | 9621339d | bellard | #ifdef __arm__
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186 | 9621339d | bellard | #define EXIT_TB() asm volatile ("b exec_loop") |
187 | 9621339d | bellard | #endif
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188 | 38e584a0 | bellard | #ifdef __mc68000
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189 | 38e584a0 | bellard | #define EXIT_TB() asm volatile ("rts") |
190 | 38e584a0 | bellard | #endif |