Revision c5d04e99 target-sparc/translate.c

b/target-sparc/translate.c
2511 2511 
                        CHECK_FPU_FEATURE(dc, FLOAT128);
2512 2512 
                        gen_op_load_fpr_QT1(QFPREG(rs2));
2513 2513 
                        gen_clear_float_exceptions();
2514 
                        tcg_gen_helper_0_0(helper_fqtos);
2514 
                        tcg_gen_helper_1_0(helper_fqtos, cpu_tmp32);
2515 2515 
                        tcg_gen_helper_0_0(helper_check_ieee_exceptions);
2516 
                        gen_op_store_FT0_fpr(rd);
2516 
                        tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
2517 2517 
                        break;
2518 2518 
                    case 0xc8:
2519 2519 
                        gen_op_load_fpr_FT1(rs2);
......
2535 2535 
                        break;
2536 2536 
                    case 0xcc: /* fitoq */
2537 2537 
                        CHECK_FPU_FEATURE(dc, FLOAT128);
2538 
                        gen_op_load_fpr_FT1(rs2);
2539 
                        tcg_gen_helper_0_0(helper_fitoq);
2538 
                        tcg_gen_helper_0_1(helper_fitoq, cpu_fpr[rs2]);
2540 2539 
                        gen_op_store_QT0_fpr(QFPREG(rd));
2541 2540 
                        break;
2542 2541 
                    case 0xcd: /* fstoq */
2543 2542 
                        CHECK_FPU_FEATURE(dc, FLOAT128);
2544 
                        gen_op_load_fpr_FT1(rs2);
2545 
                        tcg_gen_helper_0_0(helper_fstoq);
2543 
                        tcg_gen_helper_0_1(helper_fstoq, cpu_fpr[rs2]);
2546 2544 
                        gen_op_store_QT0_fpr(QFPREG(rd));
2547 2545 
                        break;
2548 2546 
                    case 0xce: /* fdtoq */
......
2569 2567 
                        CHECK_FPU_FEATURE(dc, FLOAT128);
2570 2568 
                        gen_op_load_fpr_QT1(QFPREG(rs2));
2571 2569 
                        gen_clear_float_exceptions();
2572 
                        tcg_gen_helper_0_0(helper_fqtoi);
2570 
                        tcg_gen_helper_1_0(helper_fqtoi, cpu_tmp32);
2573 2571 
                        tcg_gen_helper_0_0(helper_check_ieee_exceptions);
2574 
                        gen_op_store_FT0_fpr(rd);
2572 
                        tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32);
2575 2573 
                        break;
2576 2574 
#ifdef TARGET_SPARC64
2577 2575 
                    case 0x2: /* V9 fmovd */

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