root / hw / shix.c @ c5d6edc3
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1 | 27c7ca7e | bellard | /*
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2 | 27c7ca7e | bellard | * SHIX 2.0 board description
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3 | 27c7ca7e | bellard | *
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4 | 27c7ca7e | bellard | * Copyright (c) 2005 Samuel Tardieu
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5 | 27c7ca7e | bellard | *
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6 | 27c7ca7e | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 27c7ca7e | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | 27c7ca7e | bellard | * in the Software without restriction, including without limitation the rights
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9 | 27c7ca7e | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 27c7ca7e | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | 27c7ca7e | bellard | * furnished to do so, subject to the following conditions:
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12 | 27c7ca7e | bellard | *
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13 | 27c7ca7e | bellard | * The above copyright notice and this permission notice shall be included in
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14 | 27c7ca7e | bellard | * all copies or substantial portions of the Software.
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15 | 27c7ca7e | bellard | *
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16 | 27c7ca7e | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 27c7ca7e | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 27c7ca7e | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 27c7ca7e | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 27c7ca7e | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 27c7ca7e | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 27c7ca7e | bellard | * THE SOFTWARE.
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23 | 27c7ca7e | bellard | */
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24 | 27c7ca7e | bellard | /*
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25 | 27c7ca7e | bellard | Shix 2.0 board by Alexis Polti, described at
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26 | 27c7ca7e | bellard | http://perso.enst.fr/~polti/realisations/shix20/
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27 | 27c7ca7e | bellard | |
28 | 27c7ca7e | bellard | More information in target-sh4/README.sh4
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29 | 27c7ca7e | bellard | */
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30 | 27c7ca7e | bellard | #include "vl.h" |
31 | 27c7ca7e | bellard | |
32 | 27c7ca7e | bellard | #define BIOS_FILENAME "shix_bios.bin" |
33 | 27c7ca7e | bellard | #define BIOS_ADDRESS 0xA0000000 |
34 | 27c7ca7e | bellard | |
35 | 27c7ca7e | bellard | void DMA_run(void) |
36 | 27c7ca7e | bellard | { |
37 | 27c7ca7e | bellard | /* XXXXX */
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38 | 27c7ca7e | bellard | } |
39 | 27c7ca7e | bellard | |
40 | 27c7ca7e | bellard | void irq_info(void) |
41 | 27c7ca7e | bellard | { |
42 | 27c7ca7e | bellard | /* XXXXX */
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43 | 27c7ca7e | bellard | } |
44 | 27c7ca7e | bellard | |
45 | 27c7ca7e | bellard | void pic_set_irq(int irq, int level) |
46 | 27c7ca7e | bellard | { |
47 | 27c7ca7e | bellard | /* XXXXX */
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48 | 27c7ca7e | bellard | } |
49 | 27c7ca7e | bellard | |
50 | 27c7ca7e | bellard | void pic_info()
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51 | 27c7ca7e | bellard | { |
52 | 27c7ca7e | bellard | /* XXXXX */
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53 | 27c7ca7e | bellard | } |
54 | 27c7ca7e | bellard | |
55 | 27c7ca7e | bellard | void vga_update_display()
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56 | 27c7ca7e | bellard | { |
57 | 27c7ca7e | bellard | /* XXXXX */
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58 | 27c7ca7e | bellard | } |
59 | 27c7ca7e | bellard | |
60 | 27c7ca7e | bellard | void vga_invalidate_display()
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61 | 27c7ca7e | bellard | { |
62 | 27c7ca7e | bellard | /* XXXXX */
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63 | 27c7ca7e | bellard | } |
64 | 27c7ca7e | bellard | |
65 | 27c7ca7e | bellard | void vga_screen_dump(const char *filename) |
66 | 27c7ca7e | bellard | { |
67 | 27c7ca7e | bellard | /* XXXXX */
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68 | 27c7ca7e | bellard | } |
69 | 27c7ca7e | bellard | |
70 | 27c7ca7e | bellard | void shix_init(int ram_size, int vga_ram_size, int boot_device, |
71 | 27c7ca7e | bellard | DisplayState * ds, const char **fd_filename, int snapshot, |
72 | 27c7ca7e | bellard | const char *kernel_filename, const char *kernel_cmdline, |
73 | 27c7ca7e | bellard | const char *initrd_filename) |
74 | 27c7ca7e | bellard | { |
75 | 27c7ca7e | bellard | int ret;
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76 | 27c7ca7e | bellard | CPUState *env; |
77 | 27c7ca7e | bellard | struct SH7750State *s;
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78 | 27c7ca7e | bellard | |
79 | 27c7ca7e | bellard | printf("Initializing CPU\n");
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80 | 27c7ca7e | bellard | env = cpu_init(); |
81 | 27c7ca7e | bellard | |
82 | 27c7ca7e | bellard | /* Allocate memory space */
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83 | 27c7ca7e | bellard | printf("Allocating ROM\n");
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84 | 27c7ca7e | bellard | cpu_register_physical_memory(0x00000000, 0x00004000, IO_MEM_ROM); |
85 | 27c7ca7e | bellard | printf("Allocating SDRAM 1\n");
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86 | 27c7ca7e | bellard | cpu_register_physical_memory(0x08000000, 0x01000000, 0x00004000); |
87 | 27c7ca7e | bellard | printf("Allocating SDRAM 2\n");
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88 | 27c7ca7e | bellard | cpu_register_physical_memory(0x0c000000, 0x01000000, 0x01004000); |
89 | 27c7ca7e | bellard | |
90 | 27c7ca7e | bellard | /* Load BIOS in 0 (and access it through P2, 0xA0000000) */
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91 | 27c7ca7e | bellard | printf("%s: load BIOS '%s'\n", __func__, BIOS_FILENAME);
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92 | 27c7ca7e | bellard | ret = load_image(BIOS_FILENAME, phys_ram_base); |
93 | 27c7ca7e | bellard | if (ret < 0) { /* Check bios size */ |
94 | 27c7ca7e | bellard | fprintf(stderr, "ret=%d\n", ret);
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95 | 27c7ca7e | bellard | fprintf(stderr, "qemu: could not load SHIX bios '%s'\n",
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96 | 27c7ca7e | bellard | BIOS_FILENAME); |
97 | 27c7ca7e | bellard | exit(1);
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98 | 27c7ca7e | bellard | } |
99 | 27c7ca7e | bellard | |
100 | 27c7ca7e | bellard | /* Register peripherals */
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101 | 27c7ca7e | bellard | s = sh7750_init(env); |
102 | 27c7ca7e | bellard | /* XXXXX Check success */
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103 | 27c7ca7e | bellard | tc58128_init(s, "shix_linux_nand.bin", NULL); |
104 | 27c7ca7e | bellard | fprintf(stderr, "initialization terminated\n");
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105 | 27c7ca7e | bellard | } |
106 | 27c7ca7e | bellard | |
107 | 27c7ca7e | bellard | QEMUMachine shix_machine = { |
108 | 27c7ca7e | bellard | "shix",
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109 | 27c7ca7e | bellard | "shix card",
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110 | 27c7ca7e | bellard | shix_init |
111 | 27c7ca7e | bellard | }; |