root / qemu-tech.texi @ c5d6edc3
History | View | Annotate | Download (19.6 kB)
1 | 1f673135 | bellard | \input texinfo @c -*- texinfo -*- |
---|---|---|---|
2 | debc7065 | bellard | @c %**start of header |
3 | debc7065 | bellard | @setfilename qemu-tech.info |
4 | debc7065 | bellard | @settitle QEMU Internals |
5 | debc7065 | bellard | @exampleindent 0 |
6 | debc7065 | bellard | @paragraphindent 0 |
7 | debc7065 | bellard | @c %**end of header |
8 | 1f673135 | bellard | |
9 | 1f673135 | bellard | @iftex |
10 | 1f673135 | bellard | @titlepage |
11 | 1f673135 | bellard | @sp 7 |
12 | 1f673135 | bellard | @center @titlefont{QEMU Internals} |
13 | 1f673135 | bellard | @sp 3 |
14 | 1f673135 | bellard | @end titlepage |
15 | 1f673135 | bellard | @end iftex |
16 | 1f673135 | bellard | |
17 | debc7065 | bellard | @ifnottex |
18 | debc7065 | bellard | @node Top |
19 | debc7065 | bellard | @top |
20 | debc7065 | bellard | |
21 | debc7065 | bellard | @menu |
22 | debc7065 | bellard | * Introduction:: |
23 | debc7065 | bellard | * QEMU Internals:: |
24 | debc7065 | bellard | * Regression Tests:: |
25 | debc7065 | bellard | * Index:: |
26 | debc7065 | bellard | @end menu |
27 | debc7065 | bellard | @end ifnottex |
28 | debc7065 | bellard | |
29 | debc7065 | bellard | @contents |
30 | debc7065 | bellard | |
31 | debc7065 | bellard | @node Introduction |
32 | 1f673135 | bellard | @chapter Introduction |
33 | 1f673135 | bellard | |
34 | debc7065 | bellard | @menu |
35 | debc7065 | bellard | * intro_features:: Features |
36 | debc7065 | bellard | * intro_x86_emulation:: x86 emulation |
37 | debc7065 | bellard | * intro_arm_emulation:: ARM emulation |
38 | debc7065 | bellard | * intro_ppc_emulation:: PowerPC emulation |
39 | debc7065 | bellard | * intro_sparc_emulation:: SPARC emulation |
40 | debc7065 | bellard | @end menu |
41 | debc7065 | bellard | |
42 | debc7065 | bellard | @node intro_features |
43 | 1f673135 | bellard | @section Features |
44 | 1f673135 | bellard | |
45 | 1f673135 | bellard | QEMU is a FAST! processor emulator using a portable dynamic |
46 | 1f673135 | bellard | translator. |
47 | 1f673135 | bellard | |
48 | 1f673135 | bellard | QEMU has two operating modes: |
49 | 1f673135 | bellard | |
50 | 1f673135 | bellard | @itemize @minus |
51 | 1f673135 | bellard | |
52 | 1f673135 | bellard | @item |
53 | 1f673135 | bellard | Full system emulation. In this mode, QEMU emulates a full system |
54 | b671f9ed | bellard | (usually a PC), including a processor and various peripherals. It can |
55 | 1f673135 | bellard | be used to launch an different Operating System without rebooting the |
56 | 1f673135 | bellard | PC or to debug system code. |
57 | 1f673135 | bellard | |
58 | 1f673135 | bellard | @item |
59 | 1f673135 | bellard | User mode emulation (Linux host only). In this mode, QEMU can launch |
60 | 1f673135 | bellard | Linux processes compiled for one CPU on another CPU. It can be used to |
61 | 1f673135 | bellard | launch the Wine Windows API emulator (@url{http://www.winehq.org}) or |
62 | 1f673135 | bellard | to ease cross-compilation and cross-debugging. |
63 | 1f673135 | bellard | |
64 | 1f673135 | bellard | @end itemize |
65 | 1f673135 | bellard | |
66 | 1f673135 | bellard | As QEMU requires no host kernel driver to run, it is very safe and |
67 | 1f673135 | bellard | easy to use. |
68 | 1f673135 | bellard | |
69 | 1f673135 | bellard | QEMU generic features: |
70 | 1f673135 | bellard | |
71 | 1f673135 | bellard | @itemize |
72 | 1f673135 | bellard | |
73 | 1f673135 | bellard | @item User space only or full system emulation. |
74 | 1f673135 | bellard | |
75 | debc7065 | bellard | @item Using dynamic translation to native code for reasonable speed. |
76 | 1f673135 | bellard | |
77 | 1f673135 | bellard | @item Working on x86 and PowerPC hosts. Being tested on ARM, Sparc32, Alpha and S390. |
78 | 1f673135 | bellard | |
79 | 1f673135 | bellard | @item Self-modifying code support. |
80 | 1f673135 | bellard | |
81 | 1f673135 | bellard | @item Precise exceptions support. |
82 | 1f673135 | bellard | |
83 | 1f673135 | bellard | @item The virtual CPU is a library (@code{libqemu}) which can be used |
84 | ad6a4837 | bellard | in other projects (look at @file{qemu/tests/qruncom.c} to have an |
85 | ad6a4837 | bellard | example of user mode @code{libqemu} usage). |
86 | 1f673135 | bellard | |
87 | 1f673135 | bellard | @end itemize |
88 | 1f673135 | bellard | |
89 | 1f673135 | bellard | QEMU user mode emulation features: |
90 | 1f673135 | bellard | @itemize |
91 | 1f673135 | bellard | @item Generic Linux system call converter, including most ioctls. |
92 | 1f673135 | bellard | |
93 | 1f673135 | bellard | @item clone() emulation using native CPU clone() to use Linux scheduler for threads. |
94 | 1f673135 | bellard | |
95 | 1f673135 | bellard | @item Accurate signal handling by remapping host signals to target signals. |
96 | 1f673135 | bellard | @end itemize |
97 | 1f673135 | bellard | |
98 | 1f673135 | bellard | QEMU full system emulation features: |
99 | 1f673135 | bellard | @itemize |
100 | 1f673135 | bellard | @item QEMU can either use a full software MMU for maximum portability or use the host system call mmap() to simulate the target MMU. |
101 | 1f673135 | bellard | @end itemize |
102 | 1f673135 | bellard | |
103 | debc7065 | bellard | @node intro_x86_emulation |
104 | 1f673135 | bellard | @section x86 emulation |
105 | 1f673135 | bellard | |
106 | 1f673135 | bellard | QEMU x86 target features: |
107 | 1f673135 | bellard | |
108 | 1f673135 | bellard | @itemize |
109 | 1f673135 | bellard | |
110 | 1f673135 | bellard | @item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation. |
111 | 1f673135 | bellard | LDT/GDT and IDT are emulated. VM86 mode is also supported to run DOSEMU. |
112 | 1f673135 | bellard | |
113 | 1f673135 | bellard | @item Support of host page sizes bigger than 4KB in user mode emulation. |
114 | 1f673135 | bellard | |
115 | 1f673135 | bellard | @item QEMU can emulate itself on x86. |
116 | 1f673135 | bellard | |
117 | 1f673135 | bellard | @item An extensive Linux x86 CPU test program is included @file{tests/test-i386}. |
118 | 1f673135 | bellard | It can be used to test other x86 virtual CPUs. |
119 | 1f673135 | bellard | |
120 | 1f673135 | bellard | @end itemize |
121 | 1f673135 | bellard | |
122 | 1f673135 | bellard | Current QEMU limitations: |
123 | 1f673135 | bellard | |
124 | 1f673135 | bellard | @itemize |
125 | 1f673135 | bellard | |
126 | 1f673135 | bellard | @item No SSE/MMX support (yet). |
127 | 1f673135 | bellard | |
128 | 1f673135 | bellard | @item No x86-64 support. |
129 | 1f673135 | bellard | |
130 | 1f673135 | bellard | @item IPC syscalls are missing. |
131 | 1f673135 | bellard | |
132 | 1f673135 | bellard | @item The x86 segment limits and access rights are not tested at every |
133 | 1f673135 | bellard | memory access (yet). Hopefully, very few OSes seem to rely on that for |
134 | 1f673135 | bellard | normal use. |
135 | 1f673135 | bellard | |
136 | 1f673135 | bellard | @item On non x86 host CPUs, @code{double}s are used instead of the non standard |
137 | 1f673135 | bellard | 10 byte @code{long double}s of x86 for floating point emulation to get |
138 | 1f673135 | bellard | maximum performances. |
139 | 1f673135 | bellard | |
140 | 1f673135 | bellard | @end itemize |
141 | 1f673135 | bellard | |
142 | debc7065 | bellard | @node intro_arm_emulation |
143 | 1f673135 | bellard | @section ARM emulation |
144 | 1f673135 | bellard | |
145 | 1f673135 | bellard | @itemize |
146 | 1f673135 | bellard | |
147 | 1f673135 | bellard | @item Full ARM 7 user emulation. |
148 | 1f673135 | bellard | |
149 | 1f673135 | bellard | @item NWFPE FPU support included in user Linux emulation. |
150 | 1f673135 | bellard | |
151 | 1f673135 | bellard | @item Can run most ARM Linux binaries. |
152 | 1f673135 | bellard | |
153 | 1f673135 | bellard | @end itemize |
154 | 1f673135 | bellard | |
155 | debc7065 | bellard | @node intro_ppc_emulation |
156 | 1f673135 | bellard | @section PowerPC emulation |
157 | 1f673135 | bellard | |
158 | 1f673135 | bellard | @itemize |
159 | 1f673135 | bellard | |
160 | e80cfcfc | bellard | @item Full PowerPC 32 bit emulation, including privileged instructions, |
161 | 1f673135 | bellard | FPU and MMU. |
162 | 1f673135 | bellard | |
163 | 1f673135 | bellard | @item Can run most PowerPC Linux binaries. |
164 | 1f673135 | bellard | |
165 | 1f673135 | bellard | @end itemize |
166 | 1f673135 | bellard | |
167 | debc7065 | bellard | @node intro_sparc_emulation |
168 | 1f673135 | bellard | @section SPARC emulation |
169 | 1f673135 | bellard | |
170 | 1f673135 | bellard | @itemize |
171 | 1f673135 | bellard | |
172 | e80cfcfc | bellard | @item Somewhat complete SPARC V8 emulation, including privileged |
173 | 3475187d | bellard | instructions, FPU and MMU. SPARC V9 emulation includes most privileged |
174 | 3475187d | bellard | instructions, FPU and I/D MMU, but misses VIS instructions. |
175 | 1f673135 | bellard | |
176 | 3475187d | bellard | @item Can run some 32-bit SPARC Linux binaries. |
177 | 3475187d | bellard | |
178 | 3475187d | bellard | @end itemize |
179 | 3475187d | bellard | |
180 | 3475187d | bellard | Current QEMU limitations: |
181 | 3475187d | bellard | |
182 | 3475187d | bellard | @itemize |
183 | 3475187d | bellard | |
184 | 3475187d | bellard | @item Tagged add/subtract instructions are not supported, but they are |
185 | 3475187d | bellard | probably not used. |
186 | 3475187d | bellard | |
187 | 3475187d | bellard | @item IPC syscalls are missing. |
188 | 3475187d | bellard | |
189 | 3475187d | bellard | @item 128-bit floating point operations are not supported, though none of the |
190 | 3475187d | bellard | real CPUs implement them either. FCMPE[SD] are not correctly |
191 | 3475187d | bellard | implemented. Floating point exception support is untested. |
192 | 3475187d | bellard | |
193 | 3475187d | bellard | @item Alignment is not enforced at all. |
194 | 3475187d | bellard | |
195 | 3475187d | bellard | @item Atomic instructions are not correctly implemented. |
196 | 3475187d | bellard | |
197 | 3475187d | bellard | @item Sparc64 emulators are not usable for anything yet. |
198 | 1f673135 | bellard | |
199 | 1f673135 | bellard | @end itemize |
200 | 1f673135 | bellard | |
201 | debc7065 | bellard | @node QEMU Internals |
202 | 1f673135 | bellard | @chapter QEMU Internals |
203 | 1f673135 | bellard | |
204 | debc7065 | bellard | @menu |
205 | debc7065 | bellard | * QEMU compared to other emulators:: |
206 | debc7065 | bellard | * Portable dynamic translation:: |
207 | debc7065 | bellard | * Register allocation:: |
208 | debc7065 | bellard | * Condition code optimisations:: |
209 | debc7065 | bellard | * CPU state optimisations:: |
210 | debc7065 | bellard | * Translation cache:: |
211 | debc7065 | bellard | * Direct block chaining:: |
212 | debc7065 | bellard | * Self-modifying code and translated code invalidation:: |
213 | debc7065 | bellard | * Exception support:: |
214 | debc7065 | bellard | * MMU emulation:: |
215 | debc7065 | bellard | * Hardware interrupts:: |
216 | debc7065 | bellard | * User emulation specific details:: |
217 | debc7065 | bellard | * Bibliography:: |
218 | debc7065 | bellard | @end menu |
219 | debc7065 | bellard | |
220 | debc7065 | bellard | @node QEMU compared to other emulators |
221 | 1f673135 | bellard | @section QEMU compared to other emulators |
222 | 1f673135 | bellard | |
223 | 1f673135 | bellard | Like bochs [3], QEMU emulates an x86 CPU. But QEMU is much faster than |
224 | 1f673135 | bellard | bochs as it uses dynamic compilation. Bochs is closely tied to x86 PC |
225 | 1f673135 | bellard | emulation while QEMU can emulate several processors. |
226 | 1f673135 | bellard | |
227 | 1f673135 | bellard | Like Valgrind [2], QEMU does user space emulation and dynamic |
228 | 1f673135 | bellard | translation. Valgrind is mainly a memory debugger while QEMU has no |
229 | 1f673135 | bellard | support for it (QEMU could be used to detect out of bound memory |
230 | 1f673135 | bellard | accesses as Valgrind, but it has no support to track uninitialised data |
231 | 1f673135 | bellard | as Valgrind does). The Valgrind dynamic translator generates better code |
232 | 1f673135 | bellard | than QEMU (in particular it does register allocation) but it is closely |
233 | 1f673135 | bellard | tied to an x86 host and target and has no support for precise exceptions |
234 | 1f673135 | bellard | and system emulation. |
235 | 1f673135 | bellard | |
236 | 1f673135 | bellard | EM86 [4] is the closest project to user space QEMU (and QEMU still uses |
237 | 1f673135 | bellard | some of its code, in particular the ELF file loader). EM86 was limited |
238 | 1f673135 | bellard | to an alpha host and used a proprietary and slow interpreter (the |
239 | 1f673135 | bellard | interpreter part of the FX!32 Digital Win32 code translator [5]). |
240 | 1f673135 | bellard | |
241 | 1f673135 | bellard | TWIN [6] is a Windows API emulator like Wine. It is less accurate than |
242 | 1f673135 | bellard | Wine but includes a protected mode x86 interpreter to launch x86 Windows |
243 | 36d54d15 | bellard | executables. Such an approach has greater potential because most of the |
244 | 1f673135 | bellard | Windows API is executed natively but it is far more difficult to develop |
245 | 1f673135 | bellard | because all the data structures and function parameters exchanged |
246 | 1f673135 | bellard | between the API and the x86 code must be converted. |
247 | 1f673135 | bellard | |
248 | 1f673135 | bellard | User mode Linux [7] was the only solution before QEMU to launch a |
249 | 1f673135 | bellard | Linux kernel as a process while not needing any host kernel |
250 | 1f673135 | bellard | patches. However, user mode Linux requires heavy kernel patches while |
251 | 1f673135 | bellard | QEMU accepts unpatched Linux kernels. The price to pay is that QEMU is |
252 | 1f673135 | bellard | slower. |
253 | 1f673135 | bellard | |
254 | 1f673135 | bellard | The new Plex86 [8] PC virtualizer is done in the same spirit as the |
255 | 1f673135 | bellard | qemu-fast system emulator. It requires a patched Linux kernel to work |
256 | 1f673135 | bellard | (you cannot launch the same kernel on your PC), but the patches are |
257 | 1f673135 | bellard | really small. As it is a PC virtualizer (no emulation is done except |
258 | 1f673135 | bellard | for some priveledged instructions), it has the potential of being |
259 | 1f673135 | bellard | faster than QEMU. The downside is that a complicated (and potentially |
260 | 1f673135 | bellard | unsafe) host kernel patch is needed. |
261 | 1f673135 | bellard | |
262 | 1f673135 | bellard | The commercial PC Virtualizers (VMWare [9], VirtualPC [10], TwoOStwo |
263 | 1f673135 | bellard | [11]) are faster than QEMU, but they all need specific, proprietary |
264 | 1f673135 | bellard | and potentially unsafe host drivers. Moreover, they are unable to |
265 | 1f673135 | bellard | provide cycle exact simulation as an emulator can. |
266 | 1f673135 | bellard | |
267 | debc7065 | bellard | @node Portable dynamic translation |
268 | 1f673135 | bellard | @section Portable dynamic translation |
269 | 1f673135 | bellard | |
270 | 1f673135 | bellard | QEMU is a dynamic translator. When it first encounters a piece of code, |
271 | 1f673135 | bellard | it converts it to the host instruction set. Usually dynamic translators |
272 | 1f673135 | bellard | are very complicated and highly CPU dependent. QEMU uses some tricks |
273 | 1f673135 | bellard | which make it relatively easily portable and simple while achieving good |
274 | 1f673135 | bellard | performances. |
275 | 1f673135 | bellard | |
276 | 1f673135 | bellard | The basic idea is to split every x86 instruction into fewer simpler |
277 | 1f673135 | bellard | instructions. Each simple instruction is implemented by a piece of C |
278 | 1f673135 | bellard | code (see @file{target-i386/op.c}). Then a compile time tool |
279 | 1f673135 | bellard | (@file{dyngen}) takes the corresponding object file (@file{op.o}) |
280 | 1f673135 | bellard | to generate a dynamic code generator which concatenates the simple |
281 | 1f673135 | bellard | instructions to build a function (see @file{op.h:dyngen_code()}). |
282 | 1f673135 | bellard | |
283 | 1f673135 | bellard | In essence, the process is similar to [1], but more work is done at |
284 | 1f673135 | bellard | compile time. |
285 | 1f673135 | bellard | |
286 | 1f673135 | bellard | A key idea to get optimal performances is that constant parameters can |
287 | 1f673135 | bellard | be passed to the simple operations. For that purpose, dummy ELF |
288 | 1f673135 | bellard | relocations are generated with gcc for each constant parameter. Then, |
289 | 1f673135 | bellard | the tool (@file{dyngen}) can locate the relocations and generate the |
290 | 1f673135 | bellard | appriopriate C code to resolve them when building the dynamic code. |
291 | 1f673135 | bellard | |
292 | 1f673135 | bellard | That way, QEMU is no more difficult to port than a dynamic linker. |
293 | 1f673135 | bellard | |
294 | 1f673135 | bellard | To go even faster, GCC static register variables are used to keep the |
295 | 1f673135 | bellard | state of the virtual CPU. |
296 | 1f673135 | bellard | |
297 | debc7065 | bellard | @node Register allocation |
298 | 1f673135 | bellard | @section Register allocation |
299 | 1f673135 | bellard | |
300 | 1f673135 | bellard | Since QEMU uses fixed simple instructions, no efficient register |
301 | 1f673135 | bellard | allocation can be done. However, because RISC CPUs have a lot of |
302 | 1f673135 | bellard | register, most of the virtual CPU state can be put in registers without |
303 | 1f673135 | bellard | doing complicated register allocation. |
304 | 1f673135 | bellard | |
305 | debc7065 | bellard | @node Condition code optimisations |
306 | 1f673135 | bellard | @section Condition code optimisations |
307 | 1f673135 | bellard | |
308 | 1f673135 | bellard | Good CPU condition codes emulation (@code{EFLAGS} register on x86) is a |
309 | 1f673135 | bellard | critical point to get good performances. QEMU uses lazy condition code |
310 | 1f673135 | bellard | evaluation: instead of computing the condition codes after each x86 |
311 | 1f673135 | bellard | instruction, it just stores one operand (called @code{CC_SRC}), the |
312 | 1f673135 | bellard | result (called @code{CC_DST}) and the type of operation (called |
313 | 1f673135 | bellard | @code{CC_OP}). |
314 | 1f673135 | bellard | |
315 | 1f673135 | bellard | @code{CC_OP} is almost never explicitely set in the generated code |
316 | 1f673135 | bellard | because it is known at translation time. |
317 | 1f673135 | bellard | |
318 | 1f673135 | bellard | In order to increase performances, a backward pass is performed on the |
319 | 1f673135 | bellard | generated simple instructions (see |
320 | 1f673135 | bellard | @code{target-i386/translate.c:optimize_flags()}). When it can be proved that |
321 | 1f673135 | bellard | the condition codes are not needed by the next instructions, no |
322 | 1f673135 | bellard | condition codes are computed at all. |
323 | 1f673135 | bellard | |
324 | debc7065 | bellard | @node CPU state optimisations |
325 | 1f673135 | bellard | @section CPU state optimisations |
326 | 1f673135 | bellard | |
327 | 1f673135 | bellard | The x86 CPU has many internal states which change the way it evaluates |
328 | 1f673135 | bellard | instructions. In order to achieve a good speed, the translation phase |
329 | 1f673135 | bellard | considers that some state information of the virtual x86 CPU cannot |
330 | 1f673135 | bellard | change in it. For example, if the SS, DS and ES segments have a zero |
331 | 1f673135 | bellard | base, then the translator does not even generate an addition for the |
332 | 1f673135 | bellard | segment base. |
333 | 1f673135 | bellard | |
334 | 1f673135 | bellard | [The FPU stack pointer register is not handled that way yet]. |
335 | 1f673135 | bellard | |
336 | debc7065 | bellard | @node Translation cache |
337 | 1f673135 | bellard | @section Translation cache |
338 | 1f673135 | bellard | |
339 | 15a34c63 | bellard | A 16 MByte cache holds the most recently used translations. For |
340 | 1f673135 | bellard | simplicity, it is completely flushed when it is full. A translation unit |
341 | 1f673135 | bellard | contains just a single basic block (a block of x86 instructions |
342 | 1f673135 | bellard | terminated by a jump or by a virtual CPU state change which the |
343 | 1f673135 | bellard | translator cannot deduce statically). |
344 | 1f673135 | bellard | |
345 | debc7065 | bellard | @node Direct block chaining |
346 | 1f673135 | bellard | @section Direct block chaining |
347 | 1f673135 | bellard | |
348 | 1f673135 | bellard | After each translated basic block is executed, QEMU uses the simulated |
349 | 1f673135 | bellard | Program Counter (PC) and other cpu state informations (such as the CS |
350 | 1f673135 | bellard | segment base value) to find the next basic block. |
351 | 1f673135 | bellard | |
352 | 1f673135 | bellard | In order to accelerate the most common cases where the new simulated PC |
353 | 1f673135 | bellard | is known, QEMU can patch a basic block so that it jumps directly to the |
354 | 1f673135 | bellard | next one. |
355 | 1f673135 | bellard | |
356 | 1f673135 | bellard | The most portable code uses an indirect jump. An indirect jump makes |
357 | 1f673135 | bellard | it easier to make the jump target modification atomic. On some host |
358 | 1f673135 | bellard | architectures (such as x86 or PowerPC), the @code{JUMP} opcode is |
359 | 1f673135 | bellard | directly patched so that the block chaining has no overhead. |
360 | 1f673135 | bellard | |
361 | debc7065 | bellard | @node Self-modifying code and translated code invalidation |
362 | 1f673135 | bellard | @section Self-modifying code and translated code invalidation |
363 | 1f673135 | bellard | |
364 | 1f673135 | bellard | Self-modifying code is a special challenge in x86 emulation because no |
365 | 1f673135 | bellard | instruction cache invalidation is signaled by the application when code |
366 | 1f673135 | bellard | is modified. |
367 | 1f673135 | bellard | |
368 | 1f673135 | bellard | When translated code is generated for a basic block, the corresponding |
369 | 1f673135 | bellard | host page is write protected if it is not already read-only (with the |
370 | 1f673135 | bellard | system call @code{mprotect()}). Then, if a write access is done to the |
371 | 1f673135 | bellard | page, Linux raises a SEGV signal. QEMU then invalidates all the |
372 | 1f673135 | bellard | translated code in the page and enables write accesses to the page. |
373 | 1f673135 | bellard | |
374 | 1f673135 | bellard | Correct translated code invalidation is done efficiently by maintaining |
375 | 1f673135 | bellard | a linked list of every translated block contained in a given page. Other |
376 | 1f673135 | bellard | linked lists are also maintained to undo direct block chaining. |
377 | 1f673135 | bellard | |
378 | 1f673135 | bellard | Although the overhead of doing @code{mprotect()} calls is important, |
379 | 1f673135 | bellard | most MSDOS programs can be emulated at reasonnable speed with QEMU and |
380 | 1f673135 | bellard | DOSEMU. |
381 | 1f673135 | bellard | |
382 | 1f673135 | bellard | Note that QEMU also invalidates pages of translated code when it detects |
383 | 1f673135 | bellard | that memory mappings are modified with @code{mmap()} or @code{munmap()}. |
384 | 1f673135 | bellard | |
385 | 1f673135 | bellard | When using a software MMU, the code invalidation is more efficient: if |
386 | 1f673135 | bellard | a given code page is invalidated too often because of write accesses, |
387 | 1f673135 | bellard | then a bitmap representing all the code inside the page is |
388 | 1f673135 | bellard | built. Every store into that page checks the bitmap to see if the code |
389 | 1f673135 | bellard | really needs to be invalidated. It avoids invalidating the code when |
390 | 1f673135 | bellard | only data is modified in the page. |
391 | 1f673135 | bellard | |
392 | debc7065 | bellard | @node Exception support |
393 | 1f673135 | bellard | @section Exception support |
394 | 1f673135 | bellard | |
395 | 1f673135 | bellard | longjmp() is used when an exception such as division by zero is |
396 | 1f673135 | bellard | encountered. |
397 | 1f673135 | bellard | |
398 | 1f673135 | bellard | The host SIGSEGV and SIGBUS signal handlers are used to get invalid |
399 | 1f673135 | bellard | memory accesses. The exact CPU state can be retrieved because all the |
400 | 1f673135 | bellard | x86 registers are stored in fixed host registers. The simulated program |
401 | 1f673135 | bellard | counter is found by retranslating the corresponding basic block and by |
402 | 1f673135 | bellard | looking where the host program counter was at the exception point. |
403 | 1f673135 | bellard | |
404 | 1f673135 | bellard | The virtual CPU cannot retrieve the exact @code{EFLAGS} register because |
405 | 1f673135 | bellard | in some cases it is not computed because of condition code |
406 | 1f673135 | bellard | optimisations. It is not a big concern because the emulated code can |
407 | 1f673135 | bellard | still be restarted in any cases. |
408 | 1f673135 | bellard | |
409 | debc7065 | bellard | @node MMU emulation |
410 | 1f673135 | bellard | @section MMU emulation |
411 | 1f673135 | bellard | |
412 | 1f673135 | bellard | For system emulation, QEMU uses the mmap() system call to emulate the |
413 | 1f673135 | bellard | target CPU MMU. It works as long the emulated OS does not use an area |
414 | 1f673135 | bellard | reserved by the host OS (such as the area above 0xc0000000 on x86 |
415 | 1f673135 | bellard | Linux). |
416 | 1f673135 | bellard | |
417 | 1f673135 | bellard | In order to be able to launch any OS, QEMU also supports a soft |
418 | 1f673135 | bellard | MMU. In that mode, the MMU virtual to physical address translation is |
419 | 1f673135 | bellard | done at every memory access. QEMU uses an address translation cache to |
420 | 1f673135 | bellard | speed up the translation. |
421 | 1f673135 | bellard | |
422 | 1f673135 | bellard | In order to avoid flushing the translated code each time the MMU |
423 | 1f673135 | bellard | mappings change, QEMU uses a physically indexed translation cache. It |
424 | 1f673135 | bellard | means that each basic block is indexed with its physical address. |
425 | 1f673135 | bellard | |
426 | 1f673135 | bellard | When MMU mappings change, only the chaining of the basic blocks is |
427 | 1f673135 | bellard | reset (i.e. a basic block can no longer jump directly to another one). |
428 | 1f673135 | bellard | |
429 | debc7065 | bellard | @node Hardware interrupts |
430 | 1f673135 | bellard | @section Hardware interrupts |
431 | 1f673135 | bellard | |
432 | 1f673135 | bellard | In order to be faster, QEMU does not check at every basic block if an |
433 | 1f673135 | bellard | hardware interrupt is pending. Instead, the user must asynchrously |
434 | 1f673135 | bellard | call a specific function to tell that an interrupt is pending. This |
435 | 1f673135 | bellard | function resets the chaining of the currently executing basic |
436 | 1f673135 | bellard | block. It ensures that the execution will return soon in the main loop |
437 | 1f673135 | bellard | of the CPU emulator. Then the main loop can test if the interrupt is |
438 | 1f673135 | bellard | pending and handle it. |
439 | 1f673135 | bellard | |
440 | debc7065 | bellard | @node User emulation specific details |
441 | 1f673135 | bellard | @section User emulation specific details |
442 | 1f673135 | bellard | |
443 | 1f673135 | bellard | @subsection Linux system call translation |
444 | 1f673135 | bellard | |
445 | 1f673135 | bellard | QEMU includes a generic system call translator for Linux. It means that |
446 | 1f673135 | bellard | the parameters of the system calls can be converted to fix the |
447 | 1f673135 | bellard | endianness and 32/64 bit issues. The IOCTLs are converted with a generic |
448 | 1f673135 | bellard | type description system (see @file{ioctls.h} and @file{thunk.c}). |
449 | 1f673135 | bellard | |
450 | 1f673135 | bellard | QEMU supports host CPUs which have pages bigger than 4KB. It records all |
451 | 1f673135 | bellard | the mappings the process does and try to emulated the @code{mmap()} |
452 | 1f673135 | bellard | system calls in cases where the host @code{mmap()} call would fail |
453 | 1f673135 | bellard | because of bad page alignment. |
454 | 1f673135 | bellard | |
455 | 1f673135 | bellard | @subsection Linux signals |
456 | 1f673135 | bellard | |
457 | 1f673135 | bellard | Normal and real-time signals are queued along with their information |
458 | 1f673135 | bellard | (@code{siginfo_t}) as it is done in the Linux kernel. Then an interrupt |
459 | 1f673135 | bellard | request is done to the virtual CPU. When it is interrupted, one queued |
460 | 1f673135 | bellard | signal is handled by generating a stack frame in the virtual CPU as the |
461 | 1f673135 | bellard | Linux kernel does. The @code{sigreturn()} system call is emulated to return |
462 | 1f673135 | bellard | from the virtual signal handler. |
463 | 1f673135 | bellard | |
464 | 1f673135 | bellard | Some signals (such as SIGALRM) directly come from the host. Other |
465 | 1f673135 | bellard | signals are synthetized from the virtual CPU exceptions such as SIGFPE |
466 | 1f673135 | bellard | when a division by zero is done (see @code{main.c:cpu_loop()}). |
467 | 1f673135 | bellard | |
468 | 1f673135 | bellard | The blocked signal mask is still handled by the host Linux kernel so |
469 | 1f673135 | bellard | that most signal system calls can be redirected directly to the host |
470 | 1f673135 | bellard | Linux kernel. Only the @code{sigaction()} and @code{sigreturn()} system |
471 | 1f673135 | bellard | calls need to be fully emulated (see @file{signal.c}). |
472 | 1f673135 | bellard | |
473 | 1f673135 | bellard | @subsection clone() system call and threads |
474 | 1f673135 | bellard | |
475 | 1f673135 | bellard | The Linux clone() system call is usually used to create a thread. QEMU |
476 | 1f673135 | bellard | uses the host clone() system call so that real host threads are created |
477 | 1f673135 | bellard | for each emulated thread. One virtual CPU instance is created for each |
478 | 1f673135 | bellard | thread. |
479 | 1f673135 | bellard | |
480 | 1f673135 | bellard | The virtual x86 CPU atomic operations are emulated with a global lock so |
481 | 1f673135 | bellard | that their semantic is preserved. |
482 | 1f673135 | bellard | |
483 | 1f673135 | bellard | Note that currently there are still some locking issues in QEMU. In |
484 | 1f673135 | bellard | particular, the translated cache flush is not protected yet against |
485 | 1f673135 | bellard | reentrancy. |
486 | 1f673135 | bellard | |
487 | 1f673135 | bellard | @subsection Self-virtualization |
488 | 1f673135 | bellard | |
489 | 1f673135 | bellard | QEMU was conceived so that ultimately it can emulate itself. Although |
490 | 1f673135 | bellard | it is not very useful, it is an important test to show the power of the |
491 | 1f673135 | bellard | emulator. |
492 | 1f673135 | bellard | |
493 | 1f673135 | bellard | Achieving self-virtualization is not easy because there may be address |
494 | 1f673135 | bellard | space conflicts. QEMU solves this problem by being an executable ELF |
495 | 1f673135 | bellard | shared object as the ld-linux.so ELF interpreter. That way, it can be |
496 | 1f673135 | bellard | relocated at load time. |
497 | 1f673135 | bellard | |
498 | debc7065 | bellard | @node Bibliography |
499 | 1f673135 | bellard | @section Bibliography |
500 | 1f673135 | bellard | |
501 | 1f673135 | bellard | @table @asis |
502 | 1f673135 | bellard | |
503 | 1f673135 | bellard | @item [1] |
504 | 1f673135 | bellard | @url{http://citeseer.nj.nec.com/piumarta98optimizing.html}, Optimizing |
505 | 1f673135 | bellard | direct threaded code by selective inlining (1998) by Ian Piumarta, Fabio |
506 | 1f673135 | bellard | Riccardi. |
507 | 1f673135 | bellard | |
508 | 1f673135 | bellard | @item [2] |
509 | 1f673135 | bellard | @url{http://developer.kde.org/~sewardj/}, Valgrind, an open-source |
510 | 1f673135 | bellard | memory debugger for x86-GNU/Linux, by Julian Seward. |
511 | 1f673135 | bellard | |
512 | 1f673135 | bellard | @item [3] |
513 | 1f673135 | bellard | @url{http://bochs.sourceforge.net/}, the Bochs IA-32 Emulator Project, |
514 | 1f673135 | bellard | by Kevin Lawton et al. |
515 | 1f673135 | bellard | |
516 | 1f673135 | bellard | @item [4] |
517 | 1f673135 | bellard | @url{http://www.cs.rose-hulman.edu/~donaldlf/em86/index.html}, the EM86 |
518 | 1f673135 | bellard | x86 emulator on Alpha-Linux. |
519 | 1f673135 | bellard | |
520 | 1f673135 | bellard | @item [5] |
521 | debc7065 | bellard | @url{http://www.usenix.org/publications/library/proceedings/usenix-nt97/@/full_papers/chernoff/chernoff.pdf}, |
522 | 1f673135 | bellard | DIGITAL FX!32: Running 32-Bit x86 Applications on Alpha NT, by Anton |
523 | 1f673135 | bellard | Chernoff and Ray Hookway. |
524 | 1f673135 | bellard | |
525 | 1f673135 | bellard | @item [6] |
526 | 1f673135 | bellard | @url{http://www.willows.com/}, Windows API library emulation from |
527 | 1f673135 | bellard | Willows Software. |
528 | 1f673135 | bellard | |
529 | 1f673135 | bellard | @item [7] |
530 | 1f673135 | bellard | @url{http://user-mode-linux.sourceforge.net/}, |
531 | 1f673135 | bellard | The User-mode Linux Kernel. |
532 | 1f673135 | bellard | |
533 | 1f673135 | bellard | @item [8] |
534 | 1f673135 | bellard | @url{http://www.plex86.org/}, |
535 | 1f673135 | bellard | The new Plex86 project. |
536 | 1f673135 | bellard | |
537 | 1f673135 | bellard | @item [9] |
538 | 1f673135 | bellard | @url{http://www.vmware.com/}, |
539 | 1f673135 | bellard | The VMWare PC virtualizer. |
540 | 1f673135 | bellard | |
541 | 1f673135 | bellard | @item [10] |
542 | 1f673135 | bellard | @url{http://www.microsoft.com/windowsxp/virtualpc/}, |
543 | 1f673135 | bellard | The VirtualPC PC virtualizer. |
544 | 1f673135 | bellard | |
545 | 1f673135 | bellard | @item [11] |
546 | 1f673135 | bellard | @url{http://www.twoostwo.org/}, |
547 | 1f673135 | bellard | The TwoOStwo PC virtualizer. |
548 | 1f673135 | bellard | |
549 | 1f673135 | bellard | @end table |
550 | 1f673135 | bellard | |
551 | debc7065 | bellard | @node Regression Tests |
552 | 1f673135 | bellard | @chapter Regression Tests |
553 | 1f673135 | bellard | |
554 | 1f673135 | bellard | In the directory @file{tests/}, various interesting testing programs |
555 | 1f673135 | bellard | are available. There are used for regression testing. |
556 | 1f673135 | bellard | |
557 | debc7065 | bellard | @menu |
558 | debc7065 | bellard | * test-i386:: |
559 | debc7065 | bellard | * linux-test:: |
560 | debc7065 | bellard | * qruncom.c:: |
561 | debc7065 | bellard | @end menu |
562 | debc7065 | bellard | |
563 | debc7065 | bellard | @node test-i386 |
564 | 1f673135 | bellard | @section @file{test-i386} |
565 | 1f673135 | bellard | |
566 | 1f673135 | bellard | This program executes most of the 16 bit and 32 bit x86 instructions and |
567 | 1f673135 | bellard | generates a text output. It can be compared with the output obtained with |
568 | 1f673135 | bellard | a real CPU or another emulator. The target @code{make test} runs this |
569 | 1f673135 | bellard | program and a @code{diff} on the generated output. |
570 | 1f673135 | bellard | |
571 | 1f673135 | bellard | The Linux system call @code{modify_ldt()} is used to create x86 selectors |
572 | 1f673135 | bellard | to test some 16 bit addressing and 32 bit with segmentation cases. |
573 | 1f673135 | bellard | |
574 | 1f673135 | bellard | The Linux system call @code{vm86()} is used to test vm86 emulation. |
575 | 1f673135 | bellard | |
576 | 1f673135 | bellard | Various exceptions are raised to test most of the x86 user space |
577 | 1f673135 | bellard | exception reporting. |
578 | 1f673135 | bellard | |
579 | debc7065 | bellard | @node linux-test |
580 | 1f673135 | bellard | @section @file{linux-test} |
581 | 1f673135 | bellard | |
582 | 1f673135 | bellard | This program tests various Linux system calls. It is used to verify |
583 | 1f673135 | bellard | that the system call parameters are correctly converted between target |
584 | 1f673135 | bellard | and host CPUs. |
585 | 1f673135 | bellard | |
586 | debc7065 | bellard | @node qruncom.c |
587 | 15a34c63 | bellard | @section @file{qruncom.c} |
588 | 1f673135 | bellard | |
589 | 15a34c63 | bellard | Example of usage of @code{libqemu} to emulate a user mode i386 CPU. |
590 | debc7065 | bellard | |
591 | debc7065 | bellard | @node Index |
592 | debc7065 | bellard | @chapter Index |
593 | debc7065 | bellard | @printindex cp |
594 | debc7065 | bellard | |
595 | debc7065 | bellard | @bye |