root / target-sh4 / op.c @ c5d6edc3
History | View | Annotate | Download (14.8 kB)
1 |
/*
|
---|---|
2 |
* SH4 emulation
|
3 |
*
|
4 |
* Copyright (c) 2005 Samuel Tardieu
|
5 |
*
|
6 |
* This library is free software; you can redistribute it and/or
|
7 |
* modify it under the terms of the GNU Lesser General Public
|
8 |
* License as published by the Free Software Foundation; either
|
9 |
* version 2 of the License, or (at your option) any later version.
|
10 |
*
|
11 |
* This library is distributed in the hope that it will be useful,
|
12 |
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
13 |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
14 |
* Lesser General Public License for more details.
|
15 |
*
|
16 |
* You should have received a copy of the GNU Lesser General Public
|
17 |
* License along with this library; if not, write to the Free Software
|
18 |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
19 |
*/
|
20 |
#include "exec.h" |
21 |
|
22 |
static inline void set_flag(uint32_t flag) |
23 |
{ |
24 |
env->flags |= flag; |
25 |
} |
26 |
|
27 |
static inline void clr_flag(uint32_t flag) |
28 |
{ |
29 |
env->flags &= ~flag; |
30 |
} |
31 |
|
32 |
static inline void set_t(void) |
33 |
{ |
34 |
env->sr |= SR_T; |
35 |
} |
36 |
|
37 |
static inline void clr_t(void) |
38 |
{ |
39 |
env->sr &= ~SR_T; |
40 |
} |
41 |
|
42 |
static inline void cond_t(int cond) |
43 |
{ |
44 |
if (cond)
|
45 |
set_t(); |
46 |
else
|
47 |
clr_t(); |
48 |
} |
49 |
|
50 |
void OPPROTO op_movl_imm_T0(void) |
51 |
{ |
52 |
T0 = (uint32_t) PARAM1; |
53 |
RETURN(); |
54 |
} |
55 |
|
56 |
void OPPROTO op_movl_imm_T1(void) |
57 |
{ |
58 |
T0 = (uint32_t) PARAM1; |
59 |
RETURN(); |
60 |
} |
61 |
|
62 |
void OPPROTO op_movl_imm_T2(void) |
63 |
{ |
64 |
T0 = (uint32_t) PARAM1; |
65 |
RETURN(); |
66 |
} |
67 |
|
68 |
void OPPROTO op_cmp_eq_imm_T0(void) |
69 |
{ |
70 |
cond_t((int32_t) T0 == (int32_t) PARAM1); |
71 |
RETURN(); |
72 |
} |
73 |
|
74 |
void OPPROTO op_cmd_eq_T0_T1(void) |
75 |
{ |
76 |
cond_t(T0 == T1); |
77 |
RETURN(); |
78 |
} |
79 |
|
80 |
void OPPROTO op_cmd_hs_T0_T1(void) |
81 |
{ |
82 |
cond_t((uint32_t) T0 <= (uint32_t) T1); |
83 |
RETURN(); |
84 |
} |
85 |
|
86 |
void OPPROTO op_cmd_ge_T0_T1(void) |
87 |
{ |
88 |
cond_t((int32_t) T0 <= (int32_t) T1); |
89 |
RETURN(); |
90 |
} |
91 |
|
92 |
void OPPROTO op_cmd_hi_T0_T1(void) |
93 |
{ |
94 |
cond_t((uint32_t) T0 < (uint32_t) T1); |
95 |
RETURN(); |
96 |
} |
97 |
|
98 |
void OPPROTO op_cmd_gt_T0_T1(void) |
99 |
{ |
100 |
cond_t((int32_t) T0 < (int32_t) T1); |
101 |
RETURN(); |
102 |
} |
103 |
|
104 |
void OPPROTO op_not_T0(void) |
105 |
{ |
106 |
T0 = ~T0; |
107 |
RETURN(); |
108 |
} |
109 |
|
110 |
void OPPROTO op_bf_s(void) |
111 |
{ |
112 |
T2 = ~env->sr; |
113 |
env->delayed_pc = PARAM1; |
114 |
set_flag(DELAY_SLOT_CONDITIONAL); |
115 |
RETURN(); |
116 |
} |
117 |
|
118 |
void OPPROTO op_bt_s(void) |
119 |
{ |
120 |
T2 = env->sr; |
121 |
env->delayed_pc = PARAM1; |
122 |
set_flag(DELAY_SLOT_CONDITIONAL); |
123 |
RETURN(); |
124 |
} |
125 |
|
126 |
void OPPROTO op_bra(void) |
127 |
{ |
128 |
env->delayed_pc = PARAM1; |
129 |
set_flag(DELAY_SLOT); |
130 |
RETURN(); |
131 |
} |
132 |
|
133 |
void OPPROTO op_braf_T0(void) |
134 |
{ |
135 |
env->delayed_pc = PARAM1 + T0; |
136 |
set_flag(DELAY_SLOT); |
137 |
RETURN(); |
138 |
} |
139 |
|
140 |
void OPPROTO op_bsr(void) |
141 |
{ |
142 |
env->pr = PARAM1; |
143 |
env->delayed_pc = PARAM2; |
144 |
set_flag(DELAY_SLOT); |
145 |
RETURN(); |
146 |
} |
147 |
|
148 |
void OPPROTO op_bsrf_T0(void) |
149 |
{ |
150 |
env->pr = PARAM1; |
151 |
env->delayed_pc = PARAM1 + T0; |
152 |
set_flag(DELAY_SLOT); |
153 |
RETURN(); |
154 |
} |
155 |
|
156 |
void OPPROTO op_jsr_T0(void) |
157 |
{ |
158 |
env->pr = PARAM1; |
159 |
env->delayed_pc = T0; |
160 |
set_flag(DELAY_SLOT); |
161 |
RETURN(); |
162 |
} |
163 |
|
164 |
void OPPROTO op_rts(void) |
165 |
{ |
166 |
env->delayed_pc = env->pr; |
167 |
set_flag(DELAY_SLOT); |
168 |
RETURN(); |
169 |
} |
170 |
|
171 |
void OPPROTO op_clr_delay_slot(void) |
172 |
{ |
173 |
clr_flag(DELAY_SLOT); |
174 |
RETURN(); |
175 |
} |
176 |
|
177 |
void OPPROTO op_clr_delay_slot_conditional(void) |
178 |
{ |
179 |
clr_flag(DELAY_SLOT_CONDITIONAL); |
180 |
RETURN(); |
181 |
} |
182 |
|
183 |
void OPPROTO op_exit_tb(void) |
184 |
{ |
185 |
EXIT_TB(); |
186 |
RETURN(); |
187 |
} |
188 |
|
189 |
void OPPROTO op_addl_imm_T0(void) |
190 |
{ |
191 |
T0 += PARAM1; |
192 |
RETURN(); |
193 |
} |
194 |
|
195 |
void OPPROTO op_addl_imm_T1(void) |
196 |
{ |
197 |
T1 += PARAM1; |
198 |
RETURN(); |
199 |
} |
200 |
|
201 |
void OPPROTO op_clrmac(void) |
202 |
{ |
203 |
env->mach = env->macl = 0;
|
204 |
RETURN(); |
205 |
} |
206 |
|
207 |
void OPPROTO op_clrs(void) |
208 |
{ |
209 |
env->sr &= ~SR_S; |
210 |
RETURN(); |
211 |
} |
212 |
|
213 |
void OPPROTO op_clrt(void) |
214 |
{ |
215 |
env->sr &= ~SR_T; |
216 |
RETURN(); |
217 |
} |
218 |
|
219 |
void OPPROTO op_sets(void) |
220 |
{ |
221 |
env->sr |= SR_S; |
222 |
RETURN(); |
223 |
} |
224 |
|
225 |
void OPPROTO op_sett(void) |
226 |
{ |
227 |
env->sr |= SR_T; |
228 |
RETURN(); |
229 |
} |
230 |
|
231 |
void OPPROTO op_frchg(void) |
232 |
{ |
233 |
env->fpscr ^= FPSCR_FR; |
234 |
RETURN(); |
235 |
} |
236 |
|
237 |
void OPPROTO op_fschg(void) |
238 |
{ |
239 |
env->fpscr ^= FPSCR_SZ; |
240 |
RETURN(); |
241 |
} |
242 |
|
243 |
void OPPROTO op_rte(void) |
244 |
{ |
245 |
env->sr = env->ssr; |
246 |
env->delayed_pc = env->spc; |
247 |
set_flag(DELAY_SLOT); |
248 |
RETURN(); |
249 |
} |
250 |
|
251 |
void OPPROTO op_swapb_T0(void) |
252 |
{ |
253 |
T0 = (T0 & 0xffff0000) | ((T0 & 0xff) << 8) | ((T0 >> 8) & 0xff); |
254 |
RETURN(); |
255 |
} |
256 |
|
257 |
void OPPROTO op_swapw_T0(void) |
258 |
{ |
259 |
T0 = ((T0 & 0xffff) << 16) | ((T0 >> 16) & 0xffff); |
260 |
RETURN(); |
261 |
} |
262 |
|
263 |
void OPPROTO op_xtrct_T0_T1(void) |
264 |
{ |
265 |
T1 = ((T0 & 0xffff) << 16) | ((T1 >> 16) & 0xffff); |
266 |
RETURN(); |
267 |
} |
268 |
|
269 |
void OPPROTO op_addc_T0_T1(void) |
270 |
{ |
271 |
helper_addc_T0_T1(); |
272 |
RETURN(); |
273 |
} |
274 |
|
275 |
void OPPROTO op_addv_T0_T1(void) |
276 |
{ |
277 |
helper_addv_T0_T1(); |
278 |
RETURN(); |
279 |
} |
280 |
|
281 |
void OPPROTO op_cmp_eq_T0_T1(void) |
282 |
{ |
283 |
cond_t(T1 == T0); |
284 |
RETURN(); |
285 |
} |
286 |
|
287 |
void OPPROTO op_cmp_ge_T0_T1(void) |
288 |
{ |
289 |
cond_t((int32_t) T1 >= (int32_t) T0); |
290 |
RETURN(); |
291 |
} |
292 |
|
293 |
void OPPROTO op_cmp_gt_T0_T1(void) |
294 |
{ |
295 |
cond_t((int32_t) T1 > (int32_t) T0); |
296 |
RETURN(); |
297 |
} |
298 |
|
299 |
void OPPROTO op_cmp_hi_T0_T1(void) |
300 |
{ |
301 |
cond_t((uint32_t) T1 > (uint32_t) T0); |
302 |
RETURN(); |
303 |
} |
304 |
|
305 |
void OPPROTO op_cmp_hs_T0_T1(void) |
306 |
{ |
307 |
cond_t((uint32_t) T1 >= (uint32_t) T0); |
308 |
RETURN(); |
309 |
} |
310 |
|
311 |
void OPPROTO op_cmp_str_T0_T1(void) |
312 |
{ |
313 |
cond_t((T0 & 0x000000ff) == (T1 & 0x000000ff) || |
314 |
(T0 & 0x0000ff00) == (T1 & 0x0000ff00) || |
315 |
(T0 & 0x00ff0000) == (T1 & 0x00ff0000) || |
316 |
(T0 & 0xff000000) == (T1 & 0xff000000)); |
317 |
RETURN(); |
318 |
} |
319 |
|
320 |
void OPPROTO op_tst_T0_T1(void) |
321 |
{ |
322 |
cond_t((T1 & T0) == 0);
|
323 |
RETURN(); |
324 |
} |
325 |
|
326 |
void OPPROTO op_div0s_T0_T1(void) |
327 |
{ |
328 |
if (T1 & 0x80000000) |
329 |
env->sr |= SR_Q; |
330 |
else
|
331 |
env->sr &= ~SR_Q; |
332 |
if (T0 & 0x80000000) |
333 |
env->sr |= SR_M; |
334 |
else
|
335 |
env->sr &= ~SR_M; |
336 |
cond_t((T1 ^ T0) & 0x80000000);
|
337 |
RETURN(); |
338 |
} |
339 |
|
340 |
void OPPROTO op_div0u(void) |
341 |
{ |
342 |
env->sr &= ~(SR_M | SR_Q | SR_T); |
343 |
RETURN(); |
344 |
} |
345 |
|
346 |
void OPPROTO op_div1_T0_T1(void) |
347 |
{ |
348 |
helper_div1_T0_T1(); |
349 |
RETURN(); |
350 |
} |
351 |
|
352 |
void OPPROTO op_dmulsl_T0_T1(void) |
353 |
{ |
354 |
helper_dmulsl_T0_T1(); |
355 |
RETURN(); |
356 |
} |
357 |
|
358 |
void OPPROTO op_dmulul_T0_T1(void) |
359 |
{ |
360 |
helper_dmulul_T0_T1(); |
361 |
RETURN(); |
362 |
} |
363 |
|
364 |
void OPPROTO op_macl_T0_T1(void) |
365 |
{ |
366 |
helper_macl_T0_T1(); |
367 |
RETURN(); |
368 |
} |
369 |
|
370 |
void OPPROTO op_macw_T0_T1(void) |
371 |
{ |
372 |
helper_macw_T0_T1(); |
373 |
RETURN(); |
374 |
} |
375 |
|
376 |
void OPPROTO op_mull_T0_T1(void) |
377 |
{ |
378 |
env->macl = (T0 * T1) & 0xffffffff;
|
379 |
RETURN(); |
380 |
} |
381 |
|
382 |
void OPPROTO op_mulsw_T0_T1(void) |
383 |
{ |
384 |
env->macl = (int32_t) T0 *(int32_t) T1; |
385 |
RETURN(); |
386 |
} |
387 |
|
388 |
void OPPROTO op_muluw_T0_T1(void) |
389 |
{ |
390 |
env->macl = (uint32_t) T0 *(uint32_t) T1; |
391 |
RETURN(); |
392 |
} |
393 |
|
394 |
void OPPROTO op_neg_T0(void) |
395 |
{ |
396 |
T0 = -T0; |
397 |
RETURN(); |
398 |
} |
399 |
|
400 |
void OPPROTO op_negc_T0(void) |
401 |
{ |
402 |
helper_negc_T0(); |
403 |
RETURN(); |
404 |
} |
405 |
|
406 |
void OPPROTO op_shad_T0_T1(void) |
407 |
{ |
408 |
if ((T0 & 0x80000000) == 0) |
409 |
T1 <<= (T0 & 0x1f);
|
410 |
else if ((T0 & 0x1f) == 0) |
411 |
T1 = 0;
|
412 |
else
|
413 |
T1 = ((int32_t) T1) >> ((~T0 & 0x1f) + 1); |
414 |
RETURN(); |
415 |
} |
416 |
|
417 |
void OPPROTO op_shld_T0_T1(void) |
418 |
{ |
419 |
if ((T0 & 0x80000000) == 0) |
420 |
T1 <<= (T0 & 0x1f);
|
421 |
else if ((T0 & 0x1f) == 0) |
422 |
T1 = 0;
|
423 |
else
|
424 |
T1 = ((uint32_t) T1) >> ((~T0 & 0x1f) + 1); |
425 |
RETURN(); |
426 |
} |
427 |
|
428 |
void OPPROTO op_subc_T0_T1(void) |
429 |
{ |
430 |
helper_subc_T0_T1(); |
431 |
RETURN(); |
432 |
} |
433 |
|
434 |
void OPPROTO op_subv_T0_T1(void) |
435 |
{ |
436 |
helper_subv_T0_T1(); |
437 |
RETURN(); |
438 |
} |
439 |
|
440 |
void OPPROTO op_trapa(void) |
441 |
{ |
442 |
env->tra = PARAM1 * 2;
|
443 |
env->exception_index = 0x160;
|
444 |
do_raise_exception(); |
445 |
RETURN(); |
446 |
} |
447 |
|
448 |
void OPPROTO op_cmp_pl_T0(void) |
449 |
{ |
450 |
cond_t((int32_t) T0 > 0);
|
451 |
RETURN(); |
452 |
} |
453 |
|
454 |
void OPPROTO op_cmp_pz_T0(void) |
455 |
{ |
456 |
cond_t((int32_t) T0 >= 0);
|
457 |
RETURN(); |
458 |
} |
459 |
|
460 |
void OPPROTO op_jmp_T0(void) |
461 |
{ |
462 |
env->delayed_pc = T0; |
463 |
set_flag(DELAY_SLOT); |
464 |
RETURN(); |
465 |
} |
466 |
|
467 |
void OPPROTO op_movl_rN_rN(void) |
468 |
{ |
469 |
env->gregs[PARAM2] = env->gregs[PARAM1]; |
470 |
RETURN(); |
471 |
} |
472 |
|
473 |
void OPPROTO op_ldcl_rMplus_rN_bank(void) |
474 |
{ |
475 |
env->gregs[PARAM2] = env->gregs[PARAM1]; |
476 |
env->gregs[PARAM1] += 4;
|
477 |
RETURN(); |
478 |
} |
479 |
|
480 |
void OPPROTO op_ldc_T0_sr(void) |
481 |
{ |
482 |
env->sr = T0 & 0x700083f3;
|
483 |
RETURN(); |
484 |
} |
485 |
|
486 |
void OPPROTO op_stc_sr_T0(void) |
487 |
{ |
488 |
T0 = env->sr; |
489 |
RETURN(); |
490 |
} |
491 |
|
492 |
#define LDSTOPS(target,load,store) \
|
493 |
void OPPROTO op_##load##_T0_##target (void) \ |
494 |
{ env ->target = T0; RETURN(); \ |
495 |
} \ |
496 |
void OPPROTO op_##store##_##target##_T0 (void) \ |
497 |
{ T0 = env->target; RETURN(); \ |
498 |
} \ |
499 |
|
500 |
LDSTOPS(gbr, ldc, stc) |
501 |
LDSTOPS(vbr, ldc, stc) |
502 |
LDSTOPS(ssr, ldc, stc) |
503 |
LDSTOPS(spc, ldc, stc) |
504 |
LDSTOPS(sgr, ldc, stc) |
505 |
LDSTOPS(dbr, ldc, stc) |
506 |
LDSTOPS(mach, lds, sts) |
507 |
LDSTOPS(macl, lds, sts) |
508 |
LDSTOPS(pr, lds, sts) |
509 |
LDSTOPS(fpul, lds, sts) |
510 |
|
511 |
void OPPROTO op_lds_T0_fpscr(void) |
512 |
{ |
513 |
env->fpscr = T0 & 0x003fffff;
|
514 |
RETURN(); |
515 |
} |
516 |
|
517 |
void OPPROTO op_sts_fpscr_T0(void) |
518 |
{ |
519 |
T0 = env->fpscr & 0x003fffff;
|
520 |
RETURN(); |
521 |
} |
522 |
|
523 |
void OPPROTO op_movt_rN(void) |
524 |
{ |
525 |
env->gregs[PARAM1] = env->sr & SR_T; |
526 |
RETURN(); |
527 |
} |
528 |
|
529 |
void OPPROTO op_rotcl_Rn(void) |
530 |
{ |
531 |
helper_rotcl(&env->gregs[PARAM1]); |
532 |
RETURN(); |
533 |
} |
534 |
|
535 |
void OPPROTO op_rotcr_Rn(void) |
536 |
{ |
537 |
helper_rotcr(&env->gregs[PARAM1]); |
538 |
RETURN(); |
539 |
} |
540 |
|
541 |
void OPPROTO op_rotl_Rn(void) |
542 |
{ |
543 |
cond_t(env->gregs[PARAM1] & 0x80000000);
|
544 |
env->gregs[PARAM1] = (env->gregs[PARAM1] << 1) | (env->sr & SR_T);
|
545 |
RETURN(); |
546 |
} |
547 |
|
548 |
void OPPROTO op_rotr_Rn(void) |
549 |
{ |
550 |
cond_t(env->gregs[PARAM1] & 1);
|
551 |
env->gregs[PARAM1] = (env->gregs[PARAM1] >> 1) |
|
552 |
((env->sr & SR_T) ? 0x80000000 : 0); |
553 |
RETURN(); |
554 |
} |
555 |
|
556 |
void OPPROTO op_shal_Rn(void) |
557 |
{ |
558 |
cond_t(env->gregs[PARAM1] & 0x80000000);
|
559 |
env->gregs[PARAM1] <<= 1;
|
560 |
RETURN(); |
561 |
} |
562 |
|
563 |
void OPPROTO op_shar_Rn(void) |
564 |
{ |
565 |
cond_t(env->gregs[PARAM1] & 1);
|
566 |
*(int32_t *) & env->gregs[PARAM1] >>= 1;
|
567 |
RETURN(); |
568 |
} |
569 |
|
570 |
void OPPROTO op_shlr_Rn(void) |
571 |
{ |
572 |
cond_t(env->gregs[PARAM1] & 1);
|
573 |
*(uint32_t *) & env->gregs[PARAM1] >>= 1;
|
574 |
RETURN(); |
575 |
} |
576 |
|
577 |
void OPPROTO op_shll2_Rn(void) |
578 |
{ |
579 |
env->gregs[PARAM1] <<= 2;
|
580 |
RETURN(); |
581 |
} |
582 |
|
583 |
void OPPROTO op_shll8_Rn(void) |
584 |
{ |
585 |
env->gregs[PARAM1] <<= 8;
|
586 |
RETURN(); |
587 |
} |
588 |
|
589 |
void OPPROTO op_shll16_Rn(void) |
590 |
{ |
591 |
env->gregs[PARAM1] <<= 16;
|
592 |
RETURN(); |
593 |
} |
594 |
|
595 |
void OPPROTO op_shlr2_Rn(void) |
596 |
{ |
597 |
*(uint32_t *) & env->gregs[PARAM1] >>= 2;
|
598 |
RETURN(); |
599 |
} |
600 |
|
601 |
void OPPROTO op_shlr8_Rn(void) |
602 |
{ |
603 |
*(uint32_t *) & env->gregs[PARAM1] >>= 8;
|
604 |
RETURN(); |
605 |
} |
606 |
|
607 |
void OPPROTO op_shlr16_Rn(void) |
608 |
{ |
609 |
*(uint32_t *) & env->gregs[PARAM1] >>= 16;
|
610 |
RETURN(); |
611 |
} |
612 |
|
613 |
void OPPROTO op_tasb_rN(void) |
614 |
{ |
615 |
cond_t(*(int8_t *) env->gregs[PARAM1] == 0);
|
616 |
*(int8_t *) env->gregs[PARAM1] |= 0x80;
|
617 |
RETURN(); |
618 |
} |
619 |
|
620 |
void OPPROTO op_movl_T0_rN(void) |
621 |
{ |
622 |
env->gregs[PARAM1] = T0; |
623 |
RETURN(); |
624 |
} |
625 |
|
626 |
void OPPROTO op_movl_T1_rN(void) |
627 |
{ |
628 |
env->gregs[PARAM1] = T1; |
629 |
RETURN(); |
630 |
} |
631 |
|
632 |
void OPPROTO op_movb_rN_T0(void) |
633 |
{ |
634 |
T0 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
|
635 |
RETURN(); |
636 |
} |
637 |
|
638 |
void OPPROTO op_movub_rN_T0(void) |
639 |
{ |
640 |
T0 = env->gregs[PARAM1] & 0xff;
|
641 |
RETURN(); |
642 |
} |
643 |
|
644 |
void OPPROTO op_movw_rN_T0(void) |
645 |
{ |
646 |
T0 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
|
647 |
RETURN(); |
648 |
} |
649 |
|
650 |
void OPPROTO op_movuw_rN_T0(void) |
651 |
{ |
652 |
T0 = env->gregs[PARAM1] & 0xffff;
|
653 |
RETURN(); |
654 |
} |
655 |
|
656 |
void OPPROTO op_movl_rN_T0(void) |
657 |
{ |
658 |
T0 = env->gregs[PARAM1]; |
659 |
RETURN(); |
660 |
} |
661 |
|
662 |
void OPPROTO op_movb_rN_T1(void) |
663 |
{ |
664 |
T1 = (int32_t) (int8_t) (env->gregs[PARAM1] & 0xff);
|
665 |
RETURN(); |
666 |
} |
667 |
|
668 |
void OPPROTO op_movub_rN_T1(void) |
669 |
{ |
670 |
T1 = env->gregs[PARAM1] & 0xff;
|
671 |
RETURN(); |
672 |
} |
673 |
|
674 |
void OPPROTO op_movw_rN_T1(void) |
675 |
{ |
676 |
T1 = (int32_t) (int16_t) (env->gregs[PARAM1] & 0xffff);
|
677 |
RETURN(); |
678 |
} |
679 |
|
680 |
void OPPROTO op_movuw_rN_T1(void) |
681 |
{ |
682 |
T1 = env->gregs[PARAM1] & 0xffff;
|
683 |
RETURN(); |
684 |
} |
685 |
|
686 |
void OPPROTO op_movl_rN_T1(void) |
687 |
{ |
688 |
T1 = env->gregs[PARAM1]; |
689 |
RETURN(); |
690 |
} |
691 |
|
692 |
void OPPROTO op_movl_imm_rN(void) |
693 |
{ |
694 |
env->gregs[PARAM2] = PARAM1; |
695 |
RETURN(); |
696 |
} |
697 |
|
698 |
void OPPROTO op_fmov_frN_FT0(void) |
699 |
{ |
700 |
FT0 = *(float32 *)&env->fregs[PARAM1]; |
701 |
RETURN(); |
702 |
} |
703 |
|
704 |
void OPPROTO op_fmov_drN_DT0(void) |
705 |
{ |
706 |
DT0 = *(float64 *)&env->fregs[PARAM1]; |
707 |
RETURN(); |
708 |
} |
709 |
|
710 |
void OPPROTO op_fmov_FT0_frN(void) |
711 |
{ |
712 |
*(float32 *)&env->fregs[PARAM1] = FT0; |
713 |
RETURN(); |
714 |
} |
715 |
|
716 |
void OPPROTO op_fmov_DT0_drN(void) |
717 |
{ |
718 |
*(float64 *)&env->fregs[PARAM1] = DT0; |
719 |
RETURN(); |
720 |
} |
721 |
|
722 |
void OPPROTO op_dec1_rN(void) |
723 |
{ |
724 |
env->gregs[PARAM1] -= 1;
|
725 |
RETURN(); |
726 |
} |
727 |
|
728 |
void OPPROTO op_dec2_rN(void) |
729 |
{ |
730 |
env->gregs[PARAM1] -= 2;
|
731 |
RETURN(); |
732 |
} |
733 |
|
734 |
void OPPROTO op_dec4_rN(void) |
735 |
{ |
736 |
env->gregs[PARAM1] -= 4;
|
737 |
RETURN(); |
738 |
} |
739 |
|
740 |
void OPPROTO op_dec8_rN(void) |
741 |
{ |
742 |
env->gregs[PARAM1] -= 4;
|
743 |
RETURN(); |
744 |
} |
745 |
|
746 |
void OPPROTO op_inc1_rN(void) |
747 |
{ |
748 |
env->gregs[PARAM1] += 1;
|
749 |
RETURN(); |
750 |
} |
751 |
|
752 |
void OPPROTO op_inc2_rN(void) |
753 |
{ |
754 |
env->gregs[PARAM1] += 2;
|
755 |
RETURN(); |
756 |
} |
757 |
|
758 |
void OPPROTO op_inc4_rN(void) |
759 |
{ |
760 |
env->gregs[PARAM1] += 4;
|
761 |
RETURN(); |
762 |
} |
763 |
|
764 |
void OPPROTO op_inc8_rN(void) |
765 |
{ |
766 |
env->gregs[PARAM1] += 4;
|
767 |
RETURN(); |
768 |
} |
769 |
|
770 |
void OPPROTO op_add_T0_rN(void) |
771 |
{ |
772 |
env->gregs[PARAM1] += T0; |
773 |
RETURN(); |
774 |
} |
775 |
|
776 |
void OPPROTO op_sub_T0_rN(void) |
777 |
{ |
778 |
env->gregs[PARAM1] -= T0; |
779 |
RETURN(); |
780 |
} |
781 |
|
782 |
void OPPROTO op_and_T0_rN(void) |
783 |
{ |
784 |
env->gregs[PARAM1] &= T0; |
785 |
RETURN(); |
786 |
} |
787 |
|
788 |
void OPPROTO op_or_T0_rN(void) |
789 |
{ |
790 |
env->gregs[PARAM1] |= T0; |
791 |
RETURN(); |
792 |
} |
793 |
|
794 |
void OPPROTO op_xor_T0_rN(void) |
795 |
{ |
796 |
env->gregs[PARAM1] ^= T0; |
797 |
RETURN(); |
798 |
} |
799 |
|
800 |
void OPPROTO op_add_rN_T0(void) |
801 |
{ |
802 |
T0 += env->gregs[PARAM1]; |
803 |
RETURN(); |
804 |
} |
805 |
|
806 |
void OPPROTO op_add_rN_T1(void) |
807 |
{ |
808 |
T1 += env->gregs[PARAM1]; |
809 |
RETURN(); |
810 |
} |
811 |
|
812 |
void OPPROTO op_add_imm_rN(void) |
813 |
{ |
814 |
env->gregs[PARAM2] += PARAM1; |
815 |
RETURN(); |
816 |
} |
817 |
|
818 |
void OPPROTO op_and_imm_rN(void) |
819 |
{ |
820 |
env->gregs[PARAM2] &= PARAM1; |
821 |
RETURN(); |
822 |
} |
823 |
|
824 |
void OPPROTO op_or_imm_rN(void) |
825 |
{ |
826 |
env->gregs[PARAM2] |= PARAM1; |
827 |
RETURN(); |
828 |
} |
829 |
|
830 |
void OPPROTO op_xor_imm_rN(void) |
831 |
{ |
832 |
env->gregs[PARAM2] ^= PARAM1; |
833 |
RETURN(); |
834 |
} |
835 |
|
836 |
void OPPROTO op_dt_rN(void) |
837 |
{ |
838 |
cond_t((--env->gregs[PARAM1]) == 0);
|
839 |
RETURN(); |
840 |
} |
841 |
|
842 |
void OPPROTO op_tst_imm_rN(void) |
843 |
{ |
844 |
cond_t((env->gregs[PARAM2] & PARAM1) == 0);
|
845 |
RETURN(); |
846 |
} |
847 |
|
848 |
void OPPROTO op_movl_T0_T1(void) |
849 |
{ |
850 |
T1 = T0; |
851 |
RETURN(); |
852 |
} |
853 |
|
854 |
void OPPROTO op_movl_fpul_FT0(void) |
855 |
{ |
856 |
FT0 = *(float32 *)&env->fpul; |
857 |
RETURN(); |
858 |
} |
859 |
|
860 |
void OPPROTO op_movl_FT0_fpul(void) |
861 |
{ |
862 |
*(float32 *)&env->fpul = FT0; |
863 |
RETURN(); |
864 |
} |
865 |
|
866 |
void OPPROTO op_goto_tb0(void) |
867 |
{ |
868 |
GOTO_TB(op_goto_tb0, PARAM1, 0);
|
869 |
RETURN(); |
870 |
} |
871 |
|
872 |
void OPPROTO op_goto_tb1(void) |
873 |
{ |
874 |
GOTO_TB(op_goto_tb1, PARAM1, 1);
|
875 |
RETURN(); |
876 |
} |
877 |
|
878 |
void OPPROTO op_movl_imm_PC(void) |
879 |
{ |
880 |
env->pc = PARAM1; |
881 |
RETURN(); |
882 |
} |
883 |
|
884 |
void OPPROTO op_jT(void) |
885 |
{ |
886 |
if (env->sr & SR_T)
|
887 |
GOTO_LABEL_PARAM(1);
|
888 |
RETURN(); |
889 |
} |
890 |
|
891 |
void OPPROTO op_jTT2(void) |
892 |
{ |
893 |
if (T2 & SR_T)
|
894 |
GOTO_LABEL_PARAM(1);
|
895 |
RETURN(); |
896 |
} |
897 |
|
898 |
void OPPROTO op_movl_delayed_pc_PC(void) |
899 |
{ |
900 |
env->pc = env->delayed_pc; |
901 |
RETURN(); |
902 |
} |
903 |
|
904 |
void OPPROTO op_addl_GBR_T0(void) |
905 |
{ |
906 |
T0 += env->gbr; |
907 |
RETURN(); |
908 |
} |
909 |
|
910 |
void OPPROTO op_and_imm_T0(void) |
911 |
{ |
912 |
T0 &= PARAM1; |
913 |
RETURN(); |
914 |
} |
915 |
|
916 |
void OPPROTO op_or_imm_T0(void) |
917 |
{ |
918 |
T0 |= PARAM1; |
919 |
RETURN(); |
920 |
} |
921 |
|
922 |
void OPPROTO op_xor_imm_T0(void) |
923 |
{ |
924 |
T0 ^= PARAM1; |
925 |
RETURN(); |
926 |
} |
927 |
|
928 |
void OPPROTO op_tst_imm_T0(void) |
929 |
{ |
930 |
cond_t((T0 & PARAM1) == 0);
|
931 |
RETURN(); |
932 |
} |
933 |
|
934 |
void OPPROTO op_raise_illegal_instruction(void) |
935 |
{ |
936 |
env->exception_index = 0x180;
|
937 |
do_raise_exception(); |
938 |
RETURN(); |
939 |
} |
940 |
|
941 |
void OPPROTO op_raise_slot_illegal_instruction(void) |
942 |
{ |
943 |
env->exception_index = 0x1a0;
|
944 |
do_raise_exception(); |
945 |
RETURN(); |
946 |
} |
947 |
|
948 |
void OPPROTO op_debug(void) |
949 |
{ |
950 |
env->exception_index = EXCP_DEBUG; |
951 |
cpu_loop_exit(); |
952 |
} |
953 |
|
954 |
/* Load and store */
|
955 |
#define MEMSUFFIX _raw
|
956 |
#include "op_mem.c" |
957 |
#undef MEMSUFFIX
|
958 |
#if !defined(CONFIG_USER_ONLY)
|
959 |
#define MEMSUFFIX _user
|
960 |
#include "op_mem.c" |
961 |
#undef MEMSUFFIX
|
962 |
|
963 |
#define MEMSUFFIX _kernel
|
964 |
#include "op_mem.c" |
965 |
#undef MEMSUFFIX
|
966 |
#endif
|