x86: fix daa opcode for al register values higher than 0xf9
The second if statement should consider the original al register value,and not the new one.
Signed-off-by: Boris Figovsky <boris.figovksy@ravellosystems.com>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
Fix up some style nits of last uq/master merge
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
Avoid allocating TCG resources in non-TCG mode
Do not allocate TCG-only resources like the translation buffer whenrunning over KVM or XEN. Saves a "few" bytes in the qemu address spaceand is also conceptually cleaner.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
Remove #ifdef KVM_CAP_TSC_CONTROL
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
qemu-x86: Add tsc_freq option to -cpu
To let the user configure the desired tsc frequency for theguest if running in KVM.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
qemu-x86: Set tsc_khz in kvm when supported
Make use of the KVM_TSC_CONTROL feature if available.
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h totarget-*/op_helper.c. Move also various other stuff only used inop_helper.c there.
Define global env in dyngen-exec.h.
For i386, move wrappers for segment and FPU helpers from user-exec.c...
Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This isneeded by later patches.
exec.h: fix coding style and change cpu_has_work to return bool
Before the next patch, fix coding style of the areas affected.
Change the type of the return value from cpu_has_work() andqemu_cpu_has_work() to bool.
x86: use caller supplied CPUState for interrupt related stuff
Several x86 specific functions are called from cpu-exec.c with theassumption that global env register is valid. This will be changedlater, so make the functions use caller supplied CPUState parameter....
cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relyingon global env.
kvm: fix FPU state subsection
There is no need to specify version on the subsection fields.
KVM: Fix XSAVE feature bit enumeration
When iterating through the XSAVE feature enumeration CPUID leaf (0xD)we should not stop at the first zero EAX, but instead keep scanningsince there are gaps in the enumeration (ECX=1 for instance).This fixes the proper usage of AVX in KVM guests....
kvm: x86: Pass KVMState to kvm_arch_get_supported_cpuid
kvm_arch_get_supported_cpuid checks for global cpuid restrictions, itdoes not require any CPUState reference. Changing its interface allowsto call it before any VCPU is initialized.
CC: Eduardo Habkost <ehabkost@redhat.com>...
kvm: x86: Drop KVM_CAP build dependencies
No longer needed with accompanied kernel headers.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
kvm: Drop CONFIG_KVM_PARA
The kvm_para.h header is now always available.
kvm: x86: Save/restore FPU OP, IP and DP
These FPU states are properly maintained by KVM but not yet by TCG. Sofar we unconditionally set them to 0 in the guest which may causestate corruptions, though not with modern guests.
To avoid breaking backward migration, use a conditional subsection that...
kvm: Add CPUID support for VIA CPU
When KVM is running on VIA CPU with host cpu's model, thefeautures of VIA CPU will be passed into kvm guest by callingthe CPUID instruction for Centaur.
Signed-off-by: BrillyWu<brillywu@viatech.com.cn>Signed-off-by: KaryJin<karyjin@viatech.com.cn>...
kvm: Enable CPU SMEP feature
This patchset enables a new CPU feature SMEP (Supervisor Mode ExecutionProtection) in QEMU-KVM. SMEP prevents kernel from executing code in application.Updated Intel SDM describes this CPU feature. The document will be published soon....
Fix compilation warning due to missing header for sigaction (followup)
This patch removes all references to signal.h when qemu-common.h is includedas they become redundant.
Signed-off-by: Alexandre Raymond <cerbere@gmail.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
target-i386: Make x86 mfence and lfence illegal without SSE2
While trying to use qemu -cpu pentium3 to test for incorrect uses of certainSSE2 instructions, I found that QEMU allowed the mfence and lfenceinstructions to be executed even though Pentium 3 doesn't support them....
target-i386: use floatx80 constants in helper_fld*_ST0()
Instead of using a table which doesn't correspond to anything fromphysical in the CPU, use directly the constants in helper_fld*_ST0().
Cc: Andreas Färber <andreas.faerber@web.de>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target-i386: remove old code handling float64
Now that target-i386 uses softfloat, floatx80 is always available andthere is no need anymore to have code handling both float64 and floax80.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
irq: Privatize CPU_INTERRUPT_NMI.
This interrupt name is used by i386, CRIS, and MicroBlaze.Copy the name into each target.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-i386: Privatize some i386-specific interrupt names.
SMI, VIRQ, INIT, SIPI, and MCE are all only used by the i386 port.
kvm: use qemu_free consistently
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
x86: Allow multiple cpu feature matches of lookup_feature
kvmclock is represented by two feature bits. Therefore, lookup_featureneeds to continue its search even after the first match. Enhance itaccordingly and switch to a bool return type at this chance....
kvm: add kvmclock to its second bit
We have two bits that can represent kvmclock in cpuid.They signal the guest which msr set to use. When we tweak flagsinvolving this value - specially when we use "-", we have to act on both.
Signed-off-by: Glauber Costa <glommer@redhat.com>...
kvm: use kernel-provided para_features instead of statically coming up with new capabilities
Use the features provided by KVM_GET_SUPPORTED_CPUID directly tomask out features from guest-visible cpuid.
The old get_para_features() mechanism is kept for older kernels that do not implement it....
target-i386: fix helper_fscale() wrt softfloat
Use the scalbn softfloat function to implement helper_fscale(). Thisfixes corner cases (e.g. NaN) and makes a few more GNU libc math teststo pass.
target-i386: fix helper_fbld_ST0() wrt softfloat
target-i386: fix helper_fxtract() wrt softfloat
With softfloat it's not possible to play with the overflow of anunsigned value to get the 0 case partially correct. Use a special casefor that. Using a division to generate an infinity is the easiest waythat works for both softfloat and softfloat-native....
target-i386: fix helper_fdiv() wrt softfloat
target-i386: fix helper_fsqrt() wrt softfloat
target-i386: replace approx_rsqrt and approx_rcp by softfloat ops
target-i386: add CPU86_LDouble <-> double conversion functions
Add functions to convert CPU86_LDouble to double and vice versa. Theyare going to be used to implement logarithmic and trigonometric functionuntil softfloat implement them.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target-i386: fix logarithmic and trigonometric helpers wrt softfloat
Use the new CPU86_LDouble <-> double conversion functions to make logarithmicand trigonometric helpers working with softfloat.
target-i386: fix helper_fprem() and helper_fprem1() wrt softfloat
target-i386: fix constants wrt softfloat
Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.Is is now unused, so remove it.
Cc: Aurelien Jarno <aurelien@aurel32.net>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Remove unused function parameters from gen_pc_load and rename the function
Function gen_pc_load was introduced in commitd2856f1ad4c259e5766847c49acbb4e390731bd4.The only reason for parameter searched_pc wasa debug statement in target-i386/translate.c....
target-i386: use CPU_LDoubleU instead of a private union
Use CPU_LDoubleU in cpu_dump_state() instead of redefining a union fordoing the conversion.
Based on a patch from Laurent Vivier <laurent@vivier.eu>.
Cc: Laurent Vivier <laurent@vivier.eu>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target-i386: use float unions from cpu-all.h
Use float unions from cpu-all.h instead of redefining new (wrong for arm)ones in target-i386. This also allows building cpu-exec.o with softfloat.
target-i386: add floatx_{add,mul,sub} and use them
Add floatx_{add,mul,sub} defines, and use them instead of using directC operations.
target-i386: fix CMPUNORDPS/D and CMPORDPS/D instructions
SSE instructions CMPUNORDPS/D and CMPORDPS/D do not trigger an invalidexception if operands are qNANs.
softfloat: rename float*_eq() into float*_eq_quiet()
float*_eq functions have a different semantics than other comparisonfunctions. Fix that by first renaming float*_quiet() into float*_eq_quiet().
Note that it is purely mechanical, and the behaviour should be unchanged....
Fix conversions from pointer to tcg_target_long
tcg_gen_exit_tb takes a parameter of type tcg_target_long,so the type casts of pointer to long should be replaced bytype casts of pointer to tcg_target_long (suggested by Blue Swirl).
These changes are needed for build environments where...
Revert "x86: Save/restore PAT MSR"
This reverts commit c995b495b9d6e60ab1e390bd398a22425d0b3c8c.
From Jan Kiszka:
Ouch, indeed. Moreover, CPU_SAVE_VERSION was not updated (likely the reason for the breakage). Thanks for debugging this!
Anthony (or whoever), please revert this unneeded commit in qemu.git....
kvm: Align kvm_arch_handle_exit to kvm_cpu_exec changes
Make the return code of kvm_arch_handle_exit directly usable forkvm_cpu_exec. This is straightforward for x86 and ppc, just s390would require more work. Avoid this for now by pushing the return code...
kvm: x86: Reorder functions in kvm.c
Required for next patch which will access guest debug services fromkvm_arch_handle_exit. No functional changes.
kvm: x86: Push kvm_arch_debug to kvm_arch_handle_exit
There are no generic bits remaining in the handling of KVM_EXIT_DEBUG.So push its logic completely into arch hands, i.e. only x86 so far.
kvm: x86: Do not leave halt if interrupts are disabled
When an external interrupt is pending but IF is cleared, we must notleave the halt state prematurely.
x86: Properly reset PAT MSR
Conforming to the Intel spec, set the power-on value of PAT also onreset, but save it across INIT.
x86: Save/restore PAT MSR
kvm: x86: Synchronize PAT MSR with the kernel
kvm: x86: Consolidate TCG and KVM MCE injection code
This switches KVM's MCE injection path to cpu_x86_inject_mce, both forSIGBUS and monitor initiated events. This means we prepare the MCA MSRsin the VCPUState also for KVM.
We have to drop the MSRs writeback restrictions for this purpose which...
kvm: x86: Clean up kvm_setup_mce
There is nothing to abstract here. Fold kvm_setup_mce into its callerand fix up the error reporting (return code of kvm_vcpu_ioctl holds theerror value).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Huang Ying <ying.huang@intel.com>...
kvm: x86: Fail kvm_arch_init_vcpu if MCE initialization fails
There is no reason to continue if the kernel claims to support MCE butthen fails to process our request.
KVM, MCE, unpoison memory address across reboot
In Linux kernel HWPoison processing implementation, the virtualaddress in processes mapping the error physical memory page is markedas HWPoison. So that, the further accessing to the virtualaddress will kill corresponding processes with SIGBUS....
x86: Account for MCE in cpu_has_work
MCEs can be injected asynchronously, so they can also terminate the haltstate.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Huang Ying <ying.huang@intel.com>CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>...
x86: Perform implicit mcg_status reset
Reorder mcg_status in CPUState to achieve automatic clearing on reset.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Huang Ying <ying.huang@intel.com>CC: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>CC: Jin Dongming <jin.dongming@np.css.fujitsu.com>...
x86: Small cleanups of MCE helpers
Fix some code style issues, use proper headers, and align to cpu_x86naming scheme. No functional changes.
x86: Refine error reporting of MCE injection services
As this service is used by the human monitor, make sure that errors getreported to the right channel, and also raise the verbosity.
This requires to move Monitor typedef in qemu-common.h to resolve the...
x86: Optionally avoid injecting AO MCEs while others are pending
Allow to tell cpu_x86_inject_mce that it should ignore Action OptionalMCE events when the target VCPU is still processing another one. Thiswill be used by KVM soon.
kvm: x86: Move MCE functions together
Pure function suffling to avoid multiple #ifdef KVM_CAP_MCE sections,no functional changes. While at it, annotate some #ifdef sections.
kvm: Rename kvm_arch_process_irqchip_events to async_events
We will broaden the scope of this function on x86 beyond irqchip events.
kvm: x86: Inject pending MCE events on state writeback
The current way of injecting MCE events without updating of andsynchronizing with the CPUState is broken and causes spuriouscorruptions of the MCE-related parts of the CPUState.
As a first step towards a fix, enhance the state writeback code with...
x86: Run qemu_inject_x86_mce on target VCPU
We will use the current TCG-only MCE injection path for KVM as well, andthen this read-modify-write of the target VCPU state has to be performedsynchronously in the corresponding thread.
Refactor thread retrieval and check
We have qemu_cpu_self and qemu_thread_self. The latter is retrieving thecurrent thread, the former is checking for equality (using CPUState). Wealso have qemu_thread_equal which is only used like qemu_cpu_self.
This refactors the interfaces, creating qemu_cpu_is_self and...
inline cpu_halted into sole caller
All implementations are now the same, and there is only one caller,so inline the function there.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
kvm: make tsc stable over migration and machine start
If the machine is stopped, we should not record two different tsc valuesupon a save operation. The same problem happens with kvmclock.
But kvmclock is taking a different diretion, being now seen as a separate...
kvm: Separate TCG from KVM cpu execution
Mixing up TCG bits with KVM already led to problems around eflagsemulation on x86. Moreover, quite some code that TCG requires on cpuenty/exit is useless for KVM. So dispatch between tcg_cpu_exec andkvm_cpu_exec as early as possible....
kvm: x86: Prepare VCPU loop for in-kernel irqchip
Effectively no functional change yet as kvm_irqchip_in_kernel still onlyreturns 0, but this patch will allow qemu-kvm to adopt the VCPU loop ofupsteam KVM.
kvm: Drop return values from kvm_arch_pre/post_run
We do not check them, and the only arch with non-empty implementationsalways returns 0 (this is also true for qemu-kvm).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>CC: Alexander Graf <agraf@suse.de>...
kvm: x86: Catch and report failing IRQ and NMI injections
We do not need to abort, but the user should be notified that weirdthings go on.
kvm: Provide sigbus services arch-independently
Provide arch-independent kvm_on_sigbus* stubs to remove the #ifdef'eryfrom cpus.c. This patch also fixes --disable-kvm build by providing themissing kvm_on_sigbus_vcpu kvm-stub.
kvm: Unconditionally reenter kernel after IO exits
KVM requires to reenter the kernel after IO exits in order to completeinstruction emulation. Failing to do so will leave the kernel stateinconsistently behind. To ensure that we will get back ASAP, we issue a...
x86: Fix MCA broadcast parameters for TCG case
When broadcasting MCEs, we need to set MCIP and RIPV in mcg_status likeit is done for KVM. Use the symbolic constants at this chance.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>...
Merge remote branch 'qemu-kvm/uq/master' into staging
aliguori: fix build with !defined(KVM_CAP_ASYNC_PF)
kvm: Consolidate must-have capability checks
Instead of splattering the code with #ifdefs and runtime checks forcapabilities we cannot work without anyway, provide central testinfrastructure for verifying their availability both at build andruntime.
kvm: x86: Rework identity map and TSS setup for larger BIOS sizes
In order to support loading BIOSes > 256K, reorder the code, adjustingthe base if the kernel supports moving the identity map.
kvm: x86: Implicitly clear nmi_injected/pending on reset
All CPUX86State variables before CPU_COMMON are automatically cleared onreset. Reorder nmi_injected and nmi_pending to avoid having to touchthem explicitly.
kvm: x86: Only read/write MSR_KVM_ASYNC_PF_EN if supported
If the kernel does not support KVM_CAP_ASYNC_PF, it also does not knowabout the related MSR. So skip it during state synchronization in thatcase. Fixes annoying kernel warnings.
kvm: x86: Align kvm_arch_put_registers code with comment
The ordering doesn't matter in this case, but better keep it consistent.
kvm: x86: Prepare kvm_get_mp_state for in-kernel irqchip
This code path will not yet be taken as we still lack in-kernel irqchipsupport. But qemu-kvm can already make use of it and drop its ownmp_state access services.
kvm: x86: Remove redundant mp_state initialization
kvm_arch_reset_vcpu initializes mp_state, and that function is invokedright after kvm_arch_init_vcpu.
kvm: x86: Fix xcr0 reset mismerge
For unknown reasons, xcr0 reset ended up in kvm_arch_update_guest_debugon upstream merge. Fix this and also remove the misleading comment (1 isTHE reset value).
kvm: x86: Refactor msr_star/hsave_pa setup and checks
Simplify kvm_has_msr_star/hsave_pa to booleans and push their one-timeinitialization into kvm_arch_init. Also handle potential errors of thatsetup procedure.
kvm: x86: Reset paravirtual MSRs
Make sure to write the cleared MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,and MSR_KVM_ASYNC_PF_EN to the kernel state so that a freshly bootedguest cannot be disturbed by old values.
kvm: x86: Fix !CONFIG_KVM_PARA build
If we lack kvm_para.h, MSR_KVM_ASYNC_PF_EN is not defined. The change inkvm_arch_init_vcpu is just for consistency reasons.
kvm: Drop smp_cpus argument from init functions
No longer used.
kvm: x86: Swallow KVM_EXIT_SET_TPR
This exit only triggers activity in the common exit path, but we shouldaccept it in order to be able to detect unknown exit types.
kvm: Stop on all fatal exit reasons
Ensure that we stop the guest whenever we face a fatal or unknown exitreason. If we stop, we also have to enforce a cpu loop exit.
kvm: Improve reporting of fatal errors
Report KVM_EXIT_UNKNOWN, KVM_EXIT_FAIL_ENTRY, and KVM_EXIT_EXCEPTIONwith more details to stderr. The latter two are so far x86-only, so movethem into the arch-specific handler. Integrate the Intel real modewarning on KVM_EXIT_FAIL_ENTRY that qemu-kvm carries, but actually...
x86: Optionally dump code bytes on cpu_dump_state
Introduce the cpu_dump_state flag CPU_DUMP_CODE and implement it forx86. This writes out the code bytes around the current instructionpointer. Make use of this feature in KVM to help debugging fatal vmexits....
kvm: x86: Fix a few coding style violations
No functional changes.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Avi Kivity <avi@redhat.com>