Revision c701b35b hw/pxa2xx.c

b/hw/pxa2xx.c
1466 1466
    qemu_put_8s(f, &s->ibmr);
1467 1467
    qemu_put_8s(f, &s->data);
1468 1468

  
1469
    i2c_bus_save(f, s->bus);
1470 1469
    i2c_slave_save(f, &s->slave);
1471 1470
}
1472 1471

  
......
1474 1473
{
1475 1474
    struct pxa2xx_i2c_s *s = (struct pxa2xx_i2c_s *) opaque;
1476 1475

  
1476
    if (version_id != 1)
1477
        return -EINVAL;
1478

  
1477 1479
    qemu_get_be16s(f, &s->control);
1478 1480
    qemu_get_be16s(f, &s->status);
1479 1481
    qemu_get_8s(f, &s->ibmr);
1480 1482
    qemu_get_8s(f, &s->data);
1481 1483

  
1482
    i2c_bus_load(f, s->bus);
1483 1484
    i2c_slave_load(f, &s->slave);
1484 1485
    return 0;
1485 1486
}
......
1488 1489
                qemu_irq irq, uint32_t page_size)
1489 1490
{
1490 1491
    int iomemtype;
1492
    /* FIXME: Should the slave device really be on a separate bus?  */
1491 1493
    struct pxa2xx_i2c_s *s = (struct pxa2xx_i2c_s *)
1492 1494
            i2c_slave_init(i2c_init_bus(), 0, sizeof(struct pxa2xx_i2c_s));
1493 1495

  
......
1502 1504
                    pxa2xx_i2c_writefn, s);
1503 1505
    cpu_register_physical_memory(s->base & ~page_size, page_size, iomemtype);
1504 1506

  
1505
    register_savevm("pxa2xx_i2c", base, 0,
1507
    register_savevm("pxa2xx_i2c", base, 1,
1506 1508
                    pxa2xx_i2c_save, pxa2xx_i2c_load, s);
1507 1509

  
1508 1510
    return s;

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