root / hw / mips.h @ c75a823c
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1 | 87ecb68b | pbrook | #ifndef HW_MIPS_H
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2 | 87ecb68b | pbrook | #define HW_MIPS_H
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3 | 87ecb68b | pbrook | /* Definitions for mips board emulation. */
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4 | 87ecb68b | pbrook | |
5 | 87ecb68b | pbrook | /* gt64xxx.c */
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6 | 87ecb68b | pbrook | PCIBus *pci_gt64120_init(qemu_irq *pic); |
7 | 87ecb68b | pbrook | |
8 | 87ecb68b | pbrook | /* ds1225y.c */
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9 | 02cb1585 | aurel32 | void *ds1225y_init(target_phys_addr_t mem_base, const char *filename); |
10 | 02cb1585 | aurel32 | void ds1225y_set_protection(void *opaque, int protection); |
11 | 87ecb68b | pbrook | |
12 | 4ce7ff6e | aurel32 | /* g364fb.c */
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13 | 4ce7ff6e | aurel32 | int g364fb_mm_init(DisplayState *ds,
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14 | 4ce7ff6e | aurel32 | int vram_size, int it_shift, |
15 | 4ce7ff6e | aurel32 | target_phys_addr_t vram_base, target_phys_addr_t ctrl_base); |
16 | 4ce7ff6e | aurel32 | |
17 | 87ecb68b | pbrook | /* mipsnet.c */
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18 | 87ecb68b | pbrook | void mipsnet_init(int base, qemu_irq irq, NICInfo *nd); |
19 | 87ecb68b | pbrook | |
20 | 87ecb68b | pbrook | /* jazz_led.c */
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21 | 87ecb68b | pbrook | extern void jazz_led_init(DisplayState *ds, target_phys_addr_t base); |
22 | 87ecb68b | pbrook | |
23 | 87ecb68b | pbrook | /* mips_int.c */
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24 | 87ecb68b | pbrook | extern void cpu_mips_irq_init_cpu(CPUState *env); |
25 | 87ecb68b | pbrook | |
26 | 87ecb68b | pbrook | /* mips_timer.c */
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27 | 87ecb68b | pbrook | extern void cpu_mips_clock_init(CPUState *); |
28 | 87ecb68b | pbrook | extern void cpu_mips_irqctrl_init (void); |
29 | 87ecb68b | pbrook | |
30 | 4ce7ff6e | aurel32 | /* rc4030.c */
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31 | 4ce7ff6e | aurel32 | qemu_irq *rc4030_init(qemu_irq timer, qemu_irq jazz_bus); |
32 | 4ce7ff6e | aurel32 | |
33 | 87ecb68b | pbrook | #endif |