Revision c78f7137 hw/tcx.c
b/hw/tcx.c | ||
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38 | 38 |
typedef struct TCXState { |
39 | 39 |
SysBusDevice busdev; |
40 | 40 |
hwaddr addr; |
41 |
DisplayState *ds;
|
|
41 |
QemuConsole *con;
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|
42 | 42 |
uint8_t *vram; |
43 | 43 |
uint32_t *vram24, *cplane; |
44 | 44 |
MemoryRegion vram_mem; |
... | ... | |
75 | 75 |
|
76 | 76 |
static void update_palette_entries(TCXState *s, int start, int end) |
77 | 77 |
{ |
78 |
DisplaySurface *surface = qemu_console_surface(s->con); |
|
78 | 79 |
int i; |
79 |
for(i = start; i < end; i++) { |
|
80 |
switch(ds_get_bits_per_pixel(s->ds)) { |
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80 |
|
|
81 |
for (i = start; i < end; i++) { |
|
82 |
switch (surface_bits_per_pixel(surface)) { |
|
81 | 83 |
default: |
82 | 84 |
case 8: |
83 | 85 |
s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]); |
... | ... | |
89 | 91 |
s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]); |
90 | 92 |
break; |
91 | 93 |
case 32: |
92 |
if (is_surface_bgr(s->ds->surface))
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|
94 |
if (is_surface_bgr(surface)) {
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|
93 | 95 |
s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]); |
94 |
else
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|
96 |
} else {
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95 | 97 |
s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); |
98 |
} |
|
96 | 99 |
break; |
97 | 100 |
} |
98 | 101 |
} |
... | ... | |
151 | 154 |
const uint32_t *cplane, |
152 | 155 |
const uint32_t *s24) |
153 | 156 |
{ |
157 |
DisplaySurface *surface = qemu_console_surface(s1->con); |
|
154 | 158 |
int x, bgr, r, g, b; |
155 | 159 |
uint8_t val, *p8; |
156 | 160 |
uint32_t *p = (uint32_t *)d; |
157 | 161 |
uint32_t dval; |
158 | 162 |
|
159 |
bgr = is_surface_bgr(s1->ds->surface);
|
|
163 |
bgr = is_surface_bgr(surface); |
|
160 | 164 |
for(x = 0; x < width; x++, s++, s24++) { |
161 | 165 |
if ((be32_to_cpu(*cplane++) & 0xff000000) == 0x03000000) { |
162 | 166 |
// 24-bit direct, BGR order |
... | ... | |
213 | 217 |
static void tcx_update_display(void *opaque) |
214 | 218 |
{ |
215 | 219 |
TCXState *ts = opaque; |
220 |
DisplaySurface *surface = qemu_console_surface(ts->con); |
|
216 | 221 |
ram_addr_t page, page_min, page_max; |
217 | 222 |
int y, y_start, dd, ds; |
218 | 223 |
uint8_t *d, *s; |
219 | 224 |
void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width); |
220 | 225 |
|
221 |
if (ds_get_bits_per_pixel(ts->ds) == 0)
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|
226 |
if (surface_bits_per_pixel(surface) == 0) {
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|
222 | 227 |
return; |
228 |
} |
|
229 |
|
|
223 | 230 |
page = 0; |
224 | 231 |
y_start = -1; |
225 | 232 |
page_min = -1; |
226 | 233 |
page_max = 0; |
227 |
d = ds_get_data(ts->ds);
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234 |
d = surface_data(surface);
|
|
228 | 235 |
s = ts->vram; |
229 |
dd = ds_get_linesize(ts->ds);
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|
236 |
dd = surface_stride(surface);
|
|
230 | 237 |
ds = 1024; |
231 | 238 |
|
232 |
switch (ds_get_bits_per_pixel(ts->ds)) {
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|
239 |
switch (surface_bits_per_pixel(surface)) {
|
|
233 | 240 |
case 32: |
234 | 241 |
f = tcx_draw_line32; |
235 | 242 |
break; |
... | ... | |
269 | 276 |
} else { |
270 | 277 |
if (y_start >= 0) { |
271 | 278 |
/* flush to display */ |
272 |
dpy_gfx_update(ts->ds, 0, y_start,
|
|
279 |
dpy_gfx_update(ts->con, 0, y_start,
|
|
273 | 280 |
ts->width, y - y_start); |
274 | 281 |
y_start = -1; |
275 | 282 |
} |
... | ... | |
279 | 286 |
} |
280 | 287 |
if (y_start >= 0) { |
281 | 288 |
/* flush to display */ |
282 |
dpy_gfx_update(ts->ds, 0, y_start,
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|
289 |
dpy_gfx_update(ts->con, 0, y_start,
|
|
283 | 290 |
ts->width, y - y_start); |
284 | 291 |
} |
285 | 292 |
/* reset modified pages */ |
... | ... | |
293 | 300 |
static void tcx24_update_display(void *opaque) |
294 | 301 |
{ |
295 | 302 |
TCXState *ts = opaque; |
303 |
DisplaySurface *surface = qemu_console_surface(ts->con); |
|
296 | 304 |
ram_addr_t page, page_min, page_max, cpage, page24; |
297 | 305 |
int y, y_start, dd, ds; |
298 | 306 |
uint8_t *d, *s; |
299 | 307 |
uint32_t *cptr, *s24; |
300 | 308 |
|
301 |
if (ds_get_bits_per_pixel(ts->ds) != 32)
|
|
309 |
if (surface_bits_per_pixel(surface) != 32) {
|
|
302 | 310 |
return; |
311 |
} |
|
312 |
|
|
303 | 313 |
page = 0; |
304 | 314 |
page24 = ts->vram24_offset; |
305 | 315 |
cpage = ts->cplane_offset; |
306 | 316 |
y_start = -1; |
307 | 317 |
page_min = -1; |
308 | 318 |
page_max = 0; |
309 |
d = ds_get_data(ts->ds);
|
|
319 |
d = surface_data(surface);
|
|
310 | 320 |
s = ts->vram; |
311 | 321 |
s24 = ts->vram24; |
312 | 322 |
cptr = ts->cplane; |
313 |
dd = ds_get_linesize(ts->ds);
|
|
323 |
dd = surface_stride(surface);
|
|
314 | 324 |
ds = 1024; |
315 | 325 |
|
316 | 326 |
for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE, |
... | ... | |
345 | 355 |
} else { |
346 | 356 |
if (y_start >= 0) { |
347 | 357 |
/* flush to display */ |
348 |
dpy_gfx_update(ts->ds, 0, y_start,
|
|
358 |
dpy_gfx_update(ts->con, 0, y_start,
|
|
349 | 359 |
ts->width, y - y_start); |
350 | 360 |
y_start = -1; |
351 | 361 |
} |
... | ... | |
357 | 367 |
} |
358 | 368 |
if (y_start >= 0) { |
359 | 369 |
/* flush to display */ |
360 |
dpy_gfx_update(ts->ds, 0, y_start,
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|
370 |
dpy_gfx_update(ts->con, 0, y_start,
|
|
361 | 371 |
ts->width, y - y_start); |
362 | 372 |
} |
363 | 373 |
/* reset modified pages */ |
... | ... | |
371 | 381 |
TCXState *s = opaque; |
372 | 382 |
|
373 | 383 |
tcx_set_dirty(s); |
374 |
qemu_console_resize(s->ds, s->width, s->height);
|
|
384 |
qemu_console_resize(s->con, s->width, s->height);
|
|
375 | 385 |
} |
376 | 386 |
|
377 | 387 |
static void tcx24_invalidate_display(void *opaque) |
... | ... | |
380 | 390 |
|
381 | 391 |
tcx_set_dirty(s); |
382 | 392 |
tcx24_set_dirty(s); |
383 |
qemu_console_resize(s->ds, s->width, s->height);
|
|
393 |
qemu_console_resize(s->con, s->width, s->height);
|
|
384 | 394 |
} |
385 | 395 |
|
386 | 396 |
static int vmstate_tcx_post_load(void *opaque, int version_id) |
... | ... | |
558 | 568 |
&s->vram_mem, vram_offset, size); |
559 | 569 |
sysbus_init_mmio(dev, &s->vram_cplane); |
560 | 570 |
|
561 |
s->ds = graphic_console_init(tcx24_update_display,
|
|
562 |
tcx24_invalidate_display, |
|
563 |
tcx24_screen_dump, NULL, s); |
|
571 |
s->con = graphic_console_init(tcx24_update_display,
|
|
572 |
tcx24_invalidate_display,
|
|
573 |
tcx24_screen_dump, NULL, s);
|
|
564 | 574 |
} else { |
565 | 575 |
/* THC 8 bit (dummy) */ |
566 | 576 |
memory_region_init_io(&s->thc8, &dummy_ops, s, "tcx.thc8", |
567 | 577 |
TCX_THC_NREGS_8); |
568 | 578 |
sysbus_init_mmio(dev, &s->thc8); |
569 | 579 |
|
570 |
s->ds = graphic_console_init(tcx_update_display,
|
|
571 |
tcx_invalidate_display, |
|
572 |
tcx_screen_dump, NULL, s); |
|
580 |
s->con = graphic_console_init(tcx_update_display,
|
|
581 |
tcx_invalidate_display,
|
|
582 |
tcx_screen_dump, NULL, s);
|
|
573 | 583 |
} |
574 | 584 |
|
575 |
qemu_console_resize(s->ds, s->width, s->height);
|
|
585 |
qemu_console_resize(s->con, s->width, s->height);
|
|
576 | 586 |
return 0; |
577 | 587 |
} |
578 | 588 |
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