Archipelago » qemu

    ar->gpe.en = g_malloc0(len / 2);

}

void acpi_gpe_reset(ACPIREGS *ar)

{

    memset(ar->gpe.sts, 0, ar->gpe.len / 2);

{

    uint8_t *cur;

    cur = acpi_gpe_ioport_get_ptr(ar, addr);

    if (addr < ar->gpe.len / 2) {

        /* GPE_STS */

    uint8_t *cur;

    uint32_t val;

    cur = acpi_gpe_ioport_get_ptr(ar, addr);

    val = 0;

    if (cur != NULL) {

};

struct ACPIGPE {

    uint8_t len;

    uint8_t *sts;

/* GPE0 */

void acpi_gpe_init(ACPIREGS *ar, uint8_t len);

void acpi_gpe_reset(ACPIREGS *ar);

void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);

    acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io);

    acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);

    memory_region_init_io(&pm->io_gpe, &ich9_gpe_ops, pm, "apci-gpe0",

                          ICH9_PMIO_GPE0_LEN);

    memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);

    memory_region_init_io(&s->io_gpe, &piix4_gpe_ops, s, "apci-gpe0",

                          GPE_LEN);

    memory_region_add_subregion(get_system_io(), GPE_BASE, &s->io_gpe);

    register_ioport_read(PCI_UP_BASE, 4, 4, pci_up_read, s);

    register_ioport_read(PCI_DOWN_BASE, 4, 4, pci_down_read, s);