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/*
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* m68k op helpers
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*
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* Copyright (c) 2006-2007 CodeSourcery
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* Written by Paul Brook
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "cpu.h" |
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#include "exec/gdbstub.h" |
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#include "helpers.h" |
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#define SIGNBIT (1u << 31) |
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/* Sort alphabetically, except for "any". */
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static gint m68k_cpu_list_compare(gconstpointer a, gconstpointer b)
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{ |
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ObjectClass *class_a = (ObjectClass *)a; |
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ObjectClass *class_b = (ObjectClass *)b; |
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const char *name_a, *name_b; |
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name_a = object_class_get_name(class_a); |
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name_b = object_class_get_name(class_b); |
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if (strcmp(name_a, "any-" TYPE_M68K_CPU) == 0) { |
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return 1; |
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} else if (strcmp(name_b, "any-" TYPE_M68K_CPU) == 0) { |
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return -1; |
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} else {
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return strcasecmp(name_a, name_b);
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} |
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} |
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static void m68k_cpu_list_entry(gpointer data, gpointer user_data) |
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{ |
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ObjectClass *c = data; |
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CPUListState *s = user_data; |
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const char *typename; |
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char *name;
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typename = object_class_get_name(c); |
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name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_M68K_CPU));
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(*s->cpu_fprintf)(s->file, "%s\n",
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name); |
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g_free(name); |
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} |
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void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
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{ |
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CPUListState s = { |
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.file = f, |
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.cpu_fprintf = cpu_fprintf, |
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}; |
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GSList *list; |
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list = object_class_get_list(TYPE_M68K_CPU, false);
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list = g_slist_sort(list, m68k_cpu_list_compare); |
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g_slist_foreach(list, m68k_cpu_list_entry, &s); |
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g_slist_free(list); |
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} |
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static int fpu_gdb_get_reg(CPUM68KState *env, uint8_t *mem_buf, int n) |
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{ |
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if (n < 8) { |
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stfq_p(mem_buf, env->fregs[n]); |
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return 8; |
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} |
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if (n < 11) { |
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/* FP control registers (not implemented) */
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memset(mem_buf, 0, 4); |
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return 4; |
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} |
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return 0; |
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} |
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static int fpu_gdb_set_reg(CPUM68KState *env, uint8_t *mem_buf, int n) |
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{ |
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if (n < 8) { |
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env->fregs[n] = ldfq_p(mem_buf); |
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return 8; |
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} |
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if (n < 11) { |
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/* FP control registers (not implemented) */
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return 4; |
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} |
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return 0; |
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} |
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M68kCPU *cpu_m68k_init(const char *cpu_model) |
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{ |
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M68kCPU *cpu; |
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CPUM68KState *env; |
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ObjectClass *oc; |
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oc = cpu_class_by_name(TYPE_M68K_CPU, cpu_model); |
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if (oc == NULL) { |
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return NULL; |
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} |
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cpu = M68K_CPU(object_new(object_class_get_name(oc))); |
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env = &cpu->env; |
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env->cpu_model_str = cpu_model; |
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register_m68k_insns(env); |
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object_property_set_bool(OBJECT(cpu), true, "realized", NULL); |
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return cpu;
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} |
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void m68k_cpu_init_gdb(M68kCPU *cpu)
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{ |
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CPUM68KState *env = &cpu->env; |
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if (m68k_feature(env, M68K_FEATURE_CF_FPU)) {
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gdb_register_coprocessor(env, fpu_gdb_get_reg, fpu_gdb_set_reg, |
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11, "cf-fp.xml", 18); |
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} |
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/* TODO: Add [E]MAC registers. */
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} |
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void cpu_m68k_flush_flags(CPUM68KState *env, int cc_op) |
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{ |
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int flags;
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uint32_t src; |
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uint32_t dest; |
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uint32_t tmp; |
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#define HIGHBIT 0x80000000u |
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#define SET_NZ(x) do { \ |
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if ((x) == 0) \ |
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flags |= CCF_Z; \ |
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else if ((int32_t)(x) < 0) \ |
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flags |= CCF_N; \ |
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} while (0) |
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#define SET_FLAGS_SUB(type, utype) do { \ |
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SET_NZ((type)dest); \ |
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tmp = dest + src; \ |
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if ((utype) tmp < (utype) src) \
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flags |= CCF_C; \ |
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if ((1u << (sizeof(type) * 8 - 1)) & (tmp ^ dest) & (tmp ^ src)) \ |
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flags |= CCF_V; \ |
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} while (0) |
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flags = 0;
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src = env->cc_src; |
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dest = env->cc_dest; |
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switch (cc_op) {
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case CC_OP_FLAGS:
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flags = dest; |
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break;
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case CC_OP_LOGIC:
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SET_NZ(dest); |
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break;
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case CC_OP_ADD:
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SET_NZ(dest); |
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if (dest < src)
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flags |= CCF_C; |
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tmp = dest - src; |
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if (HIGHBIT & (src ^ dest) & ~(tmp ^ src))
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flags |= CCF_V; |
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break;
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case CC_OP_SUB:
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SET_FLAGS_SUB(int32_t, uint32_t); |
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break;
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case CC_OP_CMPB:
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SET_FLAGS_SUB(int8_t, uint8_t); |
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break;
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case CC_OP_CMPW:
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SET_FLAGS_SUB(int16_t, uint16_t); |
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break;
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case CC_OP_ADDX:
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SET_NZ(dest); |
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if (dest <= src)
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flags |= CCF_C; |
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tmp = dest - src - 1;
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if (HIGHBIT & (src ^ dest) & ~(tmp ^ src))
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flags |= CCF_V; |
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break;
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case CC_OP_SUBX:
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SET_NZ(dest); |
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tmp = dest + src + 1;
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if (tmp <= src)
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flags |= CCF_C; |
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if (HIGHBIT & (tmp ^ dest) & (tmp ^ src))
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flags |= CCF_V; |
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break;
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case CC_OP_SHIFT:
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SET_NZ(dest); |
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if (src)
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flags |= CCF_C; |
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break;
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default:
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cpu_abort(env, "Bad CC_OP %d", cc_op);
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} |
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env->cc_op = CC_OP_FLAGS; |
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env->cc_dest = flags; |
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} |
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void HELPER(movec)(CPUM68KState *env, uint32_t reg, uint32_t val)
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{ |
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switch (reg) {
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case 0x02: /* CACR */ |
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env->cacr = val; |
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m68k_switch_sp(env); |
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break;
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case 0x04: case 0x05: case 0x06: case 0x07: /* ACR[0-3] */ |
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/* TODO: Implement Access Control Registers. */
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break;
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case 0x801: /* VBR */ |
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env->vbr = val; |
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break;
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/* TODO: Implement control registers. */
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default:
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cpu_abort(env, "Unimplemented control register write 0x%x = 0x%x\n",
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reg, val); |
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} |
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} |
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void HELPER(set_macsr)(CPUM68KState *env, uint32_t val)
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{ |
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uint32_t acc; |
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int8_t exthigh; |
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uint8_t extlow; |
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uint64_t regval; |
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int i;
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if ((env->macsr ^ val) & (MACSR_FI | MACSR_SU)) {
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for (i = 0; i < 4; i++) { |
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regval = env->macc[i]; |
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exthigh = regval >> 40;
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if (env->macsr & MACSR_FI) {
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acc = regval >> 8;
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extlow = regval; |
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} else {
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acc = regval; |
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extlow = regval >> 32;
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} |
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if (env->macsr & MACSR_FI) {
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regval = (((uint64_t)acc) << 8) | extlow;
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regval |= ((int64_t)exthigh) << 40;
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} else if (env->macsr & MACSR_SU) { |
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regval = acc | (((int64_t)extlow) << 32);
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regval |= ((int64_t)exthigh) << 40;
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} else {
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regval = acc | (((uint64_t)extlow) << 32);
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regval |= ((uint64_t)(uint8_t)exthigh) << 40;
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} |
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env->macc[i] = regval; |
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} |
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} |
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env->macsr = val; |
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} |
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void m68k_switch_sp(CPUM68KState *env)
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{ |
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int new_sp;
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env->sp[env->current_sp] = env->aregs[7];
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new_sp = (env->sr & SR_S && env->cacr & M68K_CACR_EUSP) |
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? M68K_SSP : M68K_USP; |
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env->aregs[7] = env->sp[new_sp];
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env->current_sp = new_sp; |
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} |
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#if defined(CONFIG_USER_ONLY)
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int cpu_m68k_handle_mmu_fault (CPUM68KState *env, target_ulong address, int rw, |
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int mmu_idx)
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{ |
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env->exception_index = EXCP_ACCESS; |
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env->mmu.ar = address; |
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return 1; |
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} |
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#else
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/* MMU */
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/* TODO: This will need fixing once the MMU is implemented. */
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hwaddr cpu_get_phys_page_debug(CPUM68KState *env, target_ulong addr) |
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{ |
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return addr;
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} |
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int cpu_m68k_handle_mmu_fault (CPUM68KState *env, target_ulong address, int rw, |
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int mmu_idx)
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{ |
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int prot;
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address &= TARGET_PAGE_MASK; |
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prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; |
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tlb_set_page(env, address, address, prot, mmu_idx, TARGET_PAGE_SIZE); |
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return 0; |
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} |
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/* Notify CPU of a pending interrupt. Prioritization and vectoring should
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be handled by the interrupt controller. Real hardware only requests
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the vector when the interrupt is acknowledged by the CPU. For
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simplicitly we calculate it when the interrupt is signalled. */
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void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector) |
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{ |
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CPUState *cs = CPU(cpu); |
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CPUM68KState *env = &cpu->env; |
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env->pending_level = level; |
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env->pending_vector = vector; |
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if (level) {
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cpu_interrupt(cs, CPU_INTERRUPT_HARD); |
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} else {
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cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); |
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} |
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} |
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#endif
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uint32_t HELPER(bitrev)(uint32_t x) |
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{ |
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x = ((x >> 1) & 0x55555555u) | ((x << 1) & 0xaaaaaaaau); |
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x = ((x >> 2) & 0x33333333u) | ((x << 2) & 0xccccccccu); |
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x = ((x >> 4) & 0x0f0f0f0fu) | ((x << 4) & 0xf0f0f0f0u); |
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return bswap32(x);
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} |
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uint32_t HELPER(ff1)(uint32_t x) |
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{ |
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int n;
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for (n = 32; x; n--) |
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x >>= 1;
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return n;
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} |
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uint32_t HELPER(sats)(uint32_t val, uint32_t ccr) |
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{ |
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/* The result has the opposite sign to the original value. */
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if (ccr & CCF_V)
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val = (((int32_t)val) >> 31) ^ SIGNBIT;
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return val;
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} |
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uint32_t HELPER(subx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2) |
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{ |
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uint32_t res; |
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uint32_t old_flags; |
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old_flags = env->cc_dest; |
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if (env->cc_x) {
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env->cc_x = (op1 <= op2); |
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env->cc_op = CC_OP_SUBX; |
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res = op1 - (op2 + 1);
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} else {
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env->cc_x = (op1 < op2); |
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env->cc_op = CC_OP_SUB; |
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res = op1 - op2; |
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} |
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env->cc_dest = res; |
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env->cc_src = op2; |
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cpu_m68k_flush_flags(env, env->cc_op); |
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/* !Z is sticky. */
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env->cc_dest &= (old_flags | ~CCF_Z); |
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return res;
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} |
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uint32_t HELPER(addx_cc)(CPUM68KState *env, uint32_t op1, uint32_t op2) |
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{ |
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uint32_t res; |
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uint32_t old_flags; |
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old_flags = env->cc_dest; |
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if (env->cc_x) {
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res = op1 + op2 + 1;
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env->cc_x = (res <= op2); |
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env->cc_op = CC_OP_ADDX; |
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} else {
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res = op1 + op2; |
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env->cc_x = (res < op2); |
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env->cc_op = CC_OP_ADD; |
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} |
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env->cc_dest = res; |
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env->cc_src = op2; |
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cpu_m68k_flush_flags(env, env->cc_op); |
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/* !Z is sticky. */
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env->cc_dest &= (old_flags | ~CCF_Z); |
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return res;
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} |
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uint32_t HELPER(xflag_lt)(uint32_t a, uint32_t b) |
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{ |
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return a < b;
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} |
403 |
|
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void HELPER(set_sr)(CPUM68KState *env, uint32_t val)
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{ |
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env->sr = val & 0xffff;
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m68k_switch_sp(env); |
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} |
409 |
|
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uint32_t HELPER(shl_cc)(CPUM68KState *env, uint32_t val, uint32_t shift) |
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{ |
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uint32_t result; |
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uint32_t cf; |
414 |
|
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shift &= 63;
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if (shift == 0) { |
417 |
result = val; |
418 |
cf = env->cc_src & CCF_C; |
419 |
} else if (shift < 32) { |
420 |
result = val << shift; |
421 |
cf = (val >> (32 - shift)) & 1; |
422 |
} else if (shift == 32) { |
423 |
result = 0;
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cf = val & 1;
|
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} else /* shift > 32 */ { |
426 |
result = 0;
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cf = 0;
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} |
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env->cc_src = cf; |
430 |
env->cc_x = (cf != 0);
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env->cc_dest = result; |
432 |
return result;
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} |
434 |
|
435 |
uint32_t HELPER(shr_cc)(CPUM68KState *env, uint32_t val, uint32_t shift) |
436 |
{ |
437 |
uint32_t result; |
438 |
uint32_t cf; |
439 |
|
440 |
shift &= 63;
|
441 |
if (shift == 0) { |
442 |
result = val; |
443 |
cf = env->cc_src & CCF_C; |
444 |
} else if (shift < 32) { |
445 |
result = val >> shift; |
446 |
cf = (val >> (shift - 1)) & 1; |
447 |
} else if (shift == 32) { |
448 |
result = 0;
|
449 |
cf = val >> 31;
|
450 |
} else /* shift > 32 */ { |
451 |
result = 0;
|
452 |
cf = 0;
|
453 |
} |
454 |
env->cc_src = cf; |
455 |
env->cc_x = (cf != 0);
|
456 |
env->cc_dest = result; |
457 |
return result;
|
458 |
} |
459 |
|
460 |
uint32_t HELPER(sar_cc)(CPUM68KState *env, uint32_t val, uint32_t shift) |
461 |
{ |
462 |
uint32_t result; |
463 |
uint32_t cf; |
464 |
|
465 |
shift &= 63;
|
466 |
if (shift == 0) { |
467 |
result = val; |
468 |
cf = (env->cc_src & CCF_C) != 0;
|
469 |
} else if (shift < 32) { |
470 |
result = (int32_t)val >> shift; |
471 |
cf = (val >> (shift - 1)) & 1; |
472 |
} else /* shift >= 32 */ { |
473 |
result = (int32_t)val >> 31;
|
474 |
cf = val >> 31;
|
475 |
} |
476 |
env->cc_src = cf; |
477 |
env->cc_x = cf; |
478 |
env->cc_dest = result; |
479 |
return result;
|
480 |
} |
481 |
|
482 |
/* FPU helpers. */
|
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uint32_t HELPER(f64_to_i32)(CPUM68KState *env, float64 val) |
484 |
{ |
485 |
return float64_to_int32(val, &env->fp_status);
|
486 |
} |
487 |
|
488 |
float32 HELPER(f64_to_f32)(CPUM68KState *env, float64 val) |
489 |
{ |
490 |
return float64_to_float32(val, &env->fp_status);
|
491 |
} |
492 |
|
493 |
float64 HELPER(i32_to_f64)(CPUM68KState *env, uint32_t val) |
494 |
{ |
495 |
return int32_to_float64(val, &env->fp_status);
|
496 |
} |
497 |
|
498 |
float64 HELPER(f32_to_f64)(CPUM68KState *env, float32 val) |
499 |
{ |
500 |
return float32_to_float64(val, &env->fp_status);
|
501 |
} |
502 |
|
503 |
float64 HELPER(iround_f64)(CPUM68KState *env, float64 val) |
504 |
{ |
505 |
return float64_round_to_int(val, &env->fp_status);
|
506 |
} |
507 |
|
508 |
float64 HELPER(itrunc_f64)(CPUM68KState *env, float64 val) |
509 |
{ |
510 |
return float64_trunc_to_int(val, &env->fp_status);
|
511 |
} |
512 |
|
513 |
float64 HELPER(sqrt_f64)(CPUM68KState *env, float64 val) |
514 |
{ |
515 |
return float64_sqrt(val, &env->fp_status);
|
516 |
} |
517 |
|
518 |
float64 HELPER(abs_f64)(float64 val) |
519 |
{ |
520 |
return float64_abs(val);
|
521 |
} |
522 |
|
523 |
float64 HELPER(chs_f64)(float64 val) |
524 |
{ |
525 |
return float64_chs(val);
|
526 |
} |
527 |
|
528 |
float64 HELPER(add_f64)(CPUM68KState *env, float64 a, float64 b) |
529 |
{ |
530 |
return float64_add(a, b, &env->fp_status);
|
531 |
} |
532 |
|
533 |
float64 HELPER(sub_f64)(CPUM68KState *env, float64 a, float64 b) |
534 |
{ |
535 |
return float64_sub(a, b, &env->fp_status);
|
536 |
} |
537 |
|
538 |
float64 HELPER(mul_f64)(CPUM68KState *env, float64 a, float64 b) |
539 |
{ |
540 |
return float64_mul(a, b, &env->fp_status);
|
541 |
} |
542 |
|
543 |
float64 HELPER(div_f64)(CPUM68KState *env, float64 a, float64 b) |
544 |
{ |
545 |
return float64_div(a, b, &env->fp_status);
|
546 |
} |
547 |
|
548 |
float64 HELPER(sub_cmp_f64)(CPUM68KState *env, float64 a, float64 b) |
549 |
{ |
550 |
/* ??? This may incorrectly raise exceptions. */
|
551 |
/* ??? Should flush denormals to zero. */
|
552 |
float64 res; |
553 |
res = float64_sub(a, b, &env->fp_status); |
554 |
if (float64_is_quiet_nan(res)) {
|
555 |
/* +/-inf compares equal against itself, but sub returns nan. */
|
556 |
if (!float64_is_quiet_nan(a)
|
557 |
&& !float64_is_quiet_nan(b)) { |
558 |
res = float64_zero; |
559 |
if (float64_lt_quiet(a, res, &env->fp_status))
|
560 |
res = float64_chs(res); |
561 |
} |
562 |
} |
563 |
return res;
|
564 |
} |
565 |
|
566 |
uint32_t HELPER(compare_f64)(CPUM68KState *env, float64 val) |
567 |
{ |
568 |
return float64_compare_quiet(val, float64_zero, &env->fp_status);
|
569 |
} |
570 |
|
571 |
/* MAC unit. */
|
572 |
/* FIXME: The MAC unit implementation is a bit of a mess. Some helpers
|
573 |
take values, others take register numbers and manipulate the contents
|
574 |
in-place. */
|
575 |
void HELPER(mac_move)(CPUM68KState *env, uint32_t dest, uint32_t src)
|
576 |
{ |
577 |
uint32_t mask; |
578 |
env->macc[dest] = env->macc[src]; |
579 |
mask = MACSR_PAV0 << dest; |
580 |
if (env->macsr & (MACSR_PAV0 << src))
|
581 |
env->macsr |= mask; |
582 |
else
|
583 |
env->macsr &= ~mask; |
584 |
} |
585 |
|
586 |
uint64_t HELPER(macmuls)(CPUM68KState *env, uint32_t op1, uint32_t op2) |
587 |
{ |
588 |
int64_t product; |
589 |
int64_t res; |
590 |
|
591 |
product = (uint64_t)op1 * op2; |
592 |
res = (product << 24) >> 24; |
593 |
if (res != product) {
|
594 |
env->macsr |= MACSR_V; |
595 |
if (env->macsr & MACSR_OMC) {
|
596 |
/* Make sure the accumulate operation overflows. */
|
597 |
if (product < 0) |
598 |
res = ~(1ll << 50); |
599 |
else
|
600 |
res = 1ll << 50; |
601 |
} |
602 |
} |
603 |
return res;
|
604 |
} |
605 |
|
606 |
uint64_t HELPER(macmulu)(CPUM68KState *env, uint32_t op1, uint32_t op2) |
607 |
{ |
608 |
uint64_t product; |
609 |
|
610 |
product = (uint64_t)op1 * op2; |
611 |
if (product & (0xffffffull << 40)) { |
612 |
env->macsr |= MACSR_V; |
613 |
if (env->macsr & MACSR_OMC) {
|
614 |
/* Make sure the accumulate operation overflows. */
|
615 |
product = 1ll << 50; |
616 |
} else {
|
617 |
product &= ((1ull << 40) - 1); |
618 |
} |
619 |
} |
620 |
return product;
|
621 |
} |
622 |
|
623 |
uint64_t HELPER(macmulf)(CPUM68KState *env, uint32_t op1, uint32_t op2) |
624 |
{ |
625 |
uint64_t product; |
626 |
uint32_t remainder; |
627 |
|
628 |
product = (uint64_t)op1 * op2; |
629 |
if (env->macsr & MACSR_RT) {
|
630 |
remainder = product & 0xffffff;
|
631 |
product >>= 24;
|
632 |
if (remainder > 0x800000) |
633 |
product++; |
634 |
else if (remainder == 0x800000) |
635 |
product += (product & 1);
|
636 |
} else {
|
637 |
product >>= 24;
|
638 |
} |
639 |
return product;
|
640 |
} |
641 |
|
642 |
void HELPER(macsats)(CPUM68KState *env, uint32_t acc)
|
643 |
{ |
644 |
int64_t tmp; |
645 |
int64_t result; |
646 |
tmp = env->macc[acc]; |
647 |
result = ((tmp << 16) >> 16); |
648 |
if (result != tmp) {
|
649 |
env->macsr |= MACSR_V; |
650 |
} |
651 |
if (env->macsr & MACSR_V) {
|
652 |
env->macsr |= MACSR_PAV0 << acc; |
653 |
if (env->macsr & MACSR_OMC) {
|
654 |
/* The result is saturated to 32 bits, despite overflow occurring
|
655 |
at 48 bits. Seems weird, but that's what the hardware docs
|
656 |
say. */
|
657 |
result = (result >> 63) ^ 0x7fffffff; |
658 |
} |
659 |
} |
660 |
env->macc[acc] = result; |
661 |
} |
662 |
|
663 |
void HELPER(macsatu)(CPUM68KState *env, uint32_t acc)
|
664 |
{ |
665 |
uint64_t val; |
666 |
|
667 |
val = env->macc[acc]; |
668 |
if (val & (0xffffull << 48)) { |
669 |
env->macsr |= MACSR_V; |
670 |
} |
671 |
if (env->macsr & MACSR_V) {
|
672 |
env->macsr |= MACSR_PAV0 << acc; |
673 |
if (env->macsr & MACSR_OMC) {
|
674 |
if (val > (1ull << 53)) |
675 |
val = 0;
|
676 |
else
|
677 |
val = (1ull << 48) - 1; |
678 |
} else {
|
679 |
val &= ((1ull << 48) - 1); |
680 |
} |
681 |
} |
682 |
env->macc[acc] = val; |
683 |
} |
684 |
|
685 |
void HELPER(macsatf)(CPUM68KState *env, uint32_t acc)
|
686 |
{ |
687 |
int64_t sum; |
688 |
int64_t result; |
689 |
|
690 |
sum = env->macc[acc]; |
691 |
result = (sum << 16) >> 16; |
692 |
if (result != sum) {
|
693 |
env->macsr |= MACSR_V; |
694 |
} |
695 |
if (env->macsr & MACSR_V) {
|
696 |
env->macsr |= MACSR_PAV0 << acc; |
697 |
if (env->macsr & MACSR_OMC) {
|
698 |
result = (result >> 63) ^ 0x7fffffffffffll; |
699 |
} |
700 |
} |
701 |
env->macc[acc] = result; |
702 |
} |
703 |
|
704 |
void HELPER(mac_set_flags)(CPUM68KState *env, uint32_t acc)
|
705 |
{ |
706 |
uint64_t val; |
707 |
val = env->macc[acc]; |
708 |
if (val == 0) { |
709 |
env->macsr |= MACSR_Z; |
710 |
} else if (val & (1ull << 47)) { |
711 |
env->macsr |= MACSR_N; |
712 |
} |
713 |
if (env->macsr & (MACSR_PAV0 << acc)) {
|
714 |
env->macsr |= MACSR_V; |
715 |
} |
716 |
if (env->macsr & MACSR_FI) {
|
717 |
val = ((int64_t)val) >> 40;
|
718 |
if (val != 0 && val != -1) |
719 |
env->macsr |= MACSR_EV; |
720 |
} else if (env->macsr & MACSR_SU) { |
721 |
val = ((int64_t)val) >> 32;
|
722 |
if (val != 0 && val != -1) |
723 |
env->macsr |= MACSR_EV; |
724 |
} else {
|
725 |
if ((val >> 32) != 0) |
726 |
env->macsr |= MACSR_EV; |
727 |
} |
728 |
} |
729 |
|
730 |
void HELPER(flush_flags)(CPUM68KState *env, uint32_t cc_op)
|
731 |
{ |
732 |
cpu_m68k_flush_flags(env, cc_op); |
733 |
} |
734 |
|
735 |
uint32_t HELPER(get_macf)(CPUM68KState *env, uint64_t val) |
736 |
{ |
737 |
int rem;
|
738 |
uint32_t result; |
739 |
|
740 |
if (env->macsr & MACSR_SU) {
|
741 |
/* 16-bit rounding. */
|
742 |
rem = val & 0xffffff;
|
743 |
val = (val >> 24) & 0xffffu; |
744 |
if (rem > 0x800000) |
745 |
val++; |
746 |
else if (rem == 0x800000) |
747 |
val += (val & 1);
|
748 |
} else if (env->macsr & MACSR_RT) { |
749 |
/* 32-bit rounding. */
|
750 |
rem = val & 0xff;
|
751 |
val >>= 8;
|
752 |
if (rem > 0x80) |
753 |
val++; |
754 |
else if (rem == 0x80) |
755 |
val += (val & 1);
|
756 |
} else {
|
757 |
/* No rounding. */
|
758 |
val >>= 8;
|
759 |
} |
760 |
if (env->macsr & MACSR_OMC) {
|
761 |
/* Saturate. */
|
762 |
if (env->macsr & MACSR_SU) {
|
763 |
if (val != (uint16_t) val) {
|
764 |
result = ((val >> 63) ^ 0x7fff) & 0xffff; |
765 |
} else {
|
766 |
result = val & 0xffff;
|
767 |
} |
768 |
} else {
|
769 |
if (val != (uint32_t)val) {
|
770 |
result = ((uint32_t)(val >> 63) & 0x7fffffff); |
771 |
} else {
|
772 |
result = (uint32_t)val; |
773 |
} |
774 |
} |
775 |
} else {
|
776 |
/* No saturation. */
|
777 |
if (env->macsr & MACSR_SU) {
|
778 |
result = val & 0xffff;
|
779 |
} else {
|
780 |
result = (uint32_t)val; |
781 |
} |
782 |
} |
783 |
return result;
|
784 |
} |
785 |
|
786 |
uint32_t HELPER(get_macs)(uint64_t val) |
787 |
{ |
788 |
if (val == (int32_t)val) {
|
789 |
return (int32_t)val;
|
790 |
} else {
|
791 |
return (val >> 61) ^ ~SIGNBIT; |
792 |
} |
793 |
} |
794 |
|
795 |
uint32_t HELPER(get_macu)(uint64_t val) |
796 |
{ |
797 |
if ((val >> 32) == 0) { |
798 |
return (uint32_t)val;
|
799 |
} else {
|
800 |
return 0xffffffffu; |
801 |
} |
802 |
} |
803 |
|
804 |
uint32_t HELPER(get_mac_extf)(CPUM68KState *env, uint32_t acc) |
805 |
{ |
806 |
uint32_t val; |
807 |
val = env->macc[acc] & 0x00ff;
|
808 |
val = (env->macc[acc] >> 32) & 0xff00; |
809 |
val |= (env->macc[acc + 1] << 16) & 0x00ff0000; |
810 |
val |= (env->macc[acc + 1] >> 16) & 0xff000000; |
811 |
return val;
|
812 |
} |
813 |
|
814 |
uint32_t HELPER(get_mac_exti)(CPUM68KState *env, uint32_t acc) |
815 |
{ |
816 |
uint32_t val; |
817 |
val = (env->macc[acc] >> 32) & 0xffff; |
818 |
val |= (env->macc[acc + 1] >> 16) & 0xffff0000; |
819 |
return val;
|
820 |
} |
821 |
|
822 |
void HELPER(set_mac_extf)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
823 |
{ |
824 |
int64_t res; |
825 |
int32_t tmp; |
826 |
res = env->macc[acc] & 0xffffffff00ull;
|
827 |
tmp = (int16_t)(val & 0xff00);
|
828 |
res |= ((int64_t)tmp) << 32;
|
829 |
res |= val & 0xff;
|
830 |
env->macc[acc] = res; |
831 |
res = env->macc[acc + 1] & 0xffffffff00ull; |
832 |
tmp = (val & 0xff000000);
|
833 |
res |= ((int64_t)tmp) << 16;
|
834 |
res |= (val >> 16) & 0xff; |
835 |
env->macc[acc + 1] = res;
|
836 |
} |
837 |
|
838 |
void HELPER(set_mac_exts)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
839 |
{ |
840 |
int64_t res; |
841 |
int32_t tmp; |
842 |
res = (uint32_t)env->macc[acc]; |
843 |
tmp = (int16_t)val; |
844 |
res |= ((int64_t)tmp) << 32;
|
845 |
env->macc[acc] = res; |
846 |
res = (uint32_t)env->macc[acc + 1];
|
847 |
tmp = val & 0xffff0000;
|
848 |
res |= (int64_t)tmp << 16;
|
849 |
env->macc[acc + 1] = res;
|
850 |
} |
851 |
|
852 |
void HELPER(set_mac_extu)(CPUM68KState *env, uint32_t val, uint32_t acc)
|
853 |
{ |
854 |
uint64_t res; |
855 |
res = (uint32_t)env->macc[acc]; |
856 |
res |= ((uint64_t)(val & 0xffff)) << 32; |
857 |
env->macc[acc] = res; |
858 |
res = (uint32_t)env->macc[acc + 1];
|
859 |
res |= (uint64_t)(val & 0xffff0000) << 16; |
860 |
env->macc[acc + 1] = res;
|
861 |
} |