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1 | b9adb4a6 | bellard | /* General "disassemble this chunk" code. Used for debugging. */
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2 | 5bbe9299 | bellard | #include "config.h" |
3 | b9adb4a6 | bellard | #include "dis-asm.h" |
4 | b9adb4a6 | bellard | #include "elf.h" |
5 | aa0aa4fa | bellard | #include <errno.h> |
6 | b9adb4a6 | bellard | |
7 | c6105c0a | bellard | #include "cpu.h" |
8 | c6105c0a | bellard | #include "exec-all.h" |
9 | 9307c4c1 | bellard | #include "disas.h" |
10 | c6105c0a | bellard | |
11 | b9adb4a6 | bellard | /* Filled in by elfload.c. Simplistic, but will do for now. */
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12 | b9adb4a6 | bellard | unsigned int disas_num_syms; |
13 | b9adb4a6 | bellard | void *disas_symtab;
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14 | b9adb4a6 | bellard | const char *disas_strtab; |
15 | b9adb4a6 | bellard | |
16 | aa0aa4fa | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
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17 | aa0aa4fa | bellard | Transfer them to myaddr. */
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18 | aa0aa4fa | bellard | int
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19 | aa0aa4fa | bellard | buffer_read_memory (memaddr, myaddr, length, info) |
20 | aa0aa4fa | bellard | bfd_vma memaddr; |
21 | aa0aa4fa | bellard | bfd_byte *myaddr; |
22 | aa0aa4fa | bellard | int length;
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23 | aa0aa4fa | bellard | struct disassemble_info *info;
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24 | aa0aa4fa | bellard | { |
25 | c6105c0a | bellard | if (memaddr < info->buffer_vma
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26 | c6105c0a | bellard | || memaddr + length > info->buffer_vma + info->buffer_length) |
27 | c6105c0a | bellard | /* Out of bounds. Use EIO because GDB uses it. */
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28 | c6105c0a | bellard | return EIO;
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29 | c6105c0a | bellard | memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length); |
30 | c6105c0a | bellard | return 0; |
31 | aa0aa4fa | bellard | } |
32 | aa0aa4fa | bellard | |
33 | c6105c0a | bellard | #if !defined(CONFIG_USER_ONLY)
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34 | c6105c0a | bellard | /* Get LENGTH bytes from info's buffer, at target address memaddr.
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35 | c6105c0a | bellard | Transfer them to myaddr. */
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36 | c6105c0a | bellard | static int |
37 | c6105c0a | bellard | target_read_memory (memaddr, myaddr, length, info) |
38 | c6105c0a | bellard | bfd_vma memaddr; |
39 | c6105c0a | bellard | bfd_byte *myaddr; |
40 | c6105c0a | bellard | int length;
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41 | c6105c0a | bellard | struct disassemble_info *info;
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42 | c6105c0a | bellard | { |
43 | c6105c0a | bellard | int i;
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44 | c6105c0a | bellard | for(i = 0; i < length; i++) { |
45 | baf8ebf0 | bellard | myaddr[i] = ldub_code((void *)((long)memaddr + i)); |
46 | c6105c0a | bellard | } |
47 | c6105c0a | bellard | return 0; |
48 | c6105c0a | bellard | } |
49 | c6105c0a | bellard | #endif
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50 | c6105c0a | bellard | |
51 | aa0aa4fa | bellard | /* Print an error message. We can assume that this is in response to
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52 | aa0aa4fa | bellard | an error return from buffer_read_memory. */
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53 | aa0aa4fa | bellard | void
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54 | aa0aa4fa | bellard | perror_memory (status, memaddr, info) |
55 | aa0aa4fa | bellard | int status;
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56 | aa0aa4fa | bellard | bfd_vma memaddr; |
57 | aa0aa4fa | bellard | struct disassemble_info *info;
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58 | aa0aa4fa | bellard | { |
59 | aa0aa4fa | bellard | if (status != EIO)
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60 | aa0aa4fa | bellard | /* Can't happen. */
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61 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
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62 | aa0aa4fa | bellard | else
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63 | aa0aa4fa | bellard | /* Actually, address between memaddr and memaddr + len was
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64 | aa0aa4fa | bellard | out of bounds. */
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65 | aa0aa4fa | bellard | (*info->fprintf_func) (info->stream, |
66 | d44b29c2 | bellard | "Address 0x%llx is out of bounds.\n", memaddr);
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67 | aa0aa4fa | bellard | } |
68 | aa0aa4fa | bellard | |
69 | aa0aa4fa | bellard | /* This could be in a separate file, to save miniscule amounts of space
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70 | aa0aa4fa | bellard | in statically linked executables. */
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71 | aa0aa4fa | bellard | |
72 | aa0aa4fa | bellard | /* Just print the address is hex. This is included for completeness even
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73 | aa0aa4fa | bellard | though both GDB and objdump provide their own (to print symbolic
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74 | aa0aa4fa | bellard | addresses). */
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75 | aa0aa4fa | bellard | |
76 | aa0aa4fa | bellard | void
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77 | aa0aa4fa | bellard | generic_print_address (addr, info) |
78 | aa0aa4fa | bellard | bfd_vma addr; |
79 | aa0aa4fa | bellard | struct disassemble_info *info;
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80 | aa0aa4fa | bellard | { |
81 | d44b29c2 | bellard | (*info->fprintf_func) (info->stream, "0x%llx", addr);
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82 | aa0aa4fa | bellard | } |
83 | aa0aa4fa | bellard | |
84 | aa0aa4fa | bellard | /* Just return the given address. */
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85 | aa0aa4fa | bellard | |
86 | aa0aa4fa | bellard | int
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87 | aa0aa4fa | bellard | generic_symbol_at_address (addr, info) |
88 | aa0aa4fa | bellard | bfd_vma addr; |
89 | aa0aa4fa | bellard | struct disassemble_info * info;
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90 | aa0aa4fa | bellard | { |
91 | aa0aa4fa | bellard | return 1; |
92 | aa0aa4fa | bellard | } |
93 | aa0aa4fa | bellard | |
94 | aa0aa4fa | bellard | bfd_vma bfd_getl32 (const bfd_byte *addr)
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95 | aa0aa4fa | bellard | { |
96 | aa0aa4fa | bellard | unsigned long v; |
97 | aa0aa4fa | bellard | |
98 | aa0aa4fa | bellard | v = (unsigned long) addr[0]; |
99 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 8; |
100 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 16; |
101 | aa0aa4fa | bellard | v |= (unsigned long) addr[3] << 24; |
102 | aa0aa4fa | bellard | return (bfd_vma) v;
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103 | aa0aa4fa | bellard | } |
104 | aa0aa4fa | bellard | |
105 | aa0aa4fa | bellard | bfd_vma bfd_getb32 (const bfd_byte *addr)
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106 | aa0aa4fa | bellard | { |
107 | aa0aa4fa | bellard | unsigned long v; |
108 | aa0aa4fa | bellard | |
109 | aa0aa4fa | bellard | v = (unsigned long) addr[0] << 24; |
110 | aa0aa4fa | bellard | v |= (unsigned long) addr[1] << 16; |
111 | aa0aa4fa | bellard | v |= (unsigned long) addr[2] << 8; |
112 | aa0aa4fa | bellard | v |= (unsigned long) addr[3]; |
113 | aa0aa4fa | bellard | return (bfd_vma) v;
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114 | aa0aa4fa | bellard | } |
115 | aa0aa4fa | bellard | |
116 | 95cbfc64 | bellard | /* Disassemble this for me please... (debugging). 'flags' is only used
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117 | 95cbfc64 | bellard | for i386: non zero means 16 bit code */
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118 | 95cbfc64 | bellard | void disas(FILE *out, void *code, unsigned long size, int is_host, int flags) |
119 | b9adb4a6 | bellard | { |
120 | b9adb4a6 | bellard | uint8_t *pc; |
121 | b9adb4a6 | bellard | int count;
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122 | b9adb4a6 | bellard | struct disassemble_info disasm_info;
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123 | b9adb4a6 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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124 | b9adb4a6 | bellard | |
125 | b9adb4a6 | bellard | INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf); |
126 | b9adb4a6 | bellard | |
127 | c6105c0a | bellard | #if !defined(CONFIG_USER_ONLY)
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128 | c6105c0a | bellard | if (!is_host) {
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129 | c6105c0a | bellard | disasm_info.read_memory_func = target_read_memory; |
130 | c6105c0a | bellard | } |
131 | c6105c0a | bellard | #endif
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132 | c6105c0a | bellard | |
133 | b9adb4a6 | bellard | disasm_info.buffer = code; |
134 | b9adb4a6 | bellard | disasm_info.buffer_vma = (unsigned long)code; |
135 | b9adb4a6 | bellard | disasm_info.buffer_length = size; |
136 | b9adb4a6 | bellard | |
137 | 95cbfc64 | bellard | if (is_host) {
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138 | b9adb4a6 | bellard | #ifdef WORDS_BIGENDIAN
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139 | b9adb4a6 | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
140 | b9adb4a6 | bellard | #else
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141 | b9adb4a6 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
142 | b9adb4a6 | bellard | #endif
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143 | bc51c5c9 | bellard | #if defined(__i386__)
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144 | b9adb4a6 | bellard | disasm_info.mach = bfd_mach_i386_i386; |
145 | b9adb4a6 | bellard | print_insn = print_insn_i386; |
146 | bc51c5c9 | bellard | #elif defined(__x86_64__)
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147 | bc51c5c9 | bellard | disasm_info.mach = bfd_mach_x86_64; |
148 | bc51c5c9 | bellard | print_insn = print_insn_i386; |
149 | b9adb4a6 | bellard | #elif defined(__powerpc__)
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150 | b9adb4a6 | bellard | print_insn = print_insn_ppc; |
151 | a993ba85 | bellard | #elif defined(__alpha__)
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152 | a993ba85 | bellard | print_insn = print_insn_alpha; |
153 | aa0aa4fa | bellard | #elif defined(__sparc__)
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154 | aa0aa4fa | bellard | print_insn = print_insn_sparc; |
155 | aa0aa4fa | bellard | #elif defined(__arm__)
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156 | aa0aa4fa | bellard | print_insn = print_insn_arm; |
157 | b9adb4a6 | bellard | #else
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158 | b9adb4a6 | bellard | fprintf(out, "Asm output not supported on this arch\n");
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159 | b9adb4a6 | bellard | return;
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160 | b9adb4a6 | bellard | #endif
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161 | b9adb4a6 | bellard | } else {
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162 | 95cbfc64 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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163 | 95cbfc64 | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
164 | 95cbfc64 | bellard | #else
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165 | b9adb4a6 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
166 | 95cbfc64 | bellard | #endif
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167 | 95cbfc64 | bellard | #if defined(TARGET_I386)
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168 | 95cbfc64 | bellard | if (!flags)
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169 | b9adb4a6 | bellard | disasm_info.mach = bfd_mach_i386_i386; |
170 | b9adb4a6 | bellard | else
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171 | b9adb4a6 | bellard | disasm_info.mach = bfd_mach_i386_i8086; |
172 | b9adb4a6 | bellard | print_insn = print_insn_i386; |
173 | 95cbfc64 | bellard | #elif defined(TARGET_ARM)
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174 | 95cbfc64 | bellard | print_insn = print_insn_arm; |
175 | 93ac68bc | bellard | #elif defined(TARGET_SPARC)
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176 | 93ac68bc | bellard | print_insn = print_insn_sparc; |
177 | 67867308 | bellard | #elif defined(TARGET_PPC)
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178 | 67867308 | bellard | print_insn = print_insn_ppc; |
179 | 95cbfc64 | bellard | #else
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180 | 95cbfc64 | bellard | fprintf(out, "Asm output not supported on this arch\n");
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181 | 95cbfc64 | bellard | return;
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182 | 95cbfc64 | bellard | #endif
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183 | b9adb4a6 | bellard | } |
184 | b9adb4a6 | bellard | |
185 | b9adb4a6 | bellard | for (pc = code; pc < (uint8_t *)code + size; pc += count) {
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186 | b9adb4a6 | bellard | fprintf(out, "0x%08lx: ", (long)pc); |
187 | aa0aa4fa | bellard | #ifdef __arm__
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188 | aa0aa4fa | bellard | /* since data are included in the code, it is better to
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189 | aa0aa4fa | bellard | display code data too */
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190 | 95cbfc64 | bellard | if (is_host) {
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191 | aa0aa4fa | bellard | fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc)); |
192 | aa0aa4fa | bellard | } |
193 | aa0aa4fa | bellard | #endif
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194 | 08351fb3 | bellard | count = print_insn((unsigned long)pc, &disasm_info); |
195 | b9adb4a6 | bellard | fprintf(out, "\n");
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196 | b9adb4a6 | bellard | if (count < 0) |
197 | b9adb4a6 | bellard | break;
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198 | b9adb4a6 | bellard | } |
199 | b9adb4a6 | bellard | } |
200 | b9adb4a6 | bellard | |
201 | b9adb4a6 | bellard | /* Look up symbol for debugging purpose. Returns "" if unknown. */
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202 | b9adb4a6 | bellard | const char *lookup_symbol(void *orig_addr) |
203 | b9adb4a6 | bellard | { |
204 | b9adb4a6 | bellard | unsigned int i; |
205 | b9adb4a6 | bellard | /* Hack, because we know this is x86. */
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206 | b9adb4a6 | bellard | Elf32_Sym *sym = disas_symtab; |
207 | b9adb4a6 | bellard | |
208 | b9adb4a6 | bellard | for (i = 0; i < disas_num_syms; i++) { |
209 | b9adb4a6 | bellard | if (sym[i].st_shndx == SHN_UNDEF
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210 | b9adb4a6 | bellard | || sym[i].st_shndx >= SHN_LORESERVE) |
211 | b9adb4a6 | bellard | continue;
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212 | b9adb4a6 | bellard | |
213 | b9adb4a6 | bellard | if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
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214 | b9adb4a6 | bellard | continue;
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215 | b9adb4a6 | bellard | |
216 | b9adb4a6 | bellard | if ((long)orig_addr >= sym[i].st_value |
217 | b9adb4a6 | bellard | && (long)orig_addr < sym[i].st_value + sym[i].st_size)
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218 | b9adb4a6 | bellard | return disas_strtab + sym[i].st_name;
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219 | b9adb4a6 | bellard | } |
220 | b9adb4a6 | bellard | return ""; |
221 | b9adb4a6 | bellard | } |
222 | 9307c4c1 | bellard | |
223 | 9307c4c1 | bellard | #if !defined(CONFIG_USER_ONLY)
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224 | 9307c4c1 | bellard | |
225 | 3d2cfdf1 | bellard | void term_vprintf(const char *fmt, va_list ap); |
226 | 3d2cfdf1 | bellard | void term_printf(const char *fmt, ...); |
227 | 3d2cfdf1 | bellard | |
228 | 9307c4c1 | bellard | static int monitor_disas_is_physical; |
229 | 9307c4c1 | bellard | |
230 | 9307c4c1 | bellard | static int |
231 | 9307c4c1 | bellard | monitor_read_memory (memaddr, myaddr, length, info) |
232 | 9307c4c1 | bellard | bfd_vma memaddr; |
233 | 9307c4c1 | bellard | bfd_byte *myaddr; |
234 | 9307c4c1 | bellard | int length;
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235 | 9307c4c1 | bellard | struct disassemble_info *info;
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236 | 9307c4c1 | bellard | { |
237 | 9307c4c1 | bellard | if (monitor_disas_is_physical) {
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238 | 9307c4c1 | bellard | cpu_physical_memory_rw(memaddr, myaddr, length, 0);
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239 | 9307c4c1 | bellard | } else {
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240 | 9307c4c1 | bellard | cpu_memory_rw_debug(cpu_single_env, memaddr,myaddr, length, 0);
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241 | 9307c4c1 | bellard | } |
242 | 9307c4c1 | bellard | return 0; |
243 | 9307c4c1 | bellard | } |
244 | 9307c4c1 | bellard | |
245 | 3d2cfdf1 | bellard | static int monitor_fprintf(FILE *stream, const char *fmt, ...) |
246 | 3d2cfdf1 | bellard | { |
247 | 3d2cfdf1 | bellard | va_list ap; |
248 | 3d2cfdf1 | bellard | va_start(ap, fmt); |
249 | 3d2cfdf1 | bellard | term_vprintf(fmt, ap); |
250 | 3d2cfdf1 | bellard | va_end(ap); |
251 | 3d2cfdf1 | bellard | return 0; |
252 | 3d2cfdf1 | bellard | } |
253 | 3d2cfdf1 | bellard | |
254 | 9307c4c1 | bellard | void monitor_disas(target_ulong pc, int nb_insn, int is_physical, int flags) |
255 | 9307c4c1 | bellard | { |
256 | 9307c4c1 | bellard | int count, i;
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257 | 9307c4c1 | bellard | struct disassemble_info disasm_info;
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258 | 9307c4c1 | bellard | int (*print_insn)(bfd_vma pc, disassemble_info *info);
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259 | 9307c4c1 | bellard | |
260 | 3d2cfdf1 | bellard | INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
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261 | 9307c4c1 | bellard | |
262 | 9307c4c1 | bellard | monitor_disas_is_physical = is_physical; |
263 | 9307c4c1 | bellard | disasm_info.read_memory_func = monitor_read_memory; |
264 | 9307c4c1 | bellard | |
265 | 9307c4c1 | bellard | disasm_info.buffer_vma = pc; |
266 | 9307c4c1 | bellard | |
267 | 9307c4c1 | bellard | #ifdef TARGET_WORDS_BIGENDIAN
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268 | 9307c4c1 | bellard | disasm_info.endian = BFD_ENDIAN_BIG; |
269 | 9307c4c1 | bellard | #else
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270 | 9307c4c1 | bellard | disasm_info.endian = BFD_ENDIAN_LITTLE; |
271 | 9307c4c1 | bellard | #endif
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272 | 9307c4c1 | bellard | #if defined(TARGET_I386)
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273 | 9307c4c1 | bellard | if (!flags)
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274 | 9307c4c1 | bellard | disasm_info.mach = bfd_mach_i386_i386; |
275 | 9307c4c1 | bellard | else
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276 | 9307c4c1 | bellard | disasm_info.mach = bfd_mach_i386_i8086; |
277 | 9307c4c1 | bellard | print_insn = print_insn_i386; |
278 | 9307c4c1 | bellard | #elif defined(TARGET_ARM)
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279 | 9307c4c1 | bellard | print_insn = print_insn_arm; |
280 | 9307c4c1 | bellard | #elif defined(TARGET_SPARC)
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281 | 9307c4c1 | bellard | print_insn = print_insn_sparc; |
282 | 9307c4c1 | bellard | #elif defined(TARGET_PPC)
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283 | 9307c4c1 | bellard | print_insn = print_insn_ppc; |
284 | 9307c4c1 | bellard | #else
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285 | 9307c4c1 | bellard | fprintf(out, "Asm output not supported on this arch\n");
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286 | 9307c4c1 | bellard | return;
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287 | 9307c4c1 | bellard | #endif
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288 | 9307c4c1 | bellard | |
289 | 9307c4c1 | bellard | for(i = 0; i < nb_insn; i++) { |
290 | 3d2cfdf1 | bellard | term_printf("0x%08lx: ", (unsigned long)pc); |
291 | 9307c4c1 | bellard | count = print_insn(pc, &disasm_info); |
292 | 3d2cfdf1 | bellard | term_printf("\n");
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293 | 9307c4c1 | bellard | if (count < 0) |
294 | 9307c4c1 | bellard | break;
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295 | 9307c4c1 | bellard | pc += count; |
296 | 9307c4c1 | bellard | } |
297 | 9307c4c1 | bellard | } |
298 | 9307c4c1 | bellard | #endif |