Revision ca7c2b1b
| b/linux-user/main.c | ||
|---|---|---|
| 1352 | 1352 |
} |
| 1353 | 1353 |
} |
| 1354 | 1354 |
break; |
| 1355 |
case EXCP_TLBL: |
|
| 1356 |
case EXCP_TLBS: |
|
| 1355 | 1357 |
case EXCP_CpU: |
| 1356 | 1358 |
case EXCP_RI: |
| 1357 | 1359 |
info.si_signo = TARGET_SIGILL; |
| b/target-mips/helper.c | ||
|---|---|---|
| 243 | 243 |
return ret; |
| 244 | 244 |
} |
| 245 | 245 |
|
| 246 |
#if defined(CONFIG_USER_ONLY) |
|
| 247 |
void do_interrupt (CPUState *env) |
|
| 248 |
{
|
|
| 249 |
env->exception_index = EXCP_NONE; |
|
| 250 |
} |
|
| 251 |
#else |
|
| 246 | 252 |
void do_interrupt (CPUState *env) |
| 247 | 253 |
{
|
| 248 | 254 |
target_ulong offset; |
| ... | ... | |
| 409 | 415 |
} |
| 410 | 416 |
env->exception_index = EXCP_NONE; |
| 411 | 417 |
} |
| 418 |
#endif /* !defined(CONFIG_USER_ONLY) */ |
|
| b/target-mips/translate.c | ||
|---|---|---|
| 4072 | 4072 |
tlb_flush(env, 1); |
| 4073 | 4073 |
|
| 4074 | 4074 |
/* Minimal init */ |
| 4075 |
#if !defined(CONFIG_USER_ONLY) |
|
| 4075 | 4076 |
if (env->hflags & MIPS_HFLAG_BMASK) {
|
| 4076 | 4077 |
/* If the exception was raised from a delay slot, |
| 4077 | 4078 |
* come back to the jump. */ |
| ... | ... | |
| 4098 | 4099 |
/* Count register increments in debug mode, EJTAG version 1 */ |
| 4099 | 4100 |
env->CP0_Debug = (1 << CP0DB_CNT) | (0x1 << CP0DB_VER); |
| 4100 | 4101 |
env->CP0_PRid = MIPS_CPU; |
| 4102 |
#endif |
|
| 4101 | 4103 |
env->exception_index = EXCP_NONE; |
| 4102 | 4104 |
#if defined(CONFIG_USER_ONLY) |
| 4103 | 4105 |
env->hflags |= MIPS_HFLAG_UM; |
| 4106 |
env->user_mode_only = 1; |
|
| 4104 | 4107 |
#endif |
| 4105 | 4108 |
#ifdef MIPS_USES_FPU |
| 4106 | 4109 |
env->fcr0 = MIPS_FCR0; |
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