root / target-mips / helper.h @ cba933b2
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1 | 022c62cb | Paolo Bonzini | #include "exec/def-helper.h" |
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2 | a7812ae4 | pbrook | |
3 | 895c2d04 | Blue Swirl | DEF_HELPER_3(raise_exception_err, noreturn, env, i32, int)
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4 | 895c2d04 | Blue Swirl | DEF_HELPER_2(raise_exception, noreturn, env, i32) |
5 | 7dd9e556 | ths | |
6 | c8c2227e | ths | #ifdef TARGET_MIPS64
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7 | 895c2d04 | Blue Swirl | DEF_HELPER_4(sdl, void, env, tl, tl, int) |
8 | 895c2d04 | Blue Swirl | DEF_HELPER_4(sdr, void, env, tl, tl, int) |
9 | c8c2227e | ths | #endif
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10 | 895c2d04 | Blue Swirl | DEF_HELPER_4(swl, void, env, tl, tl, int) |
11 | 895c2d04 | Blue Swirl | DEF_HELPER_4(swr, void, env, tl, tl, int) |
12 | c8c2227e | ths | |
13 | e7139c44 | Aurelien Jarno | #ifndef CONFIG_USER_ONLY
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14 | 895c2d04 | Blue Swirl | DEF_HELPER_3(ll, tl, env, tl, int)
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15 | 895c2d04 | Blue Swirl | DEF_HELPER_4(sc, tl, env, tl, tl, int)
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16 | e7139c44 | Aurelien Jarno | #ifdef TARGET_MIPS64
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17 | 895c2d04 | Blue Swirl | DEF_HELPER_3(lld, tl, env, tl, int)
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18 | 895c2d04 | Blue Swirl | DEF_HELPER_4(scd, tl, env, tl, tl, int)
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19 | e7139c44 | Aurelien Jarno | #endif
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20 | e7139c44 | Aurelien Jarno | #endif
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21 | e7139c44 | Aurelien Jarno | |
22 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_1(clo, TCG_CALL_NO_RWG_SE, tl, tl) |
23 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_1(clz, TCG_CALL_NO_RWG_SE, tl, tl) |
24 | 7dd9e556 | ths | #ifdef TARGET_MIPS64
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25 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_1(dclo, TCG_CALL_NO_RWG_SE, tl, tl) |
26 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_1(dclz, TCG_CALL_NO_RWG_SE, tl, tl) |
27 | 7dd9e556 | ths | #endif
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28 | f1aa6320 | ths | |
29 | 895c2d04 | Blue Swirl | DEF_HELPER_3(muls, tl, env, tl, tl) |
30 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mulsu, tl, env, tl, tl) |
31 | 895c2d04 | Blue Swirl | DEF_HELPER_3(macc, tl, env, tl, tl) |
32 | 895c2d04 | Blue Swirl | DEF_HELPER_3(maccu, tl, env, tl, tl) |
33 | 895c2d04 | Blue Swirl | DEF_HELPER_3(msac, tl, env, tl, tl) |
34 | 895c2d04 | Blue Swirl | DEF_HELPER_3(msacu, tl, env, tl, tl) |
35 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mulhi, tl, env, tl, tl) |
36 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mulhiu, tl, env, tl, tl) |
37 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mulshi, tl, env, tl, tl) |
38 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mulshiu, tl, env, tl, tl) |
39 | 895c2d04 | Blue Swirl | DEF_HELPER_3(macchi, tl, env, tl, tl) |
40 | 895c2d04 | Blue Swirl | DEF_HELPER_3(macchiu, tl, env, tl, tl) |
41 | 895c2d04 | Blue Swirl | DEF_HELPER_3(msachi, tl, env, tl, tl) |
42 | 895c2d04 | Blue Swirl | DEF_HELPER_3(msachiu, tl, env, tl, tl) |
43 | 92af06d2 | ths | |
44 | f1aa6320 | ths | #ifndef CONFIG_USER_ONLY
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45 | 0eaef5aa | ths | /* CP0 helpers */
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46 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_mvpcontrol, tl, env) |
47 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_mvpconf0, tl, env) |
48 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_mvpconf1, tl, env) |
49 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_vpecontrol, tl, env) |
50 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_vpeconf0, tl, env) |
51 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_random, tl, env) |
52 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_tcstatus, tl, env) |
53 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_tcstatus, tl, env) |
54 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_tcbind, tl, env) |
55 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_tcbind, tl, env) |
56 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_tcrestart, tl, env) |
57 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_tcrestart, tl, env) |
58 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_tchalt, tl, env) |
59 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_tchalt, tl, env) |
60 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_tccontext, tl, env) |
61 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_tccontext, tl, env) |
62 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_tcschedule, tl, env) |
63 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_tcschedule, tl, env) |
64 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_tcschefback, tl, env) |
65 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_tcschefback, tl, env) |
66 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_count, tl, env) |
67 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_entryhi, tl, env) |
68 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_status, tl, env) |
69 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_cause, tl, env) |
70 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_epc, tl, env) |
71 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_ebase, tl, env) |
72 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mftc0_configx, tl, env, tl) |
73 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_lladdr, tl, env) |
74 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mfc0_watchlo, tl, env, i32) |
75 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mfc0_watchhi, tl, env, i32) |
76 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mfc0_debug, tl, env) |
77 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftc0_debug, tl, env) |
78 | f1aa6320 | ths | #ifdef TARGET_MIPS64
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79 | 895c2d04 | Blue Swirl | DEF_HELPER_1(dmfc0_tcrestart, tl, env) |
80 | 895c2d04 | Blue Swirl | DEF_HELPER_1(dmfc0_tchalt, tl, env) |
81 | 895c2d04 | Blue Swirl | DEF_HELPER_1(dmfc0_tccontext, tl, env) |
82 | 895c2d04 | Blue Swirl | DEF_HELPER_1(dmfc0_tcschedule, tl, env) |
83 | 895c2d04 | Blue Swirl | DEF_HELPER_1(dmfc0_tcschefback, tl, env) |
84 | 895c2d04 | Blue Swirl | DEF_HELPER_1(dmfc0_lladdr, tl, env) |
85 | 895c2d04 | Blue Swirl | DEF_HELPER_2(dmfc0_watchlo, tl, env, i32) |
86 | f1aa6320 | ths | #endif /* TARGET_MIPS64 */ |
87 | f1aa6320 | ths | |
88 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_index, void, env, tl)
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89 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_mvpcontrol, void, env, tl)
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90 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_vpecontrol, void, env, tl)
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91 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_vpecontrol, void, env, tl)
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92 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_vpeconf0, void, env, tl)
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93 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_vpeconf0, void, env, tl)
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94 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_vpeconf1, void, env, tl)
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95 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_yqmask, void, env, tl)
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96 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_vpeopt, void, env, tl)
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97 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_entrylo0, void, env, tl)
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98 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_tcstatus, void, env, tl)
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99 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_tcstatus, void, env, tl)
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100 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_tcbind, void, env, tl)
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101 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_tcbind, void, env, tl)
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102 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_tcrestart, void, env, tl)
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103 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_tcrestart, void, env, tl)
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104 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_tchalt, void, env, tl)
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105 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_tchalt, void, env, tl)
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106 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_tccontext, void, env, tl)
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107 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_tccontext, void, env, tl)
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108 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_tcschedule, void, env, tl)
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109 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_tcschedule, void, env, tl)
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110 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_tcschefback, void, env, tl)
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111 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_tcschefback, void, env, tl)
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112 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_entrylo1, void, env, tl)
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113 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_context, void, env, tl)
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114 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_pagemask, void, env, tl)
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115 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_pagegrain, void, env, tl)
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116 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_wired, void, env, tl)
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117 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_srsconf0, void, env, tl)
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118 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_srsconf1, void, env, tl)
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119 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_srsconf2, void, env, tl)
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120 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_srsconf3, void, env, tl)
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121 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_srsconf4, void, env, tl)
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122 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_hwrena, void, env, tl)
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123 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_count, void, env, tl)
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124 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_entryhi, void, env, tl)
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125 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_entryhi, void, env, tl)
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126 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_compare, void, env, tl)
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127 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_status, void, env, tl)
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128 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_status, void, env, tl)
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129 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_intctl, void, env, tl)
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130 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_srsctl, void, env, tl)
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131 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_cause, void, env, tl)
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132 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_cause, void, env, tl)
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133 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_ebase, void, env, tl)
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134 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_ebase, void, env, tl)
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135 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_config0, void, env, tl)
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136 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_config2, void, env, tl)
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137 | b4160af1 | Petar Jovanovic | DEF_HELPER_2(mtc0_config4, void, env, tl)
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138 | b4dd99a3 | Petar Jovanovic | DEF_HELPER_2(mtc0_config5, void, env, tl)
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139 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_lladdr, void, env, tl)
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140 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mtc0_watchlo, void, env, tl, i32)
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141 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mtc0_watchhi, void, env, tl, i32)
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142 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_xcontext, void, env, tl)
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143 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_framemask, void, env, tl)
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144 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_debug, void, env, tl)
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145 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttc0_debug, void, env, tl)
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146 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_performance0, void, env, tl)
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147 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_taglo, void, env, tl)
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148 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_datalo, void, env, tl)
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149 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_taghi, void, env, tl)
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150 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mtc0_datahi, void, env, tl)
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151 | f1aa6320 | ths | |
152 | f1aa6320 | ths | /* MIPS MT functions */
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153 | f5daeec4 | Richard Henderson | DEF_HELPER_2(mftgpr, tl, env, i32) |
154 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mftlo, tl, env, i32) |
155 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mfthi, tl, env, i32) |
156 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mftacx, tl, env, i32) |
157 | 895c2d04 | Blue Swirl | DEF_HELPER_1(mftdsp, tl, env) |
158 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mttgpr, void, env, tl, i32)
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159 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mttlo, void, env, tl, i32)
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160 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mtthi, void, env, tl, i32)
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161 | 895c2d04 | Blue Swirl | DEF_HELPER_3(mttacx, void, env, tl, i32)
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162 | 895c2d04 | Blue Swirl | DEF_HELPER_2(mttdsp, void, env, tl)
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163 | 9ed5726c | Nathan Froyd | DEF_HELPER_0(dmt, tl) |
164 | 9ed5726c | Nathan Froyd | DEF_HELPER_0(emt, tl) |
165 | 895c2d04 | Blue Swirl | DEF_HELPER_1(dvpe, tl, env) |
166 | 895c2d04 | Blue Swirl | DEF_HELPER_1(evpe, tl, env) |
167 | 0eaef5aa | ths | #endif /* !CONFIG_USER_ONLY */ |
168 | 3c824109 | Nathan Froyd | |
169 | 3c824109 | Nathan Froyd | /* microMIPS functions */
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170 | f5daeec4 | Richard Henderson | DEF_HELPER_4(lwm, void, env, tl, tl, i32)
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171 | f5daeec4 | Richard Henderson | DEF_HELPER_4(swm, void, env, tl, tl, i32)
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172 | 3c824109 | Nathan Froyd | #ifdef TARGET_MIPS64
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173 | f5daeec4 | Richard Henderson | DEF_HELPER_4(ldm, void, env, tl, tl, i32)
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174 | f5daeec4 | Richard Henderson | DEF_HELPER_4(sdm, void, env, tl, tl, i32)
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175 | 3c824109 | Nathan Froyd | #endif
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176 | 3c824109 | Nathan Froyd | |
177 | a7812ae4 | pbrook | DEF_HELPER_2(fork, void, tl, tl)
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178 | 895c2d04 | Blue Swirl | DEF_HELPER_2(yield, tl, env, tl) |
179 | f1aa6320 | ths | |
180 | f1aa6320 | ths | /* CP1 functions */
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181 | 895c2d04 | Blue Swirl | DEF_HELPER_2(cfc1, tl, env, i32) |
182 | 736d120a | Petar Jovanovic | DEF_HELPER_4(ctc1, void, env, tl, i32, i32)
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183 | 5d0fc900 | ths | |
184 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtd_s, i64, env, i32) |
185 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtd_w, i64, env, i32) |
186 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtd_l, i64, env, i64) |
187 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtl_d, i64, env, i64) |
188 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtl_s, i64, env, i32) |
189 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtps_pw, i64, env, i64) |
190 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtpw_ps, i64, env, i64) |
191 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvts_d, i32, env, i64) |
192 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvts_w, i32, env, i32) |
193 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvts_l, i32, env, i64) |
194 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvts_pl, i32, env, i32) |
195 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvts_pu, i32, env, i32) |
196 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtw_s, i32, env, i32) |
197 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_cvtw_d, i32, env, i64) |
198 | b6d96bed | ths | |
199 | 895c2d04 | Blue Swirl | DEF_HELPER_3(float_addr_ps, i64, env, i64, i64) |
200 | 895c2d04 | Blue Swirl | DEF_HELPER_3(float_mulr_ps, i64, env, i64, i64) |
201 | b6d96bed | ths | |
202 | 895c2d04 | Blue Swirl | #define FOP_PROTO(op) \
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203 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## l_s, i64, env, i32) \ |
204 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## l_d, i64, env, i64) \ |
205 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## w_s, i32, env, i32) \ |
206 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## w_d, i32, env, i64) |
207 | b6d96bed | ths | FOP_PROTO(round) |
208 | b6d96bed | ths | FOP_PROTO(trunc) |
209 | b6d96bed | ths | FOP_PROTO(ceil) |
210 | b6d96bed | ths | FOP_PROTO(floor) |
211 | b6d96bed | ths | #undef FOP_PROTO
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212 | b6d96bed | ths | |
213 | 895c2d04 | Blue Swirl | #define FOP_PROTO(op) \
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214 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \ |
215 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) |
216 | a16336e4 | ths | FOP_PROTO(sqrt) |
217 | 5d0fc900 | ths | FOP_PROTO(rsqrt) |
218 | 5d0fc900 | ths | FOP_PROTO(recip) |
219 | 5d0fc900 | ths | #undef FOP_PROTO
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220 | 5d0fc900 | ths | |
221 | a7812ae4 | pbrook | #define FOP_PROTO(op) \
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222 | a7812ae4 | pbrook | DEF_HELPER_1(float_ ## op ## _s, i32, i32) \ |
223 | a7812ae4 | pbrook | DEF_HELPER_1(float_ ## op ## _d, i64, i64) \ |
224 | a7812ae4 | pbrook | DEF_HELPER_1(float_ ## op ## _ps, i64, i64) |
225 | b6d96bed | ths | FOP_PROTO(abs) |
226 | b6d96bed | ths | FOP_PROTO(chs) |
227 | 895c2d04 | Blue Swirl | #undef FOP_PROTO
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228 | 895c2d04 | Blue Swirl | |
229 | 895c2d04 | Blue Swirl | #define FOP_PROTO(op) \
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230 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## _s, i32, env, i32) \ |
231 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## _d, i64, env, i64) \ |
232 | 895c2d04 | Blue Swirl | DEF_HELPER_2(float_ ## op ## _ps, i64, env, i64) |
233 | b6d96bed | ths | FOP_PROTO(recip1) |
234 | b6d96bed | ths | FOP_PROTO(rsqrt1) |
235 | b6d96bed | ths | #undef FOP_PROTO
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236 | b6d96bed | ths | |
237 | 895c2d04 | Blue Swirl | #define FOP_PROTO(op) \
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238 | 895c2d04 | Blue Swirl | DEF_HELPER_3(float_ ## op ## _s, i32, env, i32, i32) \ |
239 | 895c2d04 | Blue Swirl | DEF_HELPER_3(float_ ## op ## _d, i64, env, i64, i64) \ |
240 | 895c2d04 | Blue Swirl | DEF_HELPER_3(float_ ## op ## _ps, i64, env, i64, i64) |
241 | 5d0fc900 | ths | FOP_PROTO(add) |
242 | 5d0fc900 | ths | FOP_PROTO(sub) |
243 | 5d0fc900 | ths | FOP_PROTO(mul) |
244 | 5d0fc900 | ths | FOP_PROTO(div) |
245 | b6d96bed | ths | FOP_PROTO(recip2) |
246 | b6d96bed | ths | FOP_PROTO(rsqrt2) |
247 | b6d96bed | ths | #undef FOP_PROTO
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248 | b6d96bed | ths | |
249 | 895c2d04 | Blue Swirl | #define FOP_PROTO(op) \
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250 | 895c2d04 | Blue Swirl | DEF_HELPER_4(float_ ## op ## _s, i32, env, i32, i32, i32) \ |
251 | 895c2d04 | Blue Swirl | DEF_HELPER_4(float_ ## op ## _d, i64, env, i64, i64, i64) \ |
252 | 895c2d04 | Blue Swirl | DEF_HELPER_4(float_ ## op ## _ps, i64, env, i64, i64, i64) |
253 | b3d6cd44 | Aurelien Jarno | FOP_PROTO(madd) |
254 | b3d6cd44 | Aurelien Jarno | FOP_PROTO(msub) |
255 | b3d6cd44 | Aurelien Jarno | FOP_PROTO(nmadd) |
256 | b3d6cd44 | Aurelien Jarno | FOP_PROTO(nmsub) |
257 | 5d0fc900 | ths | #undef FOP_PROTO
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258 | 5d0fc900 | ths | |
259 | 895c2d04 | Blue Swirl | #define FOP_PROTO(op) \
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260 | 895c2d04 | Blue Swirl | DEF_HELPER_4(cmp_d_ ## op, void, env, i64, i64, int) \ |
261 | 895c2d04 | Blue Swirl | DEF_HELPER_4(cmpabs_d_ ## op, void, env, i64, i64, int) \ |
262 | 895c2d04 | Blue Swirl | DEF_HELPER_4(cmp_s_ ## op, void, env, i32, i32, int) \ |
263 | 895c2d04 | Blue Swirl | DEF_HELPER_4(cmpabs_s_ ## op, void, env, i32, i32, int) \ |
264 | 895c2d04 | Blue Swirl | DEF_HELPER_4(cmp_ps_ ## op, void, env, i64, i64, int) \ |
265 | 895c2d04 | Blue Swirl | DEF_HELPER_4(cmpabs_ps_ ## op, void, env, i64, i64, int) |
266 | 5d0fc900 | ths | FOP_PROTO(f) |
267 | 5d0fc900 | ths | FOP_PROTO(un) |
268 | 5d0fc900 | ths | FOP_PROTO(eq) |
269 | 5d0fc900 | ths | FOP_PROTO(ueq) |
270 | 5d0fc900 | ths | FOP_PROTO(olt) |
271 | 5d0fc900 | ths | FOP_PROTO(ult) |
272 | 5d0fc900 | ths | FOP_PROTO(ole) |
273 | 5d0fc900 | ths | FOP_PROTO(ule) |
274 | 5d0fc900 | ths | FOP_PROTO(sf) |
275 | 5d0fc900 | ths | FOP_PROTO(ngle) |
276 | 5d0fc900 | ths | FOP_PROTO(seq) |
277 | 5d0fc900 | ths | FOP_PROTO(ngl) |
278 | 5d0fc900 | ths | FOP_PROTO(lt) |
279 | 5d0fc900 | ths | FOP_PROTO(nge) |
280 | 5d0fc900 | ths | FOP_PROTO(le) |
281 | 5d0fc900 | ths | FOP_PROTO(ngt) |
282 | 5d0fc900 | ths | #undef FOP_PROTO
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283 | 08ba7963 | ths | |
284 | 08ba7963 | ths | /* Special functions */
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285 | 0eaef5aa | ths | #ifndef CONFIG_USER_ONLY
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286 | 895c2d04 | Blue Swirl | DEF_HELPER_1(tlbwi, void, env)
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287 | 895c2d04 | Blue Swirl | DEF_HELPER_1(tlbwr, void, env)
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288 | 895c2d04 | Blue Swirl | DEF_HELPER_1(tlbp, void, env)
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289 | 895c2d04 | Blue Swirl | DEF_HELPER_1(tlbr, void, env)
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290 | 895c2d04 | Blue Swirl | DEF_HELPER_1(di, tl, env) |
291 | 895c2d04 | Blue Swirl | DEF_HELPER_1(ei, tl, env) |
292 | 895c2d04 | Blue Swirl | DEF_HELPER_1(eret, void, env)
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293 | 895c2d04 | Blue Swirl | DEF_HELPER_1(deret, void, env)
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294 | 0eaef5aa | ths | #endif /* !CONFIG_USER_ONLY */ |
295 | 895c2d04 | Blue Swirl | DEF_HELPER_1(rdhwr_cpunum, tl, env) |
296 | 895c2d04 | Blue Swirl | DEF_HELPER_1(rdhwr_synci_step, tl, env) |
297 | 895c2d04 | Blue Swirl | DEF_HELPER_1(rdhwr_cc, tl, env) |
298 | 895c2d04 | Blue Swirl | DEF_HELPER_1(rdhwr_ccres, tl, env) |
299 | 895c2d04 | Blue Swirl | DEF_HELPER_2(pmon, void, env, int) |
300 | 895c2d04 | Blue Swirl | DEF_HELPER_1(wait, void, env)
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301 | a7812ae4 | pbrook | |
302 | bd277fa1 | Richard Henderson | /* Loongson multimedia functions. */
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303 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(paddsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
304 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(paddush, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
305 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(paddh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
306 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(paddw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
307 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(paddsb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
308 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(paddusb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
309 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(paddb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
310 | bd277fa1 | Richard Henderson | |
311 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psubsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
312 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psubush, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
313 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psubh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
314 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psubw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
315 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psubsb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
316 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psubusb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
317 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psubb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
318 | bd277fa1 | Richard Henderson | |
319 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pshufh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
320 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(packsswh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
321 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(packsshb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
322 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(packushb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
323 | bd277fa1 | Richard Henderson | |
324 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(punpcklhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
325 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(punpckhhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
326 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(punpcklbh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
327 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(punpckhbh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
328 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(punpcklwd, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
329 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(punpckhwd, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
330 | bd277fa1 | Richard Henderson | |
331 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pavgh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
332 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pavgb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
333 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pmaxsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
334 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pminsh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
335 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pmaxub, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
336 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pminub, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
337 | bd277fa1 | Richard Henderson | |
338 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pcmpeqw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
339 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pcmpgtw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
340 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pcmpeqh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
341 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pcmpgth, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
342 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pcmpeqb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
343 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pcmpgtb, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
344 | bd277fa1 | Richard Henderson | |
345 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psllw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
346 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psllh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
347 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psrlw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
348 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psrlh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
349 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psraw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
350 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(psrah, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
351 | bd277fa1 | Richard Henderson | |
352 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pmullh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
353 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pmulhh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
354 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pmulhuh, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
355 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pmaddhw, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
356 | bd277fa1 | Richard Henderson | |
357 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_2(pasubub, TCG_CALL_NO_RWG_SE, i64, i64, i64) |
358 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_1(biadd, TCG_CALL_NO_RWG_SE, i64, i64) |
359 | 95bf787e | Aurelien Jarno | DEF_HELPER_FLAGS_1(pmovmskb, TCG_CALL_NO_RWG_SE, i64, i64) |
360 | bd277fa1 | Richard Henderson | |
361 | 461c08df | Jia Liu | /*** MIPS DSP ***/
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362 | 461c08df | Jia Liu | /* DSP Arithmetic Sub-class insns */
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363 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addq_ph, 0, tl, tl, tl, env)
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364 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addq_s_ph, 0, tl, tl, tl, env)
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365 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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366 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addq_qh, 0, tl, tl, tl, env)
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367 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addq_s_qh, 0, tl, tl, tl, env)
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368 | 461c08df | Jia Liu | #endif
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369 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addq_s_w, 0, tl, tl, tl, env)
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370 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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371 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addq_pw, 0, tl, tl, tl, env)
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372 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addq_s_pw, 0, tl, tl, tl, env)
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373 | 461c08df | Jia Liu | #endif
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374 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addu_qb, 0, tl, tl, tl, env)
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375 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addu_s_qb, 0, tl, tl, tl, env)
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376 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(adduh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
377 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(adduh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
378 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addu_ph, 0, tl, tl, tl, env)
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379 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addu_s_ph, 0, tl, tl, tl, env)
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380 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(addqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
381 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(addqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
382 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(addqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
383 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(addqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
384 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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385 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addu_ob, 0, tl, tl, tl, env)
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386 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addu_s_ob, 0, tl, tl, tl, env)
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387 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(adduh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
388 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(adduh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
389 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addu_qh, 0, tl, tl, tl, env)
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390 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addu_s_qh, 0, tl, tl, tl, env)
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391 | 461c08df | Jia Liu | #endif
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392 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subq_ph, 0, tl, tl, tl, env)
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393 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subq_s_ph, 0, tl, tl, tl, env)
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394 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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395 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subq_qh, 0, tl, tl, tl, env)
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396 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subq_s_qh, 0, tl, tl, tl, env)
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397 | 461c08df | Jia Liu | #endif
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398 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subq_s_w, 0, tl, tl, tl, env)
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399 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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400 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subq_pw, 0, tl, tl, tl, env)
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401 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subq_s_pw, 0, tl, tl, tl, env)
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402 | 461c08df | Jia Liu | #endif
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403 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subu_qb, 0, tl, tl, tl, env)
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404 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subu_s_qb, 0, tl, tl, tl, env)
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405 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(subuh_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
406 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(subuh_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
407 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subu_ph, 0, tl, tl, tl, env)
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408 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subu_s_ph, 0, tl, tl, tl, env)
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409 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(subqh_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
410 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(subqh_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
411 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(subqh_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
412 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(subqh_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
413 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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414 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subu_ob, 0, tl, tl, tl, env)
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415 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subu_s_ob, 0, tl, tl, tl, env)
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416 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(subuh_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
417 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(subuh_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
418 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subu_qh, 0, tl, tl, tl, env)
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419 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(subu_s_qh, 0, tl, tl, tl, env)
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420 | 461c08df | Jia Liu | #endif
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421 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addsc, 0, tl, tl, tl, env)
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422 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(addwc, 0, tl, tl, tl, env)
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423 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(modsub, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
424 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(raddu_w_qb, TCG_CALL_NO_RWG_SE, tl, tl) |
425 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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426 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(raddu_l_ob, TCG_CALL_NO_RWG_SE, tl, tl) |
427 | 461c08df | Jia Liu | #endif
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428 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(absq_s_qb, 0, tl, tl, env)
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429 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(absq_s_ph, 0, tl, tl, env)
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430 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(absq_s_w, 0, tl, tl, env)
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431 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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432 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(absq_s_ob, 0, tl, tl, env)
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433 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(absq_s_qh, 0, tl, tl, env)
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434 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(absq_s_pw, 0, tl, tl, env)
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435 | 461c08df | Jia Liu | #endif
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436 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(precr_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
437 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(precrq_qb_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
438 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(precr_sra_ph_w, TCG_CALL_NO_RWG_SE, |
439 | 461c08df | Jia Liu | tl, i32, tl, tl) |
440 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(precr_sra_r_ph_w, TCG_CALL_NO_RWG_SE, |
441 | 461c08df | Jia Liu | tl, i32, tl, tl) |
442 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(precrq_ph_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
443 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(precrq_rs_ph_w, 0, tl, tl, tl, env)
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444 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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445 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(precr_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
446 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(precr_sra_qh_pw, |
447 | 461c08df | Jia Liu | TCG_CALL_NO_RWG_SE, tl, tl, tl, i32) |
448 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(precr_sra_r_qh_pw, |
449 | 461c08df | Jia Liu | TCG_CALL_NO_RWG_SE, tl, tl, tl, i32) |
450 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(precrq_ob_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
451 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(precrq_qh_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
452 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(precrq_rs_qh_pw, |
453 | 461c08df | Jia Liu | TCG_CALL_NO_RWG_SE, tl, tl, tl, env) |
454 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_2(precrq_pw_l, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
455 | 461c08df | Jia Liu | #endif
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456 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(precrqu_s_qb_ph, 0, tl, tl, tl, env)
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457 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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458 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_3(precrqu_s_ob_qh, |
459 | 461c08df | Jia Liu | TCG_CALL_NO_RWG_SE, tl, tl, tl, env) |
460 | 461c08df | Jia Liu | |
461 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceq_pw_qhl, TCG_CALL_NO_RWG_SE, tl, tl) |
462 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceq_pw_qhr, TCG_CALL_NO_RWG_SE, tl, tl) |
463 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceq_pw_qhla, TCG_CALL_NO_RWG_SE, tl, tl) |
464 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceq_pw_qhra, TCG_CALL_NO_RWG_SE, tl, tl) |
465 | 461c08df | Jia Liu | #endif
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466 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(precequ_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl) |
467 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(precequ_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl) |
468 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(precequ_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl) |
469 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(precequ_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl) |
470 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
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471 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(precequ_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl) |
472 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(precequ_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl) |
473 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(precequ_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl) |
474 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(precequ_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl) |
475 | 461c08df | Jia Liu | #endif
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476 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceu_ph_qbl, TCG_CALL_NO_RWG_SE, tl, tl) |
477 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceu_ph_qbr, TCG_CALL_NO_RWG_SE, tl, tl) |
478 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceu_ph_qbla, TCG_CALL_NO_RWG_SE, tl, tl) |
479 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceu_ph_qbra, TCG_CALL_NO_RWG_SE, tl, tl) |
480 | 461c08df | Jia Liu | #if defined(TARGET_MIPS64)
|
481 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceu_qh_obl, TCG_CALL_NO_RWG_SE, tl, tl) |
482 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceu_qh_obr, TCG_CALL_NO_RWG_SE, tl, tl) |
483 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceu_qh_obla, TCG_CALL_NO_RWG_SE, tl, tl) |
484 | 461c08df | Jia Liu | DEF_HELPER_FLAGS_1(preceu_qh_obra, TCG_CALL_NO_RWG_SE, tl, tl) |
485 | 461c08df | Jia Liu | #endif
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486 | 461c08df | Jia Liu | |
487 | 77c5fa8b | Jia Liu | /* DSP GPR-Based Shift Sub-class insns */
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488 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_qb, 0, tl, tl, tl, env)
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489 | 77c5fa8b | Jia Liu | #if defined(TARGET_MIPS64)
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490 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_ob, 0, tl, tl, tl, env)
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491 | 77c5fa8b | Jia Liu | #endif
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492 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_ph, 0, tl, tl, tl, env)
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493 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_s_ph, 0, tl, tl, tl, env)
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494 | 77c5fa8b | Jia Liu | #if defined(TARGET_MIPS64)
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495 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_qh, 0, tl, tl, tl, env)
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496 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_s_qh, 0, tl, tl, tl, env)
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497 | 77c5fa8b | Jia Liu | #endif
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498 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_s_w, 0, tl, tl, tl, env)
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499 | 77c5fa8b | Jia Liu | #if defined(TARGET_MIPS64)
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500 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_pw, 0, tl, tl, tl, env)
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501 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_3(shll_s_pw, 0, tl, tl, tl, env)
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502 | 77c5fa8b | Jia Liu | #endif
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503 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shrl_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
504 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
505 | 77c5fa8b | Jia Liu | #if defined(TARGET_MIPS64)
|
506 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shrl_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
507 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shrl_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
508 | 77c5fa8b | Jia Liu | #endif
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509 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
510 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_r_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
511 | 77c5fa8b | Jia Liu | #if defined(TARGET_MIPS64)
|
512 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
513 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_r_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
514 | 77c5fa8b | Jia Liu | #endif
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515 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
516 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_r_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
517 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_r_w, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
518 | 77c5fa8b | Jia Liu | #if defined(TARGET_MIPS64)
|
519 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
520 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_r_qh, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
521 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
522 | 77c5fa8b | Jia Liu | DEF_HELPER_FLAGS_2(shra_r_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
523 | 77c5fa8b | Jia Liu | #endif
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524 | 77c5fa8b | Jia Liu | |
525 | a22260ae | Jia Liu | /* DSP Multiply Sub-class insns */
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526 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(muleu_s_ph_qbl, 0, tl, tl, tl, env)
|
527 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(muleu_s_ph_qbr, 0, tl, tl, tl, env)
|
528 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
529 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(muleu_s_qh_obl, 0, tl, tl, tl, env)
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530 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(muleu_s_qh_obr, 0, tl, tl, tl, env)
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531 | a22260ae | Jia Liu | #endif
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532 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(mulq_rs_ph, 0, tl, tl, tl, env)
|
533 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
534 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(mulq_rs_qh, 0, tl, tl, tl, env)
|
535 | a22260ae | Jia Liu | #endif
|
536 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(muleq_s_w_phl, 0, tl, tl, tl, env)
|
537 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(muleq_s_w_phr, 0, tl, tl, tl, env)
|
538 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
539 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(muleq_s_pw_qhl, 0, tl, tl, tl, env)
|
540 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(muleq_s_pw_qhr, 0, tl, tl, tl, env)
|
541 | a22260ae | Jia Liu | #endif
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542 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpau_h_qbl, 0, void, i32, tl, tl, env) |
543 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpau_h_qbr, 0, void, i32, tl, tl, env) |
544 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
545 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpau_h_obl, 0, void, tl, tl, i32, env) |
546 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpau_h_obr, 0, void, tl, tl, i32, env) |
547 | a22260ae | Jia Liu | #endif
|
548 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsu_h_qbl, 0, void, i32, tl, tl, env) |
549 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsu_h_qbr, 0, void, i32, tl, tl, env) |
550 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
551 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsu_h_obl, 0, void, tl, tl, i32, env) |
552 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsu_h_obr, 0, void, tl, tl, i32, env) |
553 | a22260ae | Jia Liu | #endif
|
554 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpa_w_ph, 0, void, i32, tl, tl, env) |
555 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
556 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpa_w_qh, 0, void, tl, tl, i32, env) |
557 | a22260ae | Jia Liu | #endif
|
558 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpax_w_ph, 0, void, i32, tl, tl, env) |
559 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpaq_s_w_ph, 0, void, i32, tl, tl, env) |
560 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
561 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpaq_s_w_qh, 0, void, tl, tl, i32, env) |
562 | a22260ae | Jia Liu | #endif
|
563 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpaqx_s_w_ph, 0, void, i32, tl, tl, env) |
564 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpaqx_sa_w_ph, 0, void, i32, tl, tl, env) |
565 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dps_w_ph, 0, void, i32, tl, tl, env) |
566 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
567 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dps_w_qh, 0, void, tl, tl, i32, env) |
568 | a22260ae | Jia Liu | #endif
|
569 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsx_w_ph, 0, void, i32, tl, tl, env) |
570 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsq_s_w_ph, 0, void, i32, tl, tl, env) |
571 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
572 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsq_s_w_qh, 0, void, tl, tl, i32, env) |
573 | a22260ae | Jia Liu | #endif
|
574 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsqx_s_w_ph, 0, void, i32, tl, tl, env) |
575 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsqx_sa_w_ph, 0, void, i32, tl, tl, env) |
576 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(mulsaq_s_w_ph, 0, void, i32, tl, tl, env) |
577 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
578 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(mulsaq_s_w_qh, 0, void, tl, tl, i32, env) |
579 | a22260ae | Jia Liu | #endif
|
580 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpaq_sa_l_w, 0, void, i32, tl, tl, env) |
581 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
582 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpaq_sa_l_pw, 0, void, tl, tl, i32, env) |
583 | a22260ae | Jia Liu | #endif
|
584 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsq_sa_l_w, 0, void, i32, tl, tl, env) |
585 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
586 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dpsq_sa_l_pw, 0, void, tl, tl, i32, env) |
587 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(mulsaq_s_l_pw, 0, void, tl, tl, i32, env) |
588 | a22260ae | Jia Liu | #endif
|
589 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_s_w_phl, 0, void, i32, tl, tl, env) |
590 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_s_w_phr, 0, void, i32, tl, tl, env) |
591 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_sa_w_phl, 0, void, i32, tl, tl, env) |
592 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_sa_w_phr, 0, void, i32, tl, tl, env) |
593 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(mul_ph, 0, tl, tl, tl, env)
|
594 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(mul_s_ph, 0, tl, tl, tl, env)
|
595 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(mulq_s_ph, 0, tl, tl, tl, env)
|
596 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(mulq_s_w, 0, tl, tl, tl, env)
|
597 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_3(mulq_rs_w, 0, tl, tl, tl, env)
|
598 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(mulsa_w_ph, 0, void, i32, tl, tl, env) |
599 | a22260ae | Jia Liu | #if defined(TARGET_MIPS64)
|
600 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_s_w_qhll, 0, void, tl, tl, i32, env) |
601 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_s_w_qhlr, 0, void, tl, tl, i32, env) |
602 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_s_w_qhrl, 0, void, tl, tl, i32, env) |
603 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_s_w_qhrr, 0, void, tl, tl, i32, env) |
604 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_sa_w_qhll, 0, void, tl, tl, i32, env) |
605 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_sa_w_qhlr, 0, void, tl, tl, i32, env) |
606 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_sa_w_qhrl, 0, void, tl, tl, i32, env) |
607 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_sa_w_qhrr, 0, void, tl, tl, i32, env) |
608 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_s_l_pwl, 0, void, tl, tl, i32, env) |
609 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(maq_s_l_pwr, 0, void, tl, tl, i32, env) |
610 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dmadd, 0, void, tl, tl, i32, env) |
611 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dmaddu, 0, void, tl, tl, i32, env) |
612 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dmsub, 0, void, tl, tl, i32, env) |
613 | a22260ae | Jia Liu | DEF_HELPER_FLAGS_4(dmsubu, 0, void, tl, tl, i32, env) |
614 | a22260ae | Jia Liu | #endif
|
615 | a22260ae | Jia Liu | |
616 | 1cb6686c | Jia Liu | /* DSP Bit/Manipulation Sub-class insns */
|
617 | 1cb6686c | Jia Liu | DEF_HELPER_FLAGS_1(bitrev, TCG_CALL_NO_RWG_SE, tl, tl) |
618 | 1cb6686c | Jia Liu | DEF_HELPER_FLAGS_3(insv, 0, tl, env, tl, tl)
|
619 | 1cb6686c | Jia Liu | #if defined(TARGET_MIPS64)
|
620 | f5daeec4 | Richard Henderson | DEF_HELPER_FLAGS_3(dinsv, 0, tl, env, tl, tl)
|
621 | 1cb6686c | Jia Liu | #endif
|
622 | 1cb6686c | Jia Liu | |
623 | 26690560 | Jia Liu | /* DSP Compare-Pick Sub-class insns */
|
624 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpu_eq_qb, 0, void, tl, tl, env) |
625 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpu_lt_qb, 0, void, tl, tl, env) |
626 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpu_le_qb, 0, void, tl, tl, env) |
627 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_2(cmpgu_eq_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
628 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_2(cmpgu_lt_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
629 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_2(cmpgu_le_qb, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
630 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_eq_ph, 0, void, tl, tl, env) |
631 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_lt_ph, 0, void, tl, tl, env) |
632 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_le_ph, 0, void, tl, tl, env) |
633 | 26690560 | Jia Liu | #if defined(TARGET_MIPS64)
|
634 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpu_eq_ob, 0, void, tl, tl, env) |
635 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpu_lt_ob, 0, void, tl, tl, env) |
636 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpu_le_ob, 0, void, tl, tl, env) |
637 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpgdu_eq_ob, 0, tl, tl, tl, env)
|
638 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpgdu_lt_ob, 0, tl, tl, tl, env)
|
639 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmpgdu_le_ob, 0, tl, tl, tl, env)
|
640 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_2(cmpgu_eq_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
641 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_2(cmpgu_lt_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
642 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_2(cmpgu_le_ob, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
643 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_eq_qh, 0, void, tl, tl, env) |
644 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_lt_qh, 0, void, tl, tl, env) |
645 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_le_qh, 0, void, tl, tl, env) |
646 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_eq_pw, 0, void, tl, tl, env) |
647 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_lt_pw, 0, void, tl, tl, env) |
648 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(cmp_le_pw, 0, void, tl, tl, env) |
649 | 26690560 | Jia Liu | #endif
|
650 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(pick_qb, 0, tl, tl, tl, env)
|
651 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(pick_ph, 0, tl, tl, tl, env)
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652 | 26690560 | Jia Liu | #if defined(TARGET_MIPS64)
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653 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(pick_ob, 0, tl, tl, tl, env)
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654 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(pick_qh, 0, tl, tl, tl, env)
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655 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_3(pick_pw, 0, tl, tl, tl, env)
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656 | 26690560 | Jia Liu | #endif
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657 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_2(packrl_ph, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
658 | 26690560 | Jia Liu | #if defined(TARGET_MIPS64)
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659 | 26690560 | Jia Liu | DEF_HELPER_FLAGS_2(packrl_pw, TCG_CALL_NO_RWG_SE, tl, tl, tl) |
660 | 26690560 | Jia Liu | #endif
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661 | 26690560 | Jia Liu | |
662 | b53371ed | Jia Liu | /* DSP Accumulator and DSPControl Access Sub-class insns */
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663 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(extr_w, 0, tl, tl, tl, env)
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664 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(extr_r_w, 0, tl, tl, tl, env)
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665 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(extr_rs_w, 0, tl, tl, tl, env)
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666 | b53371ed | Jia Liu | #if defined(TARGET_MIPS64)
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667 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextr_w, 0, tl, tl, tl, env)
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668 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextr_r_w, 0, tl, tl, tl, env)
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669 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextr_rs_w, 0, tl, tl, tl, env)
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670 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextr_l, 0, tl, tl, tl, env)
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671 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextr_r_l, 0, tl, tl, tl, env)
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672 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextr_rs_l, 0, tl, tl, tl, env)
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673 | b53371ed | Jia Liu | #endif
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674 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(extr_s_h, 0, tl, tl, tl, env)
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675 | b53371ed | Jia Liu | #if defined(TARGET_MIPS64)
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676 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextr_s_h, 0, tl, tl, tl, env)
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677 | b53371ed | Jia Liu | #endif
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678 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(extp, 0, tl, tl, tl, env)
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679 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(extpdp, 0, tl, tl, tl, env)
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680 | b53371ed | Jia Liu | #if defined(TARGET_MIPS64)
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681 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextp, 0, tl, tl, tl, env)
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682 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dextpdp, 0, tl, tl, tl, env)
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683 | b53371ed | Jia Liu | #endif
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684 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(shilo, 0, void, tl, tl, env) |
685 | b53371ed | Jia Liu | #if defined(TARGET_MIPS64)
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686 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dshilo, 0, void, tl, tl, env) |
687 | b53371ed | Jia Liu | #endif
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688 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(mthlip, 0, void, tl, tl, env) |
689 | b53371ed | Jia Liu | #if defined(TARGET_MIPS64)
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690 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(dmthlip, 0, void, tl, tl, env) |
691 | b53371ed | Jia Liu | #endif
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692 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env) |
693 | b53371ed | Jia Liu | DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env)
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694 | b53371ed | Jia Liu | |
695 | b53371ed | Jia Liu | |
696 | b53371ed | Jia Liu | |
697 | 022c62cb | Paolo Bonzini | #include "exec/def-helper.h" |