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1 | 31e31b8a | bellard | /*
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2 | 93ac68bc | bellard | * qemu user main
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3 | 31e31b8a | bellard | *
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4 | 31e31b8a | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 31e31b8a | bellard | *
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6 | 31e31b8a | bellard | * This program is free software; you can redistribute it and/or modify
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7 | 31e31b8a | bellard | * it under the terms of the GNU General Public License as published by
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8 | 31e31b8a | bellard | * the Free Software Foundation; either version 2 of the License, or
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9 | 31e31b8a | bellard | * (at your option) any later version.
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10 | 31e31b8a | bellard | *
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11 | 31e31b8a | bellard | * This program is distributed in the hope that it will be useful,
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12 | 31e31b8a | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 31e31b8a | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 | 31e31b8a | bellard | * GNU General Public License for more details.
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15 | 31e31b8a | bellard | *
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16 | 31e31b8a | bellard | * You should have received a copy of the GNU General Public License
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17 | 31e31b8a | bellard | * along with this program; if not, write to the Free Software
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18 | 31e31b8a | bellard | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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19 | 31e31b8a | bellard | */
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20 | 31e31b8a | bellard | #include <stdlib.h> |
21 | 31e31b8a | bellard | #include <stdio.h> |
22 | 31e31b8a | bellard | #include <stdarg.h> |
23 | 04369ff2 | bellard | #include <string.h> |
24 | 31e31b8a | bellard | #include <errno.h> |
25 | 0ecfa993 | bellard | #include <unistd.h> |
26 | 31e31b8a | bellard | |
27 | 3ef693a0 | bellard | #include "qemu.h" |
28 | 31e31b8a | bellard | |
29 | 3ef693a0 | bellard | #define DEBUG_LOGFILE "/tmp/qemu.log" |
30 | 586314f2 | bellard | |
31 | 74cd30b8 | bellard | static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
32 | 586314f2 | bellard | |
33 | f801f97e | bellard | #ifdef __i386__
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34 | f801f97e | bellard | /* Force usage of an ELF interpreter even if it is an ELF shared
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35 | f801f97e | bellard | object ! */
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36 | f801f97e | bellard | const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; |
37 | 4304763b | bellard | #endif
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38 | 74cd30b8 | bellard | |
39 | 93ac68bc | bellard | /* for recent libc, we add these dummy symbols which are not declared
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40 | 74cd30b8 | bellard | when generating a linked object (bug in ld ?) */
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41 | 74cd30b8 | bellard | #if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3) |
42 | 74cd30b8 | bellard | long __init_array_start[0]; |
43 | 74cd30b8 | bellard | long __init_array_end[0]; |
44 | 74cd30b8 | bellard | long __fini_array_start[0]; |
45 | 74cd30b8 | bellard | long __fini_array_end[0]; |
46 | 74cd30b8 | bellard | #endif
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47 | 74cd30b8 | bellard | |
48 | 9de5e440 | bellard | /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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49 | 9de5e440 | bellard | we allocate a bigger stack. Need a better solution, for example
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50 | 9de5e440 | bellard | by remapping the process stack directly at the right place */
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51 | 9de5e440 | bellard | unsigned long x86_stack_size = 512 * 1024; |
52 | 31e31b8a | bellard | |
53 | 31e31b8a | bellard | void gemu_log(const char *fmt, ...) |
54 | 31e31b8a | bellard | { |
55 | 31e31b8a | bellard | va_list ap; |
56 | 31e31b8a | bellard | |
57 | 31e31b8a | bellard | va_start(ap, fmt); |
58 | 31e31b8a | bellard | vfprintf(stderr, fmt, ap); |
59 | 31e31b8a | bellard | va_end(ap); |
60 | 31e31b8a | bellard | } |
61 | 31e31b8a | bellard | |
62 | b346ff46 | bellard | #ifdef TARGET_I386
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63 | 31e31b8a | bellard | /***********************************************************/
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64 | 0ecfa993 | bellard | /* CPUX86 core interface */
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65 | 367e86e8 | bellard | |
66 | b689bc57 | bellard | void cpu_x86_outb(CPUX86State *env, int addr, int val) |
67 | 367e86e8 | bellard | { |
68 | 367e86e8 | bellard | fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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69 | 367e86e8 | bellard | } |
70 | 367e86e8 | bellard | |
71 | b689bc57 | bellard | void cpu_x86_outw(CPUX86State *env, int addr, int val) |
72 | 367e86e8 | bellard | { |
73 | 367e86e8 | bellard | fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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74 | 367e86e8 | bellard | } |
75 | 367e86e8 | bellard | |
76 | b689bc57 | bellard | void cpu_x86_outl(CPUX86State *env, int addr, int val) |
77 | 367e86e8 | bellard | { |
78 | 367e86e8 | bellard | fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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79 | 367e86e8 | bellard | } |
80 | 367e86e8 | bellard | |
81 | b689bc57 | bellard | int cpu_x86_inb(CPUX86State *env, int addr) |
82 | 367e86e8 | bellard | { |
83 | 367e86e8 | bellard | fprintf(stderr, "inb: port=0x%04x\n", addr);
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84 | 367e86e8 | bellard | return 0; |
85 | 367e86e8 | bellard | } |
86 | 367e86e8 | bellard | |
87 | b689bc57 | bellard | int cpu_x86_inw(CPUX86State *env, int addr) |
88 | 367e86e8 | bellard | { |
89 | 367e86e8 | bellard | fprintf(stderr, "inw: port=0x%04x\n", addr);
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90 | 367e86e8 | bellard | return 0; |
91 | 367e86e8 | bellard | } |
92 | 367e86e8 | bellard | |
93 | b689bc57 | bellard | int cpu_x86_inl(CPUX86State *env, int addr) |
94 | 367e86e8 | bellard | { |
95 | 367e86e8 | bellard | fprintf(stderr, "inl: port=0x%04x\n", addr);
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96 | 367e86e8 | bellard | return 0; |
97 | 367e86e8 | bellard | } |
98 | 367e86e8 | bellard | |
99 | 92ccca6a | bellard | int cpu_x86_get_pic_interrupt(CPUX86State *env)
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100 | 92ccca6a | bellard | { |
101 | 92ccca6a | bellard | return -1; |
102 | 92ccca6a | bellard | } |
103 | 92ccca6a | bellard | |
104 | f4beb510 | bellard | static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
105 | f4beb510 | bellard | int flags)
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106 | 6dbad63e | bellard | { |
107 | f4beb510 | bellard | unsigned int e1, e2; |
108 | 6dbad63e | bellard | e1 = (addr << 16) | (limit & 0xffff); |
109 | 6dbad63e | bellard | e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); |
110 | f4beb510 | bellard | e2 |= flags; |
111 | f4beb510 | bellard | stl((uint8_t *)ptr, e1); |
112 | f4beb510 | bellard | stl((uint8_t *)ptr + 4, e2);
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113 | f4beb510 | bellard | } |
114 | f4beb510 | bellard | |
115 | f4beb510 | bellard | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
116 | f4beb510 | bellard | unsigned long addr, unsigned int sel) |
117 | f4beb510 | bellard | { |
118 | f4beb510 | bellard | unsigned int e1, e2; |
119 | f4beb510 | bellard | e1 = (addr & 0xffff) | (sel << 16); |
120 | f4beb510 | bellard | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
121 | 6dbad63e | bellard | stl((uint8_t *)ptr, e1); |
122 | 6dbad63e | bellard | stl((uint8_t *)ptr + 4, e2);
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123 | 6dbad63e | bellard | } |
124 | 6dbad63e | bellard | |
125 | 6dbad63e | bellard | uint64_t gdt_table[6];
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126 | f4beb510 | bellard | uint64_t idt_table[256];
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127 | f4beb510 | bellard | |
128 | f4beb510 | bellard | /* only dpl matters as we do only user space emulation */
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129 | f4beb510 | bellard | static void set_idt(int n, unsigned int dpl) |
130 | f4beb510 | bellard | { |
131 | f4beb510 | bellard | set_gate(idt_table + n, 0, dpl, 0, 0); |
132 | f4beb510 | bellard | } |
133 | 31e31b8a | bellard | |
134 | 89e957e7 | bellard | void cpu_loop(CPUX86State *env)
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135 | 1b6b029e | bellard | { |
136 | bc8a22cc | bellard | int trapnr;
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137 | 9de5e440 | bellard | uint8_t *pc; |
138 | 9de5e440 | bellard | target_siginfo_t info; |
139 | 851e67a1 | bellard | |
140 | 1b6b029e | bellard | for(;;) {
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141 | bc8a22cc | bellard | trapnr = cpu_x86_exec(env); |
142 | bc8a22cc | bellard | switch(trapnr) {
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143 | f4beb510 | bellard | case 0x80: |
144 | f4beb510 | bellard | /* linux syscall */
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145 | f4beb510 | bellard | env->regs[R_EAX] = do_syscall(env, |
146 | f4beb510 | bellard | env->regs[R_EAX], |
147 | f4beb510 | bellard | env->regs[R_EBX], |
148 | f4beb510 | bellard | env->regs[R_ECX], |
149 | f4beb510 | bellard | env->regs[R_EDX], |
150 | f4beb510 | bellard | env->regs[R_ESI], |
151 | f4beb510 | bellard | env->regs[R_EDI], |
152 | f4beb510 | bellard | env->regs[R_EBP]); |
153 | f4beb510 | bellard | break;
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154 | f4beb510 | bellard | case EXCP0B_NOSEG:
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155 | f4beb510 | bellard | case EXCP0C_STACK:
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156 | f4beb510 | bellard | info.si_signo = SIGBUS; |
157 | f4beb510 | bellard | info.si_errno = 0;
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158 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
159 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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160 | f4beb510 | bellard | queue_signal(info.si_signo, &info); |
161 | f4beb510 | bellard | break;
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162 | 1b6b029e | bellard | case EXCP0D_GPF:
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163 | 851e67a1 | bellard | if (env->eflags & VM_MASK) {
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164 | 89e957e7 | bellard | handle_vm86_fault(env); |
165 | 1b6b029e | bellard | } else {
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166 | f4beb510 | bellard | info.si_signo = SIGSEGV; |
167 | f4beb510 | bellard | info.si_errno = 0;
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168 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
169 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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170 | f4beb510 | bellard | queue_signal(info.si_signo, &info); |
171 | 1b6b029e | bellard | } |
172 | 1b6b029e | bellard | break;
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173 | b689bc57 | bellard | case EXCP0E_PAGE:
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174 | b689bc57 | bellard | info.si_signo = SIGSEGV; |
175 | b689bc57 | bellard | info.si_errno = 0;
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176 | b689bc57 | bellard | if (!(env->error_code & 1)) |
177 | b689bc57 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
178 | b689bc57 | bellard | else
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179 | b689bc57 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
180 | 970a87a6 | bellard | info._sifields._sigfault._addr = env->cr[2];
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181 | b689bc57 | bellard | queue_signal(info.si_signo, &info); |
182 | b689bc57 | bellard | break;
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183 | 9de5e440 | bellard | case EXCP00_DIVZ:
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184 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
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185 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
186 | bc8a22cc | bellard | } else {
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187 | bc8a22cc | bellard | /* division by zero */
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188 | bc8a22cc | bellard | info.si_signo = SIGFPE; |
189 | bc8a22cc | bellard | info.si_errno = 0;
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190 | bc8a22cc | bellard | info.si_code = TARGET_FPE_INTDIV; |
191 | bc8a22cc | bellard | info._sifields._sigfault._addr = env->eip; |
192 | bc8a22cc | bellard | queue_signal(info.si_signo, &info); |
193 | bc8a22cc | bellard | } |
194 | 9de5e440 | bellard | break;
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195 | 447db213 | bellard | case EXCP01_SSTP:
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196 | 447db213 | bellard | case EXCP03_INT3:
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197 | 447db213 | bellard | if (env->eflags & VM_MASK) {
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198 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
199 | 447db213 | bellard | } else {
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200 | 447db213 | bellard | info.si_signo = SIGTRAP; |
201 | 447db213 | bellard | info.si_errno = 0;
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202 | 447db213 | bellard | if (trapnr == EXCP01_SSTP) {
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203 | 447db213 | bellard | info.si_code = TARGET_TRAP_BRKPT; |
204 | 447db213 | bellard | info._sifields._sigfault._addr = env->eip; |
205 | 447db213 | bellard | } else {
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206 | 447db213 | bellard | info.si_code = TARGET_SI_KERNEL; |
207 | 447db213 | bellard | info._sifields._sigfault._addr = 0;
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208 | 447db213 | bellard | } |
209 | 447db213 | bellard | queue_signal(info.si_signo, &info); |
210 | 447db213 | bellard | } |
211 | 447db213 | bellard | break;
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212 | 9de5e440 | bellard | case EXCP04_INTO:
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213 | 9de5e440 | bellard | case EXCP05_BOUND:
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214 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
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215 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
216 | bc8a22cc | bellard | } else {
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217 | bc8a22cc | bellard | info.si_signo = SIGSEGV; |
218 | bc8a22cc | bellard | info.si_errno = 0;
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219 | b689bc57 | bellard | info.si_code = TARGET_SI_KERNEL; |
220 | bc8a22cc | bellard | info._sifields._sigfault._addr = 0;
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221 | bc8a22cc | bellard | queue_signal(info.si_signo, &info); |
222 | bc8a22cc | bellard | } |
223 | 9de5e440 | bellard | break;
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224 | 9de5e440 | bellard | case EXCP06_ILLOP:
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225 | 9de5e440 | bellard | info.si_signo = SIGILL; |
226 | 9de5e440 | bellard | info.si_errno = 0;
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227 | 9de5e440 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
228 | 9de5e440 | bellard | info._sifields._sigfault._addr = env->eip; |
229 | 9de5e440 | bellard | queue_signal(info.si_signo, &info); |
230 | 9de5e440 | bellard | break;
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231 | 9de5e440 | bellard | case EXCP_INTERRUPT:
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232 | 9de5e440 | bellard | /* just indicate that signals should be handled asap */
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233 | 9de5e440 | bellard | break;
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234 | 1b6b029e | bellard | default:
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235 | 970a87a6 | bellard | pc = env->segs[R_CS].base + env->eip; |
236 | bc8a22cc | bellard | fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
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237 | bc8a22cc | bellard | (long)pc, trapnr);
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238 | 1b6b029e | bellard | abort(); |
239 | 1b6b029e | bellard | } |
240 | 66fb9763 | bellard | process_pending_signals(env); |
241 | 1b6b029e | bellard | } |
242 | 1b6b029e | bellard | } |
243 | b346ff46 | bellard | #endif
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244 | b346ff46 | bellard | |
245 | b346ff46 | bellard | #ifdef TARGET_ARM
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246 | b346ff46 | bellard | |
247 | b346ff46 | bellard | void cpu_loop(CPUARMState *env)
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248 | b346ff46 | bellard | { |
249 | b346ff46 | bellard | int trapnr;
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250 | b346ff46 | bellard | unsigned int n, insn; |
251 | b346ff46 | bellard | target_siginfo_t info; |
252 | b346ff46 | bellard | |
253 | b346ff46 | bellard | for(;;) {
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254 | b346ff46 | bellard | trapnr = cpu_arm_exec(env); |
255 | b346ff46 | bellard | switch(trapnr) {
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256 | b346ff46 | bellard | case EXCP_UDEF:
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257 | b346ff46 | bellard | info.si_signo = SIGILL; |
258 | b346ff46 | bellard | info.si_errno = 0;
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259 | b346ff46 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
260 | b346ff46 | bellard | info._sifields._sigfault._addr = env->regs[15];
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261 | b346ff46 | bellard | queue_signal(info.si_signo, &info); |
262 | b346ff46 | bellard | break;
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263 | b346ff46 | bellard | case EXCP_SWI:
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264 | b346ff46 | bellard | { |
265 | b346ff46 | bellard | /* system call */
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266 | b346ff46 | bellard | insn = ldl((void *)(env->regs[15] - 4)); |
267 | b346ff46 | bellard | n = insn & 0xffffff;
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268 | b346ff46 | bellard | if (n >= ARM_SYSCALL_BASE) {
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269 | b346ff46 | bellard | /* linux syscall */
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270 | b346ff46 | bellard | n -= ARM_SYSCALL_BASE; |
271 | b346ff46 | bellard | env->regs[0] = do_syscall(env,
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272 | b346ff46 | bellard | n, |
273 | b346ff46 | bellard | env->regs[0],
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274 | b346ff46 | bellard | env->regs[1],
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275 | b346ff46 | bellard | env->regs[2],
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276 | b346ff46 | bellard | env->regs[3],
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277 | b346ff46 | bellard | env->regs[4],
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278 | b346ff46 | bellard | 0);
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279 | b346ff46 | bellard | } else {
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280 | b346ff46 | bellard | goto error;
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281 | b346ff46 | bellard | } |
282 | b346ff46 | bellard | } |
283 | b346ff46 | bellard | break;
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284 | 43fff238 | bellard | case EXCP_INTERRUPT:
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285 | 43fff238 | bellard | /* just indicate that signals should be handled asap */
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286 | 43fff238 | bellard | break;
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287 | b346ff46 | bellard | default:
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288 | b346ff46 | bellard | error:
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289 | b346ff46 | bellard | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
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290 | b346ff46 | bellard | trapnr); |
291 | b346ff46 | bellard | cpu_arm_dump_state(env, stderr, 0);
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292 | b346ff46 | bellard | abort(); |
293 | b346ff46 | bellard | } |
294 | b346ff46 | bellard | process_pending_signals(env); |
295 | b346ff46 | bellard | } |
296 | b346ff46 | bellard | } |
297 | b346ff46 | bellard | |
298 | b346ff46 | bellard | #endif
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299 | 1b6b029e | bellard | |
300 | 93ac68bc | bellard | #ifdef TARGET_SPARC
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301 | 93ac68bc | bellard | |
302 | 93ac68bc | bellard | void cpu_loop (CPUSPARCState *env)
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303 | 93ac68bc | bellard | { |
304 | 93ac68bc | bellard | int trapnr;
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305 | 93ac68bc | bellard | |
306 | 93ac68bc | bellard | while (1) { |
307 | 93ac68bc | bellard | trapnr = cpu_sparc_exec (env); |
308 | 93ac68bc | bellard | |
309 | 93ac68bc | bellard | switch (trapnr) {
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310 | 93ac68bc | bellard | case 0x8: case 0x10: |
311 | 93ac68bc | bellard | env->regwptr[0] = do_syscall (env, env->gregs[1], |
312 | 93ac68bc | bellard | env->regwptr[0], env->regwptr[1], env->regwptr[2], |
313 | 93ac68bc | bellard | env->regwptr[3], env->regwptr[4], env->regwptr[13]); |
314 | 93ac68bc | bellard | if (env->regwptr[0] >= 0xffffffe0) |
315 | 93ac68bc | bellard | env->psr |= PSR_CARRY; |
316 | 93ac68bc | bellard | break;
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317 | 93ac68bc | bellard | default:
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318 | 93ac68bc | bellard | printf ("Invalid trap: %d\n", trapnr);
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319 | 93ac68bc | bellard | exit (1);
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320 | 93ac68bc | bellard | } |
321 | 93ac68bc | bellard | process_pending_signals (env); |
322 | 93ac68bc | bellard | } |
323 | 93ac68bc | bellard | } |
324 | 93ac68bc | bellard | |
325 | 93ac68bc | bellard | #endif
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326 | 93ac68bc | bellard | |
327 | 31e31b8a | bellard | void usage(void) |
328 | 31e31b8a | bellard | { |
329 | 93ac68bc | bellard | printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003 Fabrice Bellard\n" |
330 | 93ac68bc | bellard | "usage: qemu-" TARGET_ARCH " [-h] [-d] [-L path] [-s size] program [arguments...]\n" |
331 | b346ff46 | bellard | "Linux CPU emulator (compiled for %s emulation)\n"
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332 | d691f669 | bellard | "\n"
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333 | 54936004 | bellard | "-h print this help\n"
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334 | b346ff46 | bellard | "-L path set the elf interpreter prefix (default=%s)\n"
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335 | b346ff46 | bellard | "-s size set the stack size in bytes (default=%ld)\n"
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336 | 54936004 | bellard | "\n"
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337 | 54936004 | bellard | "debug options:\n"
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338 | 54936004 | bellard | "-d activate log (logfile=%s)\n"
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339 | 54936004 | bellard | "-p pagesize set the host page size to 'pagesize'\n",
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340 | b346ff46 | bellard | TARGET_ARCH, |
341 | d691f669 | bellard | interp_prefix, |
342 | 54936004 | bellard | x86_stack_size, |
343 | 54936004 | bellard | DEBUG_LOGFILE); |
344 | 74cd30b8 | bellard | _exit(1);
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345 | 31e31b8a | bellard | } |
346 | 31e31b8a | bellard | |
347 | 9de5e440 | bellard | /* XXX: currently only used for async signals (see signal.c) */
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348 | b346ff46 | bellard | CPUState *global_env; |
349 | 59faf6d6 | bellard | /* used only if single thread */
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350 | 59faf6d6 | bellard | CPUState *cpu_single_env = NULL;
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351 | 59faf6d6 | bellard | |
352 | 851e67a1 | bellard | /* used to free thread contexts */
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353 | 851e67a1 | bellard | TaskState *first_task_state; |
354 | 9de5e440 | bellard | |
355 | 31e31b8a | bellard | int main(int argc, char **argv) |
356 | 31e31b8a | bellard | { |
357 | 31e31b8a | bellard | const char *filename; |
358 | 01ffc75b | bellard | struct target_pt_regs regs1, *regs = ®s1;
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359 | 31e31b8a | bellard | struct image_info info1, *info = &info1;
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360 | 851e67a1 | bellard | TaskState ts1, *ts = &ts1; |
361 | b346ff46 | bellard | CPUState *env; |
362 | 586314f2 | bellard | int optind;
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363 | d691f669 | bellard | const char *r; |
364 | d691f669 | bellard | |
365 | 31e31b8a | bellard | if (argc <= 1) |
366 | 31e31b8a | bellard | usage(); |
367 | f801f97e | bellard | |
368 | cc38b844 | bellard | /* init debug */
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369 | cc38b844 | bellard | cpu_set_log_filename(DEBUG_LOGFILE); |
370 | cc38b844 | bellard | |
371 | 586314f2 | bellard | optind = 1;
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372 | d691f669 | bellard | for(;;) {
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373 | d691f669 | bellard | if (optind >= argc)
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374 | d691f669 | bellard | break;
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375 | d691f669 | bellard | r = argv[optind]; |
376 | d691f669 | bellard | if (r[0] != '-') |
377 | d691f669 | bellard | break;
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378 | 586314f2 | bellard | optind++; |
379 | d691f669 | bellard | r++; |
380 | d691f669 | bellard | if (!strcmp(r, "-")) { |
381 | d691f669 | bellard | break;
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382 | d691f669 | bellard | } else if (!strcmp(r, "d")) { |
383 | cc38b844 | bellard | cpu_set_log(CPU_LOG_ALL); |
384 | d691f669 | bellard | } else if (!strcmp(r, "s")) { |
385 | d691f669 | bellard | r = argv[optind++]; |
386 | d691f669 | bellard | x86_stack_size = strtol(r, (char **)&r, 0); |
387 | d691f669 | bellard | if (x86_stack_size <= 0) |
388 | d691f669 | bellard | usage(); |
389 | d691f669 | bellard | if (*r == 'M') |
390 | d691f669 | bellard | x86_stack_size *= 1024 * 1024; |
391 | d691f669 | bellard | else if (*r == 'k' || *r == 'K') |
392 | d691f669 | bellard | x86_stack_size *= 1024;
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393 | d691f669 | bellard | } else if (!strcmp(r, "L")) { |
394 | d691f669 | bellard | interp_prefix = argv[optind++]; |
395 | 54936004 | bellard | } else if (!strcmp(r, "p")) { |
396 | 54936004 | bellard | host_page_size = atoi(argv[optind++]); |
397 | 54936004 | bellard | if (host_page_size == 0 || |
398 | 54936004 | bellard | (host_page_size & (host_page_size - 1)) != 0) { |
399 | 54936004 | bellard | fprintf(stderr, "page size must be a power of two\n");
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400 | 54936004 | bellard | exit(1);
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401 | 54936004 | bellard | } |
402 | d691f669 | bellard | } else {
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403 | d691f669 | bellard | usage(); |
404 | d691f669 | bellard | } |
405 | 586314f2 | bellard | } |
406 | d691f669 | bellard | if (optind >= argc)
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407 | d691f669 | bellard | usage(); |
408 | 586314f2 | bellard | filename = argv[optind]; |
409 | 586314f2 | bellard | |
410 | 31e31b8a | bellard | /* Zero out regs */
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411 | 01ffc75b | bellard | memset(regs, 0, sizeof(struct target_pt_regs)); |
412 | 31e31b8a | bellard | |
413 | 31e31b8a | bellard | /* Zero out image_info */
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414 | 31e31b8a | bellard | memset(info, 0, sizeof(struct image_info)); |
415 | 31e31b8a | bellard | |
416 | 74cd30b8 | bellard | /* Scan interp_prefix dir for replacement files. */
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417 | 74cd30b8 | bellard | init_paths(interp_prefix); |
418 | 74cd30b8 | bellard | |
419 | 54936004 | bellard | /* NOTE: we need to init the CPU at this stage to get the
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420 | 54936004 | bellard | host_page_size */
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421 | b346ff46 | bellard | env = cpu_init(); |
422 | 92ccca6a | bellard | |
423 | 74cd30b8 | bellard | if (elf_exec(filename, argv+optind, environ, regs, info) != 0) { |
424 | 31e31b8a | bellard | printf("Error loading %s\n", filename);
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425 | 74cd30b8 | bellard | _exit(1);
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426 | 31e31b8a | bellard | } |
427 | 31e31b8a | bellard | |
428 | 4b74fe1f | bellard | if (loglevel) {
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429 | 54936004 | bellard | page_dump(logfile); |
430 | 54936004 | bellard | |
431 | 4b74fe1f | bellard | fprintf(logfile, "start_brk 0x%08lx\n" , info->start_brk);
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432 | 4b74fe1f | bellard | fprintf(logfile, "end_code 0x%08lx\n" , info->end_code);
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433 | 4b74fe1f | bellard | fprintf(logfile, "start_code 0x%08lx\n" , info->start_code);
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434 | 4b74fe1f | bellard | fprintf(logfile, "end_data 0x%08lx\n" , info->end_data);
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435 | 4b74fe1f | bellard | fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
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436 | 4b74fe1f | bellard | fprintf(logfile, "brk 0x%08lx\n" , info->brk);
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437 | b346ff46 | bellard | fprintf(logfile, "entry 0x%08lx\n" , info->entry);
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438 | 4b74fe1f | bellard | } |
439 | 31e31b8a | bellard | |
440 | 31e31b8a | bellard | target_set_brk((char *)info->brk);
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441 | 31e31b8a | bellard | syscall_init(); |
442 | 66fb9763 | bellard | signal_init(); |
443 | 31e31b8a | bellard | |
444 | 9de5e440 | bellard | global_env = env; |
445 | 0ecfa993 | bellard | |
446 | 851e67a1 | bellard | /* build Task State */
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447 | 851e67a1 | bellard | memset(ts, 0, sizeof(TaskState)); |
448 | 851e67a1 | bellard | env->opaque = ts; |
449 | 851e67a1 | bellard | ts->used = 1;
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450 | 59faf6d6 | bellard | env->user_mode_only = 1;
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451 | 851e67a1 | bellard | |
452 | b346ff46 | bellard | #if defined(TARGET_I386)
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453 | 2e255c6b | bellard | cpu_x86_set_cpl(env, 3);
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454 | 2e255c6b | bellard | |
455 | 3802ce26 | bellard | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
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456 | 3802ce26 | bellard | |
457 | 6dbad63e | bellard | /* linux register setup */
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458 | 0ecfa993 | bellard | env->regs[R_EAX] = regs->eax; |
459 | 0ecfa993 | bellard | env->regs[R_EBX] = regs->ebx; |
460 | 0ecfa993 | bellard | env->regs[R_ECX] = regs->ecx; |
461 | 0ecfa993 | bellard | env->regs[R_EDX] = regs->edx; |
462 | 0ecfa993 | bellard | env->regs[R_ESI] = regs->esi; |
463 | 0ecfa993 | bellard | env->regs[R_EDI] = regs->edi; |
464 | 0ecfa993 | bellard | env->regs[R_EBP] = regs->ebp; |
465 | 0ecfa993 | bellard | env->regs[R_ESP] = regs->esp; |
466 | dab2ed99 | bellard | env->eip = regs->eip; |
467 | 31e31b8a | bellard | |
468 | f4beb510 | bellard | /* linux interrupt setup */
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469 | f4beb510 | bellard | env->idt.base = (void *)idt_table;
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470 | f4beb510 | bellard | env->idt.limit = sizeof(idt_table) - 1; |
471 | f4beb510 | bellard | set_idt(0, 0); |
472 | f4beb510 | bellard | set_idt(1, 0); |
473 | f4beb510 | bellard | set_idt(2, 0); |
474 | f4beb510 | bellard | set_idt(3, 3); |
475 | f4beb510 | bellard | set_idt(4, 3); |
476 | f4beb510 | bellard | set_idt(5, 3); |
477 | f4beb510 | bellard | set_idt(6, 0); |
478 | f4beb510 | bellard | set_idt(7, 0); |
479 | f4beb510 | bellard | set_idt(8, 0); |
480 | f4beb510 | bellard | set_idt(9, 0); |
481 | f4beb510 | bellard | set_idt(10, 0); |
482 | f4beb510 | bellard | set_idt(11, 0); |
483 | f4beb510 | bellard | set_idt(12, 0); |
484 | f4beb510 | bellard | set_idt(13, 0); |
485 | f4beb510 | bellard | set_idt(14, 0); |
486 | f4beb510 | bellard | set_idt(15, 0); |
487 | f4beb510 | bellard | set_idt(16, 0); |
488 | f4beb510 | bellard | set_idt(17, 0); |
489 | f4beb510 | bellard | set_idt(18, 0); |
490 | f4beb510 | bellard | set_idt(19, 0); |
491 | f4beb510 | bellard | set_idt(0x80, 3); |
492 | f4beb510 | bellard | |
493 | 6dbad63e | bellard | /* linux segment setup */
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494 | 6dbad63e | bellard | env->gdt.base = (void *)gdt_table;
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495 | 6dbad63e | bellard | env->gdt.limit = sizeof(gdt_table) - 1; |
496 | f4beb510 | bellard | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
497 | f4beb510 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
498 | f4beb510 | bellard | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
499 | f4beb510 | bellard | write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, |
500 | f4beb510 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
501 | f4beb510 | bellard | (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
502 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_CS, __USER_CS); |
503 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_DS, __USER_DS); |
504 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_ES, __USER_DS); |
505 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_SS, __USER_DS); |
506 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_FS, __USER_DS); |
507 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_GS, __USER_DS); |
508 | 92ccca6a | bellard | |
509 | b346ff46 | bellard | #elif defined(TARGET_ARM)
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510 | b346ff46 | bellard | { |
511 | b346ff46 | bellard | int i;
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512 | b346ff46 | bellard | for(i = 0; i < 16; i++) { |
513 | b346ff46 | bellard | env->regs[i] = regs->uregs[i]; |
514 | b346ff46 | bellard | } |
515 | b346ff46 | bellard | env->cpsr = regs->uregs[16];
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516 | b346ff46 | bellard | } |
517 | 93ac68bc | bellard | #elif defined(TARGET_SPARC)
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518 | 93ac68bc | bellard | env->pc = regs->u_regs[0];
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519 | 93ac68bc | bellard | env->regwptr[6] = regs->u_regs[1]-0x40; |
520 | b346ff46 | bellard | #else
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521 | b346ff46 | bellard | #error unsupported target CPU
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522 | b346ff46 | bellard | #endif
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523 | 31e31b8a | bellard | |
524 | 1b6b029e | bellard | cpu_loop(env); |
525 | 1b6b029e | bellard | /* never exits */
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526 | 31e31b8a | bellard | return 0; |
527 | 31e31b8a | bellard | } |