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/*
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 *  qemu user main
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 *  This program is free software; you can redistribute it and/or modify
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 *  it under the terms of the GNU General Public License as published by
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 *  the Free Software Foundation; either version 2 of the License, or
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 *  (at your option) any later version.
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 *
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 *  This program is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 *  GNU General Public License for more details.
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 *
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 *  You should have received a copy of the GNU General Public License
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 *  along with this program; if not, write to the Free Software
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 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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 */
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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#include "qemu.h"
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#define DEBUG_LOGFILE "/tmp/qemu.log"
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static const char *interp_prefix = CONFIG_QEMU_PREFIX;
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#ifdef __i386__
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/* Force usage of an ELF interpreter even if it is an ELF shared
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   object ! */
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const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
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#endif
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/* for recent libc, we add these dummy symbols which are not declared
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   when generating a linked object (bug in ld ?) */
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#if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)
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long __init_array_start[0];
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long __init_array_end[0];
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long __fini_array_start[0];
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long __fini_array_end[0];
46 74cd30b8 bellard
#endif
47 74cd30b8 bellard
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/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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   we allocate a bigger stack. Need a better solution, for example
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   by remapping the process stack directly at the right place */
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unsigned long x86_stack_size = 512 * 1024;
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void gemu_log(const char *fmt, ...)
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{
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    va_list ap;
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57 31e31b8a bellard
    va_start(ap, fmt);
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    vfprintf(stderr, fmt, ap);
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    va_end(ap);
60 31e31b8a bellard
}
61 31e31b8a bellard
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#ifdef TARGET_I386
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/***********************************************************/
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/* CPUX86 core interface */
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void cpu_x86_outb(CPUX86State *env, int addr, int val)
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{
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    fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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}
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void cpu_x86_outw(CPUX86State *env, int addr, int val)
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{
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    fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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}
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void cpu_x86_outl(CPUX86State *env, int addr, int val)
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{
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    fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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}
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int cpu_x86_inb(CPUX86State *env, int addr)
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{
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    fprintf(stderr, "inb: port=0x%04x\n", addr);
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    return 0;
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}
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int cpu_x86_inw(CPUX86State *env, int addr)
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{
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    fprintf(stderr, "inw: port=0x%04x\n", addr);
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    return 0;
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}
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int cpu_x86_inl(CPUX86State *env, int addr)
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{
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    fprintf(stderr, "inl: port=0x%04x\n", addr);
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    return 0;
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}
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int cpu_x86_get_pic_interrupt(CPUX86State *env)
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{
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    return -1;
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}
103 92ccca6a bellard
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static void write_dt(void *ptr, unsigned long addr, unsigned long limit, 
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                     int flags)
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{
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    unsigned int e1, e2;
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    e1 = (addr << 16) | (limit & 0xffff);
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    e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
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    e2 |= flags;
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    stl((uint8_t *)ptr, e1);
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    stl((uint8_t *)ptr + 4, e2);
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}
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static void set_gate(void *ptr, unsigned int type, unsigned int dpl, 
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                     unsigned long addr, unsigned int sel)
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{
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    unsigned int e1, e2;
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    e1 = (addr & 0xffff) | (sel << 16);
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    e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
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    stl((uint8_t *)ptr, e1);
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    stl((uint8_t *)ptr + 4, e2);
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}
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uint64_t gdt_table[6];
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uint64_t idt_table[256];
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/* only dpl matters as we do only user space emulation */
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static void set_idt(int n, unsigned int dpl)
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{
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    set_gate(idt_table + n, 0, dpl, 0, 0);
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}
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void cpu_loop(CPUX86State *env)
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{
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    int trapnr;
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    uint8_t *pc;
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    target_siginfo_t info;
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    for(;;) {
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        trapnr = cpu_x86_exec(env);
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        switch(trapnr) {
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        case 0x80:
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            /* linux syscall */
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            env->regs[R_EAX] = do_syscall(env, 
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                                          env->regs[R_EAX], 
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                                          env->regs[R_EBX],
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                                          env->regs[R_ECX],
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                                          env->regs[R_EDX],
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                                          env->regs[R_ESI],
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                                          env->regs[R_EDI],
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                                          env->regs[R_EBP]);
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            break;
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        case EXCP0B_NOSEG:
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        case EXCP0C_STACK:
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            info.si_signo = SIGBUS;
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            info.si_errno = 0;
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            info.si_code = TARGET_SI_KERNEL;
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            info._sifields._sigfault._addr = 0;
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            queue_signal(info.si_signo, &info);
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            break;
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        case EXCP0D_GPF:
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            if (env->eflags & VM_MASK) {
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                handle_vm86_fault(env);
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            } else {
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                info.si_signo = SIGSEGV;
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                info.si_errno = 0;
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                info.si_code = TARGET_SI_KERNEL;
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                info._sifields._sigfault._addr = 0;
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                queue_signal(info.si_signo, &info);
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            }
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            break;
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        case EXCP0E_PAGE:
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            info.si_signo = SIGSEGV;
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            info.si_errno = 0;
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            if (!(env->error_code & 1))
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                info.si_code = TARGET_SEGV_MAPERR;
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            else
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                info.si_code = TARGET_SEGV_ACCERR;
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            info._sifields._sigfault._addr = env->cr[2];
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            queue_signal(info.si_signo, &info);
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            break;
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        case EXCP00_DIVZ:
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            if (env->eflags & VM_MASK) {
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                handle_vm86_trap(env, trapnr);
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            } else {
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                /* division by zero */
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                info.si_signo = SIGFPE;
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                info.si_errno = 0;
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                info.si_code = TARGET_FPE_INTDIV;
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                info._sifields._sigfault._addr = env->eip;
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                queue_signal(info.si_signo, &info);
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            }
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            break;
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        case EXCP01_SSTP:
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        case EXCP03_INT3:
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            if (env->eflags & VM_MASK) {
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                handle_vm86_trap(env, trapnr);
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            } else {
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                info.si_signo = SIGTRAP;
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                info.si_errno = 0;
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                if (trapnr == EXCP01_SSTP) {
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                    info.si_code = TARGET_TRAP_BRKPT;
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                    info._sifields._sigfault._addr = env->eip;
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                } else {
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                    info.si_code = TARGET_SI_KERNEL;
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                    info._sifields._sigfault._addr = 0;
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                }
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                queue_signal(info.si_signo, &info);
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            }
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            break;
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        case EXCP04_INTO:
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        case EXCP05_BOUND:
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            if (env->eflags & VM_MASK) {
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                handle_vm86_trap(env, trapnr);
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            } else {
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                info.si_signo = SIGSEGV;
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                info.si_errno = 0;
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                info.si_code = TARGET_SI_KERNEL;
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                info._sifields._sigfault._addr = 0;
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                queue_signal(info.si_signo, &info);
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            }
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            break;
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        case EXCP06_ILLOP:
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            info.si_signo = SIGILL;
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            info.si_errno = 0;
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            info.si_code = TARGET_ILL_ILLOPN;
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            info._sifields._sigfault._addr = env->eip;
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            queue_signal(info.si_signo, &info);
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            break;
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        case EXCP_INTERRUPT:
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            /* just indicate that signals should be handled asap */
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            break;
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        default:
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            pc = env->segs[R_CS].base + env->eip;
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            fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n", 
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                    (long)pc, trapnr);
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            abort();
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        }
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        process_pending_signals(env);
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    }
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}
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#endif
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#ifdef TARGET_ARM
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void cpu_loop(CPUARMState *env)
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{
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    int trapnr;
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    unsigned int n, insn;
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    target_siginfo_t info;
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    for(;;) {
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        trapnr = cpu_arm_exec(env);
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        switch(trapnr) {
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        case EXCP_UDEF:
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            info.si_signo = SIGILL;
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            info.si_errno = 0;
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            info.si_code = TARGET_ILL_ILLOPN;
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            info._sifields._sigfault._addr = env->regs[15];
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            queue_signal(info.si_signo, &info);
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            break;
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        case EXCP_SWI:
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            {
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                /* system call */
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                insn = ldl((void *)(env->regs[15] - 4));
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                n = insn & 0xffffff;
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                if (n >= ARM_SYSCALL_BASE) {
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                    /* linux syscall */
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                    n -= ARM_SYSCALL_BASE;
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                    env->regs[0] = do_syscall(env, 
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                                              n, 
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                                              env->regs[0],
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                                              env->regs[1],
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                                              env->regs[2],
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                                              env->regs[3],
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                                              env->regs[4],
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                                              0);
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                } else {
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                    goto error;
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                }
282 b346ff46 bellard
            }
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            break;
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        case EXCP_INTERRUPT:
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            /* just indicate that signals should be handled asap */
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            break;
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        default:
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        error:
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            fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", 
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                    trapnr);
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            cpu_arm_dump_state(env, stderr, 0);
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            abort();
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        }
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        process_pending_signals(env);
295 b346ff46 bellard
    }
296 b346ff46 bellard
}
297 b346ff46 bellard
298 b346ff46 bellard
#endif
299 1b6b029e bellard
300 93ac68bc bellard
#ifdef TARGET_SPARC
301 93ac68bc bellard
302 93ac68bc bellard
void cpu_loop (CPUSPARCState *env)
303 93ac68bc bellard
{
304 93ac68bc bellard
        int trapnr;
305 93ac68bc bellard
306 93ac68bc bellard
        while (1) {
307 93ac68bc bellard
                trapnr = cpu_sparc_exec (env);
308 93ac68bc bellard
309 93ac68bc bellard
                switch (trapnr) {
310 93ac68bc bellard
                  case 0x8: case 0x10:
311 93ac68bc bellard
                        env->regwptr[0] = do_syscall (env, env->gregs[1],
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                                env->regwptr[0], env->regwptr[1], env->regwptr[2],
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                                env->regwptr[3], env->regwptr[4], env->regwptr[13]);
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                        if (env->regwptr[0] >= 0xffffffe0)
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                                env->psr |= PSR_CARRY;
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                        break;
317 93ac68bc bellard
                  default:
318 93ac68bc bellard
                        printf ("Invalid trap: %d\n", trapnr);
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                        exit (1);
320 93ac68bc bellard
                }
321 93ac68bc bellard
                process_pending_signals (env);
322 93ac68bc bellard
        }
323 93ac68bc bellard
}
324 93ac68bc bellard
325 93ac68bc bellard
#endif
326 93ac68bc bellard
327 31e31b8a bellard
void usage(void)
328 31e31b8a bellard
{
329 93ac68bc bellard
    printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003 Fabrice Bellard\n"
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           "usage: qemu-" TARGET_ARCH " [-h] [-d] [-L path] [-s size] program [arguments...]\n"
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           "Linux CPU emulator (compiled for %s emulation)\n"
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           "\n"
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           "-h           print this help\n"
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           "-L path      set the elf interpreter prefix (default=%s)\n"
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           "-s size      set the stack size in bytes (default=%ld)\n"
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           "\n"
337 54936004 bellard
           "debug options:\n"
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           "-d           activate log (logfile=%s)\n"
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           "-p pagesize  set the host page size to 'pagesize'\n",
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           TARGET_ARCH,
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           interp_prefix, 
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           x86_stack_size,
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           DEBUG_LOGFILE);
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    _exit(1);
345 31e31b8a bellard
}
346 31e31b8a bellard
347 9de5e440 bellard
/* XXX: currently only used for async signals (see signal.c) */
348 b346ff46 bellard
CPUState *global_env;
349 59faf6d6 bellard
/* used only if single thread */
350 59faf6d6 bellard
CPUState *cpu_single_env = NULL;
351 59faf6d6 bellard
352 851e67a1 bellard
/* used to free thread contexts */
353 851e67a1 bellard
TaskState *first_task_state;
354 9de5e440 bellard
355 31e31b8a bellard
int main(int argc, char **argv)
356 31e31b8a bellard
{
357 31e31b8a bellard
    const char *filename;
358 01ffc75b bellard
    struct target_pt_regs regs1, *regs = &regs1;
359 31e31b8a bellard
    struct image_info info1, *info = &info1;
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    TaskState ts1, *ts = &ts1;
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    CPUState *env;
362 586314f2 bellard
    int optind;
363 d691f669 bellard
    const char *r;
364 d691f669 bellard
    
365 31e31b8a bellard
    if (argc <= 1)
366 31e31b8a bellard
        usage();
367 f801f97e bellard
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    /* init debug */
369 cc38b844 bellard
    cpu_set_log_filename(DEBUG_LOGFILE);
370 cc38b844 bellard
371 586314f2 bellard
    optind = 1;
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    for(;;) {
373 d691f669 bellard
        if (optind >= argc)
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            break;
375 d691f669 bellard
        r = argv[optind];
376 d691f669 bellard
        if (r[0] != '-')
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            break;
378 586314f2 bellard
        optind++;
379 d691f669 bellard
        r++;
380 d691f669 bellard
        if (!strcmp(r, "-")) {
381 d691f669 bellard
            break;
382 d691f669 bellard
        } else if (!strcmp(r, "d")) {
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            cpu_set_log(CPU_LOG_ALL);
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        } else if (!strcmp(r, "s")) {
385 d691f669 bellard
            r = argv[optind++];
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            x86_stack_size = strtol(r, (char **)&r, 0);
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            if (x86_stack_size <= 0)
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                usage();
389 d691f669 bellard
            if (*r == 'M')
390 d691f669 bellard
                x86_stack_size *= 1024 * 1024;
391 d691f669 bellard
            else if (*r == 'k' || *r == 'K')
392 d691f669 bellard
                x86_stack_size *= 1024;
393 d691f669 bellard
        } else if (!strcmp(r, "L")) {
394 d691f669 bellard
            interp_prefix = argv[optind++];
395 54936004 bellard
        } else if (!strcmp(r, "p")) {
396 54936004 bellard
            host_page_size = atoi(argv[optind++]);
397 54936004 bellard
            if (host_page_size == 0 ||
398 54936004 bellard
                (host_page_size & (host_page_size - 1)) != 0) {
399 54936004 bellard
                fprintf(stderr, "page size must be a power of two\n");
400 54936004 bellard
                exit(1);
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            }
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        } else {
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            usage();
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        }
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    }
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    if (optind >= argc)
407 d691f669 bellard
        usage();
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    filename = argv[optind];
409 586314f2 bellard
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    /* Zero out regs */
411 01ffc75b bellard
    memset(regs, 0, sizeof(struct target_pt_regs));
412 31e31b8a bellard
413 31e31b8a bellard
    /* Zero out image_info */
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    memset(info, 0, sizeof(struct image_info));
415 31e31b8a bellard
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    /* Scan interp_prefix dir for replacement files. */
417 74cd30b8 bellard
    init_paths(interp_prefix);
418 74cd30b8 bellard
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    /* NOTE: we need to init the CPU at this stage to get the
420 54936004 bellard
       host_page_size */
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    env = cpu_init();
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    if (elf_exec(filename, argv+optind, environ, regs, info) != 0) {
424 31e31b8a bellard
        printf("Error loading %s\n", filename);
425 74cd30b8 bellard
        _exit(1);
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    }
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    if (loglevel) {
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        page_dump(logfile);
430 54936004 bellard
    
431 4b74fe1f bellard
        fprintf(logfile, "start_brk   0x%08lx\n" , info->start_brk);
432 4b74fe1f bellard
        fprintf(logfile, "end_code    0x%08lx\n" , info->end_code);
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        fprintf(logfile, "start_code  0x%08lx\n" , info->start_code);
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        fprintf(logfile, "end_data    0x%08lx\n" , info->end_data);
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        fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
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        fprintf(logfile, "brk         0x%08lx\n" , info->brk);
437 b346ff46 bellard
        fprintf(logfile, "entry       0x%08lx\n" , info->entry);
438 4b74fe1f bellard
    }
439 31e31b8a bellard
440 31e31b8a bellard
    target_set_brk((char *)info->brk);
441 31e31b8a bellard
    syscall_init();
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    signal_init();
443 31e31b8a bellard
444 9de5e440 bellard
    global_env = env;
445 0ecfa993 bellard
446 851e67a1 bellard
    /* build Task State */
447 851e67a1 bellard
    memset(ts, 0, sizeof(TaskState));
448 851e67a1 bellard
    env->opaque = ts;
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    ts->used = 1;
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    env->user_mode_only = 1;
451 851e67a1 bellard
    
452 b346ff46 bellard
#if defined(TARGET_I386)
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    cpu_x86_set_cpl(env, 3);
454 2e255c6b bellard
455 3802ce26 bellard
    env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
456 3802ce26 bellard
457 6dbad63e bellard
    /* linux register setup */
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    env->regs[R_EAX] = regs->eax;
459 0ecfa993 bellard
    env->regs[R_EBX] = regs->ebx;
460 0ecfa993 bellard
    env->regs[R_ECX] = regs->ecx;
461 0ecfa993 bellard
    env->regs[R_EDX] = regs->edx;
462 0ecfa993 bellard
    env->regs[R_ESI] = regs->esi;
463 0ecfa993 bellard
    env->regs[R_EDI] = regs->edi;
464 0ecfa993 bellard
    env->regs[R_EBP] = regs->ebp;
465 0ecfa993 bellard
    env->regs[R_ESP] = regs->esp;
466 dab2ed99 bellard
    env->eip = regs->eip;
467 31e31b8a bellard
468 f4beb510 bellard
    /* linux interrupt setup */
469 f4beb510 bellard
    env->idt.base = (void *)idt_table;
470 f4beb510 bellard
    env->idt.limit = sizeof(idt_table) - 1;
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    set_idt(0, 0);
472 f4beb510 bellard
    set_idt(1, 0);
473 f4beb510 bellard
    set_idt(2, 0);
474 f4beb510 bellard
    set_idt(3, 3);
475 f4beb510 bellard
    set_idt(4, 3);
476 f4beb510 bellard
    set_idt(5, 3);
477 f4beb510 bellard
    set_idt(6, 0);
478 f4beb510 bellard
    set_idt(7, 0);
479 f4beb510 bellard
    set_idt(8, 0);
480 f4beb510 bellard
    set_idt(9, 0);
481 f4beb510 bellard
    set_idt(10, 0);
482 f4beb510 bellard
    set_idt(11, 0);
483 f4beb510 bellard
    set_idt(12, 0);
484 f4beb510 bellard
    set_idt(13, 0);
485 f4beb510 bellard
    set_idt(14, 0);
486 f4beb510 bellard
    set_idt(15, 0);
487 f4beb510 bellard
    set_idt(16, 0);
488 f4beb510 bellard
    set_idt(17, 0);
489 f4beb510 bellard
    set_idt(18, 0);
490 f4beb510 bellard
    set_idt(19, 0);
491 f4beb510 bellard
    set_idt(0x80, 3);
492 f4beb510 bellard
493 6dbad63e bellard
    /* linux segment setup */
494 6dbad63e bellard
    env->gdt.base = (void *)gdt_table;
495 6dbad63e bellard
    env->gdt.limit = sizeof(gdt_table) - 1;
496 f4beb510 bellard
    write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
497 f4beb510 bellard
             DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 
498 f4beb510 bellard
             (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
499 f4beb510 bellard
    write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
500 f4beb510 bellard
             DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | 
501 f4beb510 bellard
             (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
502 6dbad63e bellard
    cpu_x86_load_seg(env, R_CS, __USER_CS);
503 6dbad63e bellard
    cpu_x86_load_seg(env, R_DS, __USER_DS);
504 6dbad63e bellard
    cpu_x86_load_seg(env, R_ES, __USER_DS);
505 6dbad63e bellard
    cpu_x86_load_seg(env, R_SS, __USER_DS);
506 6dbad63e bellard
    cpu_x86_load_seg(env, R_FS, __USER_DS);
507 6dbad63e bellard
    cpu_x86_load_seg(env, R_GS, __USER_DS);
508 92ccca6a bellard
509 b346ff46 bellard
#elif defined(TARGET_ARM)
510 b346ff46 bellard
    {
511 b346ff46 bellard
        int i;
512 b346ff46 bellard
        for(i = 0; i < 16; i++) {
513 b346ff46 bellard
            env->regs[i] = regs->uregs[i];
514 b346ff46 bellard
        }
515 b346ff46 bellard
        env->cpsr = regs->uregs[16];
516 b346ff46 bellard
    }
517 93ac68bc bellard
#elif defined(TARGET_SPARC)
518 93ac68bc bellard
        env->pc = regs->u_regs[0];
519 93ac68bc bellard
        env->regwptr[6] = regs->u_regs[1]-0x40;
520 b346ff46 bellard
#else
521 b346ff46 bellard
#error unsupported target CPU
522 b346ff46 bellard
#endif
523 31e31b8a bellard
524 1b6b029e bellard
    cpu_loop(env);
525 1b6b029e bellard
    /* never exits */
526 31e31b8a bellard
    return 0;
527 31e31b8a bellard
}